116572522SSrinivas Kandagatla // SPDX-License-Identifier: GPL-2.0 216572522SSrinivas Kandagatla // Copyright (c) 2021, Linaro Limited 316572522SSrinivas Kandagatla 416572522SSrinivas Kandagatla #include <linux/module.h> 516572522SSrinivas Kandagatla #include <linux/slab.h> 616572522SSrinivas Kandagatla #include <linux/platform_device.h> 716572522SSrinivas Kandagatla #include <linux/device.h> 816572522SSrinivas Kandagatla #include <linux/kernel.h> 916572522SSrinivas Kandagatla #include <linux/component.h> 1016572522SSrinivas Kandagatla #include <sound/soc.h> 1116572522SSrinivas Kandagatla #include <linux/pm_runtime.h> 12*b90d9398SSrinivas Kandagatla #include <linux/irq.h> 1316572522SSrinivas Kandagatla #include <linux/irqdomain.h> 1416572522SSrinivas Kandagatla #include <linux/of.h> 1516572522SSrinivas Kandagatla #include <linux/soundwire/sdw.h> 1616572522SSrinivas Kandagatla #include <linux/soundwire/sdw_type.h> 1716572522SSrinivas Kandagatla #include <linux/soundwire/sdw_registers.h> 1816572522SSrinivas Kandagatla #include <linux/regmap.h> 1916572522SSrinivas Kandagatla #include <sound/soc.h> 2016572522SSrinivas Kandagatla #include <sound/soc-dapm.h> 2116572522SSrinivas Kandagatla #include "wcd938x.h" 2216572522SSrinivas Kandagatla 2316572522SSrinivas Kandagatla #define SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(m) (0xE0 + 0x10 * (m)) 2416572522SSrinivas Kandagatla 2516572522SSrinivas Kandagatla static struct wcd938x_sdw_ch_info wcd938x_sdw_rx_ch_info[] = { 2616572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_HPH_L, WCD938X_HPH_PORT, BIT(0)), 2716572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_HPH_R, WCD938X_HPH_PORT, BIT(1)), 2816572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_CLSH, WCD938X_CLSH_PORT, BIT(0)), 2916572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_COMP_L, WCD938X_COMP_PORT, BIT(0)), 3016572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_COMP_R, WCD938X_COMP_PORT, BIT(1)), 3116572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_LO, WCD938X_LO_PORT, BIT(0)), 3216572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DSD_L, WCD938X_DSD_PORT, BIT(0)), 3316572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DSD_R, WCD938X_DSD_PORT, BIT(1)), 3416572522SSrinivas Kandagatla }; 3516572522SSrinivas Kandagatla 3616572522SSrinivas Kandagatla static struct wcd938x_sdw_ch_info wcd938x_sdw_tx_ch_info[] = { 3716572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_ADC1, WCD938X_ADC_1_2_PORT, BIT(0)), 3816572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_ADC2, WCD938X_ADC_1_2_PORT, BIT(1)), 3916572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_ADC3, WCD938X_ADC_3_4_PORT, BIT(0)), 4016572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_ADC4, WCD938X_ADC_3_4_PORT, BIT(1)), 4116572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DMIC0, WCD938X_DMIC_0_3_MBHC_PORT, BIT(0)), 4216572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DMIC1, WCD938X_DMIC_0_3_MBHC_PORT, BIT(1)), 4316572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_MBHC, WCD938X_DMIC_0_3_MBHC_PORT, BIT(2)), 4416572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DMIC2, WCD938X_DMIC_0_3_MBHC_PORT, BIT(2)), 4516572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DMIC3, WCD938X_DMIC_0_3_MBHC_PORT, BIT(3)), 4616572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DMIC4, WCD938X_DMIC_4_7_PORT, BIT(0)), 4716572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DMIC5, WCD938X_DMIC_4_7_PORT, BIT(1)), 4816572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DMIC6, WCD938X_DMIC_4_7_PORT, BIT(2)), 4916572522SSrinivas Kandagatla WCD_SDW_CH(WCD938X_DMIC7, WCD938X_DMIC_4_7_PORT, BIT(3)), 5016572522SSrinivas Kandagatla }; 5116572522SSrinivas Kandagatla 5216572522SSrinivas Kandagatla static struct sdw_dpn_prop wcd938x_dpn_prop[WCD938X_MAX_SWR_PORTS] = { 5316572522SSrinivas Kandagatla { 5416572522SSrinivas Kandagatla .num = 1, 5516572522SSrinivas Kandagatla .type = SDW_DPN_SIMPLE, 5616572522SSrinivas Kandagatla .min_ch = 1, 5716572522SSrinivas Kandagatla .max_ch = 8, 5816572522SSrinivas Kandagatla .simple_ch_prep_sm = true, 5916572522SSrinivas Kandagatla }, { 6016572522SSrinivas Kandagatla .num = 2, 6116572522SSrinivas Kandagatla .type = SDW_DPN_SIMPLE, 6216572522SSrinivas Kandagatla .min_ch = 1, 6316572522SSrinivas Kandagatla .max_ch = 4, 6416572522SSrinivas Kandagatla .simple_ch_prep_sm = true, 6516572522SSrinivas Kandagatla }, { 6616572522SSrinivas Kandagatla .num = 3, 6716572522SSrinivas Kandagatla .type = SDW_DPN_SIMPLE, 6816572522SSrinivas Kandagatla .min_ch = 1, 6916572522SSrinivas Kandagatla .max_ch = 4, 7016572522SSrinivas Kandagatla .simple_ch_prep_sm = true, 7116572522SSrinivas Kandagatla }, { 7216572522SSrinivas Kandagatla .num = 4, 7316572522SSrinivas Kandagatla .type = SDW_DPN_SIMPLE, 7416572522SSrinivas Kandagatla .min_ch = 1, 7516572522SSrinivas Kandagatla .max_ch = 4, 7616572522SSrinivas Kandagatla .simple_ch_prep_sm = true, 7716572522SSrinivas Kandagatla }, { 7816572522SSrinivas Kandagatla .num = 5, 7916572522SSrinivas Kandagatla .type = SDW_DPN_SIMPLE, 8016572522SSrinivas Kandagatla .min_ch = 1, 8116572522SSrinivas Kandagatla .max_ch = 4, 8216572522SSrinivas Kandagatla .simple_ch_prep_sm = true, 8316572522SSrinivas Kandagatla } 8416572522SSrinivas Kandagatla }; 8516572522SSrinivas Kandagatla 8616572522SSrinivas Kandagatla struct device *wcd938x_sdw_device_get(struct device_node *np) 8716572522SSrinivas Kandagatla { 8816572522SSrinivas Kandagatla return bus_find_device_by_of_node(&sdw_bus_type, np); 8916572522SSrinivas Kandagatla 9016572522SSrinivas Kandagatla } 9116572522SSrinivas Kandagatla EXPORT_SYMBOL_GPL(wcd938x_sdw_device_get); 9216572522SSrinivas Kandagatla 9316572522SSrinivas Kandagatla int wcd938x_swr_get_current_bank(struct sdw_slave *sdev) 9416572522SSrinivas Kandagatla { 9516572522SSrinivas Kandagatla int bank; 9616572522SSrinivas Kandagatla 9716572522SSrinivas Kandagatla bank = sdw_read(sdev, SDW_SCP_CTRL); 9816572522SSrinivas Kandagatla 9916572522SSrinivas Kandagatla return ((bank & 0x40) ? 1 : 0); 10016572522SSrinivas Kandagatla } 10116572522SSrinivas Kandagatla EXPORT_SYMBOL_GPL(wcd938x_swr_get_current_bank); 10216572522SSrinivas Kandagatla 10316572522SSrinivas Kandagatla int wcd938x_sdw_hw_params(struct wcd938x_sdw_priv *wcd, 10416572522SSrinivas Kandagatla struct snd_pcm_substream *substream, 10516572522SSrinivas Kandagatla struct snd_pcm_hw_params *params, 10616572522SSrinivas Kandagatla struct snd_soc_dai *dai) 10716572522SSrinivas Kandagatla { 10816572522SSrinivas Kandagatla struct sdw_port_config port_config[WCD938X_MAX_SWR_PORTS]; 10916572522SSrinivas Kandagatla unsigned long ch_mask; 11016572522SSrinivas Kandagatla int i, j; 11116572522SSrinivas Kandagatla 11216572522SSrinivas Kandagatla wcd->sconfig.ch_count = 1; 11316572522SSrinivas Kandagatla wcd->active_ports = 0; 11416572522SSrinivas Kandagatla for (i = 0; i < WCD938X_MAX_SWR_PORTS; i++) { 11516572522SSrinivas Kandagatla ch_mask = wcd->port_config[i].ch_mask; 11616572522SSrinivas Kandagatla 11716572522SSrinivas Kandagatla if (!ch_mask) 11816572522SSrinivas Kandagatla continue; 11916572522SSrinivas Kandagatla 12016572522SSrinivas Kandagatla for_each_set_bit(j, &ch_mask, 4) 12116572522SSrinivas Kandagatla wcd->sconfig.ch_count++; 12216572522SSrinivas Kandagatla 12316572522SSrinivas Kandagatla port_config[wcd->active_ports] = wcd->port_config[i]; 12416572522SSrinivas Kandagatla wcd->active_ports++; 12516572522SSrinivas Kandagatla } 12616572522SSrinivas Kandagatla 12716572522SSrinivas Kandagatla wcd->sconfig.bps = 1; 12816572522SSrinivas Kandagatla wcd->sconfig.frame_rate = params_rate(params); 12916572522SSrinivas Kandagatla if (wcd->is_tx) 13016572522SSrinivas Kandagatla wcd->sconfig.direction = SDW_DATA_DIR_TX; 13116572522SSrinivas Kandagatla else 13216572522SSrinivas Kandagatla wcd->sconfig.direction = SDW_DATA_DIR_RX; 13316572522SSrinivas Kandagatla 13416572522SSrinivas Kandagatla wcd->sconfig.type = SDW_STREAM_PCM; 13516572522SSrinivas Kandagatla 13616572522SSrinivas Kandagatla return sdw_stream_add_slave(wcd->sdev, &wcd->sconfig, 13716572522SSrinivas Kandagatla &port_config[0], wcd->active_ports, 13816572522SSrinivas Kandagatla wcd->sruntime); 13916572522SSrinivas Kandagatla } 14016572522SSrinivas Kandagatla EXPORT_SYMBOL_GPL(wcd938x_sdw_hw_params); 14116572522SSrinivas Kandagatla 14216572522SSrinivas Kandagatla int wcd938x_sdw_free(struct wcd938x_sdw_priv *wcd, 14316572522SSrinivas Kandagatla struct snd_pcm_substream *substream, 14416572522SSrinivas Kandagatla struct snd_soc_dai *dai) 14516572522SSrinivas Kandagatla { 14616572522SSrinivas Kandagatla sdw_stream_remove_slave(wcd->sdev, wcd->sruntime); 14716572522SSrinivas Kandagatla 14816572522SSrinivas Kandagatla return 0; 14916572522SSrinivas Kandagatla } 15016572522SSrinivas Kandagatla EXPORT_SYMBOL_GPL(wcd938x_sdw_free); 15116572522SSrinivas Kandagatla 15216572522SSrinivas Kandagatla int wcd938x_sdw_set_sdw_stream(struct wcd938x_sdw_priv *wcd, 15316572522SSrinivas Kandagatla struct snd_soc_dai *dai, 15416572522SSrinivas Kandagatla void *stream, int direction) 15516572522SSrinivas Kandagatla { 15616572522SSrinivas Kandagatla wcd->sruntime = stream; 15716572522SSrinivas Kandagatla 15816572522SSrinivas Kandagatla return 0; 15916572522SSrinivas Kandagatla } 16016572522SSrinivas Kandagatla EXPORT_SYMBOL_GPL(wcd938x_sdw_set_sdw_stream); 16116572522SSrinivas Kandagatla 16216572522SSrinivas Kandagatla static int wcd9380_update_status(struct sdw_slave *slave, 16316572522SSrinivas Kandagatla enum sdw_slave_status status) 16416572522SSrinivas Kandagatla { 16516572522SSrinivas Kandagatla return 0; 16616572522SSrinivas Kandagatla } 16716572522SSrinivas Kandagatla 16816572522SSrinivas Kandagatla static int wcd9380_bus_config(struct sdw_slave *slave, 16916572522SSrinivas Kandagatla struct sdw_bus_params *params) 17016572522SSrinivas Kandagatla { 17116572522SSrinivas Kandagatla sdw_write(slave, SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(params->next_bank), 0x01); 17216572522SSrinivas Kandagatla 17316572522SSrinivas Kandagatla return 0; 17416572522SSrinivas Kandagatla } 17516572522SSrinivas Kandagatla 17616572522SSrinivas Kandagatla static int wcd9380_interrupt_callback(struct sdw_slave *slave, 17716572522SSrinivas Kandagatla struct sdw_slave_intr_status *status) 17816572522SSrinivas Kandagatla { 17916572522SSrinivas Kandagatla struct wcd938x_sdw_priv *wcd = dev_get_drvdata(&slave->dev); 180*b90d9398SSrinivas Kandagatla struct irq_domain *slave_irq = wcd->slave_irq; 181*b90d9398SSrinivas Kandagatla struct regmap *regmap = dev_get_regmap(&slave->dev, NULL); 182*b90d9398SSrinivas Kandagatla u32 sts1, sts2, sts3; 18316572522SSrinivas Kandagatla 184*b90d9398SSrinivas Kandagatla do { 185*b90d9398SSrinivas Kandagatla handle_nested_irq(irq_find_mapping(slave_irq, 0)); 186*b90d9398SSrinivas Kandagatla regmap_read(regmap, WCD938X_DIGITAL_INTR_STATUS_0, &sts1); 187*b90d9398SSrinivas Kandagatla regmap_read(regmap, WCD938X_DIGITAL_INTR_STATUS_1, &sts2); 188*b90d9398SSrinivas Kandagatla regmap_read(regmap, WCD938X_DIGITAL_INTR_STATUS_2, &sts3); 189*b90d9398SSrinivas Kandagatla 190*b90d9398SSrinivas Kandagatla } while (sts1 || sts2 || sts3); 191*b90d9398SSrinivas Kandagatla 192*b90d9398SSrinivas Kandagatla return IRQ_HANDLED; 19316572522SSrinivas Kandagatla } 19416572522SSrinivas Kandagatla 19516572522SSrinivas Kandagatla static struct sdw_slave_ops wcd9380_slave_ops = { 19616572522SSrinivas Kandagatla .update_status = wcd9380_update_status, 19716572522SSrinivas Kandagatla .interrupt_callback = wcd9380_interrupt_callback, 19816572522SSrinivas Kandagatla .bus_config = wcd9380_bus_config, 19916572522SSrinivas Kandagatla }; 20016572522SSrinivas Kandagatla 20116572522SSrinivas Kandagatla static int wcd938x_sdw_component_bind(struct device *dev, 20216572522SSrinivas Kandagatla struct device *master, void *data) 20316572522SSrinivas Kandagatla { 20416572522SSrinivas Kandagatla return 0; 20516572522SSrinivas Kandagatla } 20616572522SSrinivas Kandagatla 20716572522SSrinivas Kandagatla static void wcd938x_sdw_component_unbind(struct device *dev, 20816572522SSrinivas Kandagatla struct device *master, void *data) 20916572522SSrinivas Kandagatla { 21016572522SSrinivas Kandagatla } 21116572522SSrinivas Kandagatla 21216572522SSrinivas Kandagatla static const struct component_ops wcd938x_sdw_component_ops = { 21316572522SSrinivas Kandagatla .bind = wcd938x_sdw_component_bind, 21416572522SSrinivas Kandagatla .unbind = wcd938x_sdw_component_unbind, 21516572522SSrinivas Kandagatla }; 21616572522SSrinivas Kandagatla 21716572522SSrinivas Kandagatla static int wcd9380_probe(struct sdw_slave *pdev, 21816572522SSrinivas Kandagatla const struct sdw_device_id *id) 21916572522SSrinivas Kandagatla { 22016572522SSrinivas Kandagatla struct device *dev = &pdev->dev; 22116572522SSrinivas Kandagatla struct wcd938x_sdw_priv *wcd; 22216572522SSrinivas Kandagatla int ret; 22316572522SSrinivas Kandagatla 22416572522SSrinivas Kandagatla wcd = devm_kzalloc(dev, sizeof(*wcd), GFP_KERNEL); 22516572522SSrinivas Kandagatla if (!wcd) 22616572522SSrinivas Kandagatla return -ENOMEM; 22716572522SSrinivas Kandagatla 22816572522SSrinivas Kandagatla /** 22916572522SSrinivas Kandagatla * Port map index starts with 0, however the data port for this codec 23016572522SSrinivas Kandagatla * are from index 1 23116572522SSrinivas Kandagatla */ 23216572522SSrinivas Kandagatla if (of_property_read_bool(dev->of_node, "qcom,tx-port-mapping")) { 23316572522SSrinivas Kandagatla wcd->is_tx = true; 23416572522SSrinivas Kandagatla ret = of_property_read_u32_array(dev->of_node, "qcom,tx-port-mapping", 23516572522SSrinivas Kandagatla &pdev->m_port_map[1], 23616572522SSrinivas Kandagatla WCD938X_MAX_TX_SWR_PORTS); 23716572522SSrinivas Kandagatla } else { 23816572522SSrinivas Kandagatla ret = of_property_read_u32_array(dev->of_node, "qcom,rx-port-mapping", 23916572522SSrinivas Kandagatla &pdev->m_port_map[1], 24016572522SSrinivas Kandagatla WCD938X_MAX_SWR_PORTS); 24116572522SSrinivas Kandagatla } 24216572522SSrinivas Kandagatla 24316572522SSrinivas Kandagatla if (ret < 0) 24416572522SSrinivas Kandagatla dev_info(dev, "Static Port mapping not specified\n"); 24516572522SSrinivas Kandagatla 24616572522SSrinivas Kandagatla wcd->sdev = pdev; 24716572522SSrinivas Kandagatla dev_set_drvdata(dev, wcd); 24816572522SSrinivas Kandagatla 24916572522SSrinivas Kandagatla pdev->prop.scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | 25016572522SSrinivas Kandagatla SDW_SCP_INT1_BUS_CLASH | 25116572522SSrinivas Kandagatla SDW_SCP_INT1_PARITY; 25216572522SSrinivas Kandagatla pdev->prop.lane_control_support = true; 25316572522SSrinivas Kandagatla if (wcd->is_tx) { 25416572522SSrinivas Kandagatla pdev->prop.source_ports = GENMASK(WCD938X_MAX_SWR_PORTS, 0); 25516572522SSrinivas Kandagatla pdev->prop.src_dpn_prop = wcd938x_dpn_prop; 25616572522SSrinivas Kandagatla wcd->ch_info = &wcd938x_sdw_tx_ch_info[0]; 25716572522SSrinivas Kandagatla pdev->prop.wake_capable = true; 25816572522SSrinivas Kandagatla } else { 25916572522SSrinivas Kandagatla pdev->prop.sink_ports = GENMASK(WCD938X_MAX_SWR_PORTS, 0); 26016572522SSrinivas Kandagatla pdev->prop.sink_dpn_prop = wcd938x_dpn_prop; 26116572522SSrinivas Kandagatla wcd->ch_info = &wcd938x_sdw_rx_ch_info[0]; 26216572522SSrinivas Kandagatla } 26316572522SSrinivas Kandagatla 26416572522SSrinivas Kandagatla pm_runtime_set_autosuspend_delay(dev, 3000); 26516572522SSrinivas Kandagatla pm_runtime_use_autosuspend(dev); 26616572522SSrinivas Kandagatla pm_runtime_mark_last_busy(dev); 26716572522SSrinivas Kandagatla pm_runtime_set_active(dev); 26816572522SSrinivas Kandagatla pm_runtime_enable(dev); 26916572522SSrinivas Kandagatla 27016572522SSrinivas Kandagatla return component_add(dev, &wcd938x_sdw_component_ops); 27116572522SSrinivas Kandagatla } 27216572522SSrinivas Kandagatla 27316572522SSrinivas Kandagatla static const struct sdw_device_id wcd9380_slave_id[] = { 27416572522SSrinivas Kandagatla SDW_SLAVE_ENTRY(0x0217, 0x10d, 0), 27516572522SSrinivas Kandagatla {}, 27616572522SSrinivas Kandagatla }; 27716572522SSrinivas Kandagatla MODULE_DEVICE_TABLE(sdw, wcd9380_slave_id); 27816572522SSrinivas Kandagatla 27916572522SSrinivas Kandagatla static int __maybe_unused wcd938x_sdw_runtime_suspend(struct device *dev) 28016572522SSrinivas Kandagatla { 28116572522SSrinivas Kandagatla struct regmap *regmap = dev_get_regmap(dev, NULL); 28216572522SSrinivas Kandagatla 28316572522SSrinivas Kandagatla if (regmap) { 28416572522SSrinivas Kandagatla regcache_cache_only(regmap, true); 28516572522SSrinivas Kandagatla regcache_mark_dirty(regmap); 28616572522SSrinivas Kandagatla } 28716572522SSrinivas Kandagatla return 0; 28816572522SSrinivas Kandagatla } 28916572522SSrinivas Kandagatla 29016572522SSrinivas Kandagatla static int __maybe_unused wcd938x_sdw_runtime_resume(struct device *dev) 29116572522SSrinivas Kandagatla { 29216572522SSrinivas Kandagatla struct regmap *regmap = dev_get_regmap(dev, NULL); 29316572522SSrinivas Kandagatla 29416572522SSrinivas Kandagatla if (regmap) { 29516572522SSrinivas Kandagatla regcache_cache_only(regmap, false); 29616572522SSrinivas Kandagatla regcache_sync(regmap); 29716572522SSrinivas Kandagatla } 29816572522SSrinivas Kandagatla 29916572522SSrinivas Kandagatla pm_runtime_mark_last_busy(dev); 30016572522SSrinivas Kandagatla 30116572522SSrinivas Kandagatla return 0; 30216572522SSrinivas Kandagatla } 30316572522SSrinivas Kandagatla 30416572522SSrinivas Kandagatla static const struct dev_pm_ops wcd938x_sdw_pm_ops = { 30516572522SSrinivas Kandagatla SET_RUNTIME_PM_OPS(wcd938x_sdw_runtime_suspend, wcd938x_sdw_runtime_resume, NULL) 30616572522SSrinivas Kandagatla }; 30716572522SSrinivas Kandagatla 30816572522SSrinivas Kandagatla 30916572522SSrinivas Kandagatla static struct sdw_driver wcd9380_codec_driver = { 31016572522SSrinivas Kandagatla .probe = wcd9380_probe, 31116572522SSrinivas Kandagatla .ops = &wcd9380_slave_ops, 31216572522SSrinivas Kandagatla .id_table = wcd9380_slave_id, 31316572522SSrinivas Kandagatla .driver = { 31416572522SSrinivas Kandagatla .name = "wcd9380-codec", 31516572522SSrinivas Kandagatla .pm = &wcd938x_sdw_pm_ops, 31616572522SSrinivas Kandagatla } 31716572522SSrinivas Kandagatla }; 31816572522SSrinivas Kandagatla module_sdw_driver(wcd9380_codec_driver); 31916572522SSrinivas Kandagatla 32016572522SSrinivas Kandagatla MODULE_DESCRIPTION("WCD938X SDW codec driver"); 32116572522SSrinivas Kandagatla MODULE_LICENSE("GPL"); 322