xref: /openbmc/linux/sound/soc/codecs/twl4030.c (revision cfbb9be8)
1 /*
2  * ALSA SoC TWL4030 codec driver
3  *
4  * Author:      Steve Sakoman, <steve@sakoman.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * version 2 as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18  * 02110-1301 USA
19  *
20  */
21 
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/pm.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/of.h>
30 #include <linux/of_gpio.h>
31 #include <linux/mfd/twl.h>
32 #include <linux/slab.h>
33 #include <linux/gpio.h>
34 #include <sound/core.h>
35 #include <sound/pcm.h>
36 #include <sound/pcm_params.h>
37 #include <sound/soc.h>
38 #include <sound/initval.h>
39 #include <sound/tlv.h>
40 
41 /* Register descriptions are here */
42 #include <linux/mfd/twl4030-audio.h>
43 
44 /* TWL4030 PMBR1 Register */
45 #define TWL4030_PMBR1_REG		0x0D
46 /* TWL4030 PMBR1 Register GPIO6 mux bits */
47 #define TWL4030_GPIO6_PWM0_MUTE(value)	((value & 0x03) << 2)
48 
49 #define TWL4030_CACHEREGNUM	(TWL4030_REG_MISC_SET_2 + 1)
50 
51 /* codec private data */
52 struct twl4030_priv {
53 	unsigned int codec_powered;
54 
55 	/* reference counts of AIF/APLL users */
56 	unsigned int apll_enabled;
57 
58 	struct snd_pcm_substream *master_substream;
59 	struct snd_pcm_substream *slave_substream;
60 
61 	unsigned int configured;
62 	unsigned int rate;
63 	unsigned int sample_bits;
64 	unsigned int channels;
65 
66 	unsigned int sysclk;
67 
68 	/* Output (with associated amp) states */
69 	u8 hsl_enabled, hsr_enabled;
70 	u8 earpiece_enabled;
71 	u8 predrivel_enabled, predriver_enabled;
72 	u8 carkitl_enabled, carkitr_enabled;
73 	u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
74 
75 	struct twl4030_codec_data *pdata;
76 };
77 
78 static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79 {
80 	int i;
81 	u8 byte;
82 
83 	for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 		twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 		twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 	}
87 }
88 
89 static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
90 {
91 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
92 	u8 value = 0;
93 
94 	if (reg >= TWL4030_CACHEREGNUM)
95 		return -EIO;
96 
97 	switch (reg) {
98 	case TWL4030_REG_EAR_CTL:
99 	case TWL4030_REG_PREDL_CTL:
100 	case TWL4030_REG_PREDR_CTL:
101 	case TWL4030_REG_PRECKL_CTL:
102 	case TWL4030_REG_PRECKR_CTL:
103 	case TWL4030_REG_HS_GAIN_SET:
104 		value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
105 		break;
106 	default:
107 		twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
108 		break;
109 	}
110 
111 	return value;
112 }
113 
114 static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
115 				      unsigned int reg)
116 {
117 	bool write_to_reg = false;
118 
119 	/* Decide if the given register can be written */
120 	switch (reg) {
121 	case TWL4030_REG_EAR_CTL:
122 		if (twl4030->earpiece_enabled)
123 			write_to_reg = true;
124 		break;
125 	case TWL4030_REG_PREDL_CTL:
126 		if (twl4030->predrivel_enabled)
127 			write_to_reg = true;
128 		break;
129 	case TWL4030_REG_PREDR_CTL:
130 		if (twl4030->predriver_enabled)
131 			write_to_reg = true;
132 		break;
133 	case TWL4030_REG_PRECKL_CTL:
134 		if (twl4030->carkitl_enabled)
135 			write_to_reg = true;
136 		break;
137 	case TWL4030_REG_PRECKR_CTL:
138 		if (twl4030->carkitr_enabled)
139 			write_to_reg = true;
140 		break;
141 	case TWL4030_REG_HS_GAIN_SET:
142 		if (twl4030->hsl_enabled || twl4030->hsr_enabled)
143 			write_to_reg = true;
144 		break;
145 	default:
146 		/* All other register can be written */
147 		write_to_reg = true;
148 		break;
149 	}
150 
151 	return write_to_reg;
152 }
153 
154 static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
155 			 unsigned int value)
156 {
157 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
158 
159 	/* Update the ctl cache */
160 	switch (reg) {
161 	case TWL4030_REG_EAR_CTL:
162 	case TWL4030_REG_PREDL_CTL:
163 	case TWL4030_REG_PREDR_CTL:
164 	case TWL4030_REG_PRECKL_CTL:
165 	case TWL4030_REG_PRECKR_CTL:
166 	case TWL4030_REG_HS_GAIN_SET:
167 		twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
168 		break;
169 	default:
170 		break;
171 	}
172 
173 	if (twl4030_can_write_to_chip(twl4030, reg))
174 		return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
175 
176 	return 0;
177 }
178 
179 static inline void twl4030_wait_ms(int time)
180 {
181 	if (time < 60) {
182 		time *= 1000;
183 		usleep_range(time, time + 500);
184 	} else {
185 		msleep(time);
186 	}
187 }
188 
189 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
190 {
191 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
192 	int mode;
193 
194 	if (enable == twl4030->codec_powered)
195 		return;
196 
197 	if (enable)
198 		mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
199 	else
200 		mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
201 
202 	if (mode >= 0)
203 		twl4030->codec_powered = enable;
204 
205 	/* REVISIT: this delay is present in TI sample drivers */
206 	/* but there seems to be no TRM requirement for it     */
207 	udelay(10);
208 }
209 
210 static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
211 				   struct device_node *node)
212 {
213 	int value;
214 
215 	of_property_read_u32(node, "ti,digimic_delay",
216 			     &pdata->digimic_delay);
217 	of_property_read_u32(node, "ti,ramp_delay_value",
218 			     &pdata->ramp_delay_value);
219 	of_property_read_u32(node, "ti,offset_cncl_path",
220 			     &pdata->offset_cncl_path);
221 	if (!of_property_read_u32(node, "ti,hs_extmute", &value))
222 		pdata->hs_extmute = value;
223 
224 	pdata->hs_extmute_gpio = of_get_named_gpio(node,
225 						   "ti,hs_extmute_gpio", 0);
226 	if (gpio_is_valid(pdata->hs_extmute_gpio))
227 		pdata->hs_extmute = 1;
228 }
229 
230 static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
231 {
232 	struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
233 	struct device_node *twl4030_codec_node = NULL;
234 
235 	twl4030_codec_node = of_get_child_by_name(codec->dev->parent->of_node,
236 						  "codec");
237 
238 	if (!pdata && twl4030_codec_node) {
239 		pdata = devm_kzalloc(codec->dev,
240 				     sizeof(struct twl4030_codec_data),
241 				     GFP_KERNEL);
242 		if (!pdata) {
243 			of_node_put(twl4030_codec_node);
244 			return NULL;
245 		}
246 		twl4030_setup_pdata_of(pdata, twl4030_codec_node);
247 		of_node_put(twl4030_codec_node);
248 	}
249 
250 	return pdata;
251 }
252 
253 static void twl4030_init_chip(struct snd_soc_codec *codec)
254 {
255 	struct twl4030_codec_data *pdata;
256 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
257 	u8 reg, byte;
258 	int i = 0;
259 
260 	pdata = twl4030_get_pdata(codec);
261 
262 	if (pdata && pdata->hs_extmute) {
263 		if (gpio_is_valid(pdata->hs_extmute_gpio)) {
264 			int ret;
265 
266 			if (!pdata->hs_extmute_gpio)
267 				dev_warn(codec->dev,
268 					"Extmute GPIO is 0 is this correct?\n");
269 
270 			ret = gpio_request_one(pdata->hs_extmute_gpio,
271 					       GPIOF_OUT_INIT_LOW,
272 					       "hs_extmute");
273 			if (ret) {
274 				dev_err(codec->dev,
275 					"Failed to get hs_extmute GPIO\n");
276 				pdata->hs_extmute_gpio = -1;
277 			}
278 		} else {
279 			u8 pin_mux;
280 
281 			/* Set TWL4030 GPIO6 as EXTMUTE signal */
282 			twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
283 					TWL4030_PMBR1_REG);
284 			pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
285 			pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
286 			twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
287 					 TWL4030_PMBR1_REG);
288 		}
289 	}
290 
291 	/* Initialize the local ctl register cache */
292 	tw4030_init_ctl_cache(twl4030);
293 
294 	/* anti-pop when changing analog gain */
295 	reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
296 	twl4030_write(codec, TWL4030_REG_MISC_SET_1,
297 		      reg | TWL4030_SMOOTH_ANAVOL_EN);
298 
299 	twl4030_write(codec, TWL4030_REG_OPTION,
300 		      TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
301 		      TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
302 
303 	/* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
304 	twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
305 
306 	/* Machine dependent setup */
307 	if (!pdata)
308 		return;
309 
310 	twl4030->pdata = pdata;
311 
312 	reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
313 	reg &= ~TWL4030_RAMP_DELAY;
314 	reg |= (pdata->ramp_delay_value << 2);
315 	twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
316 
317 	/* initiate offset cancellation */
318 	twl4030_codec_enable(codec, 1);
319 
320 	reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
321 	reg &= ~TWL4030_OFFSET_CNCL_SEL;
322 	reg |= pdata->offset_cncl_path;
323 	twl4030_write(codec, TWL4030_REG_ANAMICL,
324 		      reg | TWL4030_CNCL_OFFSET_START);
325 
326 	/*
327 	 * Wait for offset cancellation to complete.
328 	 * Since this takes a while, do not slam the i2c.
329 	 * Start polling the status after ~20ms.
330 	 */
331 	msleep(20);
332 	do {
333 		usleep_range(1000, 2000);
334 		twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
335 		twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
336 				TWL4030_REG_ANAMICL);
337 		twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
338 	} while ((i++ < 100) &&
339 		 ((byte & TWL4030_CNCL_OFFSET_START) ==
340 		  TWL4030_CNCL_OFFSET_START));
341 
342 	twl4030_codec_enable(codec, 0);
343 }
344 
345 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
346 {
347 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
348 
349 	if (enable) {
350 		twl4030->apll_enabled++;
351 		if (twl4030->apll_enabled == 1)
352 			twl4030_audio_enable_resource(
353 							TWL4030_AUDIO_RES_APLL);
354 	} else {
355 		twl4030->apll_enabled--;
356 		if (!twl4030->apll_enabled)
357 			twl4030_audio_disable_resource(
358 							TWL4030_AUDIO_RES_APLL);
359 	}
360 }
361 
362 /* Earpiece */
363 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
364 	SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
365 	SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
366 	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
367 	SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
368 };
369 
370 /* PreDrive Left */
371 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
372 	SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
373 	SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
374 	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
375 	SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
376 };
377 
378 /* PreDrive Right */
379 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
380 	SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
381 	SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
382 	SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
383 	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
384 };
385 
386 /* Headset Left */
387 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
388 	SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
389 	SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
390 	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
391 };
392 
393 /* Headset Right */
394 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
395 	SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
396 	SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
397 	SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
398 };
399 
400 /* Carkit Left */
401 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
402 	SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
403 	SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
404 	SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
405 };
406 
407 /* Carkit Right */
408 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
409 	SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
410 	SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
411 	SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
412 };
413 
414 /* Handsfree Left */
415 static const char *twl4030_handsfreel_texts[] =
416 		{"Voice", "AudioL1", "AudioL2", "AudioR2"};
417 
418 static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
419 			    TWL4030_REG_HFL_CTL, 0,
420 			    twl4030_handsfreel_texts);
421 
422 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
423 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
424 
425 /* Handsfree Left virtual mute */
426 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
427 	SOC_DAPM_SINGLE_VIRT("Switch", 1);
428 
429 /* Handsfree Right */
430 static const char *twl4030_handsfreer_texts[] =
431 		{"Voice", "AudioR1", "AudioR2", "AudioL2"};
432 
433 static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
434 			    TWL4030_REG_HFR_CTL, 0,
435 			    twl4030_handsfreer_texts);
436 
437 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
438 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
439 
440 /* Handsfree Right virtual mute */
441 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
442 	SOC_DAPM_SINGLE_VIRT("Switch", 1);
443 
444 /* Vibra */
445 /* Vibra audio path selection */
446 static const char *twl4030_vibra_texts[] =
447 		{"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
448 
449 static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
450 			    TWL4030_REG_VIBRA_CTL, 2,
451 			    twl4030_vibra_texts);
452 
453 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
454 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
455 
456 /* Vibra path selection: local vibrator (PWM) or audio driven */
457 static const char *twl4030_vibrapath_texts[] =
458 		{"Local vibrator", "Audio"};
459 
460 static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
461 			    TWL4030_REG_VIBRA_CTL, 4,
462 			    twl4030_vibrapath_texts);
463 
464 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
465 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
466 
467 /* Left analog microphone selection */
468 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
469 	SOC_DAPM_SINGLE("Main Mic Capture Switch",
470 			TWL4030_REG_ANAMICL, 0, 1, 0),
471 	SOC_DAPM_SINGLE("Headset Mic Capture Switch",
472 			TWL4030_REG_ANAMICL, 1, 1, 0),
473 	SOC_DAPM_SINGLE("AUXL Capture Switch",
474 			TWL4030_REG_ANAMICL, 2, 1, 0),
475 	SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
476 			TWL4030_REG_ANAMICL, 3, 1, 0),
477 };
478 
479 /* Right analog microphone selection */
480 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
481 	SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
482 	SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
483 };
484 
485 /* TX1 L/R Analog/Digital microphone selection */
486 static const char *twl4030_micpathtx1_texts[] =
487 		{"Analog", "Digimic0"};
488 
489 static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
490 			    TWL4030_REG_ADCMICSEL, 0,
491 			    twl4030_micpathtx1_texts);
492 
493 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
494 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
495 
496 /* TX2 L/R Analog/Digital microphone selection */
497 static const char *twl4030_micpathtx2_texts[] =
498 		{"Analog", "Digimic1"};
499 
500 static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
501 			    TWL4030_REG_ADCMICSEL, 2,
502 			    twl4030_micpathtx2_texts);
503 
504 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
505 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
506 
507 /* Analog bypass for AudioR1 */
508 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
509 	SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
510 
511 /* Analog bypass for AudioL1 */
512 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
513 	SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
514 
515 /* Analog bypass for AudioR2 */
516 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
517 	SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
518 
519 /* Analog bypass for AudioL2 */
520 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
521 	SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
522 
523 /* Analog bypass for Voice */
524 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
525 	SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
526 
527 /* Digital bypass gain, mute instead of -30dB */
528 static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv,
529 	0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
530 	2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
531 	4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
532 );
533 
534 /* Digital bypass left (TX1L -> RX2L) */
535 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
536 	SOC_DAPM_SINGLE_TLV("Volume",
537 			TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
538 			twl4030_dapm_dbypass_tlv);
539 
540 /* Digital bypass right (TX1R -> RX2R) */
541 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
542 	SOC_DAPM_SINGLE_TLV("Volume",
543 			TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
544 			twl4030_dapm_dbypass_tlv);
545 
546 /*
547  * Voice Sidetone GAIN volume control:
548  * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
549  */
550 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
551 
552 /* Digital bypass voice: sidetone (VUL -> VDL)*/
553 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
554 	SOC_DAPM_SINGLE_TLV("Volume",
555 			TWL4030_REG_VSTPGA, 0, 0x29, 0,
556 			twl4030_dapm_dbypassv_tlv);
557 
558 /*
559  * Output PGA builder:
560  * Handle the muting and unmuting of the given output (turning off the
561  * amplifier associated with the output pin)
562  * On mute bypass the reg_cache and write 0 to the register
563  * On unmute: restore the register content from the reg_cache
564  * Outputs handled in this way:  Earpiece, PreDrivL/R, CarkitL/R
565  */
566 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask)				\
567 static int pin_name##pga_event(struct snd_soc_dapm_widget *w,		\
568 			       struct snd_kcontrol *kcontrol, int event) \
569 {									\
570 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);	\
571 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); \
572 									\
573 	switch (event) {						\
574 	case SND_SOC_DAPM_POST_PMU:					\
575 		twl4030->pin_name##_enabled = 1;			\
576 		twl4030_write(codec, reg, twl4030_read(codec, reg));	\
577 		break;							\
578 	case SND_SOC_DAPM_POST_PMD:					\
579 		twl4030->pin_name##_enabled = 0;			\
580 		twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg);	\
581 		break;							\
582 	}								\
583 	return 0;							\
584 }
585 
586 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
587 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
588 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
589 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
590 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
591 
592 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
593 {
594 	unsigned char hs_ctl;
595 
596 	hs_ctl = twl4030_read(codec, reg);
597 
598 	if (ramp) {
599 		/* HF ramp-up */
600 		hs_ctl |= TWL4030_HF_CTL_REF_EN;
601 		twl4030_write(codec, reg, hs_ctl);
602 		udelay(10);
603 		hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
604 		twl4030_write(codec, reg, hs_ctl);
605 		udelay(40);
606 		hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
607 		hs_ctl |= TWL4030_HF_CTL_HB_EN;
608 		twl4030_write(codec, reg, hs_ctl);
609 	} else {
610 		/* HF ramp-down */
611 		hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
612 		hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
613 		twl4030_write(codec, reg, hs_ctl);
614 		hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
615 		twl4030_write(codec, reg, hs_ctl);
616 		udelay(40);
617 		hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
618 		twl4030_write(codec, reg, hs_ctl);
619 	}
620 }
621 
622 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
623 			       struct snd_kcontrol *kcontrol, int event)
624 {
625 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
626 
627 	switch (event) {
628 	case SND_SOC_DAPM_POST_PMU:
629 		handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 1);
630 		break;
631 	case SND_SOC_DAPM_POST_PMD:
632 		handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 0);
633 		break;
634 	}
635 	return 0;
636 }
637 
638 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
639 			       struct snd_kcontrol *kcontrol, int event)
640 {
641 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
642 
643 	switch (event) {
644 	case SND_SOC_DAPM_POST_PMU:
645 		handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 1);
646 		break;
647 	case SND_SOC_DAPM_POST_PMD:
648 		handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 0);
649 		break;
650 	}
651 	return 0;
652 }
653 
654 static int vibramux_event(struct snd_soc_dapm_widget *w,
655 			  struct snd_kcontrol *kcontrol, int event)
656 {
657 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
658 
659 	twl4030_write(codec, TWL4030_REG_VIBRA_SET, 0xff);
660 	return 0;
661 }
662 
663 static int apll_event(struct snd_soc_dapm_widget *w,
664 		      struct snd_kcontrol *kcontrol, int event)
665 {
666 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
667 
668 	switch (event) {
669 	case SND_SOC_DAPM_PRE_PMU:
670 		twl4030_apll_enable(codec, 1);
671 		break;
672 	case SND_SOC_DAPM_POST_PMD:
673 		twl4030_apll_enable(codec, 0);
674 		break;
675 	}
676 	return 0;
677 }
678 
679 static int aif_event(struct snd_soc_dapm_widget *w,
680 		     struct snd_kcontrol *kcontrol, int event)
681 {
682 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
683 	u8 audio_if;
684 
685 	audio_if = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
686 	switch (event) {
687 	case SND_SOC_DAPM_PRE_PMU:
688 		/* Enable AIF */
689 		/* enable the PLL before we use it to clock the DAI */
690 		twl4030_apll_enable(codec, 1);
691 
692 		twl4030_write(codec, TWL4030_REG_AUDIO_IF,
693 			      audio_if | TWL4030_AIF_EN);
694 		break;
695 	case SND_SOC_DAPM_POST_PMD:
696 		/* disable the DAI before we stop it's source PLL */
697 		twl4030_write(codec, TWL4030_REG_AUDIO_IF,
698 			      audio_if &  ~TWL4030_AIF_EN);
699 		twl4030_apll_enable(codec, 0);
700 		break;
701 	}
702 	return 0;
703 }
704 
705 static void headset_ramp(struct snd_soc_codec *codec, int ramp)
706 {
707 	unsigned char hs_gain, hs_pop;
708 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
709 	struct twl4030_codec_data *pdata = twl4030->pdata;
710 	/* Base values for ramp delay calculation: 2^19 - 2^26 */
711 	unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
712 				    8388608, 16777216, 33554432, 67108864};
713 	unsigned int delay;
714 
715 	hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
716 	hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
717 	delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
718 		twl4030->sysclk) + 1;
719 
720 	/* Enable external mute control, this dramatically reduces
721 	 * the pop-noise */
722 	if (pdata && pdata->hs_extmute) {
723 		if (gpio_is_valid(pdata->hs_extmute_gpio)) {
724 			gpio_set_value(pdata->hs_extmute_gpio, 1);
725 		} else {
726 			hs_pop |= TWL4030_EXTMUTE;
727 			twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
728 		}
729 	}
730 
731 	if (ramp) {
732 		/* Headset ramp-up according to the TRM */
733 		hs_pop |= TWL4030_VMID_EN;
734 		twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
735 		/* Actually write to the register */
736 		twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
737 				 TWL4030_REG_HS_GAIN_SET);
738 		hs_pop |= TWL4030_RAMP_EN;
739 		twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
740 		/* Wait ramp delay time + 1, so the VMID can settle */
741 		twl4030_wait_ms(delay);
742 	} else {
743 		/* Headset ramp-down _not_ according to
744 		 * the TRM, but in a way that it is working */
745 		hs_pop &= ~TWL4030_RAMP_EN;
746 		twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
747 		/* Wait ramp delay time + 1, so the VMID can settle */
748 		twl4030_wait_ms(delay);
749 		/* Bypass the reg_cache to mute the headset */
750 		twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
751 				 TWL4030_REG_HS_GAIN_SET);
752 
753 		hs_pop &= ~TWL4030_VMID_EN;
754 		twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
755 	}
756 
757 	/* Disable external mute */
758 	if (pdata && pdata->hs_extmute) {
759 		if (gpio_is_valid(pdata->hs_extmute_gpio)) {
760 			gpio_set_value(pdata->hs_extmute_gpio, 0);
761 		} else {
762 			hs_pop &= ~TWL4030_EXTMUTE;
763 			twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
764 		}
765 	}
766 }
767 
768 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
769 			     struct snd_kcontrol *kcontrol, int event)
770 {
771 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
772 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
773 
774 	switch (event) {
775 	case SND_SOC_DAPM_POST_PMU:
776 		/* Do the ramp-up only once */
777 		if (!twl4030->hsr_enabled)
778 			headset_ramp(codec, 1);
779 
780 		twl4030->hsl_enabled = 1;
781 		break;
782 	case SND_SOC_DAPM_POST_PMD:
783 		/* Do the ramp-down only if both headsetL/R is disabled */
784 		if (!twl4030->hsr_enabled)
785 			headset_ramp(codec, 0);
786 
787 		twl4030->hsl_enabled = 0;
788 		break;
789 	}
790 	return 0;
791 }
792 
793 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
794 			     struct snd_kcontrol *kcontrol, int event)
795 {
796 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
797 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
798 
799 	switch (event) {
800 	case SND_SOC_DAPM_POST_PMU:
801 		/* Do the ramp-up only once */
802 		if (!twl4030->hsl_enabled)
803 			headset_ramp(codec, 1);
804 
805 		twl4030->hsr_enabled = 1;
806 		break;
807 	case SND_SOC_DAPM_POST_PMD:
808 		/* Do the ramp-down only if both headsetL/R is disabled */
809 		if (!twl4030->hsl_enabled)
810 			headset_ramp(codec, 0);
811 
812 		twl4030->hsr_enabled = 0;
813 		break;
814 	}
815 	return 0;
816 }
817 
818 static int digimic_event(struct snd_soc_dapm_widget *w,
819 			 struct snd_kcontrol *kcontrol, int event)
820 {
821 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
822 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
823 	struct twl4030_codec_data *pdata = twl4030->pdata;
824 
825 	if (pdata && pdata->digimic_delay)
826 		twl4030_wait_ms(pdata->digimic_delay);
827 	return 0;
828 }
829 
830 /*
831  * Some of the gain controls in TWL (mostly those which are associated with
832  * the outputs) are implemented in an interesting way:
833  * 0x0 : Power down (mute)
834  * 0x1 : 6dB
835  * 0x2 : 0 dB
836  * 0x3 : -6 dB
837  * Inverting not going to help with these.
838  * Custom volsw and volsw_2r get/put functions to handle these gain bits.
839  */
840 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
841 				     struct snd_ctl_elem_value *ucontrol)
842 {
843 	struct soc_mixer_control *mc =
844 		(struct soc_mixer_control *)kcontrol->private_value;
845 	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
846 	unsigned int reg = mc->reg;
847 	unsigned int shift = mc->shift;
848 	unsigned int rshift = mc->rshift;
849 	int max = mc->max;
850 	int mask = (1 << fls(max)) - 1;
851 
852 	ucontrol->value.integer.value[0] =
853 		(twl4030_read(codec, reg) >> shift) & mask;
854 	if (ucontrol->value.integer.value[0])
855 		ucontrol->value.integer.value[0] =
856 			max + 1 - ucontrol->value.integer.value[0];
857 
858 	if (shift != rshift) {
859 		ucontrol->value.integer.value[1] =
860 			(twl4030_read(codec, reg) >> rshift) & mask;
861 		if (ucontrol->value.integer.value[1])
862 			ucontrol->value.integer.value[1] =
863 				max + 1 - ucontrol->value.integer.value[1];
864 	}
865 
866 	return 0;
867 }
868 
869 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
870 				     struct snd_ctl_elem_value *ucontrol)
871 {
872 	struct soc_mixer_control *mc =
873 		(struct soc_mixer_control *)kcontrol->private_value;
874 	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
875 	unsigned int reg = mc->reg;
876 	unsigned int shift = mc->shift;
877 	unsigned int rshift = mc->rshift;
878 	int max = mc->max;
879 	int mask = (1 << fls(max)) - 1;
880 	unsigned short val, val2, val_mask;
881 
882 	val = (ucontrol->value.integer.value[0] & mask);
883 
884 	val_mask = mask << shift;
885 	if (val)
886 		val = max + 1 - val;
887 	val = val << shift;
888 	if (shift != rshift) {
889 		val2 = (ucontrol->value.integer.value[1] & mask);
890 		val_mask |= mask << rshift;
891 		if (val2)
892 			val2 = max + 1 - val2;
893 		val |= val2 << rshift;
894 	}
895 	return snd_soc_update_bits(codec, reg, val_mask, val);
896 }
897 
898 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
899 					struct snd_ctl_elem_value *ucontrol)
900 {
901 	struct soc_mixer_control *mc =
902 		(struct soc_mixer_control *)kcontrol->private_value;
903 	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
904 	unsigned int reg = mc->reg;
905 	unsigned int reg2 = mc->rreg;
906 	unsigned int shift = mc->shift;
907 	int max = mc->max;
908 	int mask = (1<<fls(max))-1;
909 
910 	ucontrol->value.integer.value[0] =
911 		(twl4030_read(codec, reg) >> shift) & mask;
912 	ucontrol->value.integer.value[1] =
913 		(twl4030_read(codec, reg2) >> shift) & mask;
914 
915 	if (ucontrol->value.integer.value[0])
916 		ucontrol->value.integer.value[0] =
917 			max + 1 - ucontrol->value.integer.value[0];
918 	if (ucontrol->value.integer.value[1])
919 		ucontrol->value.integer.value[1] =
920 			max + 1 - ucontrol->value.integer.value[1];
921 
922 	return 0;
923 }
924 
925 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
926 					struct snd_ctl_elem_value *ucontrol)
927 {
928 	struct soc_mixer_control *mc =
929 		(struct soc_mixer_control *)kcontrol->private_value;
930 	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
931 	unsigned int reg = mc->reg;
932 	unsigned int reg2 = mc->rreg;
933 	unsigned int shift = mc->shift;
934 	int max = mc->max;
935 	int mask = (1 << fls(max)) - 1;
936 	int err;
937 	unsigned short val, val2, val_mask;
938 
939 	val_mask = mask << shift;
940 	val = (ucontrol->value.integer.value[0] & mask);
941 	val2 = (ucontrol->value.integer.value[1] & mask);
942 
943 	if (val)
944 		val = max + 1 - val;
945 	if (val2)
946 		val2 = max + 1 - val2;
947 
948 	val = val << shift;
949 	val2 = val2 << shift;
950 
951 	err = snd_soc_update_bits(codec, reg, val_mask, val);
952 	if (err < 0)
953 		return err;
954 
955 	err = snd_soc_update_bits(codec, reg2, val_mask, val2);
956 	return err;
957 }
958 
959 /* Codec operation modes */
960 static const char *twl4030_op_modes_texts[] = {
961 	"Option 2 (voice/audio)", "Option 1 (audio)"
962 };
963 
964 static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
965 			    TWL4030_REG_CODEC_MODE, 0,
966 			    twl4030_op_modes_texts);
967 
968 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
969 	struct snd_ctl_elem_value *ucontrol)
970 {
971 	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
972 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
973 
974 	if (twl4030->configured) {
975 		dev_err(codec->dev,
976 			"operation mode cannot be changed on-the-fly\n");
977 		return -EBUSY;
978 	}
979 
980 	return snd_soc_put_enum_double(kcontrol, ucontrol);
981 }
982 
983 /*
984  * FGAIN volume control:
985  * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
986  */
987 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
988 
989 /*
990  * CGAIN volume control:
991  * 0 dB to 12 dB in 6 dB steps
992  * value 2 and 3 means 12 dB
993  */
994 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
995 
996 /*
997  * Voice Downlink GAIN volume control:
998  * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
999  */
1000 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1001 
1002 /*
1003  * Analog playback gain
1004  * -24 dB to 12 dB in 2 dB steps
1005  */
1006 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1007 
1008 /*
1009  * Gain controls tied to outputs
1010  * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1011  */
1012 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1013 
1014 /*
1015  * Gain control for earpiece amplifier
1016  * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1017  */
1018 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1019 
1020 /*
1021  * Capture gain after the ADCs
1022  * from 0 dB to 31 dB in 1 dB steps
1023  */
1024 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1025 
1026 /*
1027  * Gain control for input amplifiers
1028  * 0 dB to 30 dB in 6 dB steps
1029  */
1030 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1031 
1032 /* AVADC clock priority */
1033 static const char *twl4030_avadc_clk_priority_texts[] = {
1034 	"Voice high priority", "HiFi high priority"
1035 };
1036 
1037 static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
1038 			    TWL4030_REG_AVADC_CTL, 2,
1039 			    twl4030_avadc_clk_priority_texts);
1040 
1041 static const char *twl4030_rampdelay_texts[] = {
1042 	"27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1043 	"437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1044 	"3495/2581/1748 ms"
1045 };
1046 
1047 static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
1048 			    TWL4030_REG_HS_POPN_SET, 2,
1049 			    twl4030_rampdelay_texts);
1050 
1051 /* Vibra H-bridge direction mode */
1052 static const char *twl4030_vibradirmode_texts[] = {
1053 	"Vibra H-bridge direction", "Audio data MSB",
1054 };
1055 
1056 static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
1057 			    TWL4030_REG_VIBRA_CTL, 5,
1058 			    twl4030_vibradirmode_texts);
1059 
1060 /* Vibra H-bridge direction */
1061 static const char *twl4030_vibradir_texts[] = {
1062 	"Positive polarity", "Negative polarity",
1063 };
1064 
1065 static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
1066 			    TWL4030_REG_VIBRA_CTL, 1,
1067 			    twl4030_vibradir_texts);
1068 
1069 /* Digimic Left and right swapping */
1070 static const char *twl4030_digimicswap_texts[] = {
1071 	"Not swapped", "Swapped",
1072 };
1073 
1074 static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
1075 			    TWL4030_REG_MISC_SET_1, 0,
1076 			    twl4030_digimicswap_texts);
1077 
1078 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1079 	/* Codec operation mode control */
1080 	SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1081 		snd_soc_get_enum_double,
1082 		snd_soc_put_twl4030_opmode_enum_double),
1083 
1084 	/* Common playback gain controls */
1085 	SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1086 		TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1087 		0, 0x3f, 0, digital_fine_tlv),
1088 	SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1089 		TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1090 		0, 0x3f, 0, digital_fine_tlv),
1091 
1092 	SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1093 		TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1094 		6, 0x2, 0, digital_coarse_tlv),
1095 	SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1096 		TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1097 		6, 0x2, 0, digital_coarse_tlv),
1098 
1099 	SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1100 		TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1101 		3, 0x12, 1, analog_tlv),
1102 	SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1103 		TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1104 		3, 0x12, 1, analog_tlv),
1105 	SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1106 		TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1107 		1, 1, 0),
1108 	SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1109 		TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1110 		1, 1, 0),
1111 
1112 	/* Common voice downlink gain controls */
1113 	SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1114 		TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1115 
1116 	SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1117 		TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1118 
1119 	SOC_SINGLE("DAC Voice Analog Downlink Switch",
1120 		TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1121 
1122 	/* Separate output gain controls */
1123 	SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
1124 		TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1125 		4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1126 		snd_soc_put_volsw_r2_twl4030, output_tvl),
1127 
1128 	SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1129 		TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1130 		snd_soc_put_volsw_twl4030, output_tvl),
1131 
1132 	SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
1133 		TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1134 		4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1135 		snd_soc_put_volsw_r2_twl4030, output_tvl),
1136 
1137 	SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1138 		TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1139 		snd_soc_put_volsw_twl4030, output_ear_tvl),
1140 
1141 	/* Common capture gain controls */
1142 	SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1143 		TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1144 		0, 0x1f, 0, digital_capture_tlv),
1145 	SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1146 		TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1147 		0, 0x1f, 0, digital_capture_tlv),
1148 
1149 	SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1150 		0, 3, 5, 0, input_gain_tlv),
1151 
1152 	SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1153 
1154 	SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1155 
1156 	SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1157 	SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1158 
1159 	SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1160 };
1161 
1162 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1163 	/* Left channel inputs */
1164 	SND_SOC_DAPM_INPUT("MAINMIC"),
1165 	SND_SOC_DAPM_INPUT("HSMIC"),
1166 	SND_SOC_DAPM_INPUT("AUXL"),
1167 	SND_SOC_DAPM_INPUT("CARKITMIC"),
1168 	/* Right channel inputs */
1169 	SND_SOC_DAPM_INPUT("SUBMIC"),
1170 	SND_SOC_DAPM_INPUT("AUXR"),
1171 	/* Digital microphones (Stereo) */
1172 	SND_SOC_DAPM_INPUT("DIGIMIC0"),
1173 	SND_SOC_DAPM_INPUT("DIGIMIC1"),
1174 
1175 	/* Outputs */
1176 	SND_SOC_DAPM_OUTPUT("EARPIECE"),
1177 	SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1178 	SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1179 	SND_SOC_DAPM_OUTPUT("HSOL"),
1180 	SND_SOC_DAPM_OUTPUT("HSOR"),
1181 	SND_SOC_DAPM_OUTPUT("CARKITL"),
1182 	SND_SOC_DAPM_OUTPUT("CARKITR"),
1183 	SND_SOC_DAPM_OUTPUT("HFL"),
1184 	SND_SOC_DAPM_OUTPUT("HFR"),
1185 	SND_SOC_DAPM_OUTPUT("VIBRA"),
1186 
1187 	/* AIF and APLL clocks for running DAIs (including loopback) */
1188 	SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1189 	SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1190 	SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1191 
1192 	/* DACs */
1193 	SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1194 	SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1195 	SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1196 	SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1197 	SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
1198 
1199 	SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1200 			    TWL4030_REG_VOICE_IF, 6, 0),
1201 
1202 	/* Analog bypasses */
1203 	SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1204 			&twl4030_dapm_abypassr1_control),
1205 	SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1206 			&twl4030_dapm_abypassl1_control),
1207 	SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1208 			&twl4030_dapm_abypassr2_control),
1209 	SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1210 			&twl4030_dapm_abypassl2_control),
1211 	SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1212 			&twl4030_dapm_abypassv_control),
1213 
1214 	/* Master analog loopback switch */
1215 	SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1216 			    NULL, 0),
1217 
1218 	/* Digital bypasses */
1219 	SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1220 			&twl4030_dapm_dbypassl_control),
1221 	SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1222 			&twl4030_dapm_dbypassr_control),
1223 	SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1224 			&twl4030_dapm_dbypassv_control),
1225 
1226 	/* Digital mixers, power control for the physical DACs */
1227 	SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1228 			TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1229 	SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1230 			TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1231 	SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1232 			TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1233 	SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1234 			TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1235 	SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1236 			TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1237 
1238 	/* Analog mixers, power control for the physical PGAs */
1239 	SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1240 			TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1241 	SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1242 			TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1243 	SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1244 			TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1245 	SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1246 			TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1247 	SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1248 			TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1249 
1250 	SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1251 			    SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1252 
1253 	SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1254 			    SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1255 
1256 	/* Output MIXER controls */
1257 	/* Earpiece */
1258 	SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1259 			&twl4030_dapm_earpiece_controls[0],
1260 			ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1261 	SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1262 			0, 0, NULL, 0, earpiecepga_event,
1263 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1264 	/* PreDrivL/R */
1265 	SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1266 			&twl4030_dapm_predrivel_controls[0],
1267 			ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1268 	SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1269 			0, 0, NULL, 0, predrivelpga_event,
1270 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1271 	SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1272 			&twl4030_dapm_predriver_controls[0],
1273 			ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1274 	SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1275 			0, 0, NULL, 0, predriverpga_event,
1276 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1277 	/* HeadsetL/R */
1278 	SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1279 			&twl4030_dapm_hsol_controls[0],
1280 			ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1281 	SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1282 			0, 0, NULL, 0, headsetlpga_event,
1283 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1284 	SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1285 			&twl4030_dapm_hsor_controls[0],
1286 			ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1287 	SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1288 			0, 0, NULL, 0, headsetrpga_event,
1289 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1290 	/* CarkitL/R */
1291 	SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1292 			&twl4030_dapm_carkitl_controls[0],
1293 			ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1294 	SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1295 			0, 0, NULL, 0, carkitlpga_event,
1296 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1297 	SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1298 			&twl4030_dapm_carkitr_controls[0],
1299 			ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1300 	SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1301 			0, 0, NULL, 0, carkitrpga_event,
1302 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1303 
1304 	/* Output MUX controls */
1305 	/* HandsfreeL/R */
1306 	SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1307 		&twl4030_dapm_handsfreel_control),
1308 	SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1309 			&twl4030_dapm_handsfreelmute_control),
1310 	SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1311 			0, 0, NULL, 0, handsfreelpga_event,
1312 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1313 	SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1314 		&twl4030_dapm_handsfreer_control),
1315 	SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1316 			&twl4030_dapm_handsfreermute_control),
1317 	SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1318 			0, 0, NULL, 0, handsfreerpga_event,
1319 			SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1320 	/* Vibra */
1321 	SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1322 			   &twl4030_dapm_vibra_control, vibramux_event,
1323 			   SND_SOC_DAPM_PRE_PMU),
1324 	SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1325 		&twl4030_dapm_vibrapath_control),
1326 
1327 	/* Introducing four virtual ADC, since TWL4030 have four channel for
1328 	   capture */
1329 	SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1330 	SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1331 	SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1332 	SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
1333 
1334 	SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1335 			     TWL4030_REG_VOICE_IF, 5, 0),
1336 
1337 	/* Analog/Digital mic path selection.
1338 	   TX1 Left/Right: either analog Left/Right or Digimic0
1339 	   TX2 Left/Right: either analog Left/Right or Digimic1 */
1340 	SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1341 		&twl4030_dapm_micpathtx1_control),
1342 	SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1343 		&twl4030_dapm_micpathtx2_control),
1344 
1345 	/* Analog input mixers for the capture amplifiers */
1346 	SND_SOC_DAPM_MIXER("Analog Left",
1347 		TWL4030_REG_ANAMICL, 4, 0,
1348 		&twl4030_dapm_analoglmic_controls[0],
1349 		ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1350 	SND_SOC_DAPM_MIXER("Analog Right",
1351 		TWL4030_REG_ANAMICR, 4, 0,
1352 		&twl4030_dapm_analogrmic_controls[0],
1353 		ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1354 
1355 	SND_SOC_DAPM_PGA("ADC Physical Left",
1356 		TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1357 	SND_SOC_DAPM_PGA("ADC Physical Right",
1358 		TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1359 
1360 	SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1361 		TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1362 		digimic_event, SND_SOC_DAPM_POST_PMU),
1363 	SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1364 		TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1365 		digimic_event, SND_SOC_DAPM_POST_PMU),
1366 
1367 	SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1368 			    NULL, 0),
1369 	SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1370 			    NULL, 0),
1371 
1372 	/* Microphone bias */
1373 	SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1374 			    TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1375 	SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1376 			    TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1377 	SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1378 			    TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
1379 
1380 	SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
1381 };
1382 
1383 static const struct snd_soc_dapm_route intercon[] = {
1384 	/* Stream -> DAC mapping */
1385 	{"DAC Right1", NULL, "HiFi Playback"},
1386 	{"DAC Left1", NULL, "HiFi Playback"},
1387 	{"DAC Right2", NULL, "HiFi Playback"},
1388 	{"DAC Left2", NULL, "HiFi Playback"},
1389 	{"DAC Voice", NULL, "VAIFIN"},
1390 
1391 	/* ADC -> Stream mapping */
1392 	{"HiFi Capture", NULL, "ADC Virtual Left1"},
1393 	{"HiFi Capture", NULL, "ADC Virtual Right1"},
1394 	{"HiFi Capture", NULL, "ADC Virtual Left2"},
1395 	{"HiFi Capture", NULL, "ADC Virtual Right2"},
1396 	{"VAIFOUT", NULL, "ADC Virtual Left2"},
1397 	{"VAIFOUT", NULL, "ADC Virtual Right2"},
1398 	{"VAIFOUT", NULL, "VIF Enable"},
1399 
1400 	{"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1401 	{"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1402 	{"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1403 	{"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1404 	{"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1405 
1406 	/* Supply for the digital part (APLL) */
1407 	{"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1408 
1409 	{"DAC Left1", NULL, "AIF Enable"},
1410 	{"DAC Right1", NULL, "AIF Enable"},
1411 	{"DAC Left2", NULL, "AIF Enable"},
1412 	{"DAC Right1", NULL, "AIF Enable"},
1413 	{"DAC Voice", NULL, "VIF Enable"},
1414 
1415 	{"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1416 	{"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1417 
1418 	{"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1419 	{"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1420 	{"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1421 	{"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1422 	{"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1423 
1424 	/* Internal playback routings */
1425 	/* Earpiece */
1426 	{"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1427 	{"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1428 	{"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1429 	{"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1430 	{"Earpiece PGA", NULL, "Earpiece Mixer"},
1431 	/* PreDrivL */
1432 	{"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1433 	{"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1434 	{"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1435 	{"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1436 	{"PredriveL PGA", NULL, "PredriveL Mixer"},
1437 	/* PreDrivR */
1438 	{"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1439 	{"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1440 	{"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1441 	{"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1442 	{"PredriveR PGA", NULL, "PredriveR Mixer"},
1443 	/* HeadsetL */
1444 	{"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1445 	{"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1446 	{"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1447 	{"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1448 	/* HeadsetR */
1449 	{"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1450 	{"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1451 	{"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1452 	{"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1453 	/* CarkitL */
1454 	{"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1455 	{"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1456 	{"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1457 	{"CarkitL PGA", NULL, "CarkitL Mixer"},
1458 	/* CarkitR */
1459 	{"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1460 	{"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1461 	{"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1462 	{"CarkitR PGA", NULL, "CarkitR Mixer"},
1463 	/* HandsfreeL */
1464 	{"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1465 	{"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1466 	{"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1467 	{"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1468 	{"HandsfreeL", "Switch", "HandsfreeL Mux"},
1469 	{"HandsfreeL PGA", NULL, "HandsfreeL"},
1470 	/* HandsfreeR */
1471 	{"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1472 	{"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1473 	{"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1474 	{"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1475 	{"HandsfreeR", "Switch", "HandsfreeR Mux"},
1476 	{"HandsfreeR PGA", NULL, "HandsfreeR"},
1477 	/* Vibra */
1478 	{"Vibra Mux", "AudioL1", "DAC Left1"},
1479 	{"Vibra Mux", "AudioR1", "DAC Right1"},
1480 	{"Vibra Mux", "AudioL2", "DAC Left2"},
1481 	{"Vibra Mux", "AudioR2", "DAC Right2"},
1482 
1483 	/* outputs */
1484 	/* Must be always connected (for AIF and APLL) */
1485 	{"Virtual HiFi OUT", NULL, "DAC Left1"},
1486 	{"Virtual HiFi OUT", NULL, "DAC Right1"},
1487 	{"Virtual HiFi OUT", NULL, "DAC Left2"},
1488 	{"Virtual HiFi OUT", NULL, "DAC Right2"},
1489 	/* Must be always connected (for APLL) */
1490 	{"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1491 	/* Physical outputs */
1492 	{"EARPIECE", NULL, "Earpiece PGA"},
1493 	{"PREDRIVEL", NULL, "PredriveL PGA"},
1494 	{"PREDRIVER", NULL, "PredriveR PGA"},
1495 	{"HSOL", NULL, "HeadsetL PGA"},
1496 	{"HSOR", NULL, "HeadsetR PGA"},
1497 	{"CARKITL", NULL, "CarkitL PGA"},
1498 	{"CARKITR", NULL, "CarkitR PGA"},
1499 	{"HFL", NULL, "HandsfreeL PGA"},
1500 	{"HFR", NULL, "HandsfreeR PGA"},
1501 	{"Vibra Route", "Audio", "Vibra Mux"},
1502 	{"VIBRA", NULL, "Vibra Route"},
1503 
1504 	/* Capture path */
1505 	/* Must be always connected (for AIF and APLL) */
1506 	{"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1507 	{"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1508 	{"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1509 	{"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1510 	/* Physical inputs */
1511 	{"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1512 	{"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1513 	{"Analog Left", "AUXL Capture Switch", "AUXL"},
1514 	{"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1515 
1516 	{"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1517 	{"Analog Right", "AUXR Capture Switch", "AUXR"},
1518 
1519 	{"ADC Physical Left", NULL, "Analog Left"},
1520 	{"ADC Physical Right", NULL, "Analog Right"},
1521 
1522 	{"Digimic0 Enable", NULL, "DIGIMIC0"},
1523 	{"Digimic1 Enable", NULL, "DIGIMIC1"},
1524 
1525 	{"DIGIMIC0", NULL, "micbias1 select"},
1526 	{"DIGIMIC1", NULL, "micbias2 select"},
1527 
1528 	/* TX1 Left capture path */
1529 	{"TX1 Capture Route", "Analog", "ADC Physical Left"},
1530 	{"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1531 	/* TX1 Right capture path */
1532 	{"TX1 Capture Route", "Analog", "ADC Physical Right"},
1533 	{"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1534 	/* TX2 Left capture path */
1535 	{"TX2 Capture Route", "Analog", "ADC Physical Left"},
1536 	{"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1537 	/* TX2 Right capture path */
1538 	{"TX2 Capture Route", "Analog", "ADC Physical Right"},
1539 	{"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1540 
1541 	{"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1542 	{"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1543 	{"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1544 	{"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1545 
1546 	{"ADC Virtual Left1", NULL, "AIF Enable"},
1547 	{"ADC Virtual Right1", NULL, "AIF Enable"},
1548 	{"ADC Virtual Left2", NULL, "AIF Enable"},
1549 	{"ADC Virtual Right2", NULL, "AIF Enable"},
1550 
1551 	/* Analog bypass routes */
1552 	{"Right1 Analog Loopback", "Switch", "Analog Right"},
1553 	{"Left1 Analog Loopback", "Switch", "Analog Left"},
1554 	{"Right2 Analog Loopback", "Switch", "Analog Right"},
1555 	{"Left2 Analog Loopback", "Switch", "Analog Left"},
1556 	{"Voice Analog Loopback", "Switch", "Analog Left"},
1557 
1558 	/* Supply for the Analog loopbacks */
1559 	{"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1560 	{"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1561 	{"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1562 	{"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1563 	{"Voice Analog Loopback", NULL, "FM Loop Enable"},
1564 
1565 	{"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1566 	{"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1567 	{"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1568 	{"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1569 	{"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1570 
1571 	/* Digital bypass routes */
1572 	{"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1573 	{"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1574 	{"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1575 
1576 	{"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1577 	{"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1578 	{"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1579 
1580 };
1581 
1582 static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1583 				  enum snd_soc_bias_level level)
1584 {
1585 	switch (level) {
1586 	case SND_SOC_BIAS_ON:
1587 		break;
1588 	case SND_SOC_BIAS_PREPARE:
1589 		break;
1590 	case SND_SOC_BIAS_STANDBY:
1591 		if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
1592 			twl4030_codec_enable(codec, 1);
1593 		break;
1594 	case SND_SOC_BIAS_OFF:
1595 		twl4030_codec_enable(codec, 0);
1596 		break;
1597 	}
1598 
1599 	return 0;
1600 }
1601 
1602 static void twl4030_constraints(struct twl4030_priv *twl4030,
1603 				struct snd_pcm_substream *mst_substream)
1604 {
1605 	struct snd_pcm_substream *slv_substream;
1606 
1607 	/* Pick the stream, which need to be constrained */
1608 	if (mst_substream == twl4030->master_substream)
1609 		slv_substream = twl4030->slave_substream;
1610 	else if (mst_substream == twl4030->slave_substream)
1611 		slv_substream = twl4030->master_substream;
1612 	else /* This should not happen.. */
1613 		return;
1614 
1615 	/* Set the constraints according to the already configured stream */
1616 	snd_pcm_hw_constraint_single(slv_substream->runtime,
1617 				SNDRV_PCM_HW_PARAM_RATE,
1618 				twl4030->rate);
1619 
1620 	snd_pcm_hw_constraint_single(slv_substream->runtime,
1621 				SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1622 				twl4030->sample_bits);
1623 
1624 	snd_pcm_hw_constraint_single(slv_substream->runtime,
1625 				SNDRV_PCM_HW_PARAM_CHANNELS,
1626 				twl4030->channels);
1627 }
1628 
1629 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1630  * capture has to be enabled/disabled. */
1631 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1632 			       int enable)
1633 {
1634 	u8 reg, mask;
1635 
1636 	reg = twl4030_read(codec, TWL4030_REG_OPTION);
1637 
1638 	if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1639 		mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1640 	else
1641 		mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1642 
1643 	if (enable)
1644 		reg |= mask;
1645 	else
1646 		reg &= ~mask;
1647 
1648 	twl4030_write(codec, TWL4030_REG_OPTION, reg);
1649 }
1650 
1651 static int twl4030_startup(struct snd_pcm_substream *substream,
1652 			   struct snd_soc_dai *dai)
1653 {
1654 	struct snd_soc_codec *codec = dai->codec;
1655 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1656 
1657 	if (twl4030->master_substream) {
1658 		twl4030->slave_substream = substream;
1659 		/* The DAI has one configuration for playback and capture, so
1660 		 * if the DAI has been already configured then constrain this
1661 		 * substream to match it. */
1662 		if (twl4030->configured)
1663 			twl4030_constraints(twl4030, twl4030->master_substream);
1664 	} else {
1665 		if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
1666 			TWL4030_OPTION_1)) {
1667 			/* In option2 4 channel is not supported, set the
1668 			 * constraint for the first stream for channels, the
1669 			 * second stream will 'inherit' this cosntraint */
1670 			snd_pcm_hw_constraint_single(substream->runtime,
1671 						     SNDRV_PCM_HW_PARAM_CHANNELS,
1672 						     2);
1673 		}
1674 		twl4030->master_substream = substream;
1675 	}
1676 
1677 	return 0;
1678 }
1679 
1680 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1681 			     struct snd_soc_dai *dai)
1682 {
1683 	struct snd_soc_codec *codec = dai->codec;
1684 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1685 
1686 	if (twl4030->master_substream == substream)
1687 		twl4030->master_substream = twl4030->slave_substream;
1688 
1689 	twl4030->slave_substream = NULL;
1690 
1691 	/* If all streams are closed, or the remaining stream has not yet
1692 	 * been configured than set the DAI as not configured. */
1693 	if (!twl4030->master_substream)
1694 		twl4030->configured = 0;
1695 	 else if (!twl4030->master_substream->runtime->channels)
1696 		twl4030->configured = 0;
1697 
1698 	 /* If the closing substream had 4 channel, do the necessary cleanup */
1699 	if (substream->runtime->channels == 4)
1700 		twl4030_tdm_enable(codec, substream->stream, 0);
1701 }
1702 
1703 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1704 			     struct snd_pcm_hw_params *params,
1705 			     struct snd_soc_dai *dai)
1706 {
1707 	struct snd_soc_codec *codec = dai->codec;
1708 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1709 	u8 mode, old_mode, format, old_format;
1710 
1711 	 /* If the substream has 4 channel, do the necessary setup */
1712 	if (params_channels(params) == 4) {
1713 		format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1714 		mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
1715 
1716 		/* Safety check: are we in the correct operating mode and
1717 		 * the interface is in TDM mode? */
1718 		if ((mode & TWL4030_OPTION_1) &&
1719 		    ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1720 			twl4030_tdm_enable(codec, substream->stream, 1);
1721 		else
1722 			return -EINVAL;
1723 	}
1724 
1725 	if (twl4030->configured)
1726 		/* Ignoring hw_params for already configured DAI */
1727 		return 0;
1728 
1729 	/* bit rate */
1730 	old_mode = twl4030_read(codec,
1731 				TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1732 	mode = old_mode & ~TWL4030_APLL_RATE;
1733 
1734 	switch (params_rate(params)) {
1735 	case 8000:
1736 		mode |= TWL4030_APLL_RATE_8000;
1737 		break;
1738 	case 11025:
1739 		mode |= TWL4030_APLL_RATE_11025;
1740 		break;
1741 	case 12000:
1742 		mode |= TWL4030_APLL_RATE_12000;
1743 		break;
1744 	case 16000:
1745 		mode |= TWL4030_APLL_RATE_16000;
1746 		break;
1747 	case 22050:
1748 		mode |= TWL4030_APLL_RATE_22050;
1749 		break;
1750 	case 24000:
1751 		mode |= TWL4030_APLL_RATE_24000;
1752 		break;
1753 	case 32000:
1754 		mode |= TWL4030_APLL_RATE_32000;
1755 		break;
1756 	case 44100:
1757 		mode |= TWL4030_APLL_RATE_44100;
1758 		break;
1759 	case 48000:
1760 		mode |= TWL4030_APLL_RATE_48000;
1761 		break;
1762 	case 96000:
1763 		mode |= TWL4030_APLL_RATE_96000;
1764 		break;
1765 	default:
1766 		dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
1767 			params_rate(params));
1768 		return -EINVAL;
1769 	}
1770 
1771 	/* sample size */
1772 	old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1773 	format = old_format;
1774 	format &= ~TWL4030_DATA_WIDTH;
1775 	switch (params_width(params)) {
1776 	case 16:
1777 		format |= TWL4030_DATA_WIDTH_16S_16W;
1778 		break;
1779 	case 32:
1780 		format |= TWL4030_DATA_WIDTH_32S_24W;
1781 		break;
1782 	default:
1783 		dev_err(codec->dev, "%s: unsupported bits/sample %d\n",
1784 			__func__, params_width(params));
1785 		return -EINVAL;
1786 	}
1787 
1788 	if (format != old_format || mode != old_mode) {
1789 		if (twl4030->codec_powered) {
1790 			/*
1791 			 * If the codec is powered, than we need to toggle the
1792 			 * codec power.
1793 			 */
1794 			twl4030_codec_enable(codec, 0);
1795 			twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1796 			twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1797 			twl4030_codec_enable(codec, 1);
1798 		} else {
1799 			twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1800 			twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1801 		}
1802 	}
1803 
1804 	/* Store the important parameters for the DAI configuration and set
1805 	 * the DAI as configured */
1806 	twl4030->configured = 1;
1807 	twl4030->rate = params_rate(params);
1808 	twl4030->sample_bits = hw_param_interval(params,
1809 					SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1810 	twl4030->channels = params_channels(params);
1811 
1812 	/* If both playback and capture streams are open, and one of them
1813 	 * is setting the hw parameters right now (since we are here), set
1814 	 * constraints to the other stream to match the current one. */
1815 	if (twl4030->slave_substream)
1816 		twl4030_constraints(twl4030, substream);
1817 
1818 	return 0;
1819 }
1820 
1821 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1822 				  unsigned int freq, int dir)
1823 {
1824 	struct snd_soc_codec *codec = codec_dai->codec;
1825 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1826 
1827 	switch (freq) {
1828 	case 19200000:
1829 	case 26000000:
1830 	case 38400000:
1831 		break;
1832 	default:
1833 		dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
1834 		return -EINVAL;
1835 	}
1836 
1837 	if ((freq / 1000) != twl4030->sysclk) {
1838 		dev_err(codec->dev,
1839 			"Mismatch in HFCLKIN: %u (configured: %u)\n",
1840 			freq, twl4030->sysclk * 1000);
1841 		return -EINVAL;
1842 	}
1843 
1844 	return 0;
1845 }
1846 
1847 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1848 {
1849 	struct snd_soc_codec *codec = codec_dai->codec;
1850 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1851 	u8 old_format, format;
1852 
1853 	/* get format */
1854 	old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1855 	format = old_format;
1856 
1857 	/* set master/slave audio interface */
1858 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1859 	case SND_SOC_DAIFMT_CBM_CFM:
1860 		format &= ~(TWL4030_AIF_SLAVE_EN);
1861 		format &= ~(TWL4030_CLK256FS_EN);
1862 		break;
1863 	case SND_SOC_DAIFMT_CBS_CFS:
1864 		format |= TWL4030_AIF_SLAVE_EN;
1865 		format |= TWL4030_CLK256FS_EN;
1866 		break;
1867 	default:
1868 		return -EINVAL;
1869 	}
1870 
1871 	/* interface format */
1872 	format &= ~TWL4030_AIF_FORMAT;
1873 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1874 	case SND_SOC_DAIFMT_I2S:
1875 		format |= TWL4030_AIF_FORMAT_CODEC;
1876 		break;
1877 	case SND_SOC_DAIFMT_DSP_A:
1878 		format |= TWL4030_AIF_FORMAT_TDM;
1879 		break;
1880 	default:
1881 		return -EINVAL;
1882 	}
1883 
1884 	if (format != old_format) {
1885 		if (twl4030->codec_powered) {
1886 			/*
1887 			 * If the codec is powered, than we need to toggle the
1888 			 * codec power.
1889 			 */
1890 			twl4030_codec_enable(codec, 0);
1891 			twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1892 			twl4030_codec_enable(codec, 1);
1893 		} else {
1894 			twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1895 		}
1896 	}
1897 
1898 	return 0;
1899 }
1900 
1901 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1902 {
1903 	struct snd_soc_codec *codec = dai->codec;
1904 	u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1905 
1906 	if (tristate)
1907 		reg |= TWL4030_AIF_TRI_EN;
1908 	else
1909 		reg &= ~TWL4030_AIF_TRI_EN;
1910 
1911 	return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1912 }
1913 
1914 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1915  * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1916 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1917 				 int enable)
1918 {
1919 	u8 reg, mask;
1920 
1921 	reg = twl4030_read(codec, TWL4030_REG_OPTION);
1922 
1923 	if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1924 		mask = TWL4030_ARXL1_VRX_EN;
1925 	else
1926 		mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1927 
1928 	if (enable)
1929 		reg |= mask;
1930 	else
1931 		reg &= ~mask;
1932 
1933 	twl4030_write(codec, TWL4030_REG_OPTION, reg);
1934 }
1935 
1936 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1937 				 struct snd_soc_dai *dai)
1938 {
1939 	struct snd_soc_codec *codec = dai->codec;
1940 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1941 	u8 mode;
1942 
1943 	/* If the system master clock is not 26MHz, the voice PCM interface is
1944 	 * not available.
1945 	 */
1946 	if (twl4030->sysclk != 26000) {
1947 		dev_err(codec->dev,
1948 			"%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1949 			__func__, twl4030->sysclk);
1950 		return -EINVAL;
1951 	}
1952 
1953 	/* If the codec mode is not option2, the voice PCM interface is not
1954 	 * available.
1955 	 */
1956 	mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
1957 		& TWL4030_OPT_MODE;
1958 
1959 	if (mode != TWL4030_OPTION_2) {
1960 		dev_err(codec->dev, "%s: the codec mode is not option2\n",
1961 			__func__);
1962 		return -EINVAL;
1963 	}
1964 
1965 	return 0;
1966 }
1967 
1968 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1969 				   struct snd_soc_dai *dai)
1970 {
1971 	struct snd_soc_codec *codec = dai->codec;
1972 
1973 	/* Enable voice digital filters */
1974 	twl4030_voice_enable(codec, substream->stream, 0);
1975 }
1976 
1977 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
1978 				   struct snd_pcm_hw_params *params,
1979 				   struct snd_soc_dai *dai)
1980 {
1981 	struct snd_soc_codec *codec = dai->codec;
1982 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1983 	u8 old_mode, mode;
1984 
1985 	/* Enable voice digital filters */
1986 	twl4030_voice_enable(codec, substream->stream, 1);
1987 
1988 	/* bit rate */
1989 	old_mode = twl4030_read(codec,
1990 				TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1991 	mode = old_mode;
1992 
1993 	switch (params_rate(params)) {
1994 	case 8000:
1995 		mode &= ~(TWL4030_SEL_16K);
1996 		break;
1997 	case 16000:
1998 		mode |= TWL4030_SEL_16K;
1999 		break;
2000 	default:
2001 		dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
2002 			params_rate(params));
2003 		return -EINVAL;
2004 	}
2005 
2006 	if (mode != old_mode) {
2007 		if (twl4030->codec_powered) {
2008 			/*
2009 			 * If the codec is powered, than we need to toggle the
2010 			 * codec power.
2011 			 */
2012 			twl4030_codec_enable(codec, 0);
2013 			twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2014 			twl4030_codec_enable(codec, 1);
2015 		} else {
2016 			twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2017 		}
2018 	}
2019 
2020 	return 0;
2021 }
2022 
2023 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2024 					int clk_id, unsigned int freq, int dir)
2025 {
2026 	struct snd_soc_codec *codec = codec_dai->codec;
2027 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2028 
2029 	if (freq != 26000000) {
2030 		dev_err(codec->dev,
2031 			"%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2032 			__func__, freq / 1000);
2033 		return -EINVAL;
2034 	}
2035 	if ((freq / 1000) != twl4030->sysclk) {
2036 		dev_err(codec->dev,
2037 			"Mismatch in HFCLKIN: %u (configured: %u)\n",
2038 			freq, twl4030->sysclk * 1000);
2039 		return -EINVAL;
2040 	}
2041 	return 0;
2042 }
2043 
2044 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2045 				     unsigned int fmt)
2046 {
2047 	struct snd_soc_codec *codec = codec_dai->codec;
2048 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2049 	u8 old_format, format;
2050 
2051 	/* get format */
2052 	old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
2053 	format = old_format;
2054 
2055 	/* set master/slave audio interface */
2056 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2057 	case SND_SOC_DAIFMT_CBM_CFM:
2058 		format &= ~(TWL4030_VIF_SLAVE_EN);
2059 		break;
2060 	case SND_SOC_DAIFMT_CBS_CFS:
2061 		format |= TWL4030_VIF_SLAVE_EN;
2062 		break;
2063 	default:
2064 		return -EINVAL;
2065 	}
2066 
2067 	/* clock inversion */
2068 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2069 	case SND_SOC_DAIFMT_IB_NF:
2070 		format &= ~(TWL4030_VIF_FORMAT);
2071 		break;
2072 	case SND_SOC_DAIFMT_NB_IF:
2073 		format |= TWL4030_VIF_FORMAT;
2074 		break;
2075 	default:
2076 		return -EINVAL;
2077 	}
2078 
2079 	if (format != old_format) {
2080 		if (twl4030->codec_powered) {
2081 			/*
2082 			 * If the codec is powered, than we need to toggle the
2083 			 * codec power.
2084 			 */
2085 			twl4030_codec_enable(codec, 0);
2086 			twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2087 			twl4030_codec_enable(codec, 1);
2088 		} else {
2089 			twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2090 		}
2091 	}
2092 
2093 	return 0;
2094 }
2095 
2096 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2097 {
2098 	struct snd_soc_codec *codec = dai->codec;
2099 	u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
2100 
2101 	if (tristate)
2102 		reg |= TWL4030_VIF_TRI_EN;
2103 	else
2104 		reg &= ~TWL4030_VIF_TRI_EN;
2105 
2106 	return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2107 }
2108 
2109 #define TWL4030_RATES	 (SNDRV_PCM_RATE_8000_48000)
2110 #define TWL4030_FORMATS	 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2111 
2112 static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
2113 	.startup	= twl4030_startup,
2114 	.shutdown	= twl4030_shutdown,
2115 	.hw_params	= twl4030_hw_params,
2116 	.set_sysclk	= twl4030_set_dai_sysclk,
2117 	.set_fmt	= twl4030_set_dai_fmt,
2118 	.set_tristate	= twl4030_set_tristate,
2119 };
2120 
2121 static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2122 	.startup	= twl4030_voice_startup,
2123 	.shutdown	= twl4030_voice_shutdown,
2124 	.hw_params	= twl4030_voice_hw_params,
2125 	.set_sysclk	= twl4030_voice_set_dai_sysclk,
2126 	.set_fmt	= twl4030_voice_set_dai_fmt,
2127 	.set_tristate	= twl4030_voice_set_tristate,
2128 };
2129 
2130 static struct snd_soc_dai_driver twl4030_dai[] = {
2131 {
2132 	.name = "twl4030-hifi",
2133 	.playback = {
2134 		.stream_name = "HiFi Playback",
2135 		.channels_min = 2,
2136 		.channels_max = 4,
2137 		.rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2138 		.formats = TWL4030_FORMATS,
2139 		.sig_bits = 24,},
2140 	.capture = {
2141 		.stream_name = "HiFi Capture",
2142 		.channels_min = 2,
2143 		.channels_max = 4,
2144 		.rates = TWL4030_RATES,
2145 		.formats = TWL4030_FORMATS,
2146 		.sig_bits = 24,},
2147 	.ops = &twl4030_dai_hifi_ops,
2148 },
2149 {
2150 	.name = "twl4030-voice",
2151 	.playback = {
2152 		.stream_name = "Voice Playback",
2153 		.channels_min = 1,
2154 		.channels_max = 1,
2155 		.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2156 		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
2157 	.capture = {
2158 		.stream_name = "Voice Capture",
2159 		.channels_min = 1,
2160 		.channels_max = 2,
2161 		.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2162 		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
2163 	.ops = &twl4030_dai_voice_ops,
2164 },
2165 };
2166 
2167 static int twl4030_soc_probe(struct snd_soc_codec *codec)
2168 {
2169 	struct twl4030_priv *twl4030;
2170 
2171 	twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2172 			       GFP_KERNEL);
2173 	if (!twl4030)
2174 		return -ENOMEM;
2175 	snd_soc_codec_set_drvdata(codec, twl4030);
2176 	/* Set the defaults, and power up the codec */
2177 	twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
2178 
2179 	twl4030_init_chip(codec);
2180 
2181 	return 0;
2182 }
2183 
2184 static int twl4030_soc_remove(struct snd_soc_codec *codec)
2185 {
2186 	struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2187 	struct twl4030_codec_data *pdata = twl4030->pdata;
2188 
2189 	if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2190 		gpio_free(pdata->hs_extmute_gpio);
2191 
2192 	return 0;
2193 }
2194 
2195 static const struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2196 	.probe = twl4030_soc_probe,
2197 	.remove = twl4030_soc_remove,
2198 	.read = twl4030_read,
2199 	.write = twl4030_write,
2200 	.set_bias_level = twl4030_set_bias_level,
2201 	.idle_bias_off = true,
2202 
2203 	.component_driver = {
2204 		.controls		= twl4030_snd_controls,
2205 		.num_controls		= ARRAY_SIZE(twl4030_snd_controls),
2206 		.dapm_widgets		= twl4030_dapm_widgets,
2207 		.num_dapm_widgets	= ARRAY_SIZE(twl4030_dapm_widgets),
2208 		.dapm_routes		= intercon,
2209 		.num_dapm_routes	= ARRAY_SIZE(intercon),
2210 	},
2211 };
2212 
2213 static int twl4030_codec_probe(struct platform_device *pdev)
2214 {
2215 	return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
2216 				      twl4030_dai, ARRAY_SIZE(twl4030_dai));
2217 }
2218 
2219 static int twl4030_codec_remove(struct platform_device *pdev)
2220 {
2221 	snd_soc_unregister_codec(&pdev->dev);
2222 	return 0;
2223 }
2224 
2225 MODULE_ALIAS("platform:twl4030-codec");
2226 
2227 static struct platform_driver twl4030_codec_driver = {
2228 	.probe		= twl4030_codec_probe,
2229 	.remove		= twl4030_codec_remove,
2230 	.driver		= {
2231 		.name	= "twl4030-codec",
2232 	},
2233 };
2234 
2235 module_platform_driver(twl4030_codec_driver);
2236 
2237 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2238 MODULE_AUTHOR("Steve Sakoman");
2239 MODULE_LICENSE("GPL");
2240