1 /* 2 * ALSA SoC TWL4030 codec driver 3 * 4 * Author: Steve Sakoman, <steve@sakoman.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 18 * 02110-1301 USA 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/moduleparam.h> 24 #include <linux/init.h> 25 #include <linux/delay.h> 26 #include <linux/pm.h> 27 #include <linux/i2c.h> 28 #include <linux/platform_device.h> 29 #include <linux/of.h> 30 #include <linux/of_gpio.h> 31 #include <linux/mfd/twl.h> 32 #include <linux/slab.h> 33 #include <linux/gpio.h> 34 #include <sound/core.h> 35 #include <sound/pcm.h> 36 #include <sound/pcm_params.h> 37 #include <sound/soc.h> 38 #include <sound/initval.h> 39 #include <sound/tlv.h> 40 41 /* Register descriptions are here */ 42 #include <linux/mfd/twl4030-audio.h> 43 44 /* TWL4030 PMBR1 Register */ 45 #define TWL4030_PMBR1_REG 0x0D 46 /* TWL4030 PMBR1 Register GPIO6 mux bits */ 47 #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2) 48 49 #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1) 50 51 /* codec private data */ 52 struct twl4030_priv { 53 unsigned int codec_powered; 54 55 /* reference counts of AIF/APLL users */ 56 unsigned int apll_enabled; 57 58 struct snd_pcm_substream *master_substream; 59 struct snd_pcm_substream *slave_substream; 60 61 unsigned int configured; 62 unsigned int rate; 63 unsigned int sample_bits; 64 unsigned int channels; 65 66 unsigned int sysclk; 67 68 /* Output (with associated amp) states */ 69 u8 hsl_enabled, hsr_enabled; 70 u8 earpiece_enabled; 71 u8 predrivel_enabled, predriver_enabled; 72 u8 carkitl_enabled, carkitr_enabled; 73 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1]; 74 75 struct twl4030_codec_data *pdata; 76 }; 77 78 static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030) 79 { 80 int i; 81 u8 byte; 82 83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) { 84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i); 85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte; 86 } 87 } 88 89 static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg) 90 { 91 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 92 u8 value = 0; 93 94 if (reg >= TWL4030_CACHEREGNUM) 95 return -EIO; 96 97 switch (reg) { 98 case TWL4030_REG_EAR_CTL: 99 case TWL4030_REG_PREDL_CTL: 100 case TWL4030_REG_PREDR_CTL: 101 case TWL4030_REG_PRECKL_CTL: 102 case TWL4030_REG_PRECKR_CTL: 103 case TWL4030_REG_HS_GAIN_SET: 104 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL]; 105 break; 106 default: 107 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg); 108 break; 109 } 110 111 return value; 112 } 113 114 static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030, 115 unsigned int reg) 116 { 117 bool write_to_reg = false; 118 119 /* Decide if the given register can be written */ 120 switch (reg) { 121 case TWL4030_REG_EAR_CTL: 122 if (twl4030->earpiece_enabled) 123 write_to_reg = true; 124 break; 125 case TWL4030_REG_PREDL_CTL: 126 if (twl4030->predrivel_enabled) 127 write_to_reg = true; 128 break; 129 case TWL4030_REG_PREDR_CTL: 130 if (twl4030->predriver_enabled) 131 write_to_reg = true; 132 break; 133 case TWL4030_REG_PRECKL_CTL: 134 if (twl4030->carkitl_enabled) 135 write_to_reg = true; 136 break; 137 case TWL4030_REG_PRECKR_CTL: 138 if (twl4030->carkitr_enabled) 139 write_to_reg = true; 140 break; 141 case TWL4030_REG_HS_GAIN_SET: 142 if (twl4030->hsl_enabled || twl4030->hsr_enabled) 143 write_to_reg = true; 144 break; 145 default: 146 /* All other register can be written */ 147 write_to_reg = true; 148 break; 149 } 150 151 return write_to_reg; 152 } 153 154 static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg, 155 unsigned int value) 156 { 157 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 158 159 /* Update the ctl cache */ 160 switch (reg) { 161 case TWL4030_REG_EAR_CTL: 162 case TWL4030_REG_PREDL_CTL: 163 case TWL4030_REG_PREDR_CTL: 164 case TWL4030_REG_PRECKL_CTL: 165 case TWL4030_REG_PRECKR_CTL: 166 case TWL4030_REG_HS_GAIN_SET: 167 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value; 168 break; 169 default: 170 break; 171 } 172 173 if (twl4030_can_write_to_chip(twl4030, reg)) 174 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg); 175 176 return 0; 177 } 178 179 static inline void twl4030_wait_ms(int time) 180 { 181 if (time < 60) { 182 time *= 1000; 183 usleep_range(time, time + 500); 184 } else { 185 msleep(time); 186 } 187 } 188 189 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable) 190 { 191 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 192 int mode; 193 194 if (enable == twl4030->codec_powered) 195 return; 196 197 if (enable) 198 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER); 199 else 200 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER); 201 202 if (mode >= 0) 203 twl4030->codec_powered = enable; 204 205 /* REVISIT: this delay is present in TI sample drivers */ 206 /* but there seems to be no TRM requirement for it */ 207 udelay(10); 208 } 209 210 static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata, 211 struct device_node *node) 212 { 213 int value; 214 215 of_property_read_u32(node, "ti,digimic_delay", 216 &pdata->digimic_delay); 217 of_property_read_u32(node, "ti,ramp_delay_value", 218 &pdata->ramp_delay_value); 219 of_property_read_u32(node, "ti,offset_cncl_path", 220 &pdata->offset_cncl_path); 221 if (!of_property_read_u32(node, "ti,hs_extmute", &value)) 222 pdata->hs_extmute = value; 223 224 pdata->hs_extmute_gpio = of_get_named_gpio(node, 225 "ti,hs_extmute_gpio", 0); 226 if (gpio_is_valid(pdata->hs_extmute_gpio)) 227 pdata->hs_extmute = 1; 228 } 229 230 static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec) 231 { 232 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev); 233 struct device_node *twl4030_codec_node = NULL; 234 235 twl4030_codec_node = of_get_child_by_name(codec->dev->parent->of_node, 236 "codec"); 237 238 if (!pdata && twl4030_codec_node) { 239 pdata = devm_kzalloc(codec->dev, 240 sizeof(struct twl4030_codec_data), 241 GFP_KERNEL); 242 if (!pdata) { 243 dev_err(codec->dev, "Can not allocate memory\n"); 244 of_node_put(twl4030_codec_node); 245 return NULL; 246 } 247 twl4030_setup_pdata_of(pdata, twl4030_codec_node); 248 of_node_put(twl4030_codec_node); 249 } 250 251 return pdata; 252 } 253 254 static void twl4030_init_chip(struct snd_soc_codec *codec) 255 { 256 struct twl4030_codec_data *pdata; 257 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 258 u8 reg, byte; 259 int i = 0; 260 261 pdata = twl4030_get_pdata(codec); 262 263 if (pdata && pdata->hs_extmute) { 264 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 265 int ret; 266 267 if (!pdata->hs_extmute_gpio) 268 dev_warn(codec->dev, 269 "Extmute GPIO is 0 is this correct?\n"); 270 271 ret = gpio_request_one(pdata->hs_extmute_gpio, 272 GPIOF_OUT_INIT_LOW, 273 "hs_extmute"); 274 if (ret) { 275 dev_err(codec->dev, 276 "Failed to get hs_extmute GPIO\n"); 277 pdata->hs_extmute_gpio = -1; 278 } 279 } else { 280 u8 pin_mux; 281 282 /* Set TWL4030 GPIO6 as EXTMUTE signal */ 283 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux, 284 TWL4030_PMBR1_REG); 285 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03); 286 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02); 287 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux, 288 TWL4030_PMBR1_REG); 289 } 290 } 291 292 /* Initialize the local ctl register cache */ 293 tw4030_init_ctl_cache(twl4030); 294 295 /* anti-pop when changing analog gain */ 296 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1); 297 twl4030_write(codec, TWL4030_REG_MISC_SET_1, 298 reg | TWL4030_SMOOTH_ANAVOL_EN); 299 300 twl4030_write(codec, TWL4030_REG_OPTION, 301 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN | 302 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN); 303 304 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */ 305 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32); 306 307 /* Machine dependent setup */ 308 if (!pdata) 309 return; 310 311 twl4030->pdata = pdata; 312 313 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET); 314 reg &= ~TWL4030_RAMP_DELAY; 315 reg |= (pdata->ramp_delay_value << 2); 316 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg); 317 318 /* initiate offset cancellation */ 319 twl4030_codec_enable(codec, 1); 320 321 reg = twl4030_read(codec, TWL4030_REG_ANAMICL); 322 reg &= ~TWL4030_OFFSET_CNCL_SEL; 323 reg |= pdata->offset_cncl_path; 324 twl4030_write(codec, TWL4030_REG_ANAMICL, 325 reg | TWL4030_CNCL_OFFSET_START); 326 327 /* 328 * Wait for offset cancellation to complete. 329 * Since this takes a while, do not slam the i2c. 330 * Start polling the status after ~20ms. 331 */ 332 msleep(20); 333 do { 334 usleep_range(1000, 2000); 335 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true); 336 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, 337 TWL4030_REG_ANAMICL); 338 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false); 339 } while ((i++ < 100) && 340 ((byte & TWL4030_CNCL_OFFSET_START) == 341 TWL4030_CNCL_OFFSET_START)); 342 343 twl4030_codec_enable(codec, 0); 344 } 345 346 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable) 347 { 348 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 349 350 if (enable) { 351 twl4030->apll_enabled++; 352 if (twl4030->apll_enabled == 1) 353 twl4030_audio_enable_resource( 354 TWL4030_AUDIO_RES_APLL); 355 } else { 356 twl4030->apll_enabled--; 357 if (!twl4030->apll_enabled) 358 twl4030_audio_disable_resource( 359 TWL4030_AUDIO_RES_APLL); 360 } 361 } 362 363 /* Earpiece */ 364 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = { 365 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0), 366 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0), 367 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0), 368 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0), 369 }; 370 371 /* PreDrive Left */ 372 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = { 373 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0), 374 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0), 375 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0), 376 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0), 377 }; 378 379 /* PreDrive Right */ 380 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = { 381 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0), 382 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0), 383 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0), 384 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0), 385 }; 386 387 /* Headset Left */ 388 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = { 389 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0), 390 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0), 391 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0), 392 }; 393 394 /* Headset Right */ 395 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = { 396 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0), 397 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0), 398 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0), 399 }; 400 401 /* Carkit Left */ 402 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = { 403 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0), 404 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0), 405 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0), 406 }; 407 408 /* Carkit Right */ 409 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = { 410 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0), 411 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0), 412 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0), 413 }; 414 415 /* Handsfree Left */ 416 static const char *twl4030_handsfreel_texts[] = 417 {"Voice", "AudioL1", "AudioL2", "AudioR2"}; 418 419 static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum, 420 TWL4030_REG_HFL_CTL, 0, 421 twl4030_handsfreel_texts); 422 423 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control = 424 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum); 425 426 /* Handsfree Left virtual mute */ 427 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control = 428 SOC_DAPM_SINGLE_VIRT("Switch", 1); 429 430 /* Handsfree Right */ 431 static const char *twl4030_handsfreer_texts[] = 432 {"Voice", "AudioR1", "AudioR2", "AudioL2"}; 433 434 static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum, 435 TWL4030_REG_HFR_CTL, 0, 436 twl4030_handsfreer_texts); 437 438 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control = 439 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum); 440 441 /* Handsfree Right virtual mute */ 442 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control = 443 SOC_DAPM_SINGLE_VIRT("Switch", 1); 444 445 /* Vibra */ 446 /* Vibra audio path selection */ 447 static const char *twl4030_vibra_texts[] = 448 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"}; 449 450 static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum, 451 TWL4030_REG_VIBRA_CTL, 2, 452 twl4030_vibra_texts); 453 454 static const struct snd_kcontrol_new twl4030_dapm_vibra_control = 455 SOC_DAPM_ENUM("Route", twl4030_vibra_enum); 456 457 /* Vibra path selection: local vibrator (PWM) or audio driven */ 458 static const char *twl4030_vibrapath_texts[] = 459 {"Local vibrator", "Audio"}; 460 461 static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum, 462 TWL4030_REG_VIBRA_CTL, 4, 463 twl4030_vibrapath_texts); 464 465 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control = 466 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum); 467 468 /* Left analog microphone selection */ 469 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = { 470 SOC_DAPM_SINGLE("Main Mic Capture Switch", 471 TWL4030_REG_ANAMICL, 0, 1, 0), 472 SOC_DAPM_SINGLE("Headset Mic Capture Switch", 473 TWL4030_REG_ANAMICL, 1, 1, 0), 474 SOC_DAPM_SINGLE("AUXL Capture Switch", 475 TWL4030_REG_ANAMICL, 2, 1, 0), 476 SOC_DAPM_SINGLE("Carkit Mic Capture Switch", 477 TWL4030_REG_ANAMICL, 3, 1, 0), 478 }; 479 480 /* Right analog microphone selection */ 481 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = { 482 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0), 483 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0), 484 }; 485 486 /* TX1 L/R Analog/Digital microphone selection */ 487 static const char *twl4030_micpathtx1_texts[] = 488 {"Analog", "Digimic0"}; 489 490 static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum, 491 TWL4030_REG_ADCMICSEL, 0, 492 twl4030_micpathtx1_texts); 493 494 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control = 495 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum); 496 497 /* TX2 L/R Analog/Digital microphone selection */ 498 static const char *twl4030_micpathtx2_texts[] = 499 {"Analog", "Digimic1"}; 500 501 static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum, 502 TWL4030_REG_ADCMICSEL, 2, 503 twl4030_micpathtx2_texts); 504 505 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control = 506 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum); 507 508 /* Analog bypass for AudioR1 */ 509 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control = 510 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0); 511 512 /* Analog bypass for AudioL1 */ 513 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control = 514 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0); 515 516 /* Analog bypass for AudioR2 */ 517 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control = 518 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0); 519 520 /* Analog bypass for AudioL2 */ 521 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control = 522 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0); 523 524 /* Analog bypass for Voice */ 525 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control = 526 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0); 527 528 /* Digital bypass gain, mute instead of -30dB */ 529 static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv, 530 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1), 531 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0), 532 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0) 533 ); 534 535 /* Digital bypass left (TX1L -> RX2L) */ 536 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control = 537 SOC_DAPM_SINGLE_TLV("Volume", 538 TWL4030_REG_ATX2ARXPGA, 3, 7, 0, 539 twl4030_dapm_dbypass_tlv); 540 541 /* Digital bypass right (TX1R -> RX2R) */ 542 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control = 543 SOC_DAPM_SINGLE_TLV("Volume", 544 TWL4030_REG_ATX2ARXPGA, 0, 7, 0, 545 twl4030_dapm_dbypass_tlv); 546 547 /* 548 * Voice Sidetone GAIN volume control: 549 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB) 550 */ 551 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1); 552 553 /* Digital bypass voice: sidetone (VUL -> VDL)*/ 554 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control = 555 SOC_DAPM_SINGLE_TLV("Volume", 556 TWL4030_REG_VSTPGA, 0, 0x29, 0, 557 twl4030_dapm_dbypassv_tlv); 558 559 /* 560 * Output PGA builder: 561 * Handle the muting and unmuting of the given output (turning off the 562 * amplifier associated with the output pin) 563 * On mute bypass the reg_cache and write 0 to the register 564 * On unmute: restore the register content from the reg_cache 565 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R 566 */ 567 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \ 568 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \ 569 struct snd_kcontrol *kcontrol, int event) \ 570 { \ 571 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); \ 572 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); \ 573 \ 574 switch (event) { \ 575 case SND_SOC_DAPM_POST_PMU: \ 576 twl4030->pin_name##_enabled = 1; \ 577 twl4030_write(codec, reg, twl4030_read(codec, reg)); \ 578 break; \ 579 case SND_SOC_DAPM_POST_PMD: \ 580 twl4030->pin_name##_enabled = 0; \ 581 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \ 582 break; \ 583 } \ 584 return 0; \ 585 } 586 587 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN); 588 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN); 589 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN); 590 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN); 591 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN); 592 593 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp) 594 { 595 unsigned char hs_ctl; 596 597 hs_ctl = twl4030_read(codec, reg); 598 599 if (ramp) { 600 /* HF ramp-up */ 601 hs_ctl |= TWL4030_HF_CTL_REF_EN; 602 twl4030_write(codec, reg, hs_ctl); 603 udelay(10); 604 hs_ctl |= TWL4030_HF_CTL_RAMP_EN; 605 twl4030_write(codec, reg, hs_ctl); 606 udelay(40); 607 hs_ctl |= TWL4030_HF_CTL_LOOP_EN; 608 hs_ctl |= TWL4030_HF_CTL_HB_EN; 609 twl4030_write(codec, reg, hs_ctl); 610 } else { 611 /* HF ramp-down */ 612 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN; 613 hs_ctl &= ~TWL4030_HF_CTL_HB_EN; 614 twl4030_write(codec, reg, hs_ctl); 615 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN; 616 twl4030_write(codec, reg, hs_ctl); 617 udelay(40); 618 hs_ctl &= ~TWL4030_HF_CTL_REF_EN; 619 twl4030_write(codec, reg, hs_ctl); 620 } 621 } 622 623 static int handsfreelpga_event(struct snd_soc_dapm_widget *w, 624 struct snd_kcontrol *kcontrol, int event) 625 { 626 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 627 628 switch (event) { 629 case SND_SOC_DAPM_POST_PMU: 630 handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 1); 631 break; 632 case SND_SOC_DAPM_POST_PMD: 633 handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 0); 634 break; 635 } 636 return 0; 637 } 638 639 static int handsfreerpga_event(struct snd_soc_dapm_widget *w, 640 struct snd_kcontrol *kcontrol, int event) 641 { 642 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 643 644 switch (event) { 645 case SND_SOC_DAPM_POST_PMU: 646 handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 1); 647 break; 648 case SND_SOC_DAPM_POST_PMD: 649 handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 0); 650 break; 651 } 652 return 0; 653 } 654 655 static int vibramux_event(struct snd_soc_dapm_widget *w, 656 struct snd_kcontrol *kcontrol, int event) 657 { 658 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 659 660 twl4030_write(codec, TWL4030_REG_VIBRA_SET, 0xff); 661 return 0; 662 } 663 664 static int apll_event(struct snd_soc_dapm_widget *w, 665 struct snd_kcontrol *kcontrol, int event) 666 { 667 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 668 669 switch (event) { 670 case SND_SOC_DAPM_PRE_PMU: 671 twl4030_apll_enable(codec, 1); 672 break; 673 case SND_SOC_DAPM_POST_PMD: 674 twl4030_apll_enable(codec, 0); 675 break; 676 } 677 return 0; 678 } 679 680 static int aif_event(struct snd_soc_dapm_widget *w, 681 struct snd_kcontrol *kcontrol, int event) 682 { 683 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 684 u8 audio_if; 685 686 audio_if = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 687 switch (event) { 688 case SND_SOC_DAPM_PRE_PMU: 689 /* Enable AIF */ 690 /* enable the PLL before we use it to clock the DAI */ 691 twl4030_apll_enable(codec, 1); 692 693 twl4030_write(codec, TWL4030_REG_AUDIO_IF, 694 audio_if | TWL4030_AIF_EN); 695 break; 696 case SND_SOC_DAPM_POST_PMD: 697 /* disable the DAI before we stop it's source PLL */ 698 twl4030_write(codec, TWL4030_REG_AUDIO_IF, 699 audio_if & ~TWL4030_AIF_EN); 700 twl4030_apll_enable(codec, 0); 701 break; 702 } 703 return 0; 704 } 705 706 static void headset_ramp(struct snd_soc_codec *codec, int ramp) 707 { 708 unsigned char hs_gain, hs_pop; 709 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 710 struct twl4030_codec_data *pdata = twl4030->pdata; 711 /* Base values for ramp delay calculation: 2^19 - 2^26 */ 712 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304, 713 8388608, 16777216, 33554432, 67108864}; 714 unsigned int delay; 715 716 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET); 717 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET); 718 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] / 719 twl4030->sysclk) + 1; 720 721 /* Enable external mute control, this dramatically reduces 722 * the pop-noise */ 723 if (pdata && pdata->hs_extmute) { 724 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 725 gpio_set_value(pdata->hs_extmute_gpio, 1); 726 } else { 727 hs_pop |= TWL4030_EXTMUTE; 728 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 729 } 730 } 731 732 if (ramp) { 733 /* Headset ramp-up according to the TRM */ 734 hs_pop |= TWL4030_VMID_EN; 735 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 736 /* Actually write to the register */ 737 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain, 738 TWL4030_REG_HS_GAIN_SET); 739 hs_pop |= TWL4030_RAMP_EN; 740 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 741 /* Wait ramp delay time + 1, so the VMID can settle */ 742 twl4030_wait_ms(delay); 743 } else { 744 /* Headset ramp-down _not_ according to 745 * the TRM, but in a way that it is working */ 746 hs_pop &= ~TWL4030_RAMP_EN; 747 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 748 /* Wait ramp delay time + 1, so the VMID can settle */ 749 twl4030_wait_ms(delay); 750 /* Bypass the reg_cache to mute the headset */ 751 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f), 752 TWL4030_REG_HS_GAIN_SET); 753 754 hs_pop &= ~TWL4030_VMID_EN; 755 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 756 } 757 758 /* Disable external mute */ 759 if (pdata && pdata->hs_extmute) { 760 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 761 gpio_set_value(pdata->hs_extmute_gpio, 0); 762 } else { 763 hs_pop &= ~TWL4030_EXTMUTE; 764 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 765 } 766 } 767 } 768 769 static int headsetlpga_event(struct snd_soc_dapm_widget *w, 770 struct snd_kcontrol *kcontrol, int event) 771 { 772 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 773 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 774 775 switch (event) { 776 case SND_SOC_DAPM_POST_PMU: 777 /* Do the ramp-up only once */ 778 if (!twl4030->hsr_enabled) 779 headset_ramp(codec, 1); 780 781 twl4030->hsl_enabled = 1; 782 break; 783 case SND_SOC_DAPM_POST_PMD: 784 /* Do the ramp-down only if both headsetL/R is disabled */ 785 if (!twl4030->hsr_enabled) 786 headset_ramp(codec, 0); 787 788 twl4030->hsl_enabled = 0; 789 break; 790 } 791 return 0; 792 } 793 794 static int headsetrpga_event(struct snd_soc_dapm_widget *w, 795 struct snd_kcontrol *kcontrol, int event) 796 { 797 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 798 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 799 800 switch (event) { 801 case SND_SOC_DAPM_POST_PMU: 802 /* Do the ramp-up only once */ 803 if (!twl4030->hsl_enabled) 804 headset_ramp(codec, 1); 805 806 twl4030->hsr_enabled = 1; 807 break; 808 case SND_SOC_DAPM_POST_PMD: 809 /* Do the ramp-down only if both headsetL/R is disabled */ 810 if (!twl4030->hsl_enabled) 811 headset_ramp(codec, 0); 812 813 twl4030->hsr_enabled = 0; 814 break; 815 } 816 return 0; 817 } 818 819 static int digimic_event(struct snd_soc_dapm_widget *w, 820 struct snd_kcontrol *kcontrol, int event) 821 { 822 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 823 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 824 struct twl4030_codec_data *pdata = twl4030->pdata; 825 826 if (pdata && pdata->digimic_delay) 827 twl4030_wait_ms(pdata->digimic_delay); 828 return 0; 829 } 830 831 /* 832 * Some of the gain controls in TWL (mostly those which are associated with 833 * the outputs) are implemented in an interesting way: 834 * 0x0 : Power down (mute) 835 * 0x1 : 6dB 836 * 0x2 : 0 dB 837 * 0x3 : -6 dB 838 * Inverting not going to help with these. 839 * Custom volsw and volsw_2r get/put functions to handle these gain bits. 840 */ 841 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol, 842 struct snd_ctl_elem_value *ucontrol) 843 { 844 struct soc_mixer_control *mc = 845 (struct soc_mixer_control *)kcontrol->private_value; 846 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 847 unsigned int reg = mc->reg; 848 unsigned int shift = mc->shift; 849 unsigned int rshift = mc->rshift; 850 int max = mc->max; 851 int mask = (1 << fls(max)) - 1; 852 853 ucontrol->value.integer.value[0] = 854 (snd_soc_read(codec, reg) >> shift) & mask; 855 if (ucontrol->value.integer.value[0]) 856 ucontrol->value.integer.value[0] = 857 max + 1 - ucontrol->value.integer.value[0]; 858 859 if (shift != rshift) { 860 ucontrol->value.integer.value[1] = 861 (snd_soc_read(codec, reg) >> rshift) & mask; 862 if (ucontrol->value.integer.value[1]) 863 ucontrol->value.integer.value[1] = 864 max + 1 - ucontrol->value.integer.value[1]; 865 } 866 867 return 0; 868 } 869 870 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol, 871 struct snd_ctl_elem_value *ucontrol) 872 { 873 struct soc_mixer_control *mc = 874 (struct soc_mixer_control *)kcontrol->private_value; 875 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 876 unsigned int reg = mc->reg; 877 unsigned int shift = mc->shift; 878 unsigned int rshift = mc->rshift; 879 int max = mc->max; 880 int mask = (1 << fls(max)) - 1; 881 unsigned short val, val2, val_mask; 882 883 val = (ucontrol->value.integer.value[0] & mask); 884 885 val_mask = mask << shift; 886 if (val) 887 val = max + 1 - val; 888 val = val << shift; 889 if (shift != rshift) { 890 val2 = (ucontrol->value.integer.value[1] & mask); 891 val_mask |= mask << rshift; 892 if (val2) 893 val2 = max + 1 - val2; 894 val |= val2 << rshift; 895 } 896 return snd_soc_update_bits(codec, reg, val_mask, val); 897 } 898 899 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 900 struct snd_ctl_elem_value *ucontrol) 901 { 902 struct soc_mixer_control *mc = 903 (struct soc_mixer_control *)kcontrol->private_value; 904 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 905 unsigned int reg = mc->reg; 906 unsigned int reg2 = mc->rreg; 907 unsigned int shift = mc->shift; 908 int max = mc->max; 909 int mask = (1<<fls(max))-1; 910 911 ucontrol->value.integer.value[0] = 912 (snd_soc_read(codec, reg) >> shift) & mask; 913 ucontrol->value.integer.value[1] = 914 (snd_soc_read(codec, reg2) >> shift) & mask; 915 916 if (ucontrol->value.integer.value[0]) 917 ucontrol->value.integer.value[0] = 918 max + 1 - ucontrol->value.integer.value[0]; 919 if (ucontrol->value.integer.value[1]) 920 ucontrol->value.integer.value[1] = 921 max + 1 - ucontrol->value.integer.value[1]; 922 923 return 0; 924 } 925 926 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 927 struct snd_ctl_elem_value *ucontrol) 928 { 929 struct soc_mixer_control *mc = 930 (struct soc_mixer_control *)kcontrol->private_value; 931 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 932 unsigned int reg = mc->reg; 933 unsigned int reg2 = mc->rreg; 934 unsigned int shift = mc->shift; 935 int max = mc->max; 936 int mask = (1 << fls(max)) - 1; 937 int err; 938 unsigned short val, val2, val_mask; 939 940 val_mask = mask << shift; 941 val = (ucontrol->value.integer.value[0] & mask); 942 val2 = (ucontrol->value.integer.value[1] & mask); 943 944 if (val) 945 val = max + 1 - val; 946 if (val2) 947 val2 = max + 1 - val2; 948 949 val = val << shift; 950 val2 = val2 << shift; 951 952 err = snd_soc_update_bits(codec, reg, val_mask, val); 953 if (err < 0) 954 return err; 955 956 err = snd_soc_update_bits(codec, reg2, val_mask, val2); 957 return err; 958 } 959 960 /* Codec operation modes */ 961 static const char *twl4030_op_modes_texts[] = { 962 "Option 2 (voice/audio)", "Option 1 (audio)" 963 }; 964 965 static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum, 966 TWL4030_REG_CODEC_MODE, 0, 967 twl4030_op_modes_texts); 968 969 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol, 970 struct snd_ctl_elem_value *ucontrol) 971 { 972 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 973 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 974 975 if (twl4030->configured) { 976 dev_err(codec->dev, 977 "operation mode cannot be changed on-the-fly\n"); 978 return -EBUSY; 979 } 980 981 return snd_soc_put_enum_double(kcontrol, ucontrol); 982 } 983 984 /* 985 * FGAIN volume control: 986 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB) 987 */ 988 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1); 989 990 /* 991 * CGAIN volume control: 992 * 0 dB to 12 dB in 6 dB steps 993 * value 2 and 3 means 12 dB 994 */ 995 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0); 996 997 /* 998 * Voice Downlink GAIN volume control: 999 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB) 1000 */ 1001 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1); 1002 1003 /* 1004 * Analog playback gain 1005 * -24 dB to 12 dB in 2 dB steps 1006 */ 1007 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0); 1008 1009 /* 1010 * Gain controls tied to outputs 1011 * -6 dB to 6 dB in 6 dB steps (mute instead of -12) 1012 */ 1013 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1); 1014 1015 /* 1016 * Gain control for earpiece amplifier 1017 * 0 dB to 12 dB in 6 dB steps (mute instead of -6) 1018 */ 1019 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1); 1020 1021 /* 1022 * Capture gain after the ADCs 1023 * from 0 dB to 31 dB in 1 dB steps 1024 */ 1025 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0); 1026 1027 /* 1028 * Gain control for input amplifiers 1029 * 0 dB to 30 dB in 6 dB steps 1030 */ 1031 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0); 1032 1033 /* AVADC clock priority */ 1034 static const char *twl4030_avadc_clk_priority_texts[] = { 1035 "Voice high priority", "HiFi high priority" 1036 }; 1037 1038 static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum, 1039 TWL4030_REG_AVADC_CTL, 2, 1040 twl4030_avadc_clk_priority_texts); 1041 1042 static const char *twl4030_rampdelay_texts[] = { 1043 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms", 1044 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms", 1045 "3495/2581/1748 ms" 1046 }; 1047 1048 static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum, 1049 TWL4030_REG_HS_POPN_SET, 2, 1050 twl4030_rampdelay_texts); 1051 1052 /* Vibra H-bridge direction mode */ 1053 static const char *twl4030_vibradirmode_texts[] = { 1054 "Vibra H-bridge direction", "Audio data MSB", 1055 }; 1056 1057 static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum, 1058 TWL4030_REG_VIBRA_CTL, 5, 1059 twl4030_vibradirmode_texts); 1060 1061 /* Vibra H-bridge direction */ 1062 static const char *twl4030_vibradir_texts[] = { 1063 "Positive polarity", "Negative polarity", 1064 }; 1065 1066 static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum, 1067 TWL4030_REG_VIBRA_CTL, 1, 1068 twl4030_vibradir_texts); 1069 1070 /* Digimic Left and right swapping */ 1071 static const char *twl4030_digimicswap_texts[] = { 1072 "Not swapped", "Swapped", 1073 }; 1074 1075 static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum, 1076 TWL4030_REG_MISC_SET_1, 0, 1077 twl4030_digimicswap_texts); 1078 1079 static const struct snd_kcontrol_new twl4030_snd_controls[] = { 1080 /* Codec operation mode control */ 1081 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum, 1082 snd_soc_get_enum_double, 1083 snd_soc_put_twl4030_opmode_enum_double), 1084 1085 /* Common playback gain controls */ 1086 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume", 1087 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 1088 0, 0x3f, 0, digital_fine_tlv), 1089 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume", 1090 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 1091 0, 0x3f, 0, digital_fine_tlv), 1092 1093 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume", 1094 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 1095 6, 0x2, 0, digital_coarse_tlv), 1096 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume", 1097 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 1098 6, 0x2, 0, digital_coarse_tlv), 1099 1100 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume", 1101 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 1102 3, 0x12, 1, analog_tlv), 1103 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume", 1104 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 1105 3, 0x12, 1, analog_tlv), 1106 SOC_DOUBLE_R("DAC1 Analog Playback Switch", 1107 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 1108 1, 1, 0), 1109 SOC_DOUBLE_R("DAC2 Analog Playback Switch", 1110 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 1111 1, 1, 0), 1112 1113 /* Common voice downlink gain controls */ 1114 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume", 1115 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv), 1116 1117 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume", 1118 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv), 1119 1120 SOC_SINGLE("DAC Voice Analog Downlink Switch", 1121 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0), 1122 1123 /* Separate output gain controls */ 1124 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume", 1125 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL, 1126 4, 3, 0, snd_soc_get_volsw_r2_twl4030, 1127 snd_soc_put_volsw_r2_twl4030, output_tvl), 1128 1129 SOC_DOUBLE_EXT_TLV("Headset Playback Volume", 1130 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030, 1131 snd_soc_put_volsw_twl4030, output_tvl), 1132 1133 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume", 1134 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL, 1135 4, 3, 0, snd_soc_get_volsw_r2_twl4030, 1136 snd_soc_put_volsw_r2_twl4030, output_tvl), 1137 1138 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume", 1139 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030, 1140 snd_soc_put_volsw_twl4030, output_ear_tvl), 1141 1142 /* Common capture gain controls */ 1143 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume", 1144 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, 1145 0, 0x1f, 0, digital_capture_tlv), 1146 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume", 1147 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA, 1148 0, 0x1f, 0, digital_capture_tlv), 1149 1150 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN, 1151 0, 3, 5, 0, input_gain_tlv), 1152 1153 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum), 1154 1155 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum), 1156 1157 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum), 1158 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum), 1159 1160 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum), 1161 }; 1162 1163 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = { 1164 /* Left channel inputs */ 1165 SND_SOC_DAPM_INPUT("MAINMIC"), 1166 SND_SOC_DAPM_INPUT("HSMIC"), 1167 SND_SOC_DAPM_INPUT("AUXL"), 1168 SND_SOC_DAPM_INPUT("CARKITMIC"), 1169 /* Right channel inputs */ 1170 SND_SOC_DAPM_INPUT("SUBMIC"), 1171 SND_SOC_DAPM_INPUT("AUXR"), 1172 /* Digital microphones (Stereo) */ 1173 SND_SOC_DAPM_INPUT("DIGIMIC0"), 1174 SND_SOC_DAPM_INPUT("DIGIMIC1"), 1175 1176 /* Outputs */ 1177 SND_SOC_DAPM_OUTPUT("EARPIECE"), 1178 SND_SOC_DAPM_OUTPUT("PREDRIVEL"), 1179 SND_SOC_DAPM_OUTPUT("PREDRIVER"), 1180 SND_SOC_DAPM_OUTPUT("HSOL"), 1181 SND_SOC_DAPM_OUTPUT("HSOR"), 1182 SND_SOC_DAPM_OUTPUT("CARKITL"), 1183 SND_SOC_DAPM_OUTPUT("CARKITR"), 1184 SND_SOC_DAPM_OUTPUT("HFL"), 1185 SND_SOC_DAPM_OUTPUT("HFR"), 1186 SND_SOC_DAPM_OUTPUT("VIBRA"), 1187 1188 /* AIF and APLL clocks for running DAIs (including loopback) */ 1189 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"), 1190 SND_SOC_DAPM_INPUT("Virtual HiFi IN"), 1191 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"), 1192 1193 /* DACs */ 1194 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0), 1195 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0), 1196 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0), 1197 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0), 1198 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0), 1199 1200 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0, 1201 TWL4030_REG_VOICE_IF, 6, 0), 1202 1203 /* Analog bypasses */ 1204 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0, 1205 &twl4030_dapm_abypassr1_control), 1206 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0, 1207 &twl4030_dapm_abypassl1_control), 1208 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0, 1209 &twl4030_dapm_abypassr2_control), 1210 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0, 1211 &twl4030_dapm_abypassl2_control), 1212 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0, 1213 &twl4030_dapm_abypassv_control), 1214 1215 /* Master analog loopback switch */ 1216 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0, 1217 NULL, 0), 1218 1219 /* Digital bypasses */ 1220 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0, 1221 &twl4030_dapm_dbypassl_control), 1222 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0, 1223 &twl4030_dapm_dbypassr_control), 1224 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0, 1225 &twl4030_dapm_dbypassv_control), 1226 1227 /* Digital mixers, power control for the physical DACs */ 1228 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer", 1229 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0), 1230 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer", 1231 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0), 1232 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer", 1233 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0), 1234 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer", 1235 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0), 1236 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer", 1237 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0), 1238 1239 /* Analog mixers, power control for the physical PGAs */ 1240 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", 1241 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0), 1242 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", 1243 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0), 1244 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", 1245 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0), 1246 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", 1247 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0), 1248 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer", 1249 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0), 1250 1251 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event, 1252 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD), 1253 1254 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event, 1255 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD), 1256 1257 /* Output MIXER controls */ 1258 /* Earpiece */ 1259 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0, 1260 &twl4030_dapm_earpiece_controls[0], 1261 ARRAY_SIZE(twl4030_dapm_earpiece_controls)), 1262 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM, 1263 0, 0, NULL, 0, earpiecepga_event, 1264 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1265 /* PreDrivL/R */ 1266 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0, 1267 &twl4030_dapm_predrivel_controls[0], 1268 ARRAY_SIZE(twl4030_dapm_predrivel_controls)), 1269 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM, 1270 0, 0, NULL, 0, predrivelpga_event, 1271 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1272 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0, 1273 &twl4030_dapm_predriver_controls[0], 1274 ARRAY_SIZE(twl4030_dapm_predriver_controls)), 1275 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM, 1276 0, 0, NULL, 0, predriverpga_event, 1277 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1278 /* HeadsetL/R */ 1279 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0, 1280 &twl4030_dapm_hsol_controls[0], 1281 ARRAY_SIZE(twl4030_dapm_hsol_controls)), 1282 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM, 1283 0, 0, NULL, 0, headsetlpga_event, 1284 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1285 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0, 1286 &twl4030_dapm_hsor_controls[0], 1287 ARRAY_SIZE(twl4030_dapm_hsor_controls)), 1288 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM, 1289 0, 0, NULL, 0, headsetrpga_event, 1290 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1291 /* CarkitL/R */ 1292 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0, 1293 &twl4030_dapm_carkitl_controls[0], 1294 ARRAY_SIZE(twl4030_dapm_carkitl_controls)), 1295 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM, 1296 0, 0, NULL, 0, carkitlpga_event, 1297 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1298 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0, 1299 &twl4030_dapm_carkitr_controls[0], 1300 ARRAY_SIZE(twl4030_dapm_carkitr_controls)), 1301 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM, 1302 0, 0, NULL, 0, carkitrpga_event, 1303 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1304 1305 /* Output MUX controls */ 1306 /* HandsfreeL/R */ 1307 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0, 1308 &twl4030_dapm_handsfreel_control), 1309 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0, 1310 &twl4030_dapm_handsfreelmute_control), 1311 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM, 1312 0, 0, NULL, 0, handsfreelpga_event, 1313 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1314 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0, 1315 &twl4030_dapm_handsfreer_control), 1316 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0, 1317 &twl4030_dapm_handsfreermute_control), 1318 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM, 1319 0, 0, NULL, 0, handsfreerpga_event, 1320 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1321 /* Vibra */ 1322 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0, 1323 &twl4030_dapm_vibra_control, vibramux_event, 1324 SND_SOC_DAPM_PRE_PMU), 1325 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0, 1326 &twl4030_dapm_vibrapath_control), 1327 1328 /* Introducing four virtual ADC, since TWL4030 have four channel for 1329 capture */ 1330 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0), 1331 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0), 1332 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0), 1333 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0), 1334 1335 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0, 1336 TWL4030_REG_VOICE_IF, 5, 0), 1337 1338 /* Analog/Digital mic path selection. 1339 TX1 Left/Right: either analog Left/Right or Digimic0 1340 TX2 Left/Right: either analog Left/Right or Digimic1 */ 1341 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0, 1342 &twl4030_dapm_micpathtx1_control), 1343 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0, 1344 &twl4030_dapm_micpathtx2_control), 1345 1346 /* Analog input mixers for the capture amplifiers */ 1347 SND_SOC_DAPM_MIXER("Analog Left", 1348 TWL4030_REG_ANAMICL, 4, 0, 1349 &twl4030_dapm_analoglmic_controls[0], 1350 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)), 1351 SND_SOC_DAPM_MIXER("Analog Right", 1352 TWL4030_REG_ANAMICR, 4, 0, 1353 &twl4030_dapm_analogrmic_controls[0], 1354 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)), 1355 1356 SND_SOC_DAPM_PGA("ADC Physical Left", 1357 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0), 1358 SND_SOC_DAPM_PGA("ADC Physical Right", 1359 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0), 1360 1361 SND_SOC_DAPM_PGA_E("Digimic0 Enable", 1362 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0, 1363 digimic_event, SND_SOC_DAPM_POST_PMU), 1364 SND_SOC_DAPM_PGA_E("Digimic1 Enable", 1365 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0, 1366 digimic_event, SND_SOC_DAPM_POST_PMU), 1367 1368 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0, 1369 NULL, 0), 1370 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0, 1371 NULL, 0), 1372 1373 /* Microphone bias */ 1374 SND_SOC_DAPM_SUPPLY("Mic Bias 1", 1375 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0), 1376 SND_SOC_DAPM_SUPPLY("Mic Bias 2", 1377 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0), 1378 SND_SOC_DAPM_SUPPLY("Headset Mic Bias", 1379 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0), 1380 1381 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0), 1382 }; 1383 1384 static const struct snd_soc_dapm_route intercon[] = { 1385 /* Stream -> DAC mapping */ 1386 {"DAC Right1", NULL, "HiFi Playback"}, 1387 {"DAC Left1", NULL, "HiFi Playback"}, 1388 {"DAC Right2", NULL, "HiFi Playback"}, 1389 {"DAC Left2", NULL, "HiFi Playback"}, 1390 {"DAC Voice", NULL, "VAIFIN"}, 1391 1392 /* ADC -> Stream mapping */ 1393 {"HiFi Capture", NULL, "ADC Virtual Left1"}, 1394 {"HiFi Capture", NULL, "ADC Virtual Right1"}, 1395 {"HiFi Capture", NULL, "ADC Virtual Left2"}, 1396 {"HiFi Capture", NULL, "ADC Virtual Right2"}, 1397 {"VAIFOUT", NULL, "ADC Virtual Left2"}, 1398 {"VAIFOUT", NULL, "ADC Virtual Right2"}, 1399 {"VAIFOUT", NULL, "VIF Enable"}, 1400 1401 {"Digital L1 Playback Mixer", NULL, "DAC Left1"}, 1402 {"Digital R1 Playback Mixer", NULL, "DAC Right1"}, 1403 {"Digital L2 Playback Mixer", NULL, "DAC Left2"}, 1404 {"Digital R2 Playback Mixer", NULL, "DAC Right2"}, 1405 {"Digital Voice Playback Mixer", NULL, "DAC Voice"}, 1406 1407 /* Supply for the digital part (APLL) */ 1408 {"Digital Voice Playback Mixer", NULL, "APLL Enable"}, 1409 1410 {"DAC Left1", NULL, "AIF Enable"}, 1411 {"DAC Right1", NULL, "AIF Enable"}, 1412 {"DAC Left2", NULL, "AIF Enable"}, 1413 {"DAC Right1", NULL, "AIF Enable"}, 1414 {"DAC Voice", NULL, "VIF Enable"}, 1415 1416 {"Digital R2 Playback Mixer", NULL, "AIF Enable"}, 1417 {"Digital L2 Playback Mixer", NULL, "AIF Enable"}, 1418 1419 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"}, 1420 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"}, 1421 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"}, 1422 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"}, 1423 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"}, 1424 1425 /* Internal playback routings */ 1426 /* Earpiece */ 1427 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"}, 1428 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1429 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1430 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1431 {"Earpiece PGA", NULL, "Earpiece Mixer"}, 1432 /* PreDrivL */ 1433 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1434 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1435 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1436 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1437 {"PredriveL PGA", NULL, "PredriveL Mixer"}, 1438 /* PreDrivR */ 1439 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1440 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1441 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1442 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1443 {"PredriveR PGA", NULL, "PredriveR Mixer"}, 1444 /* HeadsetL */ 1445 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1446 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1447 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1448 {"HeadsetL PGA", NULL, "HeadsetL Mixer"}, 1449 /* HeadsetR */ 1450 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1451 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1452 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1453 {"HeadsetR PGA", NULL, "HeadsetR Mixer"}, 1454 /* CarkitL */ 1455 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1456 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1457 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1458 {"CarkitL PGA", NULL, "CarkitL Mixer"}, 1459 /* CarkitR */ 1460 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1461 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1462 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1463 {"CarkitR PGA", NULL, "CarkitR Mixer"}, 1464 /* HandsfreeL */ 1465 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"}, 1466 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"}, 1467 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"}, 1468 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"}, 1469 {"HandsfreeL", "Switch", "HandsfreeL Mux"}, 1470 {"HandsfreeL PGA", NULL, "HandsfreeL"}, 1471 /* HandsfreeR */ 1472 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"}, 1473 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"}, 1474 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"}, 1475 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"}, 1476 {"HandsfreeR", "Switch", "HandsfreeR Mux"}, 1477 {"HandsfreeR PGA", NULL, "HandsfreeR"}, 1478 /* Vibra */ 1479 {"Vibra Mux", "AudioL1", "DAC Left1"}, 1480 {"Vibra Mux", "AudioR1", "DAC Right1"}, 1481 {"Vibra Mux", "AudioL2", "DAC Left2"}, 1482 {"Vibra Mux", "AudioR2", "DAC Right2"}, 1483 1484 /* outputs */ 1485 /* Must be always connected (for AIF and APLL) */ 1486 {"Virtual HiFi OUT", NULL, "DAC Left1"}, 1487 {"Virtual HiFi OUT", NULL, "DAC Right1"}, 1488 {"Virtual HiFi OUT", NULL, "DAC Left2"}, 1489 {"Virtual HiFi OUT", NULL, "DAC Right2"}, 1490 /* Must be always connected (for APLL) */ 1491 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"}, 1492 /* Physical outputs */ 1493 {"EARPIECE", NULL, "Earpiece PGA"}, 1494 {"PREDRIVEL", NULL, "PredriveL PGA"}, 1495 {"PREDRIVER", NULL, "PredriveR PGA"}, 1496 {"HSOL", NULL, "HeadsetL PGA"}, 1497 {"HSOR", NULL, "HeadsetR PGA"}, 1498 {"CARKITL", NULL, "CarkitL PGA"}, 1499 {"CARKITR", NULL, "CarkitR PGA"}, 1500 {"HFL", NULL, "HandsfreeL PGA"}, 1501 {"HFR", NULL, "HandsfreeR PGA"}, 1502 {"Vibra Route", "Audio", "Vibra Mux"}, 1503 {"VIBRA", NULL, "Vibra Route"}, 1504 1505 /* Capture path */ 1506 /* Must be always connected (for AIF and APLL) */ 1507 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"}, 1508 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"}, 1509 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"}, 1510 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"}, 1511 /* Physical inputs */ 1512 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"}, 1513 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"}, 1514 {"Analog Left", "AUXL Capture Switch", "AUXL"}, 1515 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"}, 1516 1517 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"}, 1518 {"Analog Right", "AUXR Capture Switch", "AUXR"}, 1519 1520 {"ADC Physical Left", NULL, "Analog Left"}, 1521 {"ADC Physical Right", NULL, "Analog Right"}, 1522 1523 {"Digimic0 Enable", NULL, "DIGIMIC0"}, 1524 {"Digimic1 Enable", NULL, "DIGIMIC1"}, 1525 1526 {"DIGIMIC0", NULL, "micbias1 select"}, 1527 {"DIGIMIC1", NULL, "micbias2 select"}, 1528 1529 /* TX1 Left capture path */ 1530 {"TX1 Capture Route", "Analog", "ADC Physical Left"}, 1531 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1532 /* TX1 Right capture path */ 1533 {"TX1 Capture Route", "Analog", "ADC Physical Right"}, 1534 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1535 /* TX2 Left capture path */ 1536 {"TX2 Capture Route", "Analog", "ADC Physical Left"}, 1537 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1538 /* TX2 Right capture path */ 1539 {"TX2 Capture Route", "Analog", "ADC Physical Right"}, 1540 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1541 1542 {"ADC Virtual Left1", NULL, "TX1 Capture Route"}, 1543 {"ADC Virtual Right1", NULL, "TX1 Capture Route"}, 1544 {"ADC Virtual Left2", NULL, "TX2 Capture Route"}, 1545 {"ADC Virtual Right2", NULL, "TX2 Capture Route"}, 1546 1547 {"ADC Virtual Left1", NULL, "AIF Enable"}, 1548 {"ADC Virtual Right1", NULL, "AIF Enable"}, 1549 {"ADC Virtual Left2", NULL, "AIF Enable"}, 1550 {"ADC Virtual Right2", NULL, "AIF Enable"}, 1551 1552 /* Analog bypass routes */ 1553 {"Right1 Analog Loopback", "Switch", "Analog Right"}, 1554 {"Left1 Analog Loopback", "Switch", "Analog Left"}, 1555 {"Right2 Analog Loopback", "Switch", "Analog Right"}, 1556 {"Left2 Analog Loopback", "Switch", "Analog Left"}, 1557 {"Voice Analog Loopback", "Switch", "Analog Left"}, 1558 1559 /* Supply for the Analog loopbacks */ 1560 {"Right1 Analog Loopback", NULL, "FM Loop Enable"}, 1561 {"Left1 Analog Loopback", NULL, "FM Loop Enable"}, 1562 {"Right2 Analog Loopback", NULL, "FM Loop Enable"}, 1563 {"Left2 Analog Loopback", NULL, "FM Loop Enable"}, 1564 {"Voice Analog Loopback", NULL, "FM Loop Enable"}, 1565 1566 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"}, 1567 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"}, 1568 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"}, 1569 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"}, 1570 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"}, 1571 1572 /* Digital bypass routes */ 1573 {"Right Digital Loopback", "Volume", "TX1 Capture Route"}, 1574 {"Left Digital Loopback", "Volume", "TX1 Capture Route"}, 1575 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"}, 1576 1577 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"}, 1578 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"}, 1579 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"}, 1580 1581 }; 1582 1583 static int twl4030_set_bias_level(struct snd_soc_codec *codec, 1584 enum snd_soc_bias_level level) 1585 { 1586 switch (level) { 1587 case SND_SOC_BIAS_ON: 1588 break; 1589 case SND_SOC_BIAS_PREPARE: 1590 break; 1591 case SND_SOC_BIAS_STANDBY: 1592 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) 1593 twl4030_codec_enable(codec, 1); 1594 break; 1595 case SND_SOC_BIAS_OFF: 1596 twl4030_codec_enable(codec, 0); 1597 break; 1598 } 1599 1600 return 0; 1601 } 1602 1603 static void twl4030_constraints(struct twl4030_priv *twl4030, 1604 struct snd_pcm_substream *mst_substream) 1605 { 1606 struct snd_pcm_substream *slv_substream; 1607 1608 /* Pick the stream, which need to be constrained */ 1609 if (mst_substream == twl4030->master_substream) 1610 slv_substream = twl4030->slave_substream; 1611 else if (mst_substream == twl4030->slave_substream) 1612 slv_substream = twl4030->master_substream; 1613 else /* This should not happen.. */ 1614 return; 1615 1616 /* Set the constraints according to the already configured stream */ 1617 snd_pcm_hw_constraint_single(slv_substream->runtime, 1618 SNDRV_PCM_HW_PARAM_RATE, 1619 twl4030->rate); 1620 1621 snd_pcm_hw_constraint_single(slv_substream->runtime, 1622 SNDRV_PCM_HW_PARAM_SAMPLE_BITS, 1623 twl4030->sample_bits); 1624 1625 snd_pcm_hw_constraint_single(slv_substream->runtime, 1626 SNDRV_PCM_HW_PARAM_CHANNELS, 1627 twl4030->channels); 1628 } 1629 1630 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for 1631 * capture has to be enabled/disabled. */ 1632 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction, 1633 int enable) 1634 { 1635 u8 reg, mask; 1636 1637 reg = twl4030_read(codec, TWL4030_REG_OPTION); 1638 1639 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 1640 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN; 1641 else 1642 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN; 1643 1644 if (enable) 1645 reg |= mask; 1646 else 1647 reg &= ~mask; 1648 1649 twl4030_write(codec, TWL4030_REG_OPTION, reg); 1650 } 1651 1652 static int twl4030_startup(struct snd_pcm_substream *substream, 1653 struct snd_soc_dai *dai) 1654 { 1655 struct snd_soc_codec *codec = dai->codec; 1656 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1657 1658 if (twl4030->master_substream) { 1659 twl4030->slave_substream = substream; 1660 /* The DAI has one configuration for playback and capture, so 1661 * if the DAI has been already configured then constrain this 1662 * substream to match it. */ 1663 if (twl4030->configured) 1664 twl4030_constraints(twl4030, twl4030->master_substream); 1665 } else { 1666 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) & 1667 TWL4030_OPTION_1)) { 1668 /* In option2 4 channel is not supported, set the 1669 * constraint for the first stream for channels, the 1670 * second stream will 'inherit' this cosntraint */ 1671 snd_pcm_hw_constraint_single(substream->runtime, 1672 SNDRV_PCM_HW_PARAM_CHANNELS, 1673 2); 1674 } 1675 twl4030->master_substream = substream; 1676 } 1677 1678 return 0; 1679 } 1680 1681 static void twl4030_shutdown(struct snd_pcm_substream *substream, 1682 struct snd_soc_dai *dai) 1683 { 1684 struct snd_soc_codec *codec = dai->codec; 1685 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1686 1687 if (twl4030->master_substream == substream) 1688 twl4030->master_substream = twl4030->slave_substream; 1689 1690 twl4030->slave_substream = NULL; 1691 1692 /* If all streams are closed, or the remaining stream has not yet 1693 * been configured than set the DAI as not configured. */ 1694 if (!twl4030->master_substream) 1695 twl4030->configured = 0; 1696 else if (!twl4030->master_substream->runtime->channels) 1697 twl4030->configured = 0; 1698 1699 /* If the closing substream had 4 channel, do the necessary cleanup */ 1700 if (substream->runtime->channels == 4) 1701 twl4030_tdm_enable(codec, substream->stream, 0); 1702 } 1703 1704 static int twl4030_hw_params(struct snd_pcm_substream *substream, 1705 struct snd_pcm_hw_params *params, 1706 struct snd_soc_dai *dai) 1707 { 1708 struct snd_soc_codec *codec = dai->codec; 1709 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1710 u8 mode, old_mode, format, old_format; 1711 1712 /* If the substream has 4 channel, do the necessary setup */ 1713 if (params_channels(params) == 4) { 1714 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 1715 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE); 1716 1717 /* Safety check: are we in the correct operating mode and 1718 * the interface is in TDM mode? */ 1719 if ((mode & TWL4030_OPTION_1) && 1720 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM)) 1721 twl4030_tdm_enable(codec, substream->stream, 1); 1722 else 1723 return -EINVAL; 1724 } 1725 1726 if (twl4030->configured) 1727 /* Ignoring hw_params for already configured DAI */ 1728 return 0; 1729 1730 /* bit rate */ 1731 old_mode = twl4030_read(codec, 1732 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; 1733 mode = old_mode & ~TWL4030_APLL_RATE; 1734 1735 switch (params_rate(params)) { 1736 case 8000: 1737 mode |= TWL4030_APLL_RATE_8000; 1738 break; 1739 case 11025: 1740 mode |= TWL4030_APLL_RATE_11025; 1741 break; 1742 case 12000: 1743 mode |= TWL4030_APLL_RATE_12000; 1744 break; 1745 case 16000: 1746 mode |= TWL4030_APLL_RATE_16000; 1747 break; 1748 case 22050: 1749 mode |= TWL4030_APLL_RATE_22050; 1750 break; 1751 case 24000: 1752 mode |= TWL4030_APLL_RATE_24000; 1753 break; 1754 case 32000: 1755 mode |= TWL4030_APLL_RATE_32000; 1756 break; 1757 case 44100: 1758 mode |= TWL4030_APLL_RATE_44100; 1759 break; 1760 case 48000: 1761 mode |= TWL4030_APLL_RATE_48000; 1762 break; 1763 case 96000: 1764 mode |= TWL4030_APLL_RATE_96000; 1765 break; 1766 default: 1767 dev_err(codec->dev, "%s: unknown rate %d\n", __func__, 1768 params_rate(params)); 1769 return -EINVAL; 1770 } 1771 1772 /* sample size */ 1773 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 1774 format = old_format; 1775 format &= ~TWL4030_DATA_WIDTH; 1776 switch (params_width(params)) { 1777 case 16: 1778 format |= TWL4030_DATA_WIDTH_16S_16W; 1779 break; 1780 case 32: 1781 format |= TWL4030_DATA_WIDTH_32S_24W; 1782 break; 1783 default: 1784 dev_err(codec->dev, "%s: unsupported bits/sample %d\n", 1785 __func__, params_width(params)); 1786 return -EINVAL; 1787 } 1788 1789 if (format != old_format || mode != old_mode) { 1790 if (twl4030->codec_powered) { 1791 /* 1792 * If the codec is powered, than we need to toggle the 1793 * codec power. 1794 */ 1795 twl4030_codec_enable(codec, 0); 1796 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 1797 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1798 twl4030_codec_enable(codec, 1); 1799 } else { 1800 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 1801 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1802 } 1803 } 1804 1805 /* Store the important parameters for the DAI configuration and set 1806 * the DAI as configured */ 1807 twl4030->configured = 1; 1808 twl4030->rate = params_rate(params); 1809 twl4030->sample_bits = hw_param_interval(params, 1810 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min; 1811 twl4030->channels = params_channels(params); 1812 1813 /* If both playback and capture streams are open, and one of them 1814 * is setting the hw parameters right now (since we are here), set 1815 * constraints to the other stream to match the current one. */ 1816 if (twl4030->slave_substream) 1817 twl4030_constraints(twl4030, substream); 1818 1819 return 0; 1820 } 1821 1822 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id, 1823 unsigned int freq, int dir) 1824 { 1825 struct snd_soc_codec *codec = codec_dai->codec; 1826 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1827 1828 switch (freq) { 1829 case 19200000: 1830 case 26000000: 1831 case 38400000: 1832 break; 1833 default: 1834 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq); 1835 return -EINVAL; 1836 } 1837 1838 if ((freq / 1000) != twl4030->sysclk) { 1839 dev_err(codec->dev, 1840 "Mismatch in HFCLKIN: %u (configured: %u)\n", 1841 freq, twl4030->sysclk * 1000); 1842 return -EINVAL; 1843 } 1844 1845 return 0; 1846 } 1847 1848 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 1849 { 1850 struct snd_soc_codec *codec = codec_dai->codec; 1851 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1852 u8 old_format, format; 1853 1854 /* get format */ 1855 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 1856 format = old_format; 1857 1858 /* set master/slave audio interface */ 1859 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1860 case SND_SOC_DAIFMT_CBM_CFM: 1861 format &= ~(TWL4030_AIF_SLAVE_EN); 1862 format &= ~(TWL4030_CLK256FS_EN); 1863 break; 1864 case SND_SOC_DAIFMT_CBS_CFS: 1865 format |= TWL4030_AIF_SLAVE_EN; 1866 format |= TWL4030_CLK256FS_EN; 1867 break; 1868 default: 1869 return -EINVAL; 1870 } 1871 1872 /* interface format */ 1873 format &= ~TWL4030_AIF_FORMAT; 1874 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1875 case SND_SOC_DAIFMT_I2S: 1876 format |= TWL4030_AIF_FORMAT_CODEC; 1877 break; 1878 case SND_SOC_DAIFMT_DSP_A: 1879 format |= TWL4030_AIF_FORMAT_TDM; 1880 break; 1881 default: 1882 return -EINVAL; 1883 } 1884 1885 if (format != old_format) { 1886 if (twl4030->codec_powered) { 1887 /* 1888 * If the codec is powered, than we need to toggle the 1889 * codec power. 1890 */ 1891 twl4030_codec_enable(codec, 0); 1892 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1893 twl4030_codec_enable(codec, 1); 1894 } else { 1895 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1896 } 1897 } 1898 1899 return 0; 1900 } 1901 1902 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate) 1903 { 1904 struct snd_soc_codec *codec = dai->codec; 1905 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 1906 1907 if (tristate) 1908 reg |= TWL4030_AIF_TRI_EN; 1909 else 1910 reg &= ~TWL4030_AIF_TRI_EN; 1911 1912 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg); 1913 } 1914 1915 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R 1916 * (VTXL, VTXR) for uplink has to be enabled/disabled. */ 1917 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction, 1918 int enable) 1919 { 1920 u8 reg, mask; 1921 1922 reg = twl4030_read(codec, TWL4030_REG_OPTION); 1923 1924 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 1925 mask = TWL4030_ARXL1_VRX_EN; 1926 else 1927 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN; 1928 1929 if (enable) 1930 reg |= mask; 1931 else 1932 reg &= ~mask; 1933 1934 twl4030_write(codec, TWL4030_REG_OPTION, reg); 1935 } 1936 1937 static int twl4030_voice_startup(struct snd_pcm_substream *substream, 1938 struct snd_soc_dai *dai) 1939 { 1940 struct snd_soc_codec *codec = dai->codec; 1941 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1942 u8 mode; 1943 1944 /* If the system master clock is not 26MHz, the voice PCM interface is 1945 * not available. 1946 */ 1947 if (twl4030->sysclk != 26000) { 1948 dev_err(codec->dev, 1949 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n", 1950 __func__, twl4030->sysclk); 1951 return -EINVAL; 1952 } 1953 1954 /* If the codec mode is not option2, the voice PCM interface is not 1955 * available. 1956 */ 1957 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE) 1958 & TWL4030_OPT_MODE; 1959 1960 if (mode != TWL4030_OPTION_2) { 1961 dev_err(codec->dev, "%s: the codec mode is not option2\n", 1962 __func__); 1963 return -EINVAL; 1964 } 1965 1966 return 0; 1967 } 1968 1969 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, 1970 struct snd_soc_dai *dai) 1971 { 1972 struct snd_soc_codec *codec = dai->codec; 1973 1974 /* Enable voice digital filters */ 1975 twl4030_voice_enable(codec, substream->stream, 0); 1976 } 1977 1978 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, 1979 struct snd_pcm_hw_params *params, 1980 struct snd_soc_dai *dai) 1981 { 1982 struct snd_soc_codec *codec = dai->codec; 1983 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1984 u8 old_mode, mode; 1985 1986 /* Enable voice digital filters */ 1987 twl4030_voice_enable(codec, substream->stream, 1); 1988 1989 /* bit rate */ 1990 old_mode = twl4030_read(codec, 1991 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; 1992 mode = old_mode; 1993 1994 switch (params_rate(params)) { 1995 case 8000: 1996 mode &= ~(TWL4030_SEL_16K); 1997 break; 1998 case 16000: 1999 mode |= TWL4030_SEL_16K; 2000 break; 2001 default: 2002 dev_err(codec->dev, "%s: unknown rate %d\n", __func__, 2003 params_rate(params)); 2004 return -EINVAL; 2005 } 2006 2007 if (mode != old_mode) { 2008 if (twl4030->codec_powered) { 2009 /* 2010 * If the codec is powered, than we need to toggle the 2011 * codec power. 2012 */ 2013 twl4030_codec_enable(codec, 0); 2014 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 2015 twl4030_codec_enable(codec, 1); 2016 } else { 2017 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 2018 } 2019 } 2020 2021 return 0; 2022 } 2023 2024 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai, 2025 int clk_id, unsigned int freq, int dir) 2026 { 2027 struct snd_soc_codec *codec = codec_dai->codec; 2028 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2029 2030 if (freq != 26000000) { 2031 dev_err(codec->dev, 2032 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n", 2033 __func__, freq / 1000); 2034 return -EINVAL; 2035 } 2036 if ((freq / 1000) != twl4030->sysclk) { 2037 dev_err(codec->dev, 2038 "Mismatch in HFCLKIN: %u (configured: %u)\n", 2039 freq, twl4030->sysclk * 1000); 2040 return -EINVAL; 2041 } 2042 return 0; 2043 } 2044 2045 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, 2046 unsigned int fmt) 2047 { 2048 struct snd_soc_codec *codec = codec_dai->codec; 2049 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2050 u8 old_format, format; 2051 2052 /* get format */ 2053 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF); 2054 format = old_format; 2055 2056 /* set master/slave audio interface */ 2057 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2058 case SND_SOC_DAIFMT_CBM_CFM: 2059 format &= ~(TWL4030_VIF_SLAVE_EN); 2060 break; 2061 case SND_SOC_DAIFMT_CBS_CFS: 2062 format |= TWL4030_VIF_SLAVE_EN; 2063 break; 2064 default: 2065 return -EINVAL; 2066 } 2067 2068 /* clock inversion */ 2069 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2070 case SND_SOC_DAIFMT_IB_NF: 2071 format &= ~(TWL4030_VIF_FORMAT); 2072 break; 2073 case SND_SOC_DAIFMT_NB_IF: 2074 format |= TWL4030_VIF_FORMAT; 2075 break; 2076 default: 2077 return -EINVAL; 2078 } 2079 2080 if (format != old_format) { 2081 if (twl4030->codec_powered) { 2082 /* 2083 * If the codec is powered, than we need to toggle the 2084 * codec power. 2085 */ 2086 twl4030_codec_enable(codec, 0); 2087 twl4030_write(codec, TWL4030_REG_VOICE_IF, format); 2088 twl4030_codec_enable(codec, 1); 2089 } else { 2090 twl4030_write(codec, TWL4030_REG_VOICE_IF, format); 2091 } 2092 } 2093 2094 return 0; 2095 } 2096 2097 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate) 2098 { 2099 struct snd_soc_codec *codec = dai->codec; 2100 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF); 2101 2102 if (tristate) 2103 reg |= TWL4030_VIF_TRI_EN; 2104 else 2105 reg &= ~TWL4030_VIF_TRI_EN; 2106 2107 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg); 2108 } 2109 2110 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000) 2111 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 2112 2113 static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = { 2114 .startup = twl4030_startup, 2115 .shutdown = twl4030_shutdown, 2116 .hw_params = twl4030_hw_params, 2117 .set_sysclk = twl4030_set_dai_sysclk, 2118 .set_fmt = twl4030_set_dai_fmt, 2119 .set_tristate = twl4030_set_tristate, 2120 }; 2121 2122 static const struct snd_soc_dai_ops twl4030_dai_voice_ops = { 2123 .startup = twl4030_voice_startup, 2124 .shutdown = twl4030_voice_shutdown, 2125 .hw_params = twl4030_voice_hw_params, 2126 .set_sysclk = twl4030_voice_set_dai_sysclk, 2127 .set_fmt = twl4030_voice_set_dai_fmt, 2128 .set_tristate = twl4030_voice_set_tristate, 2129 }; 2130 2131 static struct snd_soc_dai_driver twl4030_dai[] = { 2132 { 2133 .name = "twl4030-hifi", 2134 .playback = { 2135 .stream_name = "HiFi Playback", 2136 .channels_min = 2, 2137 .channels_max = 4, 2138 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000, 2139 .formats = TWL4030_FORMATS, 2140 .sig_bits = 24,}, 2141 .capture = { 2142 .stream_name = "HiFi Capture", 2143 .channels_min = 2, 2144 .channels_max = 4, 2145 .rates = TWL4030_RATES, 2146 .formats = TWL4030_FORMATS, 2147 .sig_bits = 24,}, 2148 .ops = &twl4030_dai_hifi_ops, 2149 }, 2150 { 2151 .name = "twl4030-voice", 2152 .playback = { 2153 .stream_name = "Voice Playback", 2154 .channels_min = 1, 2155 .channels_max = 1, 2156 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, 2157 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 2158 .capture = { 2159 .stream_name = "Voice Capture", 2160 .channels_min = 1, 2161 .channels_max = 2, 2162 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, 2163 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 2164 .ops = &twl4030_dai_voice_ops, 2165 }, 2166 }; 2167 2168 static int twl4030_soc_probe(struct snd_soc_codec *codec) 2169 { 2170 struct twl4030_priv *twl4030; 2171 2172 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv), 2173 GFP_KERNEL); 2174 if (!twl4030) 2175 return -ENOMEM; 2176 snd_soc_codec_set_drvdata(codec, twl4030); 2177 /* Set the defaults, and power up the codec */ 2178 twl4030->sysclk = twl4030_audio_get_mclk() / 1000; 2179 2180 twl4030_init_chip(codec); 2181 2182 return 0; 2183 } 2184 2185 static int twl4030_soc_remove(struct snd_soc_codec *codec) 2186 { 2187 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2188 struct twl4030_codec_data *pdata = twl4030->pdata; 2189 2190 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio)) 2191 gpio_free(pdata->hs_extmute_gpio); 2192 2193 return 0; 2194 } 2195 2196 static const struct snd_soc_codec_driver soc_codec_dev_twl4030 = { 2197 .probe = twl4030_soc_probe, 2198 .remove = twl4030_soc_remove, 2199 .read = twl4030_read, 2200 .write = twl4030_write, 2201 .set_bias_level = twl4030_set_bias_level, 2202 .idle_bias_off = true, 2203 2204 .component_driver = { 2205 .controls = twl4030_snd_controls, 2206 .num_controls = ARRAY_SIZE(twl4030_snd_controls), 2207 .dapm_widgets = twl4030_dapm_widgets, 2208 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets), 2209 .dapm_routes = intercon, 2210 .num_dapm_routes = ARRAY_SIZE(intercon), 2211 }, 2212 }; 2213 2214 static int twl4030_codec_probe(struct platform_device *pdev) 2215 { 2216 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030, 2217 twl4030_dai, ARRAY_SIZE(twl4030_dai)); 2218 } 2219 2220 static int twl4030_codec_remove(struct platform_device *pdev) 2221 { 2222 snd_soc_unregister_codec(&pdev->dev); 2223 return 0; 2224 } 2225 2226 MODULE_ALIAS("platform:twl4030-codec"); 2227 2228 static struct platform_driver twl4030_codec_driver = { 2229 .probe = twl4030_codec_probe, 2230 .remove = twl4030_codec_remove, 2231 .driver = { 2232 .name = "twl4030-codec", 2233 }, 2234 }; 2235 2236 module_platform_driver(twl4030_codec_driver); 2237 2238 MODULE_DESCRIPTION("ASoC TWL4030 codec driver"); 2239 MODULE_AUTHOR("Steve Sakoman"); 2240 MODULE_LICENSE("GPL"); 2241