1 /* 2 * ALSA SoC TWL4030 codec driver 3 * 4 * Author: Steve Sakoman, <steve@sakoman.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 18 * 02110-1301 USA 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/moduleparam.h> 24 #include <linux/init.h> 25 #include <linux/delay.h> 26 #include <linux/pm.h> 27 #include <linux/i2c.h> 28 #include <linux/platform_device.h> 29 #include <linux/i2c/twl4030.h> 30 #include <sound/core.h> 31 #include <sound/pcm.h> 32 #include <sound/pcm_params.h> 33 #include <sound/soc.h> 34 #include <sound/soc-dapm.h> 35 #include <sound/initval.h> 36 #include <sound/tlv.h> 37 38 #include "twl4030.h" 39 40 /* 41 * twl4030 register cache & default register settings 42 */ 43 static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { 44 0x00, /* this register not used */ 45 0x91, /* REG_CODEC_MODE (0x1) */ 46 0xc3, /* REG_OPTION (0x2) */ 47 0x00, /* REG_UNKNOWN (0x3) */ 48 0x00, /* REG_MICBIAS_CTL (0x4) */ 49 0x20, /* REG_ANAMICL (0x5) */ 50 0x00, /* REG_ANAMICR (0x6) */ 51 0x00, /* REG_AVADC_CTL (0x7) */ 52 0x00, /* REG_ADCMICSEL (0x8) */ 53 0x00, /* REG_DIGMIXING (0x9) */ 54 0x0c, /* REG_ATXL1PGA (0xA) */ 55 0x0c, /* REG_ATXR1PGA (0xB) */ 56 0x00, /* REG_AVTXL2PGA (0xC) */ 57 0x00, /* REG_AVTXR2PGA (0xD) */ 58 0x01, /* REG_AUDIO_IF (0xE) */ 59 0x00, /* REG_VOICE_IF (0xF) */ 60 0x00, /* REG_ARXR1PGA (0x10) */ 61 0x00, /* REG_ARXL1PGA (0x11) */ 62 0x6c, /* REG_ARXR2PGA (0x12) */ 63 0x6c, /* REG_ARXL2PGA (0x13) */ 64 0x00, /* REG_VRXPGA (0x14) */ 65 0x00, /* REG_VSTPGA (0x15) */ 66 0x00, /* REG_VRX2ARXPGA (0x16) */ 67 0x0c, /* REG_AVDAC_CTL (0x17) */ 68 0x00, /* REG_ARX2VTXPGA (0x18) */ 69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */ 70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */ 71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */ 72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */ 73 0x00, /* REG_ATX2ARXPGA (0x1D) */ 74 0x00, /* REG_BT_IF (0x1E) */ 75 0x00, /* REG_BTPGA (0x1F) */ 76 0x00, /* REG_BTSTPGA (0x20) */ 77 0x00, /* REG_EAR_CTL (0x21) */ 78 0x24, /* REG_HS_SEL (0x22) */ 79 0x0a, /* REG_HS_GAIN_SET (0x23) */ 80 0x00, /* REG_HS_POPN_SET (0x24) */ 81 0x00, /* REG_PREDL_CTL (0x25) */ 82 0x00, /* REG_PREDR_CTL (0x26) */ 83 0x00, /* REG_PRECKL_CTL (0x27) */ 84 0x00, /* REG_PRECKR_CTL (0x28) */ 85 0x00, /* REG_HFL_CTL (0x29) */ 86 0x00, /* REG_HFR_CTL (0x2A) */ 87 0x00, /* REG_ALC_CTL (0x2B) */ 88 0x00, /* REG_ALC_SET1 (0x2C) */ 89 0x00, /* REG_ALC_SET2 (0x2D) */ 90 0x00, /* REG_BOOST_CTL (0x2E) */ 91 0x00, /* REG_SOFTVOL_CTL (0x2F) */ 92 0x00, /* REG_DTMF_FREQSEL (0x30) */ 93 0x00, /* REG_DTMF_TONEXT1H (0x31) */ 94 0x00, /* REG_DTMF_TONEXT1L (0x32) */ 95 0x00, /* REG_DTMF_TONEXT2H (0x33) */ 96 0x00, /* REG_DTMF_TONEXT2L (0x34) */ 97 0x00, /* REG_DTMF_TONOFF (0x35) */ 98 0x00, /* REG_DTMF_WANONOFF (0x36) */ 99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */ 100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */ 101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */ 102 0x16, /* REG_APLL_CTL (0x3A) */ 103 0x00, /* REG_DTMF_CTL (0x3B) */ 104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */ 105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */ 106 0x00, /* REG_MISC_SET_1 (0x3E) */ 107 0x00, /* REG_PCMBTMUX (0x3F) */ 108 0x00, /* not used (0x40) */ 109 0x00, /* not used (0x41) */ 110 0x00, /* not used (0x42) */ 111 0x00, /* REG_RX_PATH_SEL (0x43) */ 112 0x00, /* REG_VDL_APGA_CTL (0x44) */ 113 0x00, /* REG_VIBRA_CTL (0x45) */ 114 0x00, /* REG_VIBRA_SET (0x46) */ 115 0x00, /* REG_VIBRA_PWM_SET (0x47) */ 116 0x00, /* REG_ANAMIC_GAIN (0x48) */ 117 0x00, /* REG_MISC_SET_2 (0x49) */ 118 }; 119 120 /* codec private data */ 121 struct twl4030_priv { 122 unsigned int bypass_state; 123 unsigned int codec_powered; 124 unsigned int codec_muted; 125 126 struct snd_pcm_substream *master_substream; 127 struct snd_pcm_substream *slave_substream; 128 }; 129 130 /* 131 * read twl4030 register cache 132 */ 133 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec, 134 unsigned int reg) 135 { 136 u8 *cache = codec->reg_cache; 137 138 if (reg >= TWL4030_CACHEREGNUM) 139 return -EIO; 140 141 return cache[reg]; 142 } 143 144 /* 145 * write twl4030 register cache 146 */ 147 static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec, 148 u8 reg, u8 value) 149 { 150 u8 *cache = codec->reg_cache; 151 152 if (reg >= TWL4030_CACHEREGNUM) 153 return; 154 cache[reg] = value; 155 } 156 157 /* 158 * write to the twl4030 register space 159 */ 160 static int twl4030_write(struct snd_soc_codec *codec, 161 unsigned int reg, unsigned int value) 162 { 163 twl4030_write_reg_cache(codec, reg, value); 164 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg); 165 } 166 167 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable) 168 { 169 struct twl4030_priv *twl4030 = codec->private_data; 170 u8 mode; 171 172 if (enable == twl4030->codec_powered) 173 return; 174 175 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE); 176 if (enable) 177 mode |= TWL4030_CODECPDZ; 178 else 179 mode &= ~TWL4030_CODECPDZ; 180 181 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 182 twl4030->codec_powered = enable; 183 184 /* REVISIT: this delay is present in TI sample drivers */ 185 /* but there seems to be no TRM requirement for it */ 186 udelay(10); 187 } 188 189 static void twl4030_init_chip(struct snd_soc_codec *codec) 190 { 191 int i; 192 193 /* clear CODECPDZ prior to setting register defaults */ 194 twl4030_codec_enable(codec, 0); 195 196 /* set all audio section registers to reasonable defaults */ 197 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++) 198 twl4030_write(codec, i, twl4030_reg[i]); 199 200 } 201 202 static void twl4030_codec_mute(struct snd_soc_codec *codec, int mute) 203 { 204 struct twl4030_priv *twl4030 = codec->private_data; 205 u8 reg_val; 206 207 if (mute == twl4030->codec_muted) 208 return; 209 210 if (mute) { 211 /* Bypass the reg_cache and mute the volumes 212 * Headset mute is done in it's own event handler 213 * Things to mute: Earpiece, PreDrivL/R, CarkitL/R 214 */ 215 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL); 216 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 217 reg_val & (~TWL4030_EAR_GAIN), 218 TWL4030_REG_EAR_CTL); 219 220 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL); 221 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 222 reg_val & (~TWL4030_PREDL_GAIN), 223 TWL4030_REG_PREDL_CTL); 224 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL); 225 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 226 reg_val & (~TWL4030_PREDR_GAIN), 227 TWL4030_REG_PREDL_CTL); 228 229 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL); 230 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 231 reg_val & (~TWL4030_PRECKL_GAIN), 232 TWL4030_REG_PRECKL_CTL); 233 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL); 234 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 235 reg_val & (~TWL4030_PRECKL_GAIN), 236 TWL4030_REG_PRECKR_CTL); 237 238 /* Disable PLL */ 239 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL); 240 reg_val &= ~TWL4030_APLL_EN; 241 twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val); 242 } else { 243 /* Restore the volumes 244 * Headset mute is done in it's own event handler 245 * Things to restore: Earpiece, PreDrivL/R, CarkitL/R 246 */ 247 twl4030_write(codec, TWL4030_REG_EAR_CTL, 248 twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL)); 249 250 twl4030_write(codec, TWL4030_REG_PREDL_CTL, 251 twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL)); 252 twl4030_write(codec, TWL4030_REG_PREDR_CTL, 253 twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL)); 254 255 twl4030_write(codec, TWL4030_REG_PRECKL_CTL, 256 twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL)); 257 twl4030_write(codec, TWL4030_REG_PRECKR_CTL, 258 twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL)); 259 260 /* Enable PLL */ 261 reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL); 262 reg_val |= TWL4030_APLL_EN; 263 twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val); 264 } 265 266 twl4030->codec_muted = mute; 267 } 268 269 static void twl4030_power_up(struct snd_soc_codec *codec) 270 { 271 struct twl4030_priv *twl4030 = codec->private_data; 272 u8 anamicl, regmisc1, byte; 273 int i = 0; 274 275 if (twl4030->codec_powered) 276 return; 277 278 /* set CODECPDZ to turn on codec */ 279 twl4030_codec_enable(codec, 1); 280 281 /* initiate offset cancellation */ 282 anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL); 283 twl4030_write(codec, TWL4030_REG_ANAMICL, 284 anamicl | TWL4030_CNCL_OFFSET_START); 285 286 /* wait for offset cancellation to complete */ 287 do { 288 /* this takes a little while, so don't slam i2c */ 289 udelay(2000); 290 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, 291 TWL4030_REG_ANAMICL); 292 } while ((i++ < 100) && 293 ((byte & TWL4030_CNCL_OFFSET_START) == 294 TWL4030_CNCL_OFFSET_START)); 295 296 /* Make sure that the reg_cache has the same value as the HW */ 297 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte); 298 299 /* anti-pop when changing analog gain */ 300 regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1); 301 twl4030_write(codec, TWL4030_REG_MISC_SET_1, 302 regmisc1 | TWL4030_SMOOTH_ANAVOL_EN); 303 304 /* toggle CODECPDZ as per TRM */ 305 twl4030_codec_enable(codec, 0); 306 twl4030_codec_enable(codec, 1); 307 } 308 309 /* 310 * Unconditional power down 311 */ 312 static void twl4030_power_down(struct snd_soc_codec *codec) 313 { 314 /* power down */ 315 twl4030_codec_enable(codec, 0); 316 } 317 318 /* Earpiece */ 319 static const char *twl4030_earpiece_texts[] = 320 {"Off", "DACL1", "DACL2", "DACR1"}; 321 322 static const unsigned int twl4030_earpiece_values[] = 323 {0x0, 0x1, 0x2, 0x4}; 324 325 static const struct soc_enum twl4030_earpiece_enum = 326 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_EAR_CTL, 1, 0x7, 327 ARRAY_SIZE(twl4030_earpiece_texts), 328 twl4030_earpiece_texts, 329 twl4030_earpiece_values); 330 331 static const struct snd_kcontrol_new twl4030_dapm_earpiece_control = 332 SOC_DAPM_VALUE_ENUM("Route", twl4030_earpiece_enum); 333 334 /* PreDrive Left */ 335 static const char *twl4030_predrivel_texts[] = 336 {"Off", "DACL1", "DACL2", "DACR2"}; 337 338 static const unsigned int twl4030_predrivel_values[] = 339 {0x0, 0x1, 0x2, 0x4}; 340 341 static const struct soc_enum twl4030_predrivel_enum = 342 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDL_CTL, 1, 0x7, 343 ARRAY_SIZE(twl4030_predrivel_texts), 344 twl4030_predrivel_texts, 345 twl4030_predrivel_values); 346 347 static const struct snd_kcontrol_new twl4030_dapm_predrivel_control = 348 SOC_DAPM_VALUE_ENUM("Route", twl4030_predrivel_enum); 349 350 /* PreDrive Right */ 351 static const char *twl4030_predriver_texts[] = 352 {"Off", "DACR1", "DACR2", "DACL2"}; 353 354 static const unsigned int twl4030_predriver_values[] = 355 {0x0, 0x1, 0x2, 0x4}; 356 357 static const struct soc_enum twl4030_predriver_enum = 358 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDR_CTL, 1, 0x7, 359 ARRAY_SIZE(twl4030_predriver_texts), 360 twl4030_predriver_texts, 361 twl4030_predriver_values); 362 363 static const struct snd_kcontrol_new twl4030_dapm_predriver_control = 364 SOC_DAPM_VALUE_ENUM("Route", twl4030_predriver_enum); 365 366 /* Headset Left */ 367 static const char *twl4030_hsol_texts[] = 368 {"Off", "DACL1", "DACL2"}; 369 370 static const struct soc_enum twl4030_hsol_enum = 371 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL, 1, 372 ARRAY_SIZE(twl4030_hsol_texts), 373 twl4030_hsol_texts); 374 375 static const struct snd_kcontrol_new twl4030_dapm_hsol_control = 376 SOC_DAPM_ENUM("Route", twl4030_hsol_enum); 377 378 /* Headset Right */ 379 static const char *twl4030_hsor_texts[] = 380 {"Off", "DACR1", "DACR2"}; 381 382 static const struct soc_enum twl4030_hsor_enum = 383 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL, 4, 384 ARRAY_SIZE(twl4030_hsor_texts), 385 twl4030_hsor_texts); 386 387 static const struct snd_kcontrol_new twl4030_dapm_hsor_control = 388 SOC_DAPM_ENUM("Route", twl4030_hsor_enum); 389 390 /* Carkit Left */ 391 static const char *twl4030_carkitl_texts[] = 392 {"Off", "DACL1", "DACL2"}; 393 394 static const struct soc_enum twl4030_carkitl_enum = 395 SOC_ENUM_SINGLE(TWL4030_REG_PRECKL_CTL, 1, 396 ARRAY_SIZE(twl4030_carkitl_texts), 397 twl4030_carkitl_texts); 398 399 static const struct snd_kcontrol_new twl4030_dapm_carkitl_control = 400 SOC_DAPM_ENUM("Route", twl4030_carkitl_enum); 401 402 /* Carkit Right */ 403 static const char *twl4030_carkitr_texts[] = 404 {"Off", "DACR1", "DACR2"}; 405 406 static const struct soc_enum twl4030_carkitr_enum = 407 SOC_ENUM_SINGLE(TWL4030_REG_PRECKR_CTL, 1, 408 ARRAY_SIZE(twl4030_carkitr_texts), 409 twl4030_carkitr_texts); 410 411 static const struct snd_kcontrol_new twl4030_dapm_carkitr_control = 412 SOC_DAPM_ENUM("Route", twl4030_carkitr_enum); 413 414 /* Handsfree Left */ 415 static const char *twl4030_handsfreel_texts[] = 416 {"Voice", "DACL1", "DACL2", "DACR2"}; 417 418 static const struct soc_enum twl4030_handsfreel_enum = 419 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0, 420 ARRAY_SIZE(twl4030_handsfreel_texts), 421 twl4030_handsfreel_texts); 422 423 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control = 424 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum); 425 426 /* Handsfree Right */ 427 static const char *twl4030_handsfreer_texts[] = 428 {"Voice", "DACR1", "DACR2", "DACL2"}; 429 430 static const struct soc_enum twl4030_handsfreer_enum = 431 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0, 432 ARRAY_SIZE(twl4030_handsfreer_texts), 433 twl4030_handsfreer_texts); 434 435 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control = 436 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum); 437 438 /* Left analog microphone selection */ 439 static const char *twl4030_analoglmic_texts[] = 440 {"Off", "Main mic", "Headset mic", "AUXL", "Carkit mic"}; 441 442 static const unsigned int twl4030_analoglmic_values[] = 443 {0x0, 0x1, 0x2, 0x4, 0x8}; 444 445 static const struct soc_enum twl4030_analoglmic_enum = 446 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICL, 0, 0xf, 447 ARRAY_SIZE(twl4030_analoglmic_texts), 448 twl4030_analoglmic_texts, 449 twl4030_analoglmic_values); 450 451 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_control = 452 SOC_DAPM_VALUE_ENUM("Route", twl4030_analoglmic_enum); 453 454 /* Right analog microphone selection */ 455 static const char *twl4030_analogrmic_texts[] = 456 {"Off", "Sub mic", "AUXR"}; 457 458 static const unsigned int twl4030_analogrmic_values[] = 459 {0x0, 0x1, 0x4}; 460 461 static const struct soc_enum twl4030_analogrmic_enum = 462 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICR, 0, 0x5, 463 ARRAY_SIZE(twl4030_analogrmic_texts), 464 twl4030_analogrmic_texts, 465 twl4030_analogrmic_values); 466 467 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_control = 468 SOC_DAPM_VALUE_ENUM("Route", twl4030_analogrmic_enum); 469 470 /* TX1 L/R Analog/Digital microphone selection */ 471 static const char *twl4030_micpathtx1_texts[] = 472 {"Analog", "Digimic0"}; 473 474 static const struct soc_enum twl4030_micpathtx1_enum = 475 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0, 476 ARRAY_SIZE(twl4030_micpathtx1_texts), 477 twl4030_micpathtx1_texts); 478 479 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control = 480 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum); 481 482 /* TX2 L/R Analog/Digital microphone selection */ 483 static const char *twl4030_micpathtx2_texts[] = 484 {"Analog", "Digimic1"}; 485 486 static const struct soc_enum twl4030_micpathtx2_enum = 487 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2, 488 ARRAY_SIZE(twl4030_micpathtx2_texts), 489 twl4030_micpathtx2_texts); 490 491 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control = 492 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum); 493 494 /* Analog bypass for AudioR1 */ 495 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control = 496 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0); 497 498 /* Analog bypass for AudioL1 */ 499 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control = 500 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0); 501 502 /* Analog bypass for AudioR2 */ 503 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control = 504 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0); 505 506 /* Analog bypass for AudioL2 */ 507 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control = 508 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0); 509 510 /* Digital bypass gain, 0 mutes the bypass */ 511 static const unsigned int twl4030_dapm_dbypass_tlv[] = { 512 TLV_DB_RANGE_HEAD(2), 513 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1), 514 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0), 515 }; 516 517 /* Digital bypass left (TX1L -> RX2L) */ 518 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control = 519 SOC_DAPM_SINGLE_TLV("Volume", 520 TWL4030_REG_ATX2ARXPGA, 3, 7, 0, 521 twl4030_dapm_dbypass_tlv); 522 523 /* Digital bypass right (TX1R -> RX2R) */ 524 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control = 525 SOC_DAPM_SINGLE_TLV("Volume", 526 TWL4030_REG_ATX2ARXPGA, 0, 7, 0, 527 twl4030_dapm_dbypass_tlv); 528 529 static int micpath_event(struct snd_soc_dapm_widget *w, 530 struct snd_kcontrol *kcontrol, int event) 531 { 532 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value; 533 unsigned char adcmicsel, micbias_ctl; 534 535 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL); 536 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL); 537 /* Prepare the bits for the given TX path: 538 * shift_l == 0: TX1 microphone path 539 * shift_l == 2: TX2 microphone path */ 540 if (e->shift_l) { 541 /* TX2 microphone path */ 542 if (adcmicsel & TWL4030_TX2IN_SEL) 543 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */ 544 else 545 micbias_ctl &= ~TWL4030_MICBIAS2_CTL; 546 } else { 547 /* TX1 microphone path */ 548 if (adcmicsel & TWL4030_TX1IN_SEL) 549 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */ 550 else 551 micbias_ctl &= ~TWL4030_MICBIAS1_CTL; 552 } 553 554 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl); 555 556 return 0; 557 } 558 559 static int handsfree_event(struct snd_soc_dapm_widget *w, 560 struct snd_kcontrol *kcontrol, int event) 561 { 562 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value; 563 unsigned char hs_ctl; 564 565 hs_ctl = twl4030_read_reg_cache(w->codec, e->reg); 566 567 if (hs_ctl & TWL4030_HF_CTL_REF_EN) { 568 hs_ctl |= TWL4030_HF_CTL_RAMP_EN; 569 twl4030_write(w->codec, e->reg, hs_ctl); 570 hs_ctl |= TWL4030_HF_CTL_LOOP_EN; 571 twl4030_write(w->codec, e->reg, hs_ctl); 572 hs_ctl |= TWL4030_HF_CTL_HB_EN; 573 twl4030_write(w->codec, e->reg, hs_ctl); 574 } else { 575 hs_ctl &= ~(TWL4030_HF_CTL_RAMP_EN | TWL4030_HF_CTL_LOOP_EN 576 | TWL4030_HF_CTL_HB_EN); 577 twl4030_write(w->codec, e->reg, hs_ctl); 578 } 579 580 return 0; 581 } 582 583 static int headsetl_event(struct snd_soc_dapm_widget *w, 584 struct snd_kcontrol *kcontrol, int event) 585 { 586 unsigned char hs_gain, hs_pop; 587 588 /* Save the current volume */ 589 hs_gain = twl4030_read_reg_cache(w->codec, TWL4030_REG_HS_GAIN_SET); 590 hs_pop = twl4030_read_reg_cache(w->codec, TWL4030_REG_HS_POPN_SET); 591 592 switch (event) { 593 case SND_SOC_DAPM_POST_PMU: 594 /* Do the anti-pop/bias ramp enable according to the TRM */ 595 hs_pop |= TWL4030_VMID_EN; 596 twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop); 597 /* Is this needed? Can we just use whatever gain here? */ 598 twl4030_write(w->codec, TWL4030_REG_HS_GAIN_SET, 599 (hs_gain & (~0x0f)) | 0x0a); 600 hs_pop |= TWL4030_RAMP_EN; 601 twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop); 602 603 /* Restore the original volume */ 604 twl4030_write(w->codec, TWL4030_REG_HS_GAIN_SET, hs_gain); 605 break; 606 case SND_SOC_DAPM_POST_PMD: 607 /* Do the anti-pop/bias ramp disable according to the TRM */ 608 hs_pop &= ~TWL4030_RAMP_EN; 609 twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop); 610 /* Bypass the reg_cache to mute the headset */ 611 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 612 hs_gain & (~0x0f), 613 TWL4030_REG_HS_GAIN_SET); 614 hs_pop &= ~TWL4030_VMID_EN; 615 twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop); 616 break; 617 } 618 return 0; 619 } 620 621 static int bypass_event(struct snd_soc_dapm_widget *w, 622 struct snd_kcontrol *kcontrol, int event) 623 { 624 struct soc_mixer_control *m = 625 (struct soc_mixer_control *)w->kcontrols->private_value; 626 struct twl4030_priv *twl4030 = w->codec->private_data; 627 unsigned char reg; 628 629 reg = twl4030_read_reg_cache(w->codec, m->reg); 630 631 if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) { 632 /* Analog bypass */ 633 if (reg & (1 << m->shift)) 634 twl4030->bypass_state |= 635 (1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL)); 636 else 637 twl4030->bypass_state &= 638 ~(1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL)); 639 } else { 640 /* Digital bypass */ 641 if (reg & (0x7 << m->shift)) 642 twl4030->bypass_state |= (1 << (m->shift ? 5 : 4)); 643 else 644 twl4030->bypass_state &= ~(1 << (m->shift ? 5 : 4)); 645 } 646 647 if (w->codec->bias_level == SND_SOC_BIAS_STANDBY) { 648 if (twl4030->bypass_state) 649 twl4030_codec_mute(w->codec, 0); 650 else 651 twl4030_codec_mute(w->codec, 1); 652 } 653 return 0; 654 } 655 656 /* 657 * Some of the gain controls in TWL (mostly those which are associated with 658 * the outputs) are implemented in an interesting way: 659 * 0x0 : Power down (mute) 660 * 0x1 : 6dB 661 * 0x2 : 0 dB 662 * 0x3 : -6 dB 663 * Inverting not going to help with these. 664 * Custom volsw and volsw_2r get/put functions to handle these gain bits. 665 */ 666 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\ 667 xinvert, tlv_array) \ 668 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ 669 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ 670 SNDRV_CTL_ELEM_ACCESS_READWRITE,\ 671 .tlv.p = (tlv_array), \ 672 .info = snd_soc_info_volsw, \ 673 .get = snd_soc_get_volsw_twl4030, \ 674 .put = snd_soc_put_volsw_twl4030, \ 675 .private_value = (unsigned long)&(struct soc_mixer_control) \ 676 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\ 677 .max = xmax, .invert = xinvert} } 678 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\ 679 xinvert, tlv_array) \ 680 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ 681 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ 682 SNDRV_CTL_ELEM_ACCESS_READWRITE,\ 683 .tlv.p = (tlv_array), \ 684 .info = snd_soc_info_volsw_2r, \ 685 .get = snd_soc_get_volsw_r2_twl4030,\ 686 .put = snd_soc_put_volsw_r2_twl4030, \ 687 .private_value = (unsigned long)&(struct soc_mixer_control) \ 688 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \ 689 .rshift = xshift, .max = xmax, .invert = xinvert} } 690 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \ 691 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \ 692 xinvert, tlv_array) 693 694 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol, 695 struct snd_ctl_elem_value *ucontrol) 696 { 697 struct soc_mixer_control *mc = 698 (struct soc_mixer_control *)kcontrol->private_value; 699 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 700 unsigned int reg = mc->reg; 701 unsigned int shift = mc->shift; 702 unsigned int rshift = mc->rshift; 703 int max = mc->max; 704 int mask = (1 << fls(max)) - 1; 705 706 ucontrol->value.integer.value[0] = 707 (snd_soc_read(codec, reg) >> shift) & mask; 708 if (ucontrol->value.integer.value[0]) 709 ucontrol->value.integer.value[0] = 710 max + 1 - ucontrol->value.integer.value[0]; 711 712 if (shift != rshift) { 713 ucontrol->value.integer.value[1] = 714 (snd_soc_read(codec, reg) >> rshift) & mask; 715 if (ucontrol->value.integer.value[1]) 716 ucontrol->value.integer.value[1] = 717 max + 1 - ucontrol->value.integer.value[1]; 718 } 719 720 return 0; 721 } 722 723 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol, 724 struct snd_ctl_elem_value *ucontrol) 725 { 726 struct soc_mixer_control *mc = 727 (struct soc_mixer_control *)kcontrol->private_value; 728 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 729 unsigned int reg = mc->reg; 730 unsigned int shift = mc->shift; 731 unsigned int rshift = mc->rshift; 732 int max = mc->max; 733 int mask = (1 << fls(max)) - 1; 734 unsigned short val, val2, val_mask; 735 736 val = (ucontrol->value.integer.value[0] & mask); 737 738 val_mask = mask << shift; 739 if (val) 740 val = max + 1 - val; 741 val = val << shift; 742 if (shift != rshift) { 743 val2 = (ucontrol->value.integer.value[1] & mask); 744 val_mask |= mask << rshift; 745 if (val2) 746 val2 = max + 1 - val2; 747 val |= val2 << rshift; 748 } 749 return snd_soc_update_bits(codec, reg, val_mask, val); 750 } 751 752 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 753 struct snd_ctl_elem_value *ucontrol) 754 { 755 struct soc_mixer_control *mc = 756 (struct soc_mixer_control *)kcontrol->private_value; 757 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 758 unsigned int reg = mc->reg; 759 unsigned int reg2 = mc->rreg; 760 unsigned int shift = mc->shift; 761 int max = mc->max; 762 int mask = (1<<fls(max))-1; 763 764 ucontrol->value.integer.value[0] = 765 (snd_soc_read(codec, reg) >> shift) & mask; 766 ucontrol->value.integer.value[1] = 767 (snd_soc_read(codec, reg2) >> shift) & mask; 768 769 if (ucontrol->value.integer.value[0]) 770 ucontrol->value.integer.value[0] = 771 max + 1 - ucontrol->value.integer.value[0]; 772 if (ucontrol->value.integer.value[1]) 773 ucontrol->value.integer.value[1] = 774 max + 1 - ucontrol->value.integer.value[1]; 775 776 return 0; 777 } 778 779 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 780 struct snd_ctl_elem_value *ucontrol) 781 { 782 struct soc_mixer_control *mc = 783 (struct soc_mixer_control *)kcontrol->private_value; 784 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 785 unsigned int reg = mc->reg; 786 unsigned int reg2 = mc->rreg; 787 unsigned int shift = mc->shift; 788 int max = mc->max; 789 int mask = (1 << fls(max)) - 1; 790 int err; 791 unsigned short val, val2, val_mask; 792 793 val_mask = mask << shift; 794 val = (ucontrol->value.integer.value[0] & mask); 795 val2 = (ucontrol->value.integer.value[1] & mask); 796 797 if (val) 798 val = max + 1 - val; 799 if (val2) 800 val2 = max + 1 - val2; 801 802 val = val << shift; 803 val2 = val2 << shift; 804 805 err = snd_soc_update_bits(codec, reg, val_mask, val); 806 if (err < 0) 807 return err; 808 809 err = snd_soc_update_bits(codec, reg2, val_mask, val2); 810 return err; 811 } 812 813 /* 814 * FGAIN volume control: 815 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB) 816 */ 817 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1); 818 819 /* 820 * CGAIN volume control: 821 * 0 dB to 12 dB in 6 dB steps 822 * value 2 and 3 means 12 dB 823 */ 824 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0); 825 826 /* 827 * Analog playback gain 828 * -24 dB to 12 dB in 2 dB steps 829 */ 830 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0); 831 832 /* 833 * Gain controls tied to outputs 834 * -6 dB to 6 dB in 6 dB steps (mute instead of -12) 835 */ 836 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1); 837 838 /* 839 * Capture gain after the ADCs 840 * from 0 dB to 31 dB in 1 dB steps 841 */ 842 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0); 843 844 /* 845 * Gain control for input amplifiers 846 * 0 dB to 30 dB in 6 dB steps 847 */ 848 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0); 849 850 static const char *twl4030_rampdelay_texts[] = { 851 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms", 852 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms", 853 "3495/2581/1748 ms" 854 }; 855 856 static const struct soc_enum twl4030_rampdelay_enum = 857 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2, 858 ARRAY_SIZE(twl4030_rampdelay_texts), 859 twl4030_rampdelay_texts); 860 861 static const struct snd_kcontrol_new twl4030_snd_controls[] = { 862 /* Common playback gain controls */ 863 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume", 864 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 865 0, 0x3f, 0, digital_fine_tlv), 866 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume", 867 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 868 0, 0x3f, 0, digital_fine_tlv), 869 870 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume", 871 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 872 6, 0x2, 0, digital_coarse_tlv), 873 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume", 874 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 875 6, 0x2, 0, digital_coarse_tlv), 876 877 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume", 878 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 879 3, 0x12, 1, analog_tlv), 880 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume", 881 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 882 3, 0x12, 1, analog_tlv), 883 SOC_DOUBLE_R("DAC1 Analog Playback Switch", 884 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 885 1, 1, 0), 886 SOC_DOUBLE_R("DAC2 Analog Playback Switch", 887 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 888 1, 1, 0), 889 890 /* Separate output gain controls */ 891 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume", 892 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL, 893 4, 3, 0, output_tvl), 894 895 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume", 896 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl), 897 898 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume", 899 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL, 900 4, 3, 0, output_tvl), 901 902 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume", 903 TWL4030_REG_EAR_CTL, 4, 3, 0, output_tvl), 904 905 /* Common capture gain controls */ 906 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume", 907 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, 908 0, 0x1f, 0, digital_capture_tlv), 909 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume", 910 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA, 911 0, 0x1f, 0, digital_capture_tlv), 912 913 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN, 914 0, 3, 5, 0, input_gain_tlv), 915 916 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum), 917 }; 918 919 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = { 920 /* Left channel inputs */ 921 SND_SOC_DAPM_INPUT("MAINMIC"), 922 SND_SOC_DAPM_INPUT("HSMIC"), 923 SND_SOC_DAPM_INPUT("AUXL"), 924 SND_SOC_DAPM_INPUT("CARKITMIC"), 925 /* Right channel inputs */ 926 SND_SOC_DAPM_INPUT("SUBMIC"), 927 SND_SOC_DAPM_INPUT("AUXR"), 928 /* Digital microphones (Stereo) */ 929 SND_SOC_DAPM_INPUT("DIGIMIC0"), 930 SND_SOC_DAPM_INPUT("DIGIMIC1"), 931 932 /* Outputs */ 933 SND_SOC_DAPM_OUTPUT("OUTL"), 934 SND_SOC_DAPM_OUTPUT("OUTR"), 935 SND_SOC_DAPM_OUTPUT("EARPIECE"), 936 SND_SOC_DAPM_OUTPUT("PREDRIVEL"), 937 SND_SOC_DAPM_OUTPUT("PREDRIVER"), 938 SND_SOC_DAPM_OUTPUT("HSOL"), 939 SND_SOC_DAPM_OUTPUT("HSOR"), 940 SND_SOC_DAPM_OUTPUT("CARKITL"), 941 SND_SOC_DAPM_OUTPUT("CARKITR"), 942 SND_SOC_DAPM_OUTPUT("HFL"), 943 SND_SOC_DAPM_OUTPUT("HFR"), 944 945 /* DACs */ 946 SND_SOC_DAPM_DAC("DAC Right1", "Right Front Playback", 947 SND_SOC_NOPM, 0, 0), 948 SND_SOC_DAPM_DAC("DAC Left1", "Left Front Playback", 949 SND_SOC_NOPM, 0, 0), 950 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear Playback", 951 SND_SOC_NOPM, 0, 0), 952 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear Playback", 953 SND_SOC_NOPM, 0, 0), 954 955 /* Analog PGAs */ 956 SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL, 957 0, 0, NULL, 0), 958 SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL, 959 0, 0, NULL, 0), 960 SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL, 961 0, 0, NULL, 0), 962 SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL, 963 0, 0, NULL, 0), 964 965 /* Analog bypasses */ 966 SND_SOC_DAPM_SWITCH_E("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0, 967 &twl4030_dapm_abypassr1_control, bypass_event, 968 SND_SOC_DAPM_POST_REG), 969 SND_SOC_DAPM_SWITCH_E("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0, 970 &twl4030_dapm_abypassl1_control, 971 bypass_event, SND_SOC_DAPM_POST_REG), 972 SND_SOC_DAPM_SWITCH_E("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0, 973 &twl4030_dapm_abypassr2_control, 974 bypass_event, SND_SOC_DAPM_POST_REG), 975 SND_SOC_DAPM_SWITCH_E("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0, 976 &twl4030_dapm_abypassl2_control, 977 bypass_event, SND_SOC_DAPM_POST_REG), 978 979 /* Digital bypasses */ 980 SND_SOC_DAPM_SWITCH_E("Left Digital Loopback", SND_SOC_NOPM, 0, 0, 981 &twl4030_dapm_dbypassl_control, bypass_event, 982 SND_SOC_DAPM_POST_REG), 983 SND_SOC_DAPM_SWITCH_E("Right Digital Loopback", SND_SOC_NOPM, 0, 0, 984 &twl4030_dapm_dbypassr_control, bypass_event, 985 SND_SOC_DAPM_POST_REG), 986 987 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", TWL4030_REG_AVDAC_CTL, 988 0, 0, NULL, 0), 989 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", TWL4030_REG_AVDAC_CTL, 990 1, 0, NULL, 0), 991 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", TWL4030_REG_AVDAC_CTL, 992 2, 0, NULL, 0), 993 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", TWL4030_REG_AVDAC_CTL, 994 3, 0, NULL, 0), 995 996 /* Output MUX controls */ 997 /* Earpiece */ 998 SND_SOC_DAPM_VALUE_MUX("Earpiece Mux", SND_SOC_NOPM, 0, 0, 999 &twl4030_dapm_earpiece_control), 1000 /* PreDrivL/R */ 1001 SND_SOC_DAPM_VALUE_MUX("PredriveL Mux", SND_SOC_NOPM, 0, 0, 1002 &twl4030_dapm_predrivel_control), 1003 SND_SOC_DAPM_VALUE_MUX("PredriveR Mux", SND_SOC_NOPM, 0, 0, 1004 &twl4030_dapm_predriver_control), 1005 /* HeadsetL/R */ 1006 SND_SOC_DAPM_MUX_E("HeadsetL Mux", SND_SOC_NOPM, 0, 0, 1007 &twl4030_dapm_hsol_control, headsetl_event, 1008 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1009 SND_SOC_DAPM_MUX("HeadsetR Mux", SND_SOC_NOPM, 0, 0, 1010 &twl4030_dapm_hsor_control), 1011 /* CarkitL/R */ 1012 SND_SOC_DAPM_MUX("CarkitL Mux", SND_SOC_NOPM, 0, 0, 1013 &twl4030_dapm_carkitl_control), 1014 SND_SOC_DAPM_MUX("CarkitR Mux", SND_SOC_NOPM, 0, 0, 1015 &twl4030_dapm_carkitr_control), 1016 /* HandsfreeL/R */ 1017 SND_SOC_DAPM_MUX_E("HandsfreeL Mux", TWL4030_REG_HFL_CTL, 5, 0, 1018 &twl4030_dapm_handsfreel_control, handsfree_event, 1019 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1020 SND_SOC_DAPM_MUX_E("HandsfreeR Mux", TWL4030_REG_HFR_CTL, 5, 0, 1021 &twl4030_dapm_handsfreer_control, handsfree_event, 1022 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1023 1024 /* Introducing four virtual ADC, since TWL4030 have four channel for 1025 capture */ 1026 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture", 1027 SND_SOC_NOPM, 0, 0), 1028 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture", 1029 SND_SOC_NOPM, 0, 0), 1030 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture", 1031 SND_SOC_NOPM, 0, 0), 1032 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture", 1033 SND_SOC_NOPM, 0, 0), 1034 1035 /* Analog/Digital mic path selection. 1036 TX1 Left/Right: either analog Left/Right or Digimic0 1037 TX2 Left/Right: either analog Left/Right or Digimic1 */ 1038 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0, 1039 &twl4030_dapm_micpathtx1_control, micpath_event, 1040 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD| 1041 SND_SOC_DAPM_POST_REG), 1042 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0, 1043 &twl4030_dapm_micpathtx2_control, micpath_event, 1044 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD| 1045 SND_SOC_DAPM_POST_REG), 1046 1047 /* Analog input muxes with switch for the capture amplifiers */ 1048 SND_SOC_DAPM_VALUE_MUX("Analog Left Capture Route", 1049 TWL4030_REG_ANAMICL, 4, 0, &twl4030_dapm_analoglmic_control), 1050 SND_SOC_DAPM_VALUE_MUX("Analog Right Capture Route", 1051 TWL4030_REG_ANAMICR, 4, 0, &twl4030_dapm_analogrmic_control), 1052 1053 SND_SOC_DAPM_PGA("ADC Physical Left", 1054 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0), 1055 SND_SOC_DAPM_PGA("ADC Physical Right", 1056 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0), 1057 1058 SND_SOC_DAPM_PGA("Digimic0 Enable", 1059 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0), 1060 SND_SOC_DAPM_PGA("Digimic1 Enable", 1061 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0), 1062 1063 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0), 1064 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0), 1065 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0), 1066 1067 }; 1068 1069 static const struct snd_soc_dapm_route intercon[] = { 1070 {"Analog L1 Playback Mixer", NULL, "DAC Left1"}, 1071 {"Analog R1 Playback Mixer", NULL, "DAC Right1"}, 1072 {"Analog L2 Playback Mixer", NULL, "DAC Left2"}, 1073 {"Analog R2 Playback Mixer", NULL, "DAC Right2"}, 1074 1075 {"ARXL1_APGA", NULL, "Analog L1 Playback Mixer"}, 1076 {"ARXR1_APGA", NULL, "Analog R1 Playback Mixer"}, 1077 {"ARXL2_APGA", NULL, "Analog L2 Playback Mixer"}, 1078 {"ARXR2_APGA", NULL, "Analog R2 Playback Mixer"}, 1079 1080 /* Internal playback routings */ 1081 /* Earpiece */ 1082 {"Earpiece Mux", "DACL1", "ARXL1_APGA"}, 1083 {"Earpiece Mux", "DACL2", "ARXL2_APGA"}, 1084 {"Earpiece Mux", "DACR1", "ARXR1_APGA"}, 1085 /* PreDrivL */ 1086 {"PredriveL Mux", "DACL1", "ARXL1_APGA"}, 1087 {"PredriveL Mux", "DACL2", "ARXL2_APGA"}, 1088 {"PredriveL Mux", "DACR2", "ARXR2_APGA"}, 1089 /* PreDrivR */ 1090 {"PredriveR Mux", "DACR1", "ARXR1_APGA"}, 1091 {"PredriveR Mux", "DACR2", "ARXR2_APGA"}, 1092 {"PredriveR Mux", "DACL2", "ARXL2_APGA"}, 1093 /* HeadsetL */ 1094 {"HeadsetL Mux", "DACL1", "ARXL1_APGA"}, 1095 {"HeadsetL Mux", "DACL2", "ARXL2_APGA"}, 1096 /* HeadsetR */ 1097 {"HeadsetR Mux", "DACR1", "ARXR1_APGA"}, 1098 {"HeadsetR Mux", "DACR2", "ARXR2_APGA"}, 1099 /* CarkitL */ 1100 {"CarkitL Mux", "DACL1", "ARXL1_APGA"}, 1101 {"CarkitL Mux", "DACL2", "ARXL2_APGA"}, 1102 /* CarkitR */ 1103 {"CarkitR Mux", "DACR1", "ARXR1_APGA"}, 1104 {"CarkitR Mux", "DACR2", "ARXR2_APGA"}, 1105 /* HandsfreeL */ 1106 {"HandsfreeL Mux", "DACL1", "ARXL1_APGA"}, 1107 {"HandsfreeL Mux", "DACL2", "ARXL2_APGA"}, 1108 {"HandsfreeL Mux", "DACR2", "ARXR2_APGA"}, 1109 /* HandsfreeR */ 1110 {"HandsfreeR Mux", "DACR1", "ARXR1_APGA"}, 1111 {"HandsfreeR Mux", "DACR2", "ARXR2_APGA"}, 1112 {"HandsfreeR Mux", "DACL2", "ARXL2_APGA"}, 1113 1114 /* outputs */ 1115 {"OUTL", NULL, "ARXL2_APGA"}, 1116 {"OUTR", NULL, "ARXR2_APGA"}, 1117 {"EARPIECE", NULL, "Earpiece Mux"}, 1118 {"PREDRIVEL", NULL, "PredriveL Mux"}, 1119 {"PREDRIVER", NULL, "PredriveR Mux"}, 1120 {"HSOL", NULL, "HeadsetL Mux"}, 1121 {"HSOR", NULL, "HeadsetR Mux"}, 1122 {"CARKITL", NULL, "CarkitL Mux"}, 1123 {"CARKITR", NULL, "CarkitR Mux"}, 1124 {"HFL", NULL, "HandsfreeL Mux"}, 1125 {"HFR", NULL, "HandsfreeR Mux"}, 1126 1127 /* Capture path */ 1128 {"Analog Left Capture Route", "Main mic", "MAINMIC"}, 1129 {"Analog Left Capture Route", "Headset mic", "HSMIC"}, 1130 {"Analog Left Capture Route", "AUXL", "AUXL"}, 1131 {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"}, 1132 1133 {"Analog Right Capture Route", "Sub mic", "SUBMIC"}, 1134 {"Analog Right Capture Route", "AUXR", "AUXR"}, 1135 1136 {"ADC Physical Left", NULL, "Analog Left Capture Route"}, 1137 {"ADC Physical Right", NULL, "Analog Right Capture Route"}, 1138 1139 {"Digimic0 Enable", NULL, "DIGIMIC0"}, 1140 {"Digimic1 Enable", NULL, "DIGIMIC1"}, 1141 1142 /* TX1 Left capture path */ 1143 {"TX1 Capture Route", "Analog", "ADC Physical Left"}, 1144 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1145 /* TX1 Right capture path */ 1146 {"TX1 Capture Route", "Analog", "ADC Physical Right"}, 1147 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1148 /* TX2 Left capture path */ 1149 {"TX2 Capture Route", "Analog", "ADC Physical Left"}, 1150 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1151 /* TX2 Right capture path */ 1152 {"TX2 Capture Route", "Analog", "ADC Physical Right"}, 1153 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1154 1155 {"ADC Virtual Left1", NULL, "TX1 Capture Route"}, 1156 {"ADC Virtual Right1", NULL, "TX1 Capture Route"}, 1157 {"ADC Virtual Left2", NULL, "TX2 Capture Route"}, 1158 {"ADC Virtual Right2", NULL, "TX2 Capture Route"}, 1159 1160 /* Analog bypass routes */ 1161 {"Right1 Analog Loopback", "Switch", "Analog Right Capture Route"}, 1162 {"Left1 Analog Loopback", "Switch", "Analog Left Capture Route"}, 1163 {"Right2 Analog Loopback", "Switch", "Analog Right Capture Route"}, 1164 {"Left2 Analog Loopback", "Switch", "Analog Left Capture Route"}, 1165 1166 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"}, 1167 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"}, 1168 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"}, 1169 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"}, 1170 1171 /* Digital bypass routes */ 1172 {"Right Digital Loopback", "Volume", "TX1 Capture Route"}, 1173 {"Left Digital Loopback", "Volume", "TX1 Capture Route"}, 1174 1175 {"Analog R2 Playback Mixer", NULL, "Right Digital Loopback"}, 1176 {"Analog L2 Playback Mixer", NULL, "Left Digital Loopback"}, 1177 1178 }; 1179 1180 static int twl4030_add_widgets(struct snd_soc_codec *codec) 1181 { 1182 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets, 1183 ARRAY_SIZE(twl4030_dapm_widgets)); 1184 1185 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon)); 1186 1187 snd_soc_dapm_new_widgets(codec); 1188 return 0; 1189 } 1190 1191 static int twl4030_set_bias_level(struct snd_soc_codec *codec, 1192 enum snd_soc_bias_level level) 1193 { 1194 struct twl4030_priv *twl4030 = codec->private_data; 1195 1196 switch (level) { 1197 case SND_SOC_BIAS_ON: 1198 twl4030_codec_mute(codec, 0); 1199 break; 1200 case SND_SOC_BIAS_PREPARE: 1201 twl4030_power_up(codec); 1202 if (twl4030->bypass_state) 1203 twl4030_codec_mute(codec, 0); 1204 else 1205 twl4030_codec_mute(codec, 1); 1206 break; 1207 case SND_SOC_BIAS_STANDBY: 1208 twl4030_power_up(codec); 1209 if (twl4030->bypass_state) 1210 twl4030_codec_mute(codec, 0); 1211 else 1212 twl4030_codec_mute(codec, 1); 1213 break; 1214 case SND_SOC_BIAS_OFF: 1215 twl4030_power_down(codec); 1216 break; 1217 } 1218 codec->bias_level = level; 1219 1220 return 0; 1221 } 1222 1223 static int twl4030_startup(struct snd_pcm_substream *substream, 1224 struct snd_soc_dai *dai) 1225 { 1226 struct snd_soc_pcm_runtime *rtd = substream->private_data; 1227 struct snd_soc_device *socdev = rtd->socdev; 1228 struct snd_soc_codec *codec = socdev->card->codec; 1229 struct twl4030_priv *twl4030 = codec->private_data; 1230 1231 /* If we already have a playback or capture going then constrain 1232 * this substream to match it. 1233 */ 1234 if (twl4030->master_substream) { 1235 struct snd_pcm_runtime *master_runtime; 1236 master_runtime = twl4030->master_substream->runtime; 1237 1238 snd_pcm_hw_constraint_minmax(substream->runtime, 1239 SNDRV_PCM_HW_PARAM_RATE, 1240 master_runtime->rate, 1241 master_runtime->rate); 1242 1243 snd_pcm_hw_constraint_minmax(substream->runtime, 1244 SNDRV_PCM_HW_PARAM_SAMPLE_BITS, 1245 master_runtime->sample_bits, 1246 master_runtime->sample_bits); 1247 1248 twl4030->slave_substream = substream; 1249 } else 1250 twl4030->master_substream = substream; 1251 1252 return 0; 1253 } 1254 1255 static void twl4030_shutdown(struct snd_pcm_substream *substream, 1256 struct snd_soc_dai *dai) 1257 { 1258 struct snd_soc_pcm_runtime *rtd = substream->private_data; 1259 struct snd_soc_device *socdev = rtd->socdev; 1260 struct snd_soc_codec *codec = socdev->card->codec; 1261 struct twl4030_priv *twl4030 = codec->private_data; 1262 1263 if (twl4030->master_substream == substream) 1264 twl4030->master_substream = twl4030->slave_substream; 1265 1266 twl4030->slave_substream = NULL; 1267 } 1268 1269 static int twl4030_hw_params(struct snd_pcm_substream *substream, 1270 struct snd_pcm_hw_params *params, 1271 struct snd_soc_dai *dai) 1272 { 1273 struct snd_soc_pcm_runtime *rtd = substream->private_data; 1274 struct snd_soc_device *socdev = rtd->socdev; 1275 struct snd_soc_codec *codec = socdev->card->codec; 1276 struct twl4030_priv *twl4030 = codec->private_data; 1277 u8 mode, old_mode, format, old_format; 1278 1279 if (substream == twl4030->slave_substream) 1280 /* Ignoring hw_params for slave substream */ 1281 return 0; 1282 1283 /* bit rate */ 1284 old_mode = twl4030_read_reg_cache(codec, 1285 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; 1286 mode = old_mode & ~TWL4030_APLL_RATE; 1287 1288 switch (params_rate(params)) { 1289 case 8000: 1290 mode |= TWL4030_APLL_RATE_8000; 1291 break; 1292 case 11025: 1293 mode |= TWL4030_APLL_RATE_11025; 1294 break; 1295 case 12000: 1296 mode |= TWL4030_APLL_RATE_12000; 1297 break; 1298 case 16000: 1299 mode |= TWL4030_APLL_RATE_16000; 1300 break; 1301 case 22050: 1302 mode |= TWL4030_APLL_RATE_22050; 1303 break; 1304 case 24000: 1305 mode |= TWL4030_APLL_RATE_24000; 1306 break; 1307 case 32000: 1308 mode |= TWL4030_APLL_RATE_32000; 1309 break; 1310 case 44100: 1311 mode |= TWL4030_APLL_RATE_44100; 1312 break; 1313 case 48000: 1314 mode |= TWL4030_APLL_RATE_48000; 1315 break; 1316 case 96000: 1317 mode |= TWL4030_APLL_RATE_96000; 1318 break; 1319 default: 1320 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n", 1321 params_rate(params)); 1322 return -EINVAL; 1323 } 1324 1325 if (mode != old_mode) { 1326 /* change rate and set CODECPDZ */ 1327 twl4030_codec_enable(codec, 0); 1328 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 1329 twl4030_codec_enable(codec, 1); 1330 } 1331 1332 /* sample size */ 1333 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); 1334 format = old_format; 1335 format &= ~TWL4030_DATA_WIDTH; 1336 switch (params_format(params)) { 1337 case SNDRV_PCM_FORMAT_S16_LE: 1338 format |= TWL4030_DATA_WIDTH_16S_16W; 1339 break; 1340 case SNDRV_PCM_FORMAT_S24_LE: 1341 format |= TWL4030_DATA_WIDTH_32S_24W; 1342 break; 1343 default: 1344 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n", 1345 params_format(params)); 1346 return -EINVAL; 1347 } 1348 1349 if (format != old_format) { 1350 1351 /* clear CODECPDZ before changing format (codec requirement) */ 1352 twl4030_codec_enable(codec, 0); 1353 1354 /* change format */ 1355 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1356 1357 /* set CODECPDZ afterwards */ 1358 twl4030_codec_enable(codec, 1); 1359 } 1360 return 0; 1361 } 1362 1363 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, 1364 int clk_id, unsigned int freq, int dir) 1365 { 1366 struct snd_soc_codec *codec = codec_dai->codec; 1367 u8 infreq; 1368 1369 switch (freq) { 1370 case 19200000: 1371 infreq = TWL4030_APLL_INFREQ_19200KHZ; 1372 break; 1373 case 26000000: 1374 infreq = TWL4030_APLL_INFREQ_26000KHZ; 1375 break; 1376 case 38400000: 1377 infreq = TWL4030_APLL_INFREQ_38400KHZ; 1378 break; 1379 default: 1380 printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n", 1381 freq); 1382 return -EINVAL; 1383 } 1384 1385 infreq |= TWL4030_APLL_EN; 1386 twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq); 1387 1388 return 0; 1389 } 1390 1391 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, 1392 unsigned int fmt) 1393 { 1394 struct snd_soc_codec *codec = codec_dai->codec; 1395 u8 old_format, format; 1396 1397 /* get format */ 1398 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); 1399 format = old_format; 1400 1401 /* set master/slave audio interface */ 1402 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1403 case SND_SOC_DAIFMT_CBM_CFM: 1404 format &= ~(TWL4030_AIF_SLAVE_EN); 1405 format &= ~(TWL4030_CLK256FS_EN); 1406 break; 1407 case SND_SOC_DAIFMT_CBS_CFS: 1408 format |= TWL4030_AIF_SLAVE_EN; 1409 format |= TWL4030_CLK256FS_EN; 1410 break; 1411 default: 1412 return -EINVAL; 1413 } 1414 1415 /* interface format */ 1416 format &= ~TWL4030_AIF_FORMAT; 1417 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1418 case SND_SOC_DAIFMT_I2S: 1419 format |= TWL4030_AIF_FORMAT_CODEC; 1420 break; 1421 default: 1422 return -EINVAL; 1423 } 1424 1425 if (format != old_format) { 1426 1427 /* clear CODECPDZ before changing format (codec requirement) */ 1428 twl4030_codec_enable(codec, 0); 1429 1430 /* change format */ 1431 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1432 1433 /* set CODECPDZ afterwards */ 1434 twl4030_codec_enable(codec, 1); 1435 } 1436 1437 return 0; 1438 } 1439 1440 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000) 1441 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE) 1442 1443 static struct snd_soc_dai_ops twl4030_dai_ops = { 1444 .startup = twl4030_startup, 1445 .shutdown = twl4030_shutdown, 1446 .hw_params = twl4030_hw_params, 1447 .set_sysclk = twl4030_set_dai_sysclk, 1448 .set_fmt = twl4030_set_dai_fmt, 1449 }; 1450 1451 struct snd_soc_dai twl4030_dai = { 1452 .name = "twl4030", 1453 .playback = { 1454 .stream_name = "Playback", 1455 .channels_min = 2, 1456 .channels_max = 2, 1457 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000, 1458 .formats = TWL4030_FORMATS,}, 1459 .capture = { 1460 .stream_name = "Capture", 1461 .channels_min = 2, 1462 .channels_max = 2, 1463 .rates = TWL4030_RATES, 1464 .formats = TWL4030_FORMATS,}, 1465 .ops = &twl4030_dai_ops, 1466 }; 1467 EXPORT_SYMBOL_GPL(twl4030_dai); 1468 1469 static int twl4030_suspend(struct platform_device *pdev, pm_message_t state) 1470 { 1471 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1472 struct snd_soc_codec *codec = socdev->card->codec; 1473 1474 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF); 1475 1476 return 0; 1477 } 1478 1479 static int twl4030_resume(struct platform_device *pdev) 1480 { 1481 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1482 struct snd_soc_codec *codec = socdev->card->codec; 1483 1484 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1485 twl4030_set_bias_level(codec, codec->suspend_bias_level); 1486 return 0; 1487 } 1488 1489 /* 1490 * initialize the driver 1491 * register the mixer and dsp interfaces with the kernel 1492 */ 1493 1494 static int twl4030_init(struct snd_soc_device *socdev) 1495 { 1496 struct snd_soc_codec *codec = socdev->card->codec; 1497 int ret = 0; 1498 1499 printk(KERN_INFO "TWL4030 Audio Codec init \n"); 1500 1501 codec->name = "twl4030"; 1502 codec->owner = THIS_MODULE; 1503 codec->read = twl4030_read_reg_cache; 1504 codec->write = twl4030_write; 1505 codec->set_bias_level = twl4030_set_bias_level; 1506 codec->dai = &twl4030_dai; 1507 codec->num_dai = 1; 1508 codec->reg_cache_size = sizeof(twl4030_reg); 1509 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg), 1510 GFP_KERNEL); 1511 if (codec->reg_cache == NULL) 1512 return -ENOMEM; 1513 1514 /* register pcms */ 1515 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); 1516 if (ret < 0) { 1517 printk(KERN_ERR "twl4030: failed to create pcms\n"); 1518 goto pcm_err; 1519 } 1520 1521 twl4030_init_chip(codec); 1522 1523 /* power on device */ 1524 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1525 1526 snd_soc_add_controls(codec, twl4030_snd_controls, 1527 ARRAY_SIZE(twl4030_snd_controls)); 1528 twl4030_add_widgets(codec); 1529 1530 ret = snd_soc_init_card(socdev); 1531 if (ret < 0) { 1532 printk(KERN_ERR "twl4030: failed to register card\n"); 1533 goto card_err; 1534 } 1535 1536 return ret; 1537 1538 card_err: 1539 snd_soc_free_pcms(socdev); 1540 snd_soc_dapm_free(socdev); 1541 pcm_err: 1542 kfree(codec->reg_cache); 1543 return ret; 1544 } 1545 1546 static struct snd_soc_device *twl4030_socdev; 1547 1548 static int twl4030_probe(struct platform_device *pdev) 1549 { 1550 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1551 struct snd_soc_codec *codec; 1552 struct twl4030_priv *twl4030; 1553 1554 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); 1555 if (codec == NULL) 1556 return -ENOMEM; 1557 1558 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL); 1559 if (twl4030 == NULL) { 1560 kfree(codec); 1561 return -ENOMEM; 1562 } 1563 1564 codec->private_data = twl4030; 1565 socdev->card->codec = codec; 1566 mutex_init(&codec->mutex); 1567 INIT_LIST_HEAD(&codec->dapm_widgets); 1568 INIT_LIST_HEAD(&codec->dapm_paths); 1569 1570 twl4030_socdev = socdev; 1571 twl4030_init(socdev); 1572 1573 return 0; 1574 } 1575 1576 static int twl4030_remove(struct platform_device *pdev) 1577 { 1578 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1579 struct snd_soc_codec *codec = socdev->card->codec; 1580 1581 printk(KERN_INFO "TWL4030 Audio Codec remove\n"); 1582 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF); 1583 snd_soc_free_pcms(socdev); 1584 snd_soc_dapm_free(socdev); 1585 kfree(codec->private_data); 1586 kfree(codec); 1587 1588 return 0; 1589 } 1590 1591 struct snd_soc_codec_device soc_codec_dev_twl4030 = { 1592 .probe = twl4030_probe, 1593 .remove = twl4030_remove, 1594 .suspend = twl4030_suspend, 1595 .resume = twl4030_resume, 1596 }; 1597 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030); 1598 1599 static int __init twl4030_modinit(void) 1600 { 1601 return snd_soc_register_dai(&twl4030_dai); 1602 } 1603 module_init(twl4030_modinit); 1604 1605 static void __exit twl4030_exit(void) 1606 { 1607 snd_soc_unregister_dai(&twl4030_dai); 1608 } 1609 module_exit(twl4030_exit); 1610 1611 MODULE_DESCRIPTION("ASoC TWL4030 codec driver"); 1612 MODULE_AUTHOR("Steve Sakoman"); 1613 MODULE_LICENSE("GPL"); 1614