1 /* 2 * ALSA SoC TWL4030 codec driver 3 * 4 * Author: Steve Sakoman, <steve@sakoman.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 18 * 02110-1301 USA 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/moduleparam.h> 24 #include <linux/init.h> 25 #include <linux/delay.h> 26 #include <linux/pm.h> 27 #include <linux/i2c.h> 28 #include <linux/platform_device.h> 29 #include <linux/of.h> 30 #include <linux/of_gpio.h> 31 #include <linux/i2c/twl.h> 32 #include <linux/slab.h> 33 #include <linux/gpio.h> 34 #include <sound/core.h> 35 #include <sound/pcm.h> 36 #include <sound/pcm_params.h> 37 #include <sound/soc.h> 38 #include <sound/initval.h> 39 #include <sound/tlv.h> 40 41 /* Register descriptions are here */ 42 #include <linux/mfd/twl4030-audio.h> 43 44 /* TWL4030 PMBR1 Register */ 45 #define TWL4030_PMBR1_REG 0x0D 46 /* TWL4030 PMBR1 Register GPIO6 mux bits */ 47 #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2) 48 49 #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1) 50 51 /* codec private data */ 52 struct twl4030_priv { 53 unsigned int codec_powered; 54 55 /* reference counts of AIF/APLL users */ 56 unsigned int apll_enabled; 57 58 struct snd_pcm_substream *master_substream; 59 struct snd_pcm_substream *slave_substream; 60 61 unsigned int configured; 62 unsigned int rate; 63 unsigned int sample_bits; 64 unsigned int channels; 65 66 unsigned int sysclk; 67 68 /* Output (with associated amp) states */ 69 u8 hsl_enabled, hsr_enabled; 70 u8 earpiece_enabled; 71 u8 predrivel_enabled, predriver_enabled; 72 u8 carkitl_enabled, carkitr_enabled; 73 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1]; 74 75 struct twl4030_codec_data *pdata; 76 }; 77 78 static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030) 79 { 80 int i; 81 u8 byte; 82 83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) { 84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i); 85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte; 86 } 87 } 88 89 static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg) 90 { 91 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 92 u8 value = 0; 93 94 if (reg >= TWL4030_CACHEREGNUM) 95 return -EIO; 96 97 switch (reg) { 98 case TWL4030_REG_EAR_CTL: 99 case TWL4030_REG_PREDL_CTL: 100 case TWL4030_REG_PREDR_CTL: 101 case TWL4030_REG_PRECKL_CTL: 102 case TWL4030_REG_PRECKR_CTL: 103 case TWL4030_REG_HS_GAIN_SET: 104 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL]; 105 break; 106 default: 107 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg); 108 break; 109 } 110 111 return value; 112 } 113 114 static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030, 115 unsigned int reg) 116 { 117 bool write_to_reg = false; 118 119 /* Decide if the given register can be written */ 120 switch (reg) { 121 case TWL4030_REG_EAR_CTL: 122 if (twl4030->earpiece_enabled) 123 write_to_reg = true; 124 break; 125 case TWL4030_REG_PREDL_CTL: 126 if (twl4030->predrivel_enabled) 127 write_to_reg = true; 128 break; 129 case TWL4030_REG_PREDR_CTL: 130 if (twl4030->predriver_enabled) 131 write_to_reg = true; 132 break; 133 case TWL4030_REG_PRECKL_CTL: 134 if (twl4030->carkitl_enabled) 135 write_to_reg = true; 136 break; 137 case TWL4030_REG_PRECKR_CTL: 138 if (twl4030->carkitr_enabled) 139 write_to_reg = true; 140 break; 141 case TWL4030_REG_HS_GAIN_SET: 142 if (twl4030->hsl_enabled || twl4030->hsr_enabled) 143 write_to_reg = true; 144 break; 145 default: 146 /* All other register can be written */ 147 write_to_reg = true; 148 break; 149 } 150 151 return write_to_reg; 152 } 153 154 static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg, 155 unsigned int value) 156 { 157 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 158 159 /* Update the ctl cache */ 160 switch (reg) { 161 case TWL4030_REG_EAR_CTL: 162 case TWL4030_REG_PREDL_CTL: 163 case TWL4030_REG_PREDR_CTL: 164 case TWL4030_REG_PRECKL_CTL: 165 case TWL4030_REG_PRECKR_CTL: 166 case TWL4030_REG_HS_GAIN_SET: 167 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value; 168 break; 169 default: 170 break; 171 } 172 173 if (twl4030_can_write_to_chip(twl4030, reg)) 174 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg); 175 176 return 0; 177 } 178 179 static inline void twl4030_wait_ms(int time) 180 { 181 if (time < 60) { 182 time *= 1000; 183 usleep_range(time, time + 500); 184 } else { 185 msleep(time); 186 } 187 } 188 189 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable) 190 { 191 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 192 int mode; 193 194 if (enable == twl4030->codec_powered) 195 return; 196 197 if (enable) 198 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER); 199 else 200 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER); 201 202 if (mode >= 0) 203 twl4030->codec_powered = enable; 204 205 /* REVISIT: this delay is present in TI sample drivers */ 206 /* but there seems to be no TRM requirement for it */ 207 udelay(10); 208 } 209 210 static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata, 211 struct device_node *node) 212 { 213 int value; 214 215 of_property_read_u32(node, "ti,digimic_delay", 216 &pdata->digimic_delay); 217 of_property_read_u32(node, "ti,ramp_delay_value", 218 &pdata->ramp_delay_value); 219 of_property_read_u32(node, "ti,offset_cncl_path", 220 &pdata->offset_cncl_path); 221 if (!of_property_read_u32(node, "ti,hs_extmute", &value)) 222 pdata->hs_extmute = value; 223 224 pdata->hs_extmute_gpio = of_get_named_gpio(node, 225 "ti,hs_extmute_gpio", 0); 226 if (gpio_is_valid(pdata->hs_extmute_gpio)) 227 pdata->hs_extmute = 1; 228 } 229 230 static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec) 231 { 232 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev); 233 struct device_node *twl4030_codec_node = NULL; 234 235 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node, 236 "codec"); 237 238 if (!pdata && twl4030_codec_node) { 239 pdata = devm_kzalloc(codec->dev, 240 sizeof(struct twl4030_codec_data), 241 GFP_KERNEL); 242 if (!pdata) { 243 dev_err(codec->dev, "Can not allocate memory\n"); 244 return NULL; 245 } 246 twl4030_setup_pdata_of(pdata, twl4030_codec_node); 247 } 248 249 return pdata; 250 } 251 252 static void twl4030_init_chip(struct snd_soc_codec *codec) 253 { 254 struct twl4030_codec_data *pdata; 255 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 256 u8 reg, byte; 257 int i = 0; 258 259 pdata = twl4030_get_pdata(codec); 260 261 if (pdata && pdata->hs_extmute) { 262 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 263 int ret; 264 265 if (!pdata->hs_extmute_gpio) 266 dev_warn(codec->dev, 267 "Extmute GPIO is 0 is this correct?\n"); 268 269 ret = gpio_request_one(pdata->hs_extmute_gpio, 270 GPIOF_OUT_INIT_LOW, 271 "hs_extmute"); 272 if (ret) { 273 dev_err(codec->dev, 274 "Failed to get hs_extmute GPIO\n"); 275 pdata->hs_extmute_gpio = -1; 276 } 277 } else { 278 u8 pin_mux; 279 280 /* Set TWL4030 GPIO6 as EXTMUTE signal */ 281 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux, 282 TWL4030_PMBR1_REG); 283 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03); 284 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02); 285 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux, 286 TWL4030_PMBR1_REG); 287 } 288 } 289 290 /* Initialize the local ctl register cache */ 291 tw4030_init_ctl_cache(twl4030); 292 293 /* anti-pop when changing analog gain */ 294 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1); 295 twl4030_write(codec, TWL4030_REG_MISC_SET_1, 296 reg | TWL4030_SMOOTH_ANAVOL_EN); 297 298 twl4030_write(codec, TWL4030_REG_OPTION, 299 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN | 300 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN); 301 302 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */ 303 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32); 304 305 /* Machine dependent setup */ 306 if (!pdata) 307 return; 308 309 twl4030->pdata = pdata; 310 311 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET); 312 reg &= ~TWL4030_RAMP_DELAY; 313 reg |= (pdata->ramp_delay_value << 2); 314 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg); 315 316 /* initiate offset cancellation */ 317 twl4030_codec_enable(codec, 1); 318 319 reg = twl4030_read(codec, TWL4030_REG_ANAMICL); 320 reg &= ~TWL4030_OFFSET_CNCL_SEL; 321 reg |= pdata->offset_cncl_path; 322 twl4030_write(codec, TWL4030_REG_ANAMICL, 323 reg | TWL4030_CNCL_OFFSET_START); 324 325 /* 326 * Wait for offset cancellation to complete. 327 * Since this takes a while, do not slam the i2c. 328 * Start polling the status after ~20ms. 329 */ 330 msleep(20); 331 do { 332 usleep_range(1000, 2000); 333 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true); 334 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, 335 TWL4030_REG_ANAMICL); 336 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false); 337 } while ((i++ < 100) && 338 ((byte & TWL4030_CNCL_OFFSET_START) == 339 TWL4030_CNCL_OFFSET_START)); 340 341 twl4030_codec_enable(codec, 0); 342 } 343 344 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable) 345 { 346 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 347 348 if (enable) { 349 twl4030->apll_enabled++; 350 if (twl4030->apll_enabled == 1) 351 twl4030_audio_enable_resource( 352 TWL4030_AUDIO_RES_APLL); 353 } else { 354 twl4030->apll_enabled--; 355 if (!twl4030->apll_enabled) 356 twl4030_audio_disable_resource( 357 TWL4030_AUDIO_RES_APLL); 358 } 359 } 360 361 /* Earpiece */ 362 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = { 363 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0), 364 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0), 365 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0), 366 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0), 367 }; 368 369 /* PreDrive Left */ 370 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = { 371 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0), 372 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0), 373 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0), 374 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0), 375 }; 376 377 /* PreDrive Right */ 378 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = { 379 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0), 380 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0), 381 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0), 382 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0), 383 }; 384 385 /* Headset Left */ 386 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = { 387 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0), 388 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0), 389 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0), 390 }; 391 392 /* Headset Right */ 393 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = { 394 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0), 395 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0), 396 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0), 397 }; 398 399 /* Carkit Left */ 400 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = { 401 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0), 402 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0), 403 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0), 404 }; 405 406 /* Carkit Right */ 407 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = { 408 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0), 409 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0), 410 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0), 411 }; 412 413 /* Handsfree Left */ 414 static const char *twl4030_handsfreel_texts[] = 415 {"Voice", "AudioL1", "AudioL2", "AudioR2"}; 416 417 static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum, 418 TWL4030_REG_HFL_CTL, 0, 419 twl4030_handsfreel_texts); 420 421 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control = 422 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum); 423 424 /* Handsfree Left virtual mute */ 425 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control = 426 SOC_DAPM_SINGLE_VIRT("Switch", 1); 427 428 /* Handsfree Right */ 429 static const char *twl4030_handsfreer_texts[] = 430 {"Voice", "AudioR1", "AudioR2", "AudioL2"}; 431 432 static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum, 433 TWL4030_REG_HFR_CTL, 0, 434 twl4030_handsfreer_texts); 435 436 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control = 437 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum); 438 439 /* Handsfree Right virtual mute */ 440 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control = 441 SOC_DAPM_SINGLE_VIRT("Switch", 1); 442 443 /* Vibra */ 444 /* Vibra audio path selection */ 445 static const char *twl4030_vibra_texts[] = 446 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"}; 447 448 static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum, 449 TWL4030_REG_VIBRA_CTL, 2, 450 twl4030_vibra_texts); 451 452 static const struct snd_kcontrol_new twl4030_dapm_vibra_control = 453 SOC_DAPM_ENUM("Route", twl4030_vibra_enum); 454 455 /* Vibra path selection: local vibrator (PWM) or audio driven */ 456 static const char *twl4030_vibrapath_texts[] = 457 {"Local vibrator", "Audio"}; 458 459 static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum, 460 TWL4030_REG_VIBRA_CTL, 4, 461 twl4030_vibrapath_texts); 462 463 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control = 464 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum); 465 466 /* Left analog microphone selection */ 467 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = { 468 SOC_DAPM_SINGLE("Main Mic Capture Switch", 469 TWL4030_REG_ANAMICL, 0, 1, 0), 470 SOC_DAPM_SINGLE("Headset Mic Capture Switch", 471 TWL4030_REG_ANAMICL, 1, 1, 0), 472 SOC_DAPM_SINGLE("AUXL Capture Switch", 473 TWL4030_REG_ANAMICL, 2, 1, 0), 474 SOC_DAPM_SINGLE("Carkit Mic Capture Switch", 475 TWL4030_REG_ANAMICL, 3, 1, 0), 476 }; 477 478 /* Right analog microphone selection */ 479 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = { 480 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0), 481 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0), 482 }; 483 484 /* TX1 L/R Analog/Digital microphone selection */ 485 static const char *twl4030_micpathtx1_texts[] = 486 {"Analog", "Digimic0"}; 487 488 static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum, 489 TWL4030_REG_ADCMICSEL, 0, 490 twl4030_micpathtx1_texts); 491 492 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control = 493 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum); 494 495 /* TX2 L/R Analog/Digital microphone selection */ 496 static const char *twl4030_micpathtx2_texts[] = 497 {"Analog", "Digimic1"}; 498 499 static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum, 500 TWL4030_REG_ADCMICSEL, 2, 501 twl4030_micpathtx2_texts); 502 503 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control = 504 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum); 505 506 /* Analog bypass for AudioR1 */ 507 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control = 508 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0); 509 510 /* Analog bypass for AudioL1 */ 511 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control = 512 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0); 513 514 /* Analog bypass for AudioR2 */ 515 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control = 516 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0); 517 518 /* Analog bypass for AudioL2 */ 519 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control = 520 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0); 521 522 /* Analog bypass for Voice */ 523 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control = 524 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0); 525 526 /* Digital bypass gain, mute instead of -30dB */ 527 static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv, 528 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1), 529 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0), 530 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0) 531 ); 532 533 /* Digital bypass left (TX1L -> RX2L) */ 534 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control = 535 SOC_DAPM_SINGLE_TLV("Volume", 536 TWL4030_REG_ATX2ARXPGA, 3, 7, 0, 537 twl4030_dapm_dbypass_tlv); 538 539 /* Digital bypass right (TX1R -> RX2R) */ 540 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control = 541 SOC_DAPM_SINGLE_TLV("Volume", 542 TWL4030_REG_ATX2ARXPGA, 0, 7, 0, 543 twl4030_dapm_dbypass_tlv); 544 545 /* 546 * Voice Sidetone GAIN volume control: 547 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB) 548 */ 549 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1); 550 551 /* Digital bypass voice: sidetone (VUL -> VDL)*/ 552 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control = 553 SOC_DAPM_SINGLE_TLV("Volume", 554 TWL4030_REG_VSTPGA, 0, 0x29, 0, 555 twl4030_dapm_dbypassv_tlv); 556 557 /* 558 * Output PGA builder: 559 * Handle the muting and unmuting of the given output (turning off the 560 * amplifier associated with the output pin) 561 * On mute bypass the reg_cache and write 0 to the register 562 * On unmute: restore the register content from the reg_cache 563 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R 564 */ 565 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \ 566 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \ 567 struct snd_kcontrol *kcontrol, int event) \ 568 { \ 569 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); \ 570 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); \ 571 \ 572 switch (event) { \ 573 case SND_SOC_DAPM_POST_PMU: \ 574 twl4030->pin_name##_enabled = 1; \ 575 twl4030_write(codec, reg, twl4030_read(codec, reg)); \ 576 break; \ 577 case SND_SOC_DAPM_POST_PMD: \ 578 twl4030->pin_name##_enabled = 0; \ 579 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \ 580 break; \ 581 } \ 582 return 0; \ 583 } 584 585 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN); 586 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN); 587 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN); 588 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN); 589 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN); 590 591 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp) 592 { 593 unsigned char hs_ctl; 594 595 hs_ctl = twl4030_read(codec, reg); 596 597 if (ramp) { 598 /* HF ramp-up */ 599 hs_ctl |= TWL4030_HF_CTL_REF_EN; 600 twl4030_write(codec, reg, hs_ctl); 601 udelay(10); 602 hs_ctl |= TWL4030_HF_CTL_RAMP_EN; 603 twl4030_write(codec, reg, hs_ctl); 604 udelay(40); 605 hs_ctl |= TWL4030_HF_CTL_LOOP_EN; 606 hs_ctl |= TWL4030_HF_CTL_HB_EN; 607 twl4030_write(codec, reg, hs_ctl); 608 } else { 609 /* HF ramp-down */ 610 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN; 611 hs_ctl &= ~TWL4030_HF_CTL_HB_EN; 612 twl4030_write(codec, reg, hs_ctl); 613 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN; 614 twl4030_write(codec, reg, hs_ctl); 615 udelay(40); 616 hs_ctl &= ~TWL4030_HF_CTL_REF_EN; 617 twl4030_write(codec, reg, hs_ctl); 618 } 619 } 620 621 static int handsfreelpga_event(struct snd_soc_dapm_widget *w, 622 struct snd_kcontrol *kcontrol, int event) 623 { 624 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 625 626 switch (event) { 627 case SND_SOC_DAPM_POST_PMU: 628 handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 1); 629 break; 630 case SND_SOC_DAPM_POST_PMD: 631 handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 0); 632 break; 633 } 634 return 0; 635 } 636 637 static int handsfreerpga_event(struct snd_soc_dapm_widget *w, 638 struct snd_kcontrol *kcontrol, int event) 639 { 640 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 641 642 switch (event) { 643 case SND_SOC_DAPM_POST_PMU: 644 handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 1); 645 break; 646 case SND_SOC_DAPM_POST_PMD: 647 handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 0); 648 break; 649 } 650 return 0; 651 } 652 653 static int vibramux_event(struct snd_soc_dapm_widget *w, 654 struct snd_kcontrol *kcontrol, int event) 655 { 656 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 657 658 twl4030_write(codec, TWL4030_REG_VIBRA_SET, 0xff); 659 return 0; 660 } 661 662 static int apll_event(struct snd_soc_dapm_widget *w, 663 struct snd_kcontrol *kcontrol, int event) 664 { 665 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 666 667 switch (event) { 668 case SND_SOC_DAPM_PRE_PMU: 669 twl4030_apll_enable(codec, 1); 670 break; 671 case SND_SOC_DAPM_POST_PMD: 672 twl4030_apll_enable(codec, 0); 673 break; 674 } 675 return 0; 676 } 677 678 static int aif_event(struct snd_soc_dapm_widget *w, 679 struct snd_kcontrol *kcontrol, int event) 680 { 681 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 682 u8 audio_if; 683 684 audio_if = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 685 switch (event) { 686 case SND_SOC_DAPM_PRE_PMU: 687 /* Enable AIF */ 688 /* enable the PLL before we use it to clock the DAI */ 689 twl4030_apll_enable(codec, 1); 690 691 twl4030_write(codec, TWL4030_REG_AUDIO_IF, 692 audio_if | TWL4030_AIF_EN); 693 break; 694 case SND_SOC_DAPM_POST_PMD: 695 /* disable the DAI before we stop it's source PLL */ 696 twl4030_write(codec, TWL4030_REG_AUDIO_IF, 697 audio_if & ~TWL4030_AIF_EN); 698 twl4030_apll_enable(codec, 0); 699 break; 700 } 701 return 0; 702 } 703 704 static void headset_ramp(struct snd_soc_codec *codec, int ramp) 705 { 706 unsigned char hs_gain, hs_pop; 707 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 708 struct twl4030_codec_data *pdata = twl4030->pdata; 709 /* Base values for ramp delay calculation: 2^19 - 2^26 */ 710 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304, 711 8388608, 16777216, 33554432, 67108864}; 712 unsigned int delay; 713 714 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET); 715 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET); 716 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] / 717 twl4030->sysclk) + 1; 718 719 /* Enable external mute control, this dramatically reduces 720 * the pop-noise */ 721 if (pdata && pdata->hs_extmute) { 722 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 723 gpio_set_value(pdata->hs_extmute_gpio, 1); 724 } else { 725 hs_pop |= TWL4030_EXTMUTE; 726 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 727 } 728 } 729 730 if (ramp) { 731 /* Headset ramp-up according to the TRM */ 732 hs_pop |= TWL4030_VMID_EN; 733 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 734 /* Actually write to the register */ 735 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain, 736 TWL4030_REG_HS_GAIN_SET); 737 hs_pop |= TWL4030_RAMP_EN; 738 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 739 /* Wait ramp delay time + 1, so the VMID can settle */ 740 twl4030_wait_ms(delay); 741 } else { 742 /* Headset ramp-down _not_ according to 743 * the TRM, but in a way that it is working */ 744 hs_pop &= ~TWL4030_RAMP_EN; 745 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 746 /* Wait ramp delay time + 1, so the VMID can settle */ 747 twl4030_wait_ms(delay); 748 /* Bypass the reg_cache to mute the headset */ 749 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f), 750 TWL4030_REG_HS_GAIN_SET); 751 752 hs_pop &= ~TWL4030_VMID_EN; 753 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 754 } 755 756 /* Disable external mute */ 757 if (pdata && pdata->hs_extmute) { 758 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 759 gpio_set_value(pdata->hs_extmute_gpio, 0); 760 } else { 761 hs_pop &= ~TWL4030_EXTMUTE; 762 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 763 } 764 } 765 } 766 767 static int headsetlpga_event(struct snd_soc_dapm_widget *w, 768 struct snd_kcontrol *kcontrol, int event) 769 { 770 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 771 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 772 773 switch (event) { 774 case SND_SOC_DAPM_POST_PMU: 775 /* Do the ramp-up only once */ 776 if (!twl4030->hsr_enabled) 777 headset_ramp(codec, 1); 778 779 twl4030->hsl_enabled = 1; 780 break; 781 case SND_SOC_DAPM_POST_PMD: 782 /* Do the ramp-down only if both headsetL/R is disabled */ 783 if (!twl4030->hsr_enabled) 784 headset_ramp(codec, 0); 785 786 twl4030->hsl_enabled = 0; 787 break; 788 } 789 return 0; 790 } 791 792 static int headsetrpga_event(struct snd_soc_dapm_widget *w, 793 struct snd_kcontrol *kcontrol, int event) 794 { 795 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 796 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 797 798 switch (event) { 799 case SND_SOC_DAPM_POST_PMU: 800 /* Do the ramp-up only once */ 801 if (!twl4030->hsl_enabled) 802 headset_ramp(codec, 1); 803 804 twl4030->hsr_enabled = 1; 805 break; 806 case SND_SOC_DAPM_POST_PMD: 807 /* Do the ramp-down only if both headsetL/R is disabled */ 808 if (!twl4030->hsl_enabled) 809 headset_ramp(codec, 0); 810 811 twl4030->hsr_enabled = 0; 812 break; 813 } 814 return 0; 815 } 816 817 static int digimic_event(struct snd_soc_dapm_widget *w, 818 struct snd_kcontrol *kcontrol, int event) 819 { 820 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 821 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 822 struct twl4030_codec_data *pdata = twl4030->pdata; 823 824 if (pdata && pdata->digimic_delay) 825 twl4030_wait_ms(pdata->digimic_delay); 826 return 0; 827 } 828 829 /* 830 * Some of the gain controls in TWL (mostly those which are associated with 831 * the outputs) are implemented in an interesting way: 832 * 0x0 : Power down (mute) 833 * 0x1 : 6dB 834 * 0x2 : 0 dB 835 * 0x3 : -6 dB 836 * Inverting not going to help with these. 837 * Custom volsw and volsw_2r get/put functions to handle these gain bits. 838 */ 839 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol, 840 struct snd_ctl_elem_value *ucontrol) 841 { 842 struct soc_mixer_control *mc = 843 (struct soc_mixer_control *)kcontrol->private_value; 844 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 845 unsigned int reg = mc->reg; 846 unsigned int shift = mc->shift; 847 unsigned int rshift = mc->rshift; 848 int max = mc->max; 849 int mask = (1 << fls(max)) - 1; 850 851 ucontrol->value.integer.value[0] = 852 (snd_soc_read(codec, reg) >> shift) & mask; 853 if (ucontrol->value.integer.value[0]) 854 ucontrol->value.integer.value[0] = 855 max + 1 - ucontrol->value.integer.value[0]; 856 857 if (shift != rshift) { 858 ucontrol->value.integer.value[1] = 859 (snd_soc_read(codec, reg) >> rshift) & mask; 860 if (ucontrol->value.integer.value[1]) 861 ucontrol->value.integer.value[1] = 862 max + 1 - ucontrol->value.integer.value[1]; 863 } 864 865 return 0; 866 } 867 868 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol, 869 struct snd_ctl_elem_value *ucontrol) 870 { 871 struct soc_mixer_control *mc = 872 (struct soc_mixer_control *)kcontrol->private_value; 873 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 874 unsigned int reg = mc->reg; 875 unsigned int shift = mc->shift; 876 unsigned int rshift = mc->rshift; 877 int max = mc->max; 878 int mask = (1 << fls(max)) - 1; 879 unsigned short val, val2, val_mask; 880 881 val = (ucontrol->value.integer.value[0] & mask); 882 883 val_mask = mask << shift; 884 if (val) 885 val = max + 1 - val; 886 val = val << shift; 887 if (shift != rshift) { 888 val2 = (ucontrol->value.integer.value[1] & mask); 889 val_mask |= mask << rshift; 890 if (val2) 891 val2 = max + 1 - val2; 892 val |= val2 << rshift; 893 } 894 return snd_soc_update_bits(codec, reg, val_mask, val); 895 } 896 897 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 898 struct snd_ctl_elem_value *ucontrol) 899 { 900 struct soc_mixer_control *mc = 901 (struct soc_mixer_control *)kcontrol->private_value; 902 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 903 unsigned int reg = mc->reg; 904 unsigned int reg2 = mc->rreg; 905 unsigned int shift = mc->shift; 906 int max = mc->max; 907 int mask = (1<<fls(max))-1; 908 909 ucontrol->value.integer.value[0] = 910 (snd_soc_read(codec, reg) >> shift) & mask; 911 ucontrol->value.integer.value[1] = 912 (snd_soc_read(codec, reg2) >> shift) & mask; 913 914 if (ucontrol->value.integer.value[0]) 915 ucontrol->value.integer.value[0] = 916 max + 1 - ucontrol->value.integer.value[0]; 917 if (ucontrol->value.integer.value[1]) 918 ucontrol->value.integer.value[1] = 919 max + 1 - ucontrol->value.integer.value[1]; 920 921 return 0; 922 } 923 924 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 925 struct snd_ctl_elem_value *ucontrol) 926 { 927 struct soc_mixer_control *mc = 928 (struct soc_mixer_control *)kcontrol->private_value; 929 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 930 unsigned int reg = mc->reg; 931 unsigned int reg2 = mc->rreg; 932 unsigned int shift = mc->shift; 933 int max = mc->max; 934 int mask = (1 << fls(max)) - 1; 935 int err; 936 unsigned short val, val2, val_mask; 937 938 val_mask = mask << shift; 939 val = (ucontrol->value.integer.value[0] & mask); 940 val2 = (ucontrol->value.integer.value[1] & mask); 941 942 if (val) 943 val = max + 1 - val; 944 if (val2) 945 val2 = max + 1 - val2; 946 947 val = val << shift; 948 val2 = val2 << shift; 949 950 err = snd_soc_update_bits(codec, reg, val_mask, val); 951 if (err < 0) 952 return err; 953 954 err = snd_soc_update_bits(codec, reg2, val_mask, val2); 955 return err; 956 } 957 958 /* Codec operation modes */ 959 static const char *twl4030_op_modes_texts[] = { 960 "Option 2 (voice/audio)", "Option 1 (audio)" 961 }; 962 963 static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum, 964 TWL4030_REG_CODEC_MODE, 0, 965 twl4030_op_modes_texts); 966 967 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol, 968 struct snd_ctl_elem_value *ucontrol) 969 { 970 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 971 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 972 973 if (twl4030->configured) { 974 dev_err(codec->dev, 975 "operation mode cannot be changed on-the-fly\n"); 976 return -EBUSY; 977 } 978 979 return snd_soc_put_enum_double(kcontrol, ucontrol); 980 } 981 982 /* 983 * FGAIN volume control: 984 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB) 985 */ 986 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1); 987 988 /* 989 * CGAIN volume control: 990 * 0 dB to 12 dB in 6 dB steps 991 * value 2 and 3 means 12 dB 992 */ 993 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0); 994 995 /* 996 * Voice Downlink GAIN volume control: 997 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB) 998 */ 999 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1); 1000 1001 /* 1002 * Analog playback gain 1003 * -24 dB to 12 dB in 2 dB steps 1004 */ 1005 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0); 1006 1007 /* 1008 * Gain controls tied to outputs 1009 * -6 dB to 6 dB in 6 dB steps (mute instead of -12) 1010 */ 1011 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1); 1012 1013 /* 1014 * Gain control for earpiece amplifier 1015 * 0 dB to 12 dB in 6 dB steps (mute instead of -6) 1016 */ 1017 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1); 1018 1019 /* 1020 * Capture gain after the ADCs 1021 * from 0 dB to 31 dB in 1 dB steps 1022 */ 1023 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0); 1024 1025 /* 1026 * Gain control for input amplifiers 1027 * 0 dB to 30 dB in 6 dB steps 1028 */ 1029 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0); 1030 1031 /* AVADC clock priority */ 1032 static const char *twl4030_avadc_clk_priority_texts[] = { 1033 "Voice high priority", "HiFi high priority" 1034 }; 1035 1036 static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum, 1037 TWL4030_REG_AVADC_CTL, 2, 1038 twl4030_avadc_clk_priority_texts); 1039 1040 static const char *twl4030_rampdelay_texts[] = { 1041 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms", 1042 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms", 1043 "3495/2581/1748 ms" 1044 }; 1045 1046 static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum, 1047 TWL4030_REG_HS_POPN_SET, 2, 1048 twl4030_rampdelay_texts); 1049 1050 /* Vibra H-bridge direction mode */ 1051 static const char *twl4030_vibradirmode_texts[] = { 1052 "Vibra H-bridge direction", "Audio data MSB", 1053 }; 1054 1055 static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum, 1056 TWL4030_REG_VIBRA_CTL, 5, 1057 twl4030_vibradirmode_texts); 1058 1059 /* Vibra H-bridge direction */ 1060 static const char *twl4030_vibradir_texts[] = { 1061 "Positive polarity", "Negative polarity", 1062 }; 1063 1064 static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum, 1065 TWL4030_REG_VIBRA_CTL, 1, 1066 twl4030_vibradir_texts); 1067 1068 /* Digimic Left and right swapping */ 1069 static const char *twl4030_digimicswap_texts[] = { 1070 "Not swapped", "Swapped", 1071 }; 1072 1073 static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum, 1074 TWL4030_REG_MISC_SET_1, 0, 1075 twl4030_digimicswap_texts); 1076 1077 static const struct snd_kcontrol_new twl4030_snd_controls[] = { 1078 /* Codec operation mode control */ 1079 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum, 1080 snd_soc_get_enum_double, 1081 snd_soc_put_twl4030_opmode_enum_double), 1082 1083 /* Common playback gain controls */ 1084 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume", 1085 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 1086 0, 0x3f, 0, digital_fine_tlv), 1087 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume", 1088 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 1089 0, 0x3f, 0, digital_fine_tlv), 1090 1091 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume", 1092 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 1093 6, 0x2, 0, digital_coarse_tlv), 1094 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume", 1095 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 1096 6, 0x2, 0, digital_coarse_tlv), 1097 1098 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume", 1099 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 1100 3, 0x12, 1, analog_tlv), 1101 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume", 1102 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 1103 3, 0x12, 1, analog_tlv), 1104 SOC_DOUBLE_R("DAC1 Analog Playback Switch", 1105 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 1106 1, 1, 0), 1107 SOC_DOUBLE_R("DAC2 Analog Playback Switch", 1108 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 1109 1, 1, 0), 1110 1111 /* Common voice downlink gain controls */ 1112 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume", 1113 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv), 1114 1115 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume", 1116 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv), 1117 1118 SOC_SINGLE("DAC Voice Analog Downlink Switch", 1119 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0), 1120 1121 /* Separate output gain controls */ 1122 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume", 1123 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL, 1124 4, 3, 0, snd_soc_get_volsw_r2_twl4030, 1125 snd_soc_put_volsw_r2_twl4030, output_tvl), 1126 1127 SOC_DOUBLE_EXT_TLV("Headset Playback Volume", 1128 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030, 1129 snd_soc_put_volsw_twl4030, output_tvl), 1130 1131 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume", 1132 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL, 1133 4, 3, 0, snd_soc_get_volsw_r2_twl4030, 1134 snd_soc_put_volsw_r2_twl4030, output_tvl), 1135 1136 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume", 1137 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030, 1138 snd_soc_put_volsw_twl4030, output_ear_tvl), 1139 1140 /* Common capture gain controls */ 1141 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume", 1142 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, 1143 0, 0x1f, 0, digital_capture_tlv), 1144 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume", 1145 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA, 1146 0, 0x1f, 0, digital_capture_tlv), 1147 1148 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN, 1149 0, 3, 5, 0, input_gain_tlv), 1150 1151 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum), 1152 1153 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum), 1154 1155 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum), 1156 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum), 1157 1158 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum), 1159 }; 1160 1161 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = { 1162 /* Left channel inputs */ 1163 SND_SOC_DAPM_INPUT("MAINMIC"), 1164 SND_SOC_DAPM_INPUT("HSMIC"), 1165 SND_SOC_DAPM_INPUT("AUXL"), 1166 SND_SOC_DAPM_INPUT("CARKITMIC"), 1167 /* Right channel inputs */ 1168 SND_SOC_DAPM_INPUT("SUBMIC"), 1169 SND_SOC_DAPM_INPUT("AUXR"), 1170 /* Digital microphones (Stereo) */ 1171 SND_SOC_DAPM_INPUT("DIGIMIC0"), 1172 SND_SOC_DAPM_INPUT("DIGIMIC1"), 1173 1174 /* Outputs */ 1175 SND_SOC_DAPM_OUTPUT("EARPIECE"), 1176 SND_SOC_DAPM_OUTPUT("PREDRIVEL"), 1177 SND_SOC_DAPM_OUTPUT("PREDRIVER"), 1178 SND_SOC_DAPM_OUTPUT("HSOL"), 1179 SND_SOC_DAPM_OUTPUT("HSOR"), 1180 SND_SOC_DAPM_OUTPUT("CARKITL"), 1181 SND_SOC_DAPM_OUTPUT("CARKITR"), 1182 SND_SOC_DAPM_OUTPUT("HFL"), 1183 SND_SOC_DAPM_OUTPUT("HFR"), 1184 SND_SOC_DAPM_OUTPUT("VIBRA"), 1185 1186 /* AIF and APLL clocks for running DAIs (including loopback) */ 1187 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"), 1188 SND_SOC_DAPM_INPUT("Virtual HiFi IN"), 1189 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"), 1190 1191 /* DACs */ 1192 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0), 1193 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0), 1194 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0), 1195 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0), 1196 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0), 1197 1198 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0, 1199 TWL4030_REG_VOICE_IF, 6, 0), 1200 1201 /* Analog bypasses */ 1202 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0, 1203 &twl4030_dapm_abypassr1_control), 1204 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0, 1205 &twl4030_dapm_abypassl1_control), 1206 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0, 1207 &twl4030_dapm_abypassr2_control), 1208 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0, 1209 &twl4030_dapm_abypassl2_control), 1210 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0, 1211 &twl4030_dapm_abypassv_control), 1212 1213 /* Master analog loopback switch */ 1214 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0, 1215 NULL, 0), 1216 1217 /* Digital bypasses */ 1218 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0, 1219 &twl4030_dapm_dbypassl_control), 1220 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0, 1221 &twl4030_dapm_dbypassr_control), 1222 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0, 1223 &twl4030_dapm_dbypassv_control), 1224 1225 /* Digital mixers, power control for the physical DACs */ 1226 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer", 1227 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0), 1228 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer", 1229 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0), 1230 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer", 1231 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0), 1232 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer", 1233 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0), 1234 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer", 1235 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0), 1236 1237 /* Analog mixers, power control for the physical PGAs */ 1238 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", 1239 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0), 1240 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", 1241 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0), 1242 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", 1243 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0), 1244 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", 1245 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0), 1246 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer", 1247 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0), 1248 1249 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event, 1250 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD), 1251 1252 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event, 1253 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD), 1254 1255 /* Output MIXER controls */ 1256 /* Earpiece */ 1257 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0, 1258 &twl4030_dapm_earpiece_controls[0], 1259 ARRAY_SIZE(twl4030_dapm_earpiece_controls)), 1260 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM, 1261 0, 0, NULL, 0, earpiecepga_event, 1262 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1263 /* PreDrivL/R */ 1264 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0, 1265 &twl4030_dapm_predrivel_controls[0], 1266 ARRAY_SIZE(twl4030_dapm_predrivel_controls)), 1267 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM, 1268 0, 0, NULL, 0, predrivelpga_event, 1269 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1270 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0, 1271 &twl4030_dapm_predriver_controls[0], 1272 ARRAY_SIZE(twl4030_dapm_predriver_controls)), 1273 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM, 1274 0, 0, NULL, 0, predriverpga_event, 1275 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1276 /* HeadsetL/R */ 1277 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0, 1278 &twl4030_dapm_hsol_controls[0], 1279 ARRAY_SIZE(twl4030_dapm_hsol_controls)), 1280 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM, 1281 0, 0, NULL, 0, headsetlpga_event, 1282 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1283 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0, 1284 &twl4030_dapm_hsor_controls[0], 1285 ARRAY_SIZE(twl4030_dapm_hsor_controls)), 1286 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM, 1287 0, 0, NULL, 0, headsetrpga_event, 1288 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1289 /* CarkitL/R */ 1290 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0, 1291 &twl4030_dapm_carkitl_controls[0], 1292 ARRAY_SIZE(twl4030_dapm_carkitl_controls)), 1293 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM, 1294 0, 0, NULL, 0, carkitlpga_event, 1295 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1296 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0, 1297 &twl4030_dapm_carkitr_controls[0], 1298 ARRAY_SIZE(twl4030_dapm_carkitr_controls)), 1299 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM, 1300 0, 0, NULL, 0, carkitrpga_event, 1301 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1302 1303 /* Output MUX controls */ 1304 /* HandsfreeL/R */ 1305 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0, 1306 &twl4030_dapm_handsfreel_control), 1307 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0, 1308 &twl4030_dapm_handsfreelmute_control), 1309 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM, 1310 0, 0, NULL, 0, handsfreelpga_event, 1311 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1312 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0, 1313 &twl4030_dapm_handsfreer_control), 1314 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0, 1315 &twl4030_dapm_handsfreermute_control), 1316 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM, 1317 0, 0, NULL, 0, handsfreerpga_event, 1318 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1319 /* Vibra */ 1320 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0, 1321 &twl4030_dapm_vibra_control, vibramux_event, 1322 SND_SOC_DAPM_PRE_PMU), 1323 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0, 1324 &twl4030_dapm_vibrapath_control), 1325 1326 /* Introducing four virtual ADC, since TWL4030 have four channel for 1327 capture */ 1328 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0), 1329 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0), 1330 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0), 1331 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0), 1332 1333 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0, 1334 TWL4030_REG_VOICE_IF, 5, 0), 1335 1336 /* Analog/Digital mic path selection. 1337 TX1 Left/Right: either analog Left/Right or Digimic0 1338 TX2 Left/Right: either analog Left/Right or Digimic1 */ 1339 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0, 1340 &twl4030_dapm_micpathtx1_control), 1341 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0, 1342 &twl4030_dapm_micpathtx2_control), 1343 1344 /* Analog input mixers for the capture amplifiers */ 1345 SND_SOC_DAPM_MIXER("Analog Left", 1346 TWL4030_REG_ANAMICL, 4, 0, 1347 &twl4030_dapm_analoglmic_controls[0], 1348 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)), 1349 SND_SOC_DAPM_MIXER("Analog Right", 1350 TWL4030_REG_ANAMICR, 4, 0, 1351 &twl4030_dapm_analogrmic_controls[0], 1352 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)), 1353 1354 SND_SOC_DAPM_PGA("ADC Physical Left", 1355 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0), 1356 SND_SOC_DAPM_PGA("ADC Physical Right", 1357 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0), 1358 1359 SND_SOC_DAPM_PGA_E("Digimic0 Enable", 1360 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0, 1361 digimic_event, SND_SOC_DAPM_POST_PMU), 1362 SND_SOC_DAPM_PGA_E("Digimic1 Enable", 1363 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0, 1364 digimic_event, SND_SOC_DAPM_POST_PMU), 1365 1366 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0, 1367 NULL, 0), 1368 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0, 1369 NULL, 0), 1370 1371 /* Microphone bias */ 1372 SND_SOC_DAPM_SUPPLY("Mic Bias 1", 1373 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0), 1374 SND_SOC_DAPM_SUPPLY("Mic Bias 2", 1375 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0), 1376 SND_SOC_DAPM_SUPPLY("Headset Mic Bias", 1377 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0), 1378 1379 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0), 1380 }; 1381 1382 static const struct snd_soc_dapm_route intercon[] = { 1383 /* Stream -> DAC mapping */ 1384 {"DAC Right1", NULL, "HiFi Playback"}, 1385 {"DAC Left1", NULL, "HiFi Playback"}, 1386 {"DAC Right2", NULL, "HiFi Playback"}, 1387 {"DAC Left2", NULL, "HiFi Playback"}, 1388 {"DAC Voice", NULL, "VAIFIN"}, 1389 1390 /* ADC -> Stream mapping */ 1391 {"HiFi Capture", NULL, "ADC Virtual Left1"}, 1392 {"HiFi Capture", NULL, "ADC Virtual Right1"}, 1393 {"HiFi Capture", NULL, "ADC Virtual Left2"}, 1394 {"HiFi Capture", NULL, "ADC Virtual Right2"}, 1395 {"VAIFOUT", NULL, "ADC Virtual Left2"}, 1396 {"VAIFOUT", NULL, "ADC Virtual Right2"}, 1397 {"VAIFOUT", NULL, "VIF Enable"}, 1398 1399 {"Digital L1 Playback Mixer", NULL, "DAC Left1"}, 1400 {"Digital R1 Playback Mixer", NULL, "DAC Right1"}, 1401 {"Digital L2 Playback Mixer", NULL, "DAC Left2"}, 1402 {"Digital R2 Playback Mixer", NULL, "DAC Right2"}, 1403 {"Digital Voice Playback Mixer", NULL, "DAC Voice"}, 1404 1405 /* Supply for the digital part (APLL) */ 1406 {"Digital Voice Playback Mixer", NULL, "APLL Enable"}, 1407 1408 {"DAC Left1", NULL, "AIF Enable"}, 1409 {"DAC Right1", NULL, "AIF Enable"}, 1410 {"DAC Left2", NULL, "AIF Enable"}, 1411 {"DAC Right1", NULL, "AIF Enable"}, 1412 {"DAC Voice", NULL, "VIF Enable"}, 1413 1414 {"Digital R2 Playback Mixer", NULL, "AIF Enable"}, 1415 {"Digital L2 Playback Mixer", NULL, "AIF Enable"}, 1416 1417 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"}, 1418 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"}, 1419 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"}, 1420 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"}, 1421 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"}, 1422 1423 /* Internal playback routings */ 1424 /* Earpiece */ 1425 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"}, 1426 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1427 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1428 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1429 {"Earpiece PGA", NULL, "Earpiece Mixer"}, 1430 /* PreDrivL */ 1431 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1432 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1433 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1434 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1435 {"PredriveL PGA", NULL, "PredriveL Mixer"}, 1436 /* PreDrivR */ 1437 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1438 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1439 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1440 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1441 {"PredriveR PGA", NULL, "PredriveR Mixer"}, 1442 /* HeadsetL */ 1443 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1444 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1445 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1446 {"HeadsetL PGA", NULL, "HeadsetL Mixer"}, 1447 /* HeadsetR */ 1448 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1449 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1450 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1451 {"HeadsetR PGA", NULL, "HeadsetR Mixer"}, 1452 /* CarkitL */ 1453 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1454 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1455 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1456 {"CarkitL PGA", NULL, "CarkitL Mixer"}, 1457 /* CarkitR */ 1458 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1459 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1460 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1461 {"CarkitR PGA", NULL, "CarkitR Mixer"}, 1462 /* HandsfreeL */ 1463 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"}, 1464 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"}, 1465 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"}, 1466 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"}, 1467 {"HandsfreeL", "Switch", "HandsfreeL Mux"}, 1468 {"HandsfreeL PGA", NULL, "HandsfreeL"}, 1469 /* HandsfreeR */ 1470 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"}, 1471 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"}, 1472 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"}, 1473 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"}, 1474 {"HandsfreeR", "Switch", "HandsfreeR Mux"}, 1475 {"HandsfreeR PGA", NULL, "HandsfreeR"}, 1476 /* Vibra */ 1477 {"Vibra Mux", "AudioL1", "DAC Left1"}, 1478 {"Vibra Mux", "AudioR1", "DAC Right1"}, 1479 {"Vibra Mux", "AudioL2", "DAC Left2"}, 1480 {"Vibra Mux", "AudioR2", "DAC Right2"}, 1481 1482 /* outputs */ 1483 /* Must be always connected (for AIF and APLL) */ 1484 {"Virtual HiFi OUT", NULL, "DAC Left1"}, 1485 {"Virtual HiFi OUT", NULL, "DAC Right1"}, 1486 {"Virtual HiFi OUT", NULL, "DAC Left2"}, 1487 {"Virtual HiFi OUT", NULL, "DAC Right2"}, 1488 /* Must be always connected (for APLL) */ 1489 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"}, 1490 /* Physical outputs */ 1491 {"EARPIECE", NULL, "Earpiece PGA"}, 1492 {"PREDRIVEL", NULL, "PredriveL PGA"}, 1493 {"PREDRIVER", NULL, "PredriveR PGA"}, 1494 {"HSOL", NULL, "HeadsetL PGA"}, 1495 {"HSOR", NULL, "HeadsetR PGA"}, 1496 {"CARKITL", NULL, "CarkitL PGA"}, 1497 {"CARKITR", NULL, "CarkitR PGA"}, 1498 {"HFL", NULL, "HandsfreeL PGA"}, 1499 {"HFR", NULL, "HandsfreeR PGA"}, 1500 {"Vibra Route", "Audio", "Vibra Mux"}, 1501 {"VIBRA", NULL, "Vibra Route"}, 1502 1503 /* Capture path */ 1504 /* Must be always connected (for AIF and APLL) */ 1505 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"}, 1506 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"}, 1507 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"}, 1508 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"}, 1509 /* Physical inputs */ 1510 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"}, 1511 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"}, 1512 {"Analog Left", "AUXL Capture Switch", "AUXL"}, 1513 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"}, 1514 1515 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"}, 1516 {"Analog Right", "AUXR Capture Switch", "AUXR"}, 1517 1518 {"ADC Physical Left", NULL, "Analog Left"}, 1519 {"ADC Physical Right", NULL, "Analog Right"}, 1520 1521 {"Digimic0 Enable", NULL, "DIGIMIC0"}, 1522 {"Digimic1 Enable", NULL, "DIGIMIC1"}, 1523 1524 {"DIGIMIC0", NULL, "micbias1 select"}, 1525 {"DIGIMIC1", NULL, "micbias2 select"}, 1526 1527 /* TX1 Left capture path */ 1528 {"TX1 Capture Route", "Analog", "ADC Physical Left"}, 1529 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1530 /* TX1 Right capture path */ 1531 {"TX1 Capture Route", "Analog", "ADC Physical Right"}, 1532 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1533 /* TX2 Left capture path */ 1534 {"TX2 Capture Route", "Analog", "ADC Physical Left"}, 1535 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1536 /* TX2 Right capture path */ 1537 {"TX2 Capture Route", "Analog", "ADC Physical Right"}, 1538 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1539 1540 {"ADC Virtual Left1", NULL, "TX1 Capture Route"}, 1541 {"ADC Virtual Right1", NULL, "TX1 Capture Route"}, 1542 {"ADC Virtual Left2", NULL, "TX2 Capture Route"}, 1543 {"ADC Virtual Right2", NULL, "TX2 Capture Route"}, 1544 1545 {"ADC Virtual Left1", NULL, "AIF Enable"}, 1546 {"ADC Virtual Right1", NULL, "AIF Enable"}, 1547 {"ADC Virtual Left2", NULL, "AIF Enable"}, 1548 {"ADC Virtual Right2", NULL, "AIF Enable"}, 1549 1550 /* Analog bypass routes */ 1551 {"Right1 Analog Loopback", "Switch", "Analog Right"}, 1552 {"Left1 Analog Loopback", "Switch", "Analog Left"}, 1553 {"Right2 Analog Loopback", "Switch", "Analog Right"}, 1554 {"Left2 Analog Loopback", "Switch", "Analog Left"}, 1555 {"Voice Analog Loopback", "Switch", "Analog Left"}, 1556 1557 /* Supply for the Analog loopbacks */ 1558 {"Right1 Analog Loopback", NULL, "FM Loop Enable"}, 1559 {"Left1 Analog Loopback", NULL, "FM Loop Enable"}, 1560 {"Right2 Analog Loopback", NULL, "FM Loop Enable"}, 1561 {"Left2 Analog Loopback", NULL, "FM Loop Enable"}, 1562 {"Voice Analog Loopback", NULL, "FM Loop Enable"}, 1563 1564 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"}, 1565 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"}, 1566 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"}, 1567 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"}, 1568 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"}, 1569 1570 /* Digital bypass routes */ 1571 {"Right Digital Loopback", "Volume", "TX1 Capture Route"}, 1572 {"Left Digital Loopback", "Volume", "TX1 Capture Route"}, 1573 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"}, 1574 1575 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"}, 1576 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"}, 1577 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"}, 1578 1579 }; 1580 1581 static int twl4030_set_bias_level(struct snd_soc_codec *codec, 1582 enum snd_soc_bias_level level) 1583 { 1584 switch (level) { 1585 case SND_SOC_BIAS_ON: 1586 break; 1587 case SND_SOC_BIAS_PREPARE: 1588 break; 1589 case SND_SOC_BIAS_STANDBY: 1590 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) 1591 twl4030_codec_enable(codec, 1); 1592 break; 1593 case SND_SOC_BIAS_OFF: 1594 twl4030_codec_enable(codec, 0); 1595 break; 1596 } 1597 1598 return 0; 1599 } 1600 1601 static void twl4030_constraints(struct twl4030_priv *twl4030, 1602 struct snd_pcm_substream *mst_substream) 1603 { 1604 struct snd_pcm_substream *slv_substream; 1605 1606 /* Pick the stream, which need to be constrained */ 1607 if (mst_substream == twl4030->master_substream) 1608 slv_substream = twl4030->slave_substream; 1609 else if (mst_substream == twl4030->slave_substream) 1610 slv_substream = twl4030->master_substream; 1611 else /* This should not happen.. */ 1612 return; 1613 1614 /* Set the constraints according to the already configured stream */ 1615 snd_pcm_hw_constraint_single(slv_substream->runtime, 1616 SNDRV_PCM_HW_PARAM_RATE, 1617 twl4030->rate); 1618 1619 snd_pcm_hw_constraint_single(slv_substream->runtime, 1620 SNDRV_PCM_HW_PARAM_SAMPLE_BITS, 1621 twl4030->sample_bits); 1622 1623 snd_pcm_hw_constraint_single(slv_substream->runtime, 1624 SNDRV_PCM_HW_PARAM_CHANNELS, 1625 twl4030->channels); 1626 } 1627 1628 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for 1629 * capture has to be enabled/disabled. */ 1630 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction, 1631 int enable) 1632 { 1633 u8 reg, mask; 1634 1635 reg = twl4030_read(codec, TWL4030_REG_OPTION); 1636 1637 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 1638 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN; 1639 else 1640 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN; 1641 1642 if (enable) 1643 reg |= mask; 1644 else 1645 reg &= ~mask; 1646 1647 twl4030_write(codec, TWL4030_REG_OPTION, reg); 1648 } 1649 1650 static int twl4030_startup(struct snd_pcm_substream *substream, 1651 struct snd_soc_dai *dai) 1652 { 1653 struct snd_soc_codec *codec = dai->codec; 1654 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1655 1656 if (twl4030->master_substream) { 1657 twl4030->slave_substream = substream; 1658 /* The DAI has one configuration for playback and capture, so 1659 * if the DAI has been already configured then constrain this 1660 * substream to match it. */ 1661 if (twl4030->configured) 1662 twl4030_constraints(twl4030, twl4030->master_substream); 1663 } else { 1664 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) & 1665 TWL4030_OPTION_1)) { 1666 /* In option2 4 channel is not supported, set the 1667 * constraint for the first stream for channels, the 1668 * second stream will 'inherit' this cosntraint */ 1669 snd_pcm_hw_constraint_single(substream->runtime, 1670 SNDRV_PCM_HW_PARAM_CHANNELS, 1671 2); 1672 } 1673 twl4030->master_substream = substream; 1674 } 1675 1676 return 0; 1677 } 1678 1679 static void twl4030_shutdown(struct snd_pcm_substream *substream, 1680 struct snd_soc_dai *dai) 1681 { 1682 struct snd_soc_codec *codec = dai->codec; 1683 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1684 1685 if (twl4030->master_substream == substream) 1686 twl4030->master_substream = twl4030->slave_substream; 1687 1688 twl4030->slave_substream = NULL; 1689 1690 /* If all streams are closed, or the remaining stream has not yet 1691 * been configured than set the DAI as not configured. */ 1692 if (!twl4030->master_substream) 1693 twl4030->configured = 0; 1694 else if (!twl4030->master_substream->runtime->channels) 1695 twl4030->configured = 0; 1696 1697 /* If the closing substream had 4 channel, do the necessary cleanup */ 1698 if (substream->runtime->channels == 4) 1699 twl4030_tdm_enable(codec, substream->stream, 0); 1700 } 1701 1702 static int twl4030_hw_params(struct snd_pcm_substream *substream, 1703 struct snd_pcm_hw_params *params, 1704 struct snd_soc_dai *dai) 1705 { 1706 struct snd_soc_codec *codec = dai->codec; 1707 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1708 u8 mode, old_mode, format, old_format; 1709 1710 /* If the substream has 4 channel, do the necessary setup */ 1711 if (params_channels(params) == 4) { 1712 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 1713 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE); 1714 1715 /* Safety check: are we in the correct operating mode and 1716 * the interface is in TDM mode? */ 1717 if ((mode & TWL4030_OPTION_1) && 1718 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM)) 1719 twl4030_tdm_enable(codec, substream->stream, 1); 1720 else 1721 return -EINVAL; 1722 } 1723 1724 if (twl4030->configured) 1725 /* Ignoring hw_params for already configured DAI */ 1726 return 0; 1727 1728 /* bit rate */ 1729 old_mode = twl4030_read(codec, 1730 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; 1731 mode = old_mode & ~TWL4030_APLL_RATE; 1732 1733 switch (params_rate(params)) { 1734 case 8000: 1735 mode |= TWL4030_APLL_RATE_8000; 1736 break; 1737 case 11025: 1738 mode |= TWL4030_APLL_RATE_11025; 1739 break; 1740 case 12000: 1741 mode |= TWL4030_APLL_RATE_12000; 1742 break; 1743 case 16000: 1744 mode |= TWL4030_APLL_RATE_16000; 1745 break; 1746 case 22050: 1747 mode |= TWL4030_APLL_RATE_22050; 1748 break; 1749 case 24000: 1750 mode |= TWL4030_APLL_RATE_24000; 1751 break; 1752 case 32000: 1753 mode |= TWL4030_APLL_RATE_32000; 1754 break; 1755 case 44100: 1756 mode |= TWL4030_APLL_RATE_44100; 1757 break; 1758 case 48000: 1759 mode |= TWL4030_APLL_RATE_48000; 1760 break; 1761 case 96000: 1762 mode |= TWL4030_APLL_RATE_96000; 1763 break; 1764 default: 1765 dev_err(codec->dev, "%s: unknown rate %d\n", __func__, 1766 params_rate(params)); 1767 return -EINVAL; 1768 } 1769 1770 /* sample size */ 1771 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 1772 format = old_format; 1773 format &= ~TWL4030_DATA_WIDTH; 1774 switch (params_width(params)) { 1775 case 16: 1776 format |= TWL4030_DATA_WIDTH_16S_16W; 1777 break; 1778 case 32: 1779 format |= TWL4030_DATA_WIDTH_32S_24W; 1780 break; 1781 default: 1782 dev_err(codec->dev, "%s: unsupported bits/sample %d\n", 1783 __func__, params_width(params)); 1784 return -EINVAL; 1785 } 1786 1787 if (format != old_format || mode != old_mode) { 1788 if (twl4030->codec_powered) { 1789 /* 1790 * If the codec is powered, than we need to toggle the 1791 * codec power. 1792 */ 1793 twl4030_codec_enable(codec, 0); 1794 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 1795 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1796 twl4030_codec_enable(codec, 1); 1797 } else { 1798 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 1799 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1800 } 1801 } 1802 1803 /* Store the important parameters for the DAI configuration and set 1804 * the DAI as configured */ 1805 twl4030->configured = 1; 1806 twl4030->rate = params_rate(params); 1807 twl4030->sample_bits = hw_param_interval(params, 1808 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min; 1809 twl4030->channels = params_channels(params); 1810 1811 /* If both playback and capture streams are open, and one of them 1812 * is setting the hw parameters right now (since we are here), set 1813 * constraints to the other stream to match the current one. */ 1814 if (twl4030->slave_substream) 1815 twl4030_constraints(twl4030, substream); 1816 1817 return 0; 1818 } 1819 1820 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id, 1821 unsigned int freq, int dir) 1822 { 1823 struct snd_soc_codec *codec = codec_dai->codec; 1824 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1825 1826 switch (freq) { 1827 case 19200000: 1828 case 26000000: 1829 case 38400000: 1830 break; 1831 default: 1832 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq); 1833 return -EINVAL; 1834 } 1835 1836 if ((freq / 1000) != twl4030->sysclk) { 1837 dev_err(codec->dev, 1838 "Mismatch in HFCLKIN: %u (configured: %u)\n", 1839 freq, twl4030->sysclk * 1000); 1840 return -EINVAL; 1841 } 1842 1843 return 0; 1844 } 1845 1846 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 1847 { 1848 struct snd_soc_codec *codec = codec_dai->codec; 1849 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1850 u8 old_format, format; 1851 1852 /* get format */ 1853 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 1854 format = old_format; 1855 1856 /* set master/slave audio interface */ 1857 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1858 case SND_SOC_DAIFMT_CBM_CFM: 1859 format &= ~(TWL4030_AIF_SLAVE_EN); 1860 format &= ~(TWL4030_CLK256FS_EN); 1861 break; 1862 case SND_SOC_DAIFMT_CBS_CFS: 1863 format |= TWL4030_AIF_SLAVE_EN; 1864 format |= TWL4030_CLK256FS_EN; 1865 break; 1866 default: 1867 return -EINVAL; 1868 } 1869 1870 /* interface format */ 1871 format &= ~TWL4030_AIF_FORMAT; 1872 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1873 case SND_SOC_DAIFMT_I2S: 1874 format |= TWL4030_AIF_FORMAT_CODEC; 1875 break; 1876 case SND_SOC_DAIFMT_DSP_A: 1877 format |= TWL4030_AIF_FORMAT_TDM; 1878 break; 1879 default: 1880 return -EINVAL; 1881 } 1882 1883 if (format != old_format) { 1884 if (twl4030->codec_powered) { 1885 /* 1886 * If the codec is powered, than we need to toggle the 1887 * codec power. 1888 */ 1889 twl4030_codec_enable(codec, 0); 1890 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1891 twl4030_codec_enable(codec, 1); 1892 } else { 1893 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1894 } 1895 } 1896 1897 return 0; 1898 } 1899 1900 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate) 1901 { 1902 struct snd_soc_codec *codec = dai->codec; 1903 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF); 1904 1905 if (tristate) 1906 reg |= TWL4030_AIF_TRI_EN; 1907 else 1908 reg &= ~TWL4030_AIF_TRI_EN; 1909 1910 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg); 1911 } 1912 1913 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R 1914 * (VTXL, VTXR) for uplink has to be enabled/disabled. */ 1915 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction, 1916 int enable) 1917 { 1918 u8 reg, mask; 1919 1920 reg = twl4030_read(codec, TWL4030_REG_OPTION); 1921 1922 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 1923 mask = TWL4030_ARXL1_VRX_EN; 1924 else 1925 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN; 1926 1927 if (enable) 1928 reg |= mask; 1929 else 1930 reg &= ~mask; 1931 1932 twl4030_write(codec, TWL4030_REG_OPTION, reg); 1933 } 1934 1935 static int twl4030_voice_startup(struct snd_pcm_substream *substream, 1936 struct snd_soc_dai *dai) 1937 { 1938 struct snd_soc_codec *codec = dai->codec; 1939 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1940 u8 mode; 1941 1942 /* If the system master clock is not 26MHz, the voice PCM interface is 1943 * not available. 1944 */ 1945 if (twl4030->sysclk != 26000) { 1946 dev_err(codec->dev, 1947 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n", 1948 __func__, twl4030->sysclk); 1949 return -EINVAL; 1950 } 1951 1952 /* If the codec mode is not option2, the voice PCM interface is not 1953 * available. 1954 */ 1955 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE) 1956 & TWL4030_OPT_MODE; 1957 1958 if (mode != TWL4030_OPTION_2) { 1959 dev_err(codec->dev, "%s: the codec mode is not option2\n", 1960 __func__); 1961 return -EINVAL; 1962 } 1963 1964 return 0; 1965 } 1966 1967 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, 1968 struct snd_soc_dai *dai) 1969 { 1970 struct snd_soc_codec *codec = dai->codec; 1971 1972 /* Enable voice digital filters */ 1973 twl4030_voice_enable(codec, substream->stream, 0); 1974 } 1975 1976 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, 1977 struct snd_pcm_hw_params *params, 1978 struct snd_soc_dai *dai) 1979 { 1980 struct snd_soc_codec *codec = dai->codec; 1981 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1982 u8 old_mode, mode; 1983 1984 /* Enable voice digital filters */ 1985 twl4030_voice_enable(codec, substream->stream, 1); 1986 1987 /* bit rate */ 1988 old_mode = twl4030_read(codec, 1989 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; 1990 mode = old_mode; 1991 1992 switch (params_rate(params)) { 1993 case 8000: 1994 mode &= ~(TWL4030_SEL_16K); 1995 break; 1996 case 16000: 1997 mode |= TWL4030_SEL_16K; 1998 break; 1999 default: 2000 dev_err(codec->dev, "%s: unknown rate %d\n", __func__, 2001 params_rate(params)); 2002 return -EINVAL; 2003 } 2004 2005 if (mode != old_mode) { 2006 if (twl4030->codec_powered) { 2007 /* 2008 * If the codec is powered, than we need to toggle the 2009 * codec power. 2010 */ 2011 twl4030_codec_enable(codec, 0); 2012 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 2013 twl4030_codec_enable(codec, 1); 2014 } else { 2015 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 2016 } 2017 } 2018 2019 return 0; 2020 } 2021 2022 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai, 2023 int clk_id, unsigned int freq, int dir) 2024 { 2025 struct snd_soc_codec *codec = codec_dai->codec; 2026 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2027 2028 if (freq != 26000000) { 2029 dev_err(codec->dev, 2030 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n", 2031 __func__, freq / 1000); 2032 return -EINVAL; 2033 } 2034 if ((freq / 1000) != twl4030->sysclk) { 2035 dev_err(codec->dev, 2036 "Mismatch in HFCLKIN: %u (configured: %u)\n", 2037 freq, twl4030->sysclk * 1000); 2038 return -EINVAL; 2039 } 2040 return 0; 2041 } 2042 2043 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, 2044 unsigned int fmt) 2045 { 2046 struct snd_soc_codec *codec = codec_dai->codec; 2047 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2048 u8 old_format, format; 2049 2050 /* get format */ 2051 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF); 2052 format = old_format; 2053 2054 /* set master/slave audio interface */ 2055 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2056 case SND_SOC_DAIFMT_CBM_CFM: 2057 format &= ~(TWL4030_VIF_SLAVE_EN); 2058 break; 2059 case SND_SOC_DAIFMT_CBS_CFS: 2060 format |= TWL4030_VIF_SLAVE_EN; 2061 break; 2062 default: 2063 return -EINVAL; 2064 } 2065 2066 /* clock inversion */ 2067 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2068 case SND_SOC_DAIFMT_IB_NF: 2069 format &= ~(TWL4030_VIF_FORMAT); 2070 break; 2071 case SND_SOC_DAIFMT_NB_IF: 2072 format |= TWL4030_VIF_FORMAT; 2073 break; 2074 default: 2075 return -EINVAL; 2076 } 2077 2078 if (format != old_format) { 2079 if (twl4030->codec_powered) { 2080 /* 2081 * If the codec is powered, than we need to toggle the 2082 * codec power. 2083 */ 2084 twl4030_codec_enable(codec, 0); 2085 twl4030_write(codec, TWL4030_REG_VOICE_IF, format); 2086 twl4030_codec_enable(codec, 1); 2087 } else { 2088 twl4030_write(codec, TWL4030_REG_VOICE_IF, format); 2089 } 2090 } 2091 2092 return 0; 2093 } 2094 2095 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate) 2096 { 2097 struct snd_soc_codec *codec = dai->codec; 2098 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF); 2099 2100 if (tristate) 2101 reg |= TWL4030_VIF_TRI_EN; 2102 else 2103 reg &= ~TWL4030_VIF_TRI_EN; 2104 2105 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg); 2106 } 2107 2108 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000) 2109 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 2110 2111 static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = { 2112 .startup = twl4030_startup, 2113 .shutdown = twl4030_shutdown, 2114 .hw_params = twl4030_hw_params, 2115 .set_sysclk = twl4030_set_dai_sysclk, 2116 .set_fmt = twl4030_set_dai_fmt, 2117 .set_tristate = twl4030_set_tristate, 2118 }; 2119 2120 static const struct snd_soc_dai_ops twl4030_dai_voice_ops = { 2121 .startup = twl4030_voice_startup, 2122 .shutdown = twl4030_voice_shutdown, 2123 .hw_params = twl4030_voice_hw_params, 2124 .set_sysclk = twl4030_voice_set_dai_sysclk, 2125 .set_fmt = twl4030_voice_set_dai_fmt, 2126 .set_tristate = twl4030_voice_set_tristate, 2127 }; 2128 2129 static struct snd_soc_dai_driver twl4030_dai[] = { 2130 { 2131 .name = "twl4030-hifi", 2132 .playback = { 2133 .stream_name = "HiFi Playback", 2134 .channels_min = 2, 2135 .channels_max = 4, 2136 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000, 2137 .formats = TWL4030_FORMATS, 2138 .sig_bits = 24,}, 2139 .capture = { 2140 .stream_name = "HiFi Capture", 2141 .channels_min = 2, 2142 .channels_max = 4, 2143 .rates = TWL4030_RATES, 2144 .formats = TWL4030_FORMATS, 2145 .sig_bits = 24,}, 2146 .ops = &twl4030_dai_hifi_ops, 2147 }, 2148 { 2149 .name = "twl4030-voice", 2150 .playback = { 2151 .stream_name = "Voice Playback", 2152 .channels_min = 1, 2153 .channels_max = 1, 2154 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, 2155 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 2156 .capture = { 2157 .stream_name = "Voice Capture", 2158 .channels_min = 1, 2159 .channels_max = 2, 2160 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, 2161 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 2162 .ops = &twl4030_dai_voice_ops, 2163 }, 2164 }; 2165 2166 static int twl4030_soc_probe(struct snd_soc_codec *codec) 2167 { 2168 struct twl4030_priv *twl4030; 2169 2170 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv), 2171 GFP_KERNEL); 2172 if (!twl4030) 2173 return -ENOMEM; 2174 snd_soc_codec_set_drvdata(codec, twl4030); 2175 /* Set the defaults, and power up the codec */ 2176 twl4030->sysclk = twl4030_audio_get_mclk() / 1000; 2177 2178 twl4030_init_chip(codec); 2179 2180 return 0; 2181 } 2182 2183 static int twl4030_soc_remove(struct snd_soc_codec *codec) 2184 { 2185 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2186 struct twl4030_codec_data *pdata = twl4030->pdata; 2187 2188 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio)) 2189 gpio_free(pdata->hs_extmute_gpio); 2190 2191 return 0; 2192 } 2193 2194 static struct snd_soc_codec_driver soc_codec_dev_twl4030 = { 2195 .probe = twl4030_soc_probe, 2196 .remove = twl4030_soc_remove, 2197 .read = twl4030_read, 2198 .write = twl4030_write, 2199 .set_bias_level = twl4030_set_bias_level, 2200 .idle_bias_off = true, 2201 2202 .controls = twl4030_snd_controls, 2203 .num_controls = ARRAY_SIZE(twl4030_snd_controls), 2204 .dapm_widgets = twl4030_dapm_widgets, 2205 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets), 2206 .dapm_routes = intercon, 2207 .num_dapm_routes = ARRAY_SIZE(intercon), 2208 }; 2209 2210 static int twl4030_codec_probe(struct platform_device *pdev) 2211 { 2212 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030, 2213 twl4030_dai, ARRAY_SIZE(twl4030_dai)); 2214 } 2215 2216 static int twl4030_codec_remove(struct platform_device *pdev) 2217 { 2218 snd_soc_unregister_codec(&pdev->dev); 2219 return 0; 2220 } 2221 2222 MODULE_ALIAS("platform:twl4030-codec"); 2223 2224 static struct platform_driver twl4030_codec_driver = { 2225 .probe = twl4030_codec_probe, 2226 .remove = twl4030_codec_remove, 2227 .driver = { 2228 .name = "twl4030-codec", 2229 }, 2230 }; 2231 2232 module_platform_driver(twl4030_codec_driver); 2233 2234 MODULE_DESCRIPTION("ASoC TWL4030 codec driver"); 2235 MODULE_AUTHOR("Steve Sakoman"); 2236 MODULE_LICENSE("GPL"); 2237