1 /* 2 * ALSA SoC TWL4030 codec driver 3 * 4 * Author: Steve Sakoman, <steve@sakoman.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 18 * 02110-1301 USA 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/moduleparam.h> 24 #include <linux/init.h> 25 #include <linux/delay.h> 26 #include <linux/pm.h> 27 #include <linux/i2c.h> 28 #include <linux/platform_device.h> 29 #include <linux/of.h> 30 #include <linux/of_gpio.h> 31 #include <linux/i2c/twl.h> 32 #include <linux/slab.h> 33 #include <linux/gpio.h> 34 #include <sound/core.h> 35 #include <sound/pcm.h> 36 #include <sound/pcm_params.h> 37 #include <sound/soc.h> 38 #include <sound/initval.h> 39 #include <sound/tlv.h> 40 41 /* Register descriptions are here */ 42 #include <linux/mfd/twl4030-audio.h> 43 44 /* TWL4030 PMBR1 Register */ 45 #define TWL4030_PMBR1_REG 0x0D 46 /* TWL4030 PMBR1 Register GPIO6 mux bits */ 47 #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2) 48 49 /* Shadow register used by the audio driver */ 50 #define TWL4030_REG_SW_SHADOW 0x4A 51 #define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1) 52 53 /* TWL4030_REG_SW_SHADOW (0x4A) Fields */ 54 #define TWL4030_HFL_EN 0x01 55 #define TWL4030_HFR_EN 0x02 56 57 /* 58 * twl4030 register cache & default register settings 59 */ 60 static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { 61 0x00, /* this register not used */ 62 0x00, /* REG_CODEC_MODE (0x1) */ 63 0x00, /* REG_OPTION (0x2) */ 64 0x00, /* REG_UNKNOWN (0x3) */ 65 0x00, /* REG_MICBIAS_CTL (0x4) */ 66 0x00, /* REG_ANAMICL (0x5) */ 67 0x00, /* REG_ANAMICR (0x6) */ 68 0x00, /* REG_AVADC_CTL (0x7) */ 69 0x00, /* REG_ADCMICSEL (0x8) */ 70 0x00, /* REG_DIGMIXING (0x9) */ 71 0x0f, /* REG_ATXL1PGA (0xA) */ 72 0x0f, /* REG_ATXR1PGA (0xB) */ 73 0x0f, /* REG_AVTXL2PGA (0xC) */ 74 0x0f, /* REG_AVTXR2PGA (0xD) */ 75 0x00, /* REG_AUDIO_IF (0xE) */ 76 0x00, /* REG_VOICE_IF (0xF) */ 77 0x3f, /* REG_ARXR1PGA (0x10) */ 78 0x3f, /* REG_ARXL1PGA (0x11) */ 79 0x3f, /* REG_ARXR2PGA (0x12) */ 80 0x3f, /* REG_ARXL2PGA (0x13) */ 81 0x25, /* REG_VRXPGA (0x14) */ 82 0x00, /* REG_VSTPGA (0x15) */ 83 0x00, /* REG_VRX2ARXPGA (0x16) */ 84 0x00, /* REG_AVDAC_CTL (0x17) */ 85 0x00, /* REG_ARX2VTXPGA (0x18) */ 86 0x32, /* REG_ARXL1_APGA_CTL (0x19) */ 87 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */ 88 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */ 89 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */ 90 0x00, /* REG_ATX2ARXPGA (0x1D) */ 91 0x00, /* REG_BT_IF (0x1E) */ 92 0x55, /* REG_BTPGA (0x1F) */ 93 0x00, /* REG_BTSTPGA (0x20) */ 94 0x00, /* REG_EAR_CTL (0x21) */ 95 0x00, /* REG_HS_SEL (0x22) */ 96 0x00, /* REG_HS_GAIN_SET (0x23) */ 97 0x00, /* REG_HS_POPN_SET (0x24) */ 98 0x00, /* REG_PREDL_CTL (0x25) */ 99 0x00, /* REG_PREDR_CTL (0x26) */ 100 0x00, /* REG_PRECKL_CTL (0x27) */ 101 0x00, /* REG_PRECKR_CTL (0x28) */ 102 0x00, /* REG_HFL_CTL (0x29) */ 103 0x00, /* REG_HFR_CTL (0x2A) */ 104 0x05, /* REG_ALC_CTL (0x2B) */ 105 0x00, /* REG_ALC_SET1 (0x2C) */ 106 0x00, /* REG_ALC_SET2 (0x2D) */ 107 0x00, /* REG_BOOST_CTL (0x2E) */ 108 0x00, /* REG_SOFTVOL_CTL (0x2F) */ 109 0x13, /* REG_DTMF_FREQSEL (0x30) */ 110 0x00, /* REG_DTMF_TONEXT1H (0x31) */ 111 0x00, /* REG_DTMF_TONEXT1L (0x32) */ 112 0x00, /* REG_DTMF_TONEXT2H (0x33) */ 113 0x00, /* REG_DTMF_TONEXT2L (0x34) */ 114 0x79, /* REG_DTMF_TONOFF (0x35) */ 115 0x11, /* REG_DTMF_WANONOFF (0x36) */ 116 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */ 117 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */ 118 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */ 119 0x06, /* REG_APLL_CTL (0x3A) */ 120 0x00, /* REG_DTMF_CTL (0x3B) */ 121 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */ 122 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */ 123 0x00, /* REG_MISC_SET_1 (0x3E) */ 124 0x00, /* REG_PCMBTMUX (0x3F) */ 125 0x00, /* not used (0x40) */ 126 0x00, /* not used (0x41) */ 127 0x00, /* not used (0x42) */ 128 0x00, /* REG_RX_PATH_SEL (0x43) */ 129 0x32, /* REG_VDL_APGA_CTL (0x44) */ 130 0x00, /* REG_VIBRA_CTL (0x45) */ 131 0x00, /* REG_VIBRA_SET (0x46) */ 132 0x00, /* REG_VIBRA_PWM_SET (0x47) */ 133 0x00, /* REG_ANAMIC_GAIN (0x48) */ 134 0x00, /* REG_MISC_SET_2 (0x49) */ 135 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */ 136 }; 137 138 /* codec private data */ 139 struct twl4030_priv { 140 struct snd_soc_codec codec; 141 142 unsigned int codec_powered; 143 144 /* reference counts of AIF/APLL users */ 145 unsigned int apll_enabled; 146 147 struct snd_pcm_substream *master_substream; 148 struct snd_pcm_substream *slave_substream; 149 150 unsigned int configured; 151 unsigned int rate; 152 unsigned int sample_bits; 153 unsigned int channels; 154 155 unsigned int sysclk; 156 157 /* Output (with associated amp) states */ 158 u8 hsl_enabled, hsr_enabled; 159 u8 earpiece_enabled; 160 u8 predrivel_enabled, predriver_enabled; 161 u8 carkitl_enabled, carkitr_enabled; 162 163 struct twl4030_codec_data *pdata; 164 }; 165 166 /* 167 * read twl4030 register cache 168 */ 169 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec, 170 unsigned int reg) 171 { 172 u8 *cache = codec->reg_cache; 173 174 if (reg >= TWL4030_CACHEREGNUM) 175 return -EIO; 176 177 return cache[reg]; 178 } 179 180 /* 181 * write twl4030 register cache 182 */ 183 static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec, 184 u8 reg, u8 value) 185 { 186 u8 *cache = codec->reg_cache; 187 188 if (reg >= TWL4030_CACHEREGNUM) 189 return; 190 cache[reg] = value; 191 } 192 193 /* 194 * write to the twl4030 register space 195 */ 196 static int twl4030_write(struct snd_soc_codec *codec, 197 unsigned int reg, unsigned int value) 198 { 199 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 200 int write_to_reg = 0; 201 202 twl4030_write_reg_cache(codec, reg, value); 203 if (likely(reg < TWL4030_REG_SW_SHADOW)) { 204 /* Decide if the given register can be written */ 205 switch (reg) { 206 case TWL4030_REG_EAR_CTL: 207 if (twl4030->earpiece_enabled) 208 write_to_reg = 1; 209 break; 210 case TWL4030_REG_PREDL_CTL: 211 if (twl4030->predrivel_enabled) 212 write_to_reg = 1; 213 break; 214 case TWL4030_REG_PREDR_CTL: 215 if (twl4030->predriver_enabled) 216 write_to_reg = 1; 217 break; 218 case TWL4030_REG_PRECKL_CTL: 219 if (twl4030->carkitl_enabled) 220 write_to_reg = 1; 221 break; 222 case TWL4030_REG_PRECKR_CTL: 223 if (twl4030->carkitr_enabled) 224 write_to_reg = 1; 225 break; 226 case TWL4030_REG_HS_GAIN_SET: 227 if (twl4030->hsl_enabled || twl4030->hsr_enabled) 228 write_to_reg = 1; 229 break; 230 default: 231 /* All other register can be written */ 232 write_to_reg = 1; 233 break; 234 } 235 if (write_to_reg) 236 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 237 value, reg); 238 } 239 return 0; 240 } 241 242 static inline void twl4030_wait_ms(int time) 243 { 244 if (time < 60) { 245 time *= 1000; 246 usleep_range(time, time + 500); 247 } else { 248 msleep(time); 249 } 250 } 251 252 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable) 253 { 254 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 255 int mode; 256 257 if (enable == twl4030->codec_powered) 258 return; 259 260 if (enable) 261 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER); 262 else 263 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER); 264 265 if (mode >= 0) { 266 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode); 267 twl4030->codec_powered = enable; 268 } 269 270 /* REVISIT: this delay is present in TI sample drivers */ 271 /* but there seems to be no TRM requirement for it */ 272 udelay(10); 273 } 274 275 static inline void twl4030_check_defaults(struct snd_soc_codec *codec) 276 { 277 int i, difference = 0; 278 u8 val; 279 280 dev_dbg(codec->dev, "Checking TWL audio default configuration\n"); 281 for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) { 282 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i); 283 if (val != twl4030_reg[i]) { 284 difference++; 285 dev_dbg(codec->dev, 286 "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n", 287 i, val, twl4030_reg[i]); 288 } 289 } 290 dev_dbg(codec->dev, "Found %d non-matching registers. %s\n", 291 difference, difference ? "Not OK" : "OK"); 292 } 293 294 static inline void twl4030_reset_registers(struct snd_soc_codec *codec) 295 { 296 int i; 297 298 /* set all audio section registers to reasonable defaults */ 299 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++) 300 if (i != TWL4030_REG_APLL_CTL) 301 twl4030_write(codec, i, twl4030_reg[i]); 302 303 } 304 305 static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata, 306 struct device_node *node) 307 { 308 int value; 309 310 of_property_read_u32(node, "ti,digimic_delay", 311 &pdata->digimic_delay); 312 of_property_read_u32(node, "ti,ramp_delay_value", 313 &pdata->ramp_delay_value); 314 of_property_read_u32(node, "ti,offset_cncl_path", 315 &pdata->offset_cncl_path); 316 if (!of_property_read_u32(node, "ti,hs_extmute", &value)) 317 pdata->hs_extmute = value; 318 319 pdata->hs_extmute_gpio = of_get_named_gpio(node, 320 "ti,hs_extmute_gpio", 0); 321 if (gpio_is_valid(pdata->hs_extmute_gpio)) 322 pdata->hs_extmute = 1; 323 } 324 325 static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec) 326 { 327 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev); 328 struct device_node *twl4030_codec_node = NULL; 329 330 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node, 331 "codec"); 332 333 if (!pdata && twl4030_codec_node) { 334 pdata = devm_kzalloc(codec->dev, 335 sizeof(struct twl4030_codec_data), 336 GFP_KERNEL); 337 if (!pdata) { 338 dev_err(codec->dev, "Can not allocate memory\n"); 339 return NULL; 340 } 341 twl4030_setup_pdata_of(pdata, twl4030_codec_node); 342 } 343 344 return pdata; 345 } 346 347 static void twl4030_init_chip(struct snd_soc_codec *codec) 348 { 349 struct twl4030_codec_data *pdata; 350 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 351 u8 reg, byte; 352 int i = 0; 353 354 pdata = twl4030_get_pdata(codec); 355 356 if (pdata && pdata->hs_extmute) { 357 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 358 int ret; 359 360 if (!pdata->hs_extmute_gpio) 361 dev_warn(codec->dev, 362 "Extmute GPIO is 0 is this correct?\n"); 363 364 ret = gpio_request_one(pdata->hs_extmute_gpio, 365 GPIOF_OUT_INIT_LOW, 366 "hs_extmute"); 367 if (ret) { 368 dev_err(codec->dev, 369 "Failed to get hs_extmute GPIO\n"); 370 pdata->hs_extmute_gpio = -1; 371 } 372 } else { 373 u8 pin_mux; 374 375 /* Set TWL4030 GPIO6 as EXTMUTE signal */ 376 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux, 377 TWL4030_PMBR1_REG); 378 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03); 379 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02); 380 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux, 381 TWL4030_PMBR1_REG); 382 } 383 } 384 385 /* Check defaults, if instructed before anything else */ 386 if (pdata && pdata->check_defaults) 387 twl4030_check_defaults(codec); 388 389 /* Reset registers, if no setup data or if instructed to do so */ 390 if (!pdata || (pdata && pdata->reset_registers)) 391 twl4030_reset_registers(codec); 392 393 /* Refresh APLL_CTL register from HW */ 394 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, 395 TWL4030_REG_APLL_CTL); 396 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte); 397 398 /* anti-pop when changing analog gain */ 399 reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1); 400 twl4030_write(codec, TWL4030_REG_MISC_SET_1, 401 reg | TWL4030_SMOOTH_ANAVOL_EN); 402 403 twl4030_write(codec, TWL4030_REG_OPTION, 404 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN | 405 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN); 406 407 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */ 408 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32); 409 410 /* Machine dependent setup */ 411 if (!pdata) 412 return; 413 414 twl4030->pdata = pdata; 415 416 reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET); 417 reg &= ~TWL4030_RAMP_DELAY; 418 reg |= (pdata->ramp_delay_value << 2); 419 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg); 420 421 /* initiate offset cancellation */ 422 twl4030_codec_enable(codec, 1); 423 424 reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL); 425 reg &= ~TWL4030_OFFSET_CNCL_SEL; 426 reg |= pdata->offset_cncl_path; 427 twl4030_write(codec, TWL4030_REG_ANAMICL, 428 reg | TWL4030_CNCL_OFFSET_START); 429 430 /* 431 * Wait for offset cancellation to complete. 432 * Since this takes a while, do not slam the i2c. 433 * Start polling the status after ~20ms. 434 */ 435 msleep(20); 436 do { 437 usleep_range(1000, 2000); 438 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, 439 TWL4030_REG_ANAMICL); 440 } while ((i++ < 100) && 441 ((byte & TWL4030_CNCL_OFFSET_START) == 442 TWL4030_CNCL_OFFSET_START)); 443 444 /* Make sure that the reg_cache has the same value as the HW */ 445 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte); 446 447 twl4030_codec_enable(codec, 0); 448 } 449 450 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable) 451 { 452 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 453 int status = -1; 454 455 if (enable) { 456 twl4030->apll_enabled++; 457 if (twl4030->apll_enabled == 1) 458 status = twl4030_audio_enable_resource( 459 TWL4030_AUDIO_RES_APLL); 460 } else { 461 twl4030->apll_enabled--; 462 if (!twl4030->apll_enabled) 463 status = twl4030_audio_disable_resource( 464 TWL4030_AUDIO_RES_APLL); 465 } 466 467 if (status >= 0) 468 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status); 469 } 470 471 /* Earpiece */ 472 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = { 473 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0), 474 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0), 475 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0), 476 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0), 477 }; 478 479 /* PreDrive Left */ 480 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = { 481 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0), 482 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0), 483 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0), 484 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0), 485 }; 486 487 /* PreDrive Right */ 488 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = { 489 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0), 490 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0), 491 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0), 492 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0), 493 }; 494 495 /* Headset Left */ 496 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = { 497 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0), 498 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0), 499 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0), 500 }; 501 502 /* Headset Right */ 503 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = { 504 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0), 505 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0), 506 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0), 507 }; 508 509 /* Carkit Left */ 510 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = { 511 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0), 512 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0), 513 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0), 514 }; 515 516 /* Carkit Right */ 517 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = { 518 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0), 519 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0), 520 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0), 521 }; 522 523 /* Handsfree Left */ 524 static const char *twl4030_handsfreel_texts[] = 525 {"Voice", "AudioL1", "AudioL2", "AudioR2"}; 526 527 static const struct soc_enum twl4030_handsfreel_enum = 528 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0, 529 ARRAY_SIZE(twl4030_handsfreel_texts), 530 twl4030_handsfreel_texts); 531 532 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control = 533 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum); 534 535 /* Handsfree Left virtual mute */ 536 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control = 537 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0); 538 539 /* Handsfree Right */ 540 static const char *twl4030_handsfreer_texts[] = 541 {"Voice", "AudioR1", "AudioR2", "AudioL2"}; 542 543 static const struct soc_enum twl4030_handsfreer_enum = 544 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0, 545 ARRAY_SIZE(twl4030_handsfreer_texts), 546 twl4030_handsfreer_texts); 547 548 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control = 549 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum); 550 551 /* Handsfree Right virtual mute */ 552 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control = 553 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0); 554 555 /* Vibra */ 556 /* Vibra audio path selection */ 557 static const char *twl4030_vibra_texts[] = 558 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"}; 559 560 static const struct soc_enum twl4030_vibra_enum = 561 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2, 562 ARRAY_SIZE(twl4030_vibra_texts), 563 twl4030_vibra_texts); 564 565 static const struct snd_kcontrol_new twl4030_dapm_vibra_control = 566 SOC_DAPM_ENUM("Route", twl4030_vibra_enum); 567 568 /* Vibra path selection: local vibrator (PWM) or audio driven */ 569 static const char *twl4030_vibrapath_texts[] = 570 {"Local vibrator", "Audio"}; 571 572 static const struct soc_enum twl4030_vibrapath_enum = 573 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4, 574 ARRAY_SIZE(twl4030_vibrapath_texts), 575 twl4030_vibrapath_texts); 576 577 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control = 578 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum); 579 580 /* Left analog microphone selection */ 581 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = { 582 SOC_DAPM_SINGLE("Main Mic Capture Switch", 583 TWL4030_REG_ANAMICL, 0, 1, 0), 584 SOC_DAPM_SINGLE("Headset Mic Capture Switch", 585 TWL4030_REG_ANAMICL, 1, 1, 0), 586 SOC_DAPM_SINGLE("AUXL Capture Switch", 587 TWL4030_REG_ANAMICL, 2, 1, 0), 588 SOC_DAPM_SINGLE("Carkit Mic Capture Switch", 589 TWL4030_REG_ANAMICL, 3, 1, 0), 590 }; 591 592 /* Right analog microphone selection */ 593 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = { 594 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0), 595 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0), 596 }; 597 598 /* TX1 L/R Analog/Digital microphone selection */ 599 static const char *twl4030_micpathtx1_texts[] = 600 {"Analog", "Digimic0"}; 601 602 static const struct soc_enum twl4030_micpathtx1_enum = 603 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0, 604 ARRAY_SIZE(twl4030_micpathtx1_texts), 605 twl4030_micpathtx1_texts); 606 607 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control = 608 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum); 609 610 /* TX2 L/R Analog/Digital microphone selection */ 611 static const char *twl4030_micpathtx2_texts[] = 612 {"Analog", "Digimic1"}; 613 614 static const struct soc_enum twl4030_micpathtx2_enum = 615 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2, 616 ARRAY_SIZE(twl4030_micpathtx2_texts), 617 twl4030_micpathtx2_texts); 618 619 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control = 620 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum); 621 622 /* Analog bypass for AudioR1 */ 623 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control = 624 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0); 625 626 /* Analog bypass for AudioL1 */ 627 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control = 628 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0); 629 630 /* Analog bypass for AudioR2 */ 631 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control = 632 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0); 633 634 /* Analog bypass for AudioL2 */ 635 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control = 636 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0); 637 638 /* Analog bypass for Voice */ 639 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control = 640 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0); 641 642 /* Digital bypass gain, mute instead of -30dB */ 643 static const unsigned int twl4030_dapm_dbypass_tlv[] = { 644 TLV_DB_RANGE_HEAD(3), 645 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1), 646 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0), 647 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0), 648 }; 649 650 /* Digital bypass left (TX1L -> RX2L) */ 651 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control = 652 SOC_DAPM_SINGLE_TLV("Volume", 653 TWL4030_REG_ATX2ARXPGA, 3, 7, 0, 654 twl4030_dapm_dbypass_tlv); 655 656 /* Digital bypass right (TX1R -> RX2R) */ 657 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control = 658 SOC_DAPM_SINGLE_TLV("Volume", 659 TWL4030_REG_ATX2ARXPGA, 0, 7, 0, 660 twl4030_dapm_dbypass_tlv); 661 662 /* 663 * Voice Sidetone GAIN volume control: 664 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB) 665 */ 666 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1); 667 668 /* Digital bypass voice: sidetone (VUL -> VDL)*/ 669 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control = 670 SOC_DAPM_SINGLE_TLV("Volume", 671 TWL4030_REG_VSTPGA, 0, 0x29, 0, 672 twl4030_dapm_dbypassv_tlv); 673 674 /* 675 * Output PGA builder: 676 * Handle the muting and unmuting of the given output (turning off the 677 * amplifier associated with the output pin) 678 * On mute bypass the reg_cache and write 0 to the register 679 * On unmute: restore the register content from the reg_cache 680 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R 681 */ 682 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \ 683 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \ 684 struct snd_kcontrol *kcontrol, int event) \ 685 { \ 686 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \ 687 \ 688 switch (event) { \ 689 case SND_SOC_DAPM_POST_PMU: \ 690 twl4030->pin_name##_enabled = 1; \ 691 twl4030_write(w->codec, reg, \ 692 twl4030_read_reg_cache(w->codec, reg)); \ 693 break; \ 694 case SND_SOC_DAPM_POST_PMD: \ 695 twl4030->pin_name##_enabled = 0; \ 696 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \ 697 0, reg); \ 698 break; \ 699 } \ 700 return 0; \ 701 } 702 703 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN); 704 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN); 705 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN); 706 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN); 707 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN); 708 709 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp) 710 { 711 unsigned char hs_ctl; 712 713 hs_ctl = twl4030_read_reg_cache(codec, reg); 714 715 if (ramp) { 716 /* HF ramp-up */ 717 hs_ctl |= TWL4030_HF_CTL_REF_EN; 718 twl4030_write(codec, reg, hs_ctl); 719 udelay(10); 720 hs_ctl |= TWL4030_HF_CTL_RAMP_EN; 721 twl4030_write(codec, reg, hs_ctl); 722 udelay(40); 723 hs_ctl |= TWL4030_HF_CTL_LOOP_EN; 724 hs_ctl |= TWL4030_HF_CTL_HB_EN; 725 twl4030_write(codec, reg, hs_ctl); 726 } else { 727 /* HF ramp-down */ 728 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN; 729 hs_ctl &= ~TWL4030_HF_CTL_HB_EN; 730 twl4030_write(codec, reg, hs_ctl); 731 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN; 732 twl4030_write(codec, reg, hs_ctl); 733 udelay(40); 734 hs_ctl &= ~TWL4030_HF_CTL_REF_EN; 735 twl4030_write(codec, reg, hs_ctl); 736 } 737 } 738 739 static int handsfreelpga_event(struct snd_soc_dapm_widget *w, 740 struct snd_kcontrol *kcontrol, int event) 741 { 742 switch (event) { 743 case SND_SOC_DAPM_POST_PMU: 744 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1); 745 break; 746 case SND_SOC_DAPM_POST_PMD: 747 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0); 748 break; 749 } 750 return 0; 751 } 752 753 static int handsfreerpga_event(struct snd_soc_dapm_widget *w, 754 struct snd_kcontrol *kcontrol, int event) 755 { 756 switch (event) { 757 case SND_SOC_DAPM_POST_PMU: 758 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1); 759 break; 760 case SND_SOC_DAPM_POST_PMD: 761 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0); 762 break; 763 } 764 return 0; 765 } 766 767 static int vibramux_event(struct snd_soc_dapm_widget *w, 768 struct snd_kcontrol *kcontrol, int event) 769 { 770 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff); 771 return 0; 772 } 773 774 static int apll_event(struct snd_soc_dapm_widget *w, 775 struct snd_kcontrol *kcontrol, int event) 776 { 777 switch (event) { 778 case SND_SOC_DAPM_PRE_PMU: 779 twl4030_apll_enable(w->codec, 1); 780 break; 781 case SND_SOC_DAPM_POST_PMD: 782 twl4030_apll_enable(w->codec, 0); 783 break; 784 } 785 return 0; 786 } 787 788 static int aif_event(struct snd_soc_dapm_widget *w, 789 struct snd_kcontrol *kcontrol, int event) 790 { 791 u8 audio_if; 792 793 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF); 794 switch (event) { 795 case SND_SOC_DAPM_PRE_PMU: 796 /* Enable AIF */ 797 /* enable the PLL before we use it to clock the DAI */ 798 twl4030_apll_enable(w->codec, 1); 799 800 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF, 801 audio_if | TWL4030_AIF_EN); 802 break; 803 case SND_SOC_DAPM_POST_PMD: 804 /* disable the DAI before we stop it's source PLL */ 805 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF, 806 audio_if & ~TWL4030_AIF_EN); 807 twl4030_apll_enable(w->codec, 0); 808 break; 809 } 810 return 0; 811 } 812 813 static void headset_ramp(struct snd_soc_codec *codec, int ramp) 814 { 815 unsigned char hs_gain, hs_pop; 816 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 817 struct twl4030_codec_data *pdata = twl4030->pdata; 818 /* Base values for ramp delay calculation: 2^19 - 2^26 */ 819 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304, 820 8388608, 16777216, 33554432, 67108864}; 821 unsigned int delay; 822 823 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET); 824 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET); 825 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] / 826 twl4030->sysclk) + 1; 827 828 /* Enable external mute control, this dramatically reduces 829 * the pop-noise */ 830 if (pdata && pdata->hs_extmute) { 831 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 832 gpio_set_value(pdata->hs_extmute_gpio, 1); 833 } else { 834 hs_pop |= TWL4030_EXTMUTE; 835 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 836 } 837 } 838 839 if (ramp) { 840 /* Headset ramp-up according to the TRM */ 841 hs_pop |= TWL4030_VMID_EN; 842 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 843 /* Actually write to the register */ 844 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 845 hs_gain, 846 TWL4030_REG_HS_GAIN_SET); 847 hs_pop |= TWL4030_RAMP_EN; 848 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 849 /* Wait ramp delay time + 1, so the VMID can settle */ 850 twl4030_wait_ms(delay); 851 } else { 852 /* Headset ramp-down _not_ according to 853 * the TRM, but in a way that it is working */ 854 hs_pop &= ~TWL4030_RAMP_EN; 855 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 856 /* Wait ramp delay time + 1, so the VMID can settle */ 857 twl4030_wait_ms(delay); 858 /* Bypass the reg_cache to mute the headset */ 859 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 860 hs_gain & (~0x0f), 861 TWL4030_REG_HS_GAIN_SET); 862 863 hs_pop &= ~TWL4030_VMID_EN; 864 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 865 } 866 867 /* Disable external mute */ 868 if (pdata && pdata->hs_extmute) { 869 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 870 gpio_set_value(pdata->hs_extmute_gpio, 0); 871 } else { 872 hs_pop &= ~TWL4030_EXTMUTE; 873 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop); 874 } 875 } 876 } 877 878 static int headsetlpga_event(struct snd_soc_dapm_widget *w, 879 struct snd_kcontrol *kcontrol, int event) 880 { 881 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); 882 883 switch (event) { 884 case SND_SOC_DAPM_POST_PMU: 885 /* Do the ramp-up only once */ 886 if (!twl4030->hsr_enabled) 887 headset_ramp(w->codec, 1); 888 889 twl4030->hsl_enabled = 1; 890 break; 891 case SND_SOC_DAPM_POST_PMD: 892 /* Do the ramp-down only if both headsetL/R is disabled */ 893 if (!twl4030->hsr_enabled) 894 headset_ramp(w->codec, 0); 895 896 twl4030->hsl_enabled = 0; 897 break; 898 } 899 return 0; 900 } 901 902 static int headsetrpga_event(struct snd_soc_dapm_widget *w, 903 struct snd_kcontrol *kcontrol, int event) 904 { 905 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); 906 907 switch (event) { 908 case SND_SOC_DAPM_POST_PMU: 909 /* Do the ramp-up only once */ 910 if (!twl4030->hsl_enabled) 911 headset_ramp(w->codec, 1); 912 913 twl4030->hsr_enabled = 1; 914 break; 915 case SND_SOC_DAPM_POST_PMD: 916 /* Do the ramp-down only if both headsetL/R is disabled */ 917 if (!twl4030->hsl_enabled) 918 headset_ramp(w->codec, 0); 919 920 twl4030->hsr_enabled = 0; 921 break; 922 } 923 return 0; 924 } 925 926 static int digimic_event(struct snd_soc_dapm_widget *w, 927 struct snd_kcontrol *kcontrol, int event) 928 { 929 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); 930 struct twl4030_codec_data *pdata = twl4030->pdata; 931 932 if (pdata && pdata->digimic_delay) 933 twl4030_wait_ms(pdata->digimic_delay); 934 return 0; 935 } 936 937 /* 938 * Some of the gain controls in TWL (mostly those which are associated with 939 * the outputs) are implemented in an interesting way: 940 * 0x0 : Power down (mute) 941 * 0x1 : 6dB 942 * 0x2 : 0 dB 943 * 0x3 : -6 dB 944 * Inverting not going to help with these. 945 * Custom volsw and volsw_2r get/put functions to handle these gain bits. 946 */ 947 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol, 948 struct snd_ctl_elem_value *ucontrol) 949 { 950 struct soc_mixer_control *mc = 951 (struct soc_mixer_control *)kcontrol->private_value; 952 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 953 unsigned int reg = mc->reg; 954 unsigned int shift = mc->shift; 955 unsigned int rshift = mc->rshift; 956 int max = mc->max; 957 int mask = (1 << fls(max)) - 1; 958 959 ucontrol->value.integer.value[0] = 960 (snd_soc_read(codec, reg) >> shift) & mask; 961 if (ucontrol->value.integer.value[0]) 962 ucontrol->value.integer.value[0] = 963 max + 1 - ucontrol->value.integer.value[0]; 964 965 if (shift != rshift) { 966 ucontrol->value.integer.value[1] = 967 (snd_soc_read(codec, reg) >> rshift) & mask; 968 if (ucontrol->value.integer.value[1]) 969 ucontrol->value.integer.value[1] = 970 max + 1 - ucontrol->value.integer.value[1]; 971 } 972 973 return 0; 974 } 975 976 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol, 977 struct snd_ctl_elem_value *ucontrol) 978 { 979 struct soc_mixer_control *mc = 980 (struct soc_mixer_control *)kcontrol->private_value; 981 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 982 unsigned int reg = mc->reg; 983 unsigned int shift = mc->shift; 984 unsigned int rshift = mc->rshift; 985 int max = mc->max; 986 int mask = (1 << fls(max)) - 1; 987 unsigned short val, val2, val_mask; 988 989 val = (ucontrol->value.integer.value[0] & mask); 990 991 val_mask = mask << shift; 992 if (val) 993 val = max + 1 - val; 994 val = val << shift; 995 if (shift != rshift) { 996 val2 = (ucontrol->value.integer.value[1] & mask); 997 val_mask |= mask << rshift; 998 if (val2) 999 val2 = max + 1 - val2; 1000 val |= val2 << rshift; 1001 } 1002 return snd_soc_update_bits(codec, reg, val_mask, val); 1003 } 1004 1005 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 1006 struct snd_ctl_elem_value *ucontrol) 1007 { 1008 struct soc_mixer_control *mc = 1009 (struct soc_mixer_control *)kcontrol->private_value; 1010 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1011 unsigned int reg = mc->reg; 1012 unsigned int reg2 = mc->rreg; 1013 unsigned int shift = mc->shift; 1014 int max = mc->max; 1015 int mask = (1<<fls(max))-1; 1016 1017 ucontrol->value.integer.value[0] = 1018 (snd_soc_read(codec, reg) >> shift) & mask; 1019 ucontrol->value.integer.value[1] = 1020 (snd_soc_read(codec, reg2) >> shift) & mask; 1021 1022 if (ucontrol->value.integer.value[0]) 1023 ucontrol->value.integer.value[0] = 1024 max + 1 - ucontrol->value.integer.value[0]; 1025 if (ucontrol->value.integer.value[1]) 1026 ucontrol->value.integer.value[1] = 1027 max + 1 - ucontrol->value.integer.value[1]; 1028 1029 return 0; 1030 } 1031 1032 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 1033 struct snd_ctl_elem_value *ucontrol) 1034 { 1035 struct soc_mixer_control *mc = 1036 (struct soc_mixer_control *)kcontrol->private_value; 1037 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1038 unsigned int reg = mc->reg; 1039 unsigned int reg2 = mc->rreg; 1040 unsigned int shift = mc->shift; 1041 int max = mc->max; 1042 int mask = (1 << fls(max)) - 1; 1043 int err; 1044 unsigned short val, val2, val_mask; 1045 1046 val_mask = mask << shift; 1047 val = (ucontrol->value.integer.value[0] & mask); 1048 val2 = (ucontrol->value.integer.value[1] & mask); 1049 1050 if (val) 1051 val = max + 1 - val; 1052 if (val2) 1053 val2 = max + 1 - val2; 1054 1055 val = val << shift; 1056 val2 = val2 << shift; 1057 1058 err = snd_soc_update_bits(codec, reg, val_mask, val); 1059 if (err < 0) 1060 return err; 1061 1062 err = snd_soc_update_bits(codec, reg2, val_mask, val2); 1063 return err; 1064 } 1065 1066 /* Codec operation modes */ 1067 static const char *twl4030_op_modes_texts[] = { 1068 "Option 2 (voice/audio)", "Option 1 (audio)" 1069 }; 1070 1071 static const struct soc_enum twl4030_op_modes_enum = 1072 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0, 1073 ARRAY_SIZE(twl4030_op_modes_texts), 1074 twl4030_op_modes_texts); 1075 1076 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol, 1077 struct snd_ctl_elem_value *ucontrol) 1078 { 1079 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 1080 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1081 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 1082 unsigned short val; 1083 unsigned short mask; 1084 1085 if (twl4030->configured) { 1086 dev_err(codec->dev, 1087 "operation mode cannot be changed on-the-fly\n"); 1088 return -EBUSY; 1089 } 1090 1091 if (ucontrol->value.enumerated.item[0] > e->max - 1) 1092 return -EINVAL; 1093 1094 val = ucontrol->value.enumerated.item[0] << e->shift_l; 1095 mask = e->mask << e->shift_l; 1096 if (e->shift_l != e->shift_r) { 1097 if (ucontrol->value.enumerated.item[1] > e->max - 1) 1098 return -EINVAL; 1099 val |= ucontrol->value.enumerated.item[1] << e->shift_r; 1100 mask |= e->mask << e->shift_r; 1101 } 1102 1103 return snd_soc_update_bits(codec, e->reg, mask, val); 1104 } 1105 1106 /* 1107 * FGAIN volume control: 1108 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB) 1109 */ 1110 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1); 1111 1112 /* 1113 * CGAIN volume control: 1114 * 0 dB to 12 dB in 6 dB steps 1115 * value 2 and 3 means 12 dB 1116 */ 1117 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0); 1118 1119 /* 1120 * Voice Downlink GAIN volume control: 1121 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB) 1122 */ 1123 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1); 1124 1125 /* 1126 * Analog playback gain 1127 * -24 dB to 12 dB in 2 dB steps 1128 */ 1129 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0); 1130 1131 /* 1132 * Gain controls tied to outputs 1133 * -6 dB to 6 dB in 6 dB steps (mute instead of -12) 1134 */ 1135 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1); 1136 1137 /* 1138 * Gain control for earpiece amplifier 1139 * 0 dB to 12 dB in 6 dB steps (mute instead of -6) 1140 */ 1141 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1); 1142 1143 /* 1144 * Capture gain after the ADCs 1145 * from 0 dB to 31 dB in 1 dB steps 1146 */ 1147 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0); 1148 1149 /* 1150 * Gain control for input amplifiers 1151 * 0 dB to 30 dB in 6 dB steps 1152 */ 1153 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0); 1154 1155 /* AVADC clock priority */ 1156 static const char *twl4030_avadc_clk_priority_texts[] = { 1157 "Voice high priority", "HiFi high priority" 1158 }; 1159 1160 static const struct soc_enum twl4030_avadc_clk_priority_enum = 1161 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2, 1162 ARRAY_SIZE(twl4030_avadc_clk_priority_texts), 1163 twl4030_avadc_clk_priority_texts); 1164 1165 static const char *twl4030_rampdelay_texts[] = { 1166 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms", 1167 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms", 1168 "3495/2581/1748 ms" 1169 }; 1170 1171 static const struct soc_enum twl4030_rampdelay_enum = 1172 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2, 1173 ARRAY_SIZE(twl4030_rampdelay_texts), 1174 twl4030_rampdelay_texts); 1175 1176 /* Vibra H-bridge direction mode */ 1177 static const char *twl4030_vibradirmode_texts[] = { 1178 "Vibra H-bridge direction", "Audio data MSB", 1179 }; 1180 1181 static const struct soc_enum twl4030_vibradirmode_enum = 1182 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5, 1183 ARRAY_SIZE(twl4030_vibradirmode_texts), 1184 twl4030_vibradirmode_texts); 1185 1186 /* Vibra H-bridge direction */ 1187 static const char *twl4030_vibradir_texts[] = { 1188 "Positive polarity", "Negative polarity", 1189 }; 1190 1191 static const struct soc_enum twl4030_vibradir_enum = 1192 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1, 1193 ARRAY_SIZE(twl4030_vibradir_texts), 1194 twl4030_vibradir_texts); 1195 1196 /* Digimic Left and right swapping */ 1197 static const char *twl4030_digimicswap_texts[] = { 1198 "Not swapped", "Swapped", 1199 }; 1200 1201 static const struct soc_enum twl4030_digimicswap_enum = 1202 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0, 1203 ARRAY_SIZE(twl4030_digimicswap_texts), 1204 twl4030_digimicswap_texts); 1205 1206 static const struct snd_kcontrol_new twl4030_snd_controls[] = { 1207 /* Codec operation mode control */ 1208 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum, 1209 snd_soc_get_enum_double, 1210 snd_soc_put_twl4030_opmode_enum_double), 1211 1212 /* Common playback gain controls */ 1213 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume", 1214 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 1215 0, 0x3f, 0, digital_fine_tlv), 1216 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume", 1217 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 1218 0, 0x3f, 0, digital_fine_tlv), 1219 1220 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume", 1221 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 1222 6, 0x2, 0, digital_coarse_tlv), 1223 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume", 1224 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 1225 6, 0x2, 0, digital_coarse_tlv), 1226 1227 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume", 1228 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 1229 3, 0x12, 1, analog_tlv), 1230 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume", 1231 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 1232 3, 0x12, 1, analog_tlv), 1233 SOC_DOUBLE_R("DAC1 Analog Playback Switch", 1234 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 1235 1, 1, 0), 1236 SOC_DOUBLE_R("DAC2 Analog Playback Switch", 1237 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 1238 1, 1, 0), 1239 1240 /* Common voice downlink gain controls */ 1241 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume", 1242 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv), 1243 1244 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume", 1245 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv), 1246 1247 SOC_SINGLE("DAC Voice Analog Downlink Switch", 1248 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0), 1249 1250 /* Separate output gain controls */ 1251 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume", 1252 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL, 1253 4, 3, 0, snd_soc_get_volsw_r2_twl4030, 1254 snd_soc_put_volsw_r2_twl4030, output_tvl), 1255 1256 SOC_DOUBLE_EXT_TLV("Headset Playback Volume", 1257 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030, 1258 snd_soc_put_volsw_twl4030, output_tvl), 1259 1260 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume", 1261 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL, 1262 4, 3, 0, snd_soc_get_volsw_r2_twl4030, 1263 snd_soc_put_volsw_r2_twl4030, output_tvl), 1264 1265 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume", 1266 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030, 1267 snd_soc_put_volsw_twl4030, output_ear_tvl), 1268 1269 /* Common capture gain controls */ 1270 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume", 1271 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, 1272 0, 0x1f, 0, digital_capture_tlv), 1273 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume", 1274 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA, 1275 0, 0x1f, 0, digital_capture_tlv), 1276 1277 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN, 1278 0, 3, 5, 0, input_gain_tlv), 1279 1280 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum), 1281 1282 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum), 1283 1284 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum), 1285 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum), 1286 1287 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum), 1288 }; 1289 1290 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = { 1291 /* Left channel inputs */ 1292 SND_SOC_DAPM_INPUT("MAINMIC"), 1293 SND_SOC_DAPM_INPUT("HSMIC"), 1294 SND_SOC_DAPM_INPUT("AUXL"), 1295 SND_SOC_DAPM_INPUT("CARKITMIC"), 1296 /* Right channel inputs */ 1297 SND_SOC_DAPM_INPUT("SUBMIC"), 1298 SND_SOC_DAPM_INPUT("AUXR"), 1299 /* Digital microphones (Stereo) */ 1300 SND_SOC_DAPM_INPUT("DIGIMIC0"), 1301 SND_SOC_DAPM_INPUT("DIGIMIC1"), 1302 1303 /* Outputs */ 1304 SND_SOC_DAPM_OUTPUT("EARPIECE"), 1305 SND_SOC_DAPM_OUTPUT("PREDRIVEL"), 1306 SND_SOC_DAPM_OUTPUT("PREDRIVER"), 1307 SND_SOC_DAPM_OUTPUT("HSOL"), 1308 SND_SOC_DAPM_OUTPUT("HSOR"), 1309 SND_SOC_DAPM_OUTPUT("CARKITL"), 1310 SND_SOC_DAPM_OUTPUT("CARKITR"), 1311 SND_SOC_DAPM_OUTPUT("HFL"), 1312 SND_SOC_DAPM_OUTPUT("HFR"), 1313 SND_SOC_DAPM_OUTPUT("VIBRA"), 1314 1315 /* AIF and APLL clocks for running DAIs (including loopback) */ 1316 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"), 1317 SND_SOC_DAPM_INPUT("Virtual HiFi IN"), 1318 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"), 1319 1320 /* DACs */ 1321 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0), 1322 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0), 1323 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0), 1324 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0), 1325 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0), 1326 1327 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0, 1328 TWL4030_REG_VOICE_IF, 6, 0), 1329 1330 /* Analog bypasses */ 1331 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0, 1332 &twl4030_dapm_abypassr1_control), 1333 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0, 1334 &twl4030_dapm_abypassl1_control), 1335 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0, 1336 &twl4030_dapm_abypassr2_control), 1337 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0, 1338 &twl4030_dapm_abypassl2_control), 1339 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0, 1340 &twl4030_dapm_abypassv_control), 1341 1342 /* Master analog loopback switch */ 1343 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0, 1344 NULL, 0), 1345 1346 /* Digital bypasses */ 1347 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0, 1348 &twl4030_dapm_dbypassl_control), 1349 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0, 1350 &twl4030_dapm_dbypassr_control), 1351 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0, 1352 &twl4030_dapm_dbypassv_control), 1353 1354 /* Digital mixers, power control for the physical DACs */ 1355 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer", 1356 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0), 1357 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer", 1358 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0), 1359 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer", 1360 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0), 1361 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer", 1362 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0), 1363 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer", 1364 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0), 1365 1366 /* Analog mixers, power control for the physical PGAs */ 1367 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", 1368 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0), 1369 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", 1370 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0), 1371 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", 1372 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0), 1373 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", 1374 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0), 1375 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer", 1376 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0), 1377 1378 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event, 1379 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD), 1380 1381 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event, 1382 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD), 1383 1384 /* Output MIXER controls */ 1385 /* Earpiece */ 1386 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0, 1387 &twl4030_dapm_earpiece_controls[0], 1388 ARRAY_SIZE(twl4030_dapm_earpiece_controls)), 1389 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM, 1390 0, 0, NULL, 0, earpiecepga_event, 1391 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1392 /* PreDrivL/R */ 1393 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0, 1394 &twl4030_dapm_predrivel_controls[0], 1395 ARRAY_SIZE(twl4030_dapm_predrivel_controls)), 1396 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM, 1397 0, 0, NULL, 0, predrivelpga_event, 1398 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1399 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0, 1400 &twl4030_dapm_predriver_controls[0], 1401 ARRAY_SIZE(twl4030_dapm_predriver_controls)), 1402 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM, 1403 0, 0, NULL, 0, predriverpga_event, 1404 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1405 /* HeadsetL/R */ 1406 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0, 1407 &twl4030_dapm_hsol_controls[0], 1408 ARRAY_SIZE(twl4030_dapm_hsol_controls)), 1409 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM, 1410 0, 0, NULL, 0, headsetlpga_event, 1411 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1412 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0, 1413 &twl4030_dapm_hsor_controls[0], 1414 ARRAY_SIZE(twl4030_dapm_hsor_controls)), 1415 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM, 1416 0, 0, NULL, 0, headsetrpga_event, 1417 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1418 /* CarkitL/R */ 1419 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0, 1420 &twl4030_dapm_carkitl_controls[0], 1421 ARRAY_SIZE(twl4030_dapm_carkitl_controls)), 1422 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM, 1423 0, 0, NULL, 0, carkitlpga_event, 1424 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1425 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0, 1426 &twl4030_dapm_carkitr_controls[0], 1427 ARRAY_SIZE(twl4030_dapm_carkitr_controls)), 1428 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM, 1429 0, 0, NULL, 0, carkitrpga_event, 1430 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1431 1432 /* Output MUX controls */ 1433 /* HandsfreeL/R */ 1434 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0, 1435 &twl4030_dapm_handsfreel_control), 1436 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0, 1437 &twl4030_dapm_handsfreelmute_control), 1438 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM, 1439 0, 0, NULL, 0, handsfreelpga_event, 1440 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1441 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0, 1442 &twl4030_dapm_handsfreer_control), 1443 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0, 1444 &twl4030_dapm_handsfreermute_control), 1445 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM, 1446 0, 0, NULL, 0, handsfreerpga_event, 1447 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1448 /* Vibra */ 1449 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0, 1450 &twl4030_dapm_vibra_control, vibramux_event, 1451 SND_SOC_DAPM_PRE_PMU), 1452 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0, 1453 &twl4030_dapm_vibrapath_control), 1454 1455 /* Introducing four virtual ADC, since TWL4030 have four channel for 1456 capture */ 1457 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0), 1458 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0), 1459 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0), 1460 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0), 1461 1462 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0, 1463 TWL4030_REG_VOICE_IF, 5, 0), 1464 1465 /* Analog/Digital mic path selection. 1466 TX1 Left/Right: either analog Left/Right or Digimic0 1467 TX2 Left/Right: either analog Left/Right or Digimic1 */ 1468 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0, 1469 &twl4030_dapm_micpathtx1_control), 1470 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0, 1471 &twl4030_dapm_micpathtx2_control), 1472 1473 /* Analog input mixers for the capture amplifiers */ 1474 SND_SOC_DAPM_MIXER("Analog Left", 1475 TWL4030_REG_ANAMICL, 4, 0, 1476 &twl4030_dapm_analoglmic_controls[0], 1477 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)), 1478 SND_SOC_DAPM_MIXER("Analog Right", 1479 TWL4030_REG_ANAMICR, 4, 0, 1480 &twl4030_dapm_analogrmic_controls[0], 1481 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)), 1482 1483 SND_SOC_DAPM_PGA("ADC Physical Left", 1484 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0), 1485 SND_SOC_DAPM_PGA("ADC Physical Right", 1486 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0), 1487 1488 SND_SOC_DAPM_PGA_E("Digimic0 Enable", 1489 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0, 1490 digimic_event, SND_SOC_DAPM_POST_PMU), 1491 SND_SOC_DAPM_PGA_E("Digimic1 Enable", 1492 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0, 1493 digimic_event, SND_SOC_DAPM_POST_PMU), 1494 1495 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0, 1496 NULL, 0), 1497 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0, 1498 NULL, 0), 1499 1500 /* Microphone bias */ 1501 SND_SOC_DAPM_SUPPLY("Mic Bias 1", 1502 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0), 1503 SND_SOC_DAPM_SUPPLY("Mic Bias 2", 1504 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0), 1505 SND_SOC_DAPM_SUPPLY("Headset Mic Bias", 1506 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0), 1507 1508 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0), 1509 }; 1510 1511 static const struct snd_soc_dapm_route intercon[] = { 1512 /* Stream -> DAC mapping */ 1513 {"DAC Right1", NULL, "HiFi Playback"}, 1514 {"DAC Left1", NULL, "HiFi Playback"}, 1515 {"DAC Right2", NULL, "HiFi Playback"}, 1516 {"DAC Left2", NULL, "HiFi Playback"}, 1517 {"DAC Voice", NULL, "VAIFIN"}, 1518 1519 /* ADC -> Stream mapping */ 1520 {"HiFi Capture", NULL, "ADC Virtual Left1"}, 1521 {"HiFi Capture", NULL, "ADC Virtual Right1"}, 1522 {"HiFi Capture", NULL, "ADC Virtual Left2"}, 1523 {"HiFi Capture", NULL, "ADC Virtual Right2"}, 1524 {"VAIFOUT", NULL, "ADC Virtual Left2"}, 1525 {"VAIFOUT", NULL, "ADC Virtual Right2"}, 1526 {"VAIFOUT", NULL, "VIF Enable"}, 1527 1528 {"Digital L1 Playback Mixer", NULL, "DAC Left1"}, 1529 {"Digital R1 Playback Mixer", NULL, "DAC Right1"}, 1530 {"Digital L2 Playback Mixer", NULL, "DAC Left2"}, 1531 {"Digital R2 Playback Mixer", NULL, "DAC Right2"}, 1532 {"Digital Voice Playback Mixer", NULL, "DAC Voice"}, 1533 1534 /* Supply for the digital part (APLL) */ 1535 {"Digital Voice Playback Mixer", NULL, "APLL Enable"}, 1536 1537 {"DAC Left1", NULL, "AIF Enable"}, 1538 {"DAC Right1", NULL, "AIF Enable"}, 1539 {"DAC Left2", NULL, "AIF Enable"}, 1540 {"DAC Right1", NULL, "AIF Enable"}, 1541 {"DAC Voice", NULL, "VIF Enable"}, 1542 1543 {"Digital R2 Playback Mixer", NULL, "AIF Enable"}, 1544 {"Digital L2 Playback Mixer", NULL, "AIF Enable"}, 1545 1546 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"}, 1547 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"}, 1548 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"}, 1549 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"}, 1550 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"}, 1551 1552 /* Internal playback routings */ 1553 /* Earpiece */ 1554 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"}, 1555 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1556 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1557 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1558 {"Earpiece PGA", NULL, "Earpiece Mixer"}, 1559 /* PreDrivL */ 1560 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1561 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1562 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1563 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1564 {"PredriveL PGA", NULL, "PredriveL Mixer"}, 1565 /* PreDrivR */ 1566 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1567 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1568 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1569 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1570 {"PredriveR PGA", NULL, "PredriveR Mixer"}, 1571 /* HeadsetL */ 1572 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1573 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1574 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1575 {"HeadsetL PGA", NULL, "HeadsetL Mixer"}, 1576 /* HeadsetR */ 1577 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1578 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1579 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1580 {"HeadsetR PGA", NULL, "HeadsetR Mixer"}, 1581 /* CarkitL */ 1582 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1583 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1584 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1585 {"CarkitL PGA", NULL, "CarkitL Mixer"}, 1586 /* CarkitR */ 1587 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1588 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1589 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1590 {"CarkitR PGA", NULL, "CarkitR Mixer"}, 1591 /* HandsfreeL */ 1592 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"}, 1593 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"}, 1594 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"}, 1595 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"}, 1596 {"HandsfreeL", "Switch", "HandsfreeL Mux"}, 1597 {"HandsfreeL PGA", NULL, "HandsfreeL"}, 1598 /* HandsfreeR */ 1599 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"}, 1600 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"}, 1601 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"}, 1602 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"}, 1603 {"HandsfreeR", "Switch", "HandsfreeR Mux"}, 1604 {"HandsfreeR PGA", NULL, "HandsfreeR"}, 1605 /* Vibra */ 1606 {"Vibra Mux", "AudioL1", "DAC Left1"}, 1607 {"Vibra Mux", "AudioR1", "DAC Right1"}, 1608 {"Vibra Mux", "AudioL2", "DAC Left2"}, 1609 {"Vibra Mux", "AudioR2", "DAC Right2"}, 1610 1611 /* outputs */ 1612 /* Must be always connected (for AIF and APLL) */ 1613 {"Virtual HiFi OUT", NULL, "DAC Left1"}, 1614 {"Virtual HiFi OUT", NULL, "DAC Right1"}, 1615 {"Virtual HiFi OUT", NULL, "DAC Left2"}, 1616 {"Virtual HiFi OUT", NULL, "DAC Right2"}, 1617 /* Must be always connected (for APLL) */ 1618 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"}, 1619 /* Physical outputs */ 1620 {"EARPIECE", NULL, "Earpiece PGA"}, 1621 {"PREDRIVEL", NULL, "PredriveL PGA"}, 1622 {"PREDRIVER", NULL, "PredriveR PGA"}, 1623 {"HSOL", NULL, "HeadsetL PGA"}, 1624 {"HSOR", NULL, "HeadsetR PGA"}, 1625 {"CARKITL", NULL, "CarkitL PGA"}, 1626 {"CARKITR", NULL, "CarkitR PGA"}, 1627 {"HFL", NULL, "HandsfreeL PGA"}, 1628 {"HFR", NULL, "HandsfreeR PGA"}, 1629 {"Vibra Route", "Audio", "Vibra Mux"}, 1630 {"VIBRA", NULL, "Vibra Route"}, 1631 1632 /* Capture path */ 1633 /* Must be always connected (for AIF and APLL) */ 1634 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"}, 1635 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"}, 1636 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"}, 1637 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"}, 1638 /* Physical inputs */ 1639 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"}, 1640 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"}, 1641 {"Analog Left", "AUXL Capture Switch", "AUXL"}, 1642 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"}, 1643 1644 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"}, 1645 {"Analog Right", "AUXR Capture Switch", "AUXR"}, 1646 1647 {"ADC Physical Left", NULL, "Analog Left"}, 1648 {"ADC Physical Right", NULL, "Analog Right"}, 1649 1650 {"Digimic0 Enable", NULL, "DIGIMIC0"}, 1651 {"Digimic1 Enable", NULL, "DIGIMIC1"}, 1652 1653 {"DIGIMIC0", NULL, "micbias1 select"}, 1654 {"DIGIMIC1", NULL, "micbias2 select"}, 1655 1656 /* TX1 Left capture path */ 1657 {"TX1 Capture Route", "Analog", "ADC Physical Left"}, 1658 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1659 /* TX1 Right capture path */ 1660 {"TX1 Capture Route", "Analog", "ADC Physical Right"}, 1661 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1662 /* TX2 Left capture path */ 1663 {"TX2 Capture Route", "Analog", "ADC Physical Left"}, 1664 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1665 /* TX2 Right capture path */ 1666 {"TX2 Capture Route", "Analog", "ADC Physical Right"}, 1667 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1668 1669 {"ADC Virtual Left1", NULL, "TX1 Capture Route"}, 1670 {"ADC Virtual Right1", NULL, "TX1 Capture Route"}, 1671 {"ADC Virtual Left2", NULL, "TX2 Capture Route"}, 1672 {"ADC Virtual Right2", NULL, "TX2 Capture Route"}, 1673 1674 {"ADC Virtual Left1", NULL, "AIF Enable"}, 1675 {"ADC Virtual Right1", NULL, "AIF Enable"}, 1676 {"ADC Virtual Left2", NULL, "AIF Enable"}, 1677 {"ADC Virtual Right2", NULL, "AIF Enable"}, 1678 1679 /* Analog bypass routes */ 1680 {"Right1 Analog Loopback", "Switch", "Analog Right"}, 1681 {"Left1 Analog Loopback", "Switch", "Analog Left"}, 1682 {"Right2 Analog Loopback", "Switch", "Analog Right"}, 1683 {"Left2 Analog Loopback", "Switch", "Analog Left"}, 1684 {"Voice Analog Loopback", "Switch", "Analog Left"}, 1685 1686 /* Supply for the Analog loopbacks */ 1687 {"Right1 Analog Loopback", NULL, "FM Loop Enable"}, 1688 {"Left1 Analog Loopback", NULL, "FM Loop Enable"}, 1689 {"Right2 Analog Loopback", NULL, "FM Loop Enable"}, 1690 {"Left2 Analog Loopback", NULL, "FM Loop Enable"}, 1691 {"Voice Analog Loopback", NULL, "FM Loop Enable"}, 1692 1693 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"}, 1694 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"}, 1695 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"}, 1696 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"}, 1697 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"}, 1698 1699 /* Digital bypass routes */ 1700 {"Right Digital Loopback", "Volume", "TX1 Capture Route"}, 1701 {"Left Digital Loopback", "Volume", "TX1 Capture Route"}, 1702 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"}, 1703 1704 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"}, 1705 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"}, 1706 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"}, 1707 1708 }; 1709 1710 static int twl4030_set_bias_level(struct snd_soc_codec *codec, 1711 enum snd_soc_bias_level level) 1712 { 1713 switch (level) { 1714 case SND_SOC_BIAS_ON: 1715 break; 1716 case SND_SOC_BIAS_PREPARE: 1717 break; 1718 case SND_SOC_BIAS_STANDBY: 1719 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) 1720 twl4030_codec_enable(codec, 1); 1721 break; 1722 case SND_SOC_BIAS_OFF: 1723 twl4030_codec_enable(codec, 0); 1724 break; 1725 } 1726 codec->dapm.bias_level = level; 1727 1728 return 0; 1729 } 1730 1731 static void twl4030_constraints(struct twl4030_priv *twl4030, 1732 struct snd_pcm_substream *mst_substream) 1733 { 1734 struct snd_pcm_substream *slv_substream; 1735 1736 /* Pick the stream, which need to be constrained */ 1737 if (mst_substream == twl4030->master_substream) 1738 slv_substream = twl4030->slave_substream; 1739 else if (mst_substream == twl4030->slave_substream) 1740 slv_substream = twl4030->master_substream; 1741 else /* This should not happen.. */ 1742 return; 1743 1744 /* Set the constraints according to the already configured stream */ 1745 snd_pcm_hw_constraint_minmax(slv_substream->runtime, 1746 SNDRV_PCM_HW_PARAM_RATE, 1747 twl4030->rate, 1748 twl4030->rate); 1749 1750 snd_pcm_hw_constraint_minmax(slv_substream->runtime, 1751 SNDRV_PCM_HW_PARAM_SAMPLE_BITS, 1752 twl4030->sample_bits, 1753 twl4030->sample_bits); 1754 1755 snd_pcm_hw_constraint_minmax(slv_substream->runtime, 1756 SNDRV_PCM_HW_PARAM_CHANNELS, 1757 twl4030->channels, 1758 twl4030->channels); 1759 } 1760 1761 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for 1762 * capture has to be enabled/disabled. */ 1763 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction, 1764 int enable) 1765 { 1766 u8 reg, mask; 1767 1768 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION); 1769 1770 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 1771 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN; 1772 else 1773 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN; 1774 1775 if (enable) 1776 reg |= mask; 1777 else 1778 reg &= ~mask; 1779 1780 twl4030_write(codec, TWL4030_REG_OPTION, reg); 1781 } 1782 1783 static int twl4030_startup(struct snd_pcm_substream *substream, 1784 struct snd_soc_dai *dai) 1785 { 1786 struct snd_soc_codec *codec = dai->codec; 1787 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1788 1789 if (twl4030->master_substream) { 1790 twl4030->slave_substream = substream; 1791 /* The DAI has one configuration for playback and capture, so 1792 * if the DAI has been already configured then constrain this 1793 * substream to match it. */ 1794 if (twl4030->configured) 1795 twl4030_constraints(twl4030, twl4030->master_substream); 1796 } else { 1797 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) & 1798 TWL4030_OPTION_1)) { 1799 /* In option2 4 channel is not supported, set the 1800 * constraint for the first stream for channels, the 1801 * second stream will 'inherit' this cosntraint */ 1802 snd_pcm_hw_constraint_minmax(substream->runtime, 1803 SNDRV_PCM_HW_PARAM_CHANNELS, 1804 2, 2); 1805 } 1806 twl4030->master_substream = substream; 1807 } 1808 1809 return 0; 1810 } 1811 1812 static void twl4030_shutdown(struct snd_pcm_substream *substream, 1813 struct snd_soc_dai *dai) 1814 { 1815 struct snd_soc_codec *codec = dai->codec; 1816 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1817 1818 if (twl4030->master_substream == substream) 1819 twl4030->master_substream = twl4030->slave_substream; 1820 1821 twl4030->slave_substream = NULL; 1822 1823 /* If all streams are closed, or the remaining stream has not yet 1824 * been configured than set the DAI as not configured. */ 1825 if (!twl4030->master_substream) 1826 twl4030->configured = 0; 1827 else if (!twl4030->master_substream->runtime->channels) 1828 twl4030->configured = 0; 1829 1830 /* If the closing substream had 4 channel, do the necessary cleanup */ 1831 if (substream->runtime->channels == 4) 1832 twl4030_tdm_enable(codec, substream->stream, 0); 1833 } 1834 1835 static int twl4030_hw_params(struct snd_pcm_substream *substream, 1836 struct snd_pcm_hw_params *params, 1837 struct snd_soc_dai *dai) 1838 { 1839 struct snd_soc_codec *codec = dai->codec; 1840 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1841 u8 mode, old_mode, format, old_format; 1842 1843 /* If the substream has 4 channel, do the necessary setup */ 1844 if (params_channels(params) == 4) { 1845 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); 1846 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE); 1847 1848 /* Safety check: are we in the correct operating mode and 1849 * the interface is in TDM mode? */ 1850 if ((mode & TWL4030_OPTION_1) && 1851 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM)) 1852 twl4030_tdm_enable(codec, substream->stream, 1); 1853 else 1854 return -EINVAL; 1855 } 1856 1857 if (twl4030->configured) 1858 /* Ignoring hw_params for already configured DAI */ 1859 return 0; 1860 1861 /* bit rate */ 1862 old_mode = twl4030_read_reg_cache(codec, 1863 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; 1864 mode = old_mode & ~TWL4030_APLL_RATE; 1865 1866 switch (params_rate(params)) { 1867 case 8000: 1868 mode |= TWL4030_APLL_RATE_8000; 1869 break; 1870 case 11025: 1871 mode |= TWL4030_APLL_RATE_11025; 1872 break; 1873 case 12000: 1874 mode |= TWL4030_APLL_RATE_12000; 1875 break; 1876 case 16000: 1877 mode |= TWL4030_APLL_RATE_16000; 1878 break; 1879 case 22050: 1880 mode |= TWL4030_APLL_RATE_22050; 1881 break; 1882 case 24000: 1883 mode |= TWL4030_APLL_RATE_24000; 1884 break; 1885 case 32000: 1886 mode |= TWL4030_APLL_RATE_32000; 1887 break; 1888 case 44100: 1889 mode |= TWL4030_APLL_RATE_44100; 1890 break; 1891 case 48000: 1892 mode |= TWL4030_APLL_RATE_48000; 1893 break; 1894 case 96000: 1895 mode |= TWL4030_APLL_RATE_96000; 1896 break; 1897 default: 1898 dev_err(codec->dev, "%s: unknown rate %d\n", __func__, 1899 params_rate(params)); 1900 return -EINVAL; 1901 } 1902 1903 /* sample size */ 1904 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); 1905 format = old_format; 1906 format &= ~TWL4030_DATA_WIDTH; 1907 switch (params_format(params)) { 1908 case SNDRV_PCM_FORMAT_S16_LE: 1909 format |= TWL4030_DATA_WIDTH_16S_16W; 1910 break; 1911 case SNDRV_PCM_FORMAT_S32_LE: 1912 format |= TWL4030_DATA_WIDTH_32S_24W; 1913 break; 1914 default: 1915 dev_err(codec->dev, "%s: unknown format %d\n", __func__, 1916 params_format(params)); 1917 return -EINVAL; 1918 } 1919 1920 if (format != old_format || mode != old_mode) { 1921 if (twl4030->codec_powered) { 1922 /* 1923 * If the codec is powered, than we need to toggle the 1924 * codec power. 1925 */ 1926 twl4030_codec_enable(codec, 0); 1927 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 1928 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1929 twl4030_codec_enable(codec, 1); 1930 } else { 1931 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 1932 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 1933 } 1934 } 1935 1936 /* Store the important parameters for the DAI configuration and set 1937 * the DAI as configured */ 1938 twl4030->configured = 1; 1939 twl4030->rate = params_rate(params); 1940 twl4030->sample_bits = hw_param_interval(params, 1941 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min; 1942 twl4030->channels = params_channels(params); 1943 1944 /* If both playback and capture streams are open, and one of them 1945 * is setting the hw parameters right now (since we are here), set 1946 * constraints to the other stream to match the current one. */ 1947 if (twl4030->slave_substream) 1948 twl4030_constraints(twl4030, substream); 1949 1950 return 0; 1951 } 1952 1953 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, 1954 int clk_id, unsigned int freq, int dir) 1955 { 1956 struct snd_soc_codec *codec = codec_dai->codec; 1957 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1958 1959 switch (freq) { 1960 case 19200000: 1961 case 26000000: 1962 case 38400000: 1963 break; 1964 default: 1965 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq); 1966 return -EINVAL; 1967 } 1968 1969 if ((freq / 1000) != twl4030->sysclk) { 1970 dev_err(codec->dev, 1971 "Mismatch in HFCLKIN: %u (configured: %u)\n", 1972 freq, twl4030->sysclk * 1000); 1973 return -EINVAL; 1974 } 1975 1976 return 0; 1977 } 1978 1979 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, 1980 unsigned int fmt) 1981 { 1982 struct snd_soc_codec *codec = codec_dai->codec; 1983 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 1984 u8 old_format, format; 1985 1986 /* get format */ 1987 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); 1988 format = old_format; 1989 1990 /* set master/slave audio interface */ 1991 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1992 case SND_SOC_DAIFMT_CBM_CFM: 1993 format &= ~(TWL4030_AIF_SLAVE_EN); 1994 format &= ~(TWL4030_CLK256FS_EN); 1995 break; 1996 case SND_SOC_DAIFMT_CBS_CFS: 1997 format |= TWL4030_AIF_SLAVE_EN; 1998 format |= TWL4030_CLK256FS_EN; 1999 break; 2000 default: 2001 return -EINVAL; 2002 } 2003 2004 /* interface format */ 2005 format &= ~TWL4030_AIF_FORMAT; 2006 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 2007 case SND_SOC_DAIFMT_I2S: 2008 format |= TWL4030_AIF_FORMAT_CODEC; 2009 break; 2010 case SND_SOC_DAIFMT_DSP_A: 2011 format |= TWL4030_AIF_FORMAT_TDM; 2012 break; 2013 default: 2014 return -EINVAL; 2015 } 2016 2017 if (format != old_format) { 2018 if (twl4030->codec_powered) { 2019 /* 2020 * If the codec is powered, than we need to toggle the 2021 * codec power. 2022 */ 2023 twl4030_codec_enable(codec, 0); 2024 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 2025 twl4030_codec_enable(codec, 1); 2026 } else { 2027 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format); 2028 } 2029 } 2030 2031 return 0; 2032 } 2033 2034 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate) 2035 { 2036 struct snd_soc_codec *codec = dai->codec; 2037 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF); 2038 2039 if (tristate) 2040 reg |= TWL4030_AIF_TRI_EN; 2041 else 2042 reg &= ~TWL4030_AIF_TRI_EN; 2043 2044 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg); 2045 } 2046 2047 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R 2048 * (VTXL, VTXR) for uplink has to be enabled/disabled. */ 2049 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction, 2050 int enable) 2051 { 2052 u8 reg, mask; 2053 2054 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION); 2055 2056 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 2057 mask = TWL4030_ARXL1_VRX_EN; 2058 else 2059 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN; 2060 2061 if (enable) 2062 reg |= mask; 2063 else 2064 reg &= ~mask; 2065 2066 twl4030_write(codec, TWL4030_REG_OPTION, reg); 2067 } 2068 2069 static int twl4030_voice_startup(struct snd_pcm_substream *substream, 2070 struct snd_soc_dai *dai) 2071 { 2072 struct snd_soc_codec *codec = dai->codec; 2073 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2074 u8 mode; 2075 2076 /* If the system master clock is not 26MHz, the voice PCM interface is 2077 * not available. 2078 */ 2079 if (twl4030->sysclk != 26000) { 2080 dev_err(codec->dev, 2081 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n", 2082 __func__, twl4030->sysclk); 2083 return -EINVAL; 2084 } 2085 2086 /* If the codec mode is not option2, the voice PCM interface is not 2087 * available. 2088 */ 2089 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) 2090 & TWL4030_OPT_MODE; 2091 2092 if (mode != TWL4030_OPTION_2) { 2093 dev_err(codec->dev, "%s: the codec mode is not option2\n", 2094 __func__); 2095 return -EINVAL; 2096 } 2097 2098 return 0; 2099 } 2100 2101 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, 2102 struct snd_soc_dai *dai) 2103 { 2104 struct snd_soc_codec *codec = dai->codec; 2105 2106 /* Enable voice digital filters */ 2107 twl4030_voice_enable(codec, substream->stream, 0); 2108 } 2109 2110 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, 2111 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 2112 { 2113 struct snd_soc_codec *codec = dai->codec; 2114 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2115 u8 old_mode, mode; 2116 2117 /* Enable voice digital filters */ 2118 twl4030_voice_enable(codec, substream->stream, 1); 2119 2120 /* bit rate */ 2121 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) 2122 & ~(TWL4030_CODECPDZ); 2123 mode = old_mode; 2124 2125 switch (params_rate(params)) { 2126 case 8000: 2127 mode &= ~(TWL4030_SEL_16K); 2128 break; 2129 case 16000: 2130 mode |= TWL4030_SEL_16K; 2131 break; 2132 default: 2133 dev_err(codec->dev, "%s: unknown rate %d\n", __func__, 2134 params_rate(params)); 2135 return -EINVAL; 2136 } 2137 2138 if (mode != old_mode) { 2139 if (twl4030->codec_powered) { 2140 /* 2141 * If the codec is powered, than we need to toggle the 2142 * codec power. 2143 */ 2144 twl4030_codec_enable(codec, 0); 2145 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 2146 twl4030_codec_enable(codec, 1); 2147 } else { 2148 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode); 2149 } 2150 } 2151 2152 return 0; 2153 } 2154 2155 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai, 2156 int clk_id, unsigned int freq, int dir) 2157 { 2158 struct snd_soc_codec *codec = codec_dai->codec; 2159 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2160 2161 if (freq != 26000000) { 2162 dev_err(codec->dev, 2163 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n", 2164 __func__, freq / 1000); 2165 return -EINVAL; 2166 } 2167 if ((freq / 1000) != twl4030->sysclk) { 2168 dev_err(codec->dev, 2169 "Mismatch in HFCLKIN: %u (configured: %u)\n", 2170 freq, twl4030->sysclk * 1000); 2171 return -EINVAL; 2172 } 2173 return 0; 2174 } 2175 2176 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, 2177 unsigned int fmt) 2178 { 2179 struct snd_soc_codec *codec = codec_dai->codec; 2180 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2181 u8 old_format, format; 2182 2183 /* get format */ 2184 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF); 2185 format = old_format; 2186 2187 /* set master/slave audio interface */ 2188 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2189 case SND_SOC_DAIFMT_CBM_CFM: 2190 format &= ~(TWL4030_VIF_SLAVE_EN); 2191 break; 2192 case SND_SOC_DAIFMT_CBS_CFS: 2193 format |= TWL4030_VIF_SLAVE_EN; 2194 break; 2195 default: 2196 return -EINVAL; 2197 } 2198 2199 /* clock inversion */ 2200 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2201 case SND_SOC_DAIFMT_IB_NF: 2202 format &= ~(TWL4030_VIF_FORMAT); 2203 break; 2204 case SND_SOC_DAIFMT_NB_IF: 2205 format |= TWL4030_VIF_FORMAT; 2206 break; 2207 default: 2208 return -EINVAL; 2209 } 2210 2211 if (format != old_format) { 2212 if (twl4030->codec_powered) { 2213 /* 2214 * If the codec is powered, than we need to toggle the 2215 * codec power. 2216 */ 2217 twl4030_codec_enable(codec, 0); 2218 twl4030_write(codec, TWL4030_REG_VOICE_IF, format); 2219 twl4030_codec_enable(codec, 1); 2220 } else { 2221 twl4030_write(codec, TWL4030_REG_VOICE_IF, format); 2222 } 2223 } 2224 2225 return 0; 2226 } 2227 2228 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate) 2229 { 2230 struct snd_soc_codec *codec = dai->codec; 2231 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF); 2232 2233 if (tristate) 2234 reg |= TWL4030_VIF_TRI_EN; 2235 else 2236 reg &= ~TWL4030_VIF_TRI_EN; 2237 2238 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg); 2239 } 2240 2241 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000) 2242 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 2243 2244 static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = { 2245 .startup = twl4030_startup, 2246 .shutdown = twl4030_shutdown, 2247 .hw_params = twl4030_hw_params, 2248 .set_sysclk = twl4030_set_dai_sysclk, 2249 .set_fmt = twl4030_set_dai_fmt, 2250 .set_tristate = twl4030_set_tristate, 2251 }; 2252 2253 static const struct snd_soc_dai_ops twl4030_dai_voice_ops = { 2254 .startup = twl4030_voice_startup, 2255 .shutdown = twl4030_voice_shutdown, 2256 .hw_params = twl4030_voice_hw_params, 2257 .set_sysclk = twl4030_voice_set_dai_sysclk, 2258 .set_fmt = twl4030_voice_set_dai_fmt, 2259 .set_tristate = twl4030_voice_set_tristate, 2260 }; 2261 2262 static struct snd_soc_dai_driver twl4030_dai[] = { 2263 { 2264 .name = "twl4030-hifi", 2265 .playback = { 2266 .stream_name = "HiFi Playback", 2267 .channels_min = 2, 2268 .channels_max = 4, 2269 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000, 2270 .formats = TWL4030_FORMATS, 2271 .sig_bits = 24,}, 2272 .capture = { 2273 .stream_name = "HiFi Capture", 2274 .channels_min = 2, 2275 .channels_max = 4, 2276 .rates = TWL4030_RATES, 2277 .formats = TWL4030_FORMATS, 2278 .sig_bits = 24,}, 2279 .ops = &twl4030_dai_hifi_ops, 2280 }, 2281 { 2282 .name = "twl4030-voice", 2283 .playback = { 2284 .stream_name = "Voice Playback", 2285 .channels_min = 1, 2286 .channels_max = 1, 2287 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, 2288 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 2289 .capture = { 2290 .stream_name = "Voice Capture", 2291 .channels_min = 1, 2292 .channels_max = 2, 2293 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, 2294 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 2295 .ops = &twl4030_dai_voice_ops, 2296 }, 2297 }; 2298 2299 static int twl4030_soc_probe(struct snd_soc_codec *codec) 2300 { 2301 struct twl4030_priv *twl4030; 2302 2303 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv), 2304 GFP_KERNEL); 2305 if (twl4030 == NULL) { 2306 dev_err(codec->dev, "Can not allocate memory\n"); 2307 return -ENOMEM; 2308 } 2309 snd_soc_codec_set_drvdata(codec, twl4030); 2310 /* Set the defaults, and power up the codec */ 2311 twl4030->sysclk = twl4030_audio_get_mclk() / 1000; 2312 2313 twl4030_init_chip(codec); 2314 2315 return 0; 2316 } 2317 2318 static int twl4030_soc_remove(struct snd_soc_codec *codec) 2319 { 2320 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); 2321 struct twl4030_codec_data *pdata = twl4030->pdata; 2322 2323 /* Reset registers to their chip default before leaving */ 2324 twl4030_reset_registers(codec); 2325 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF); 2326 2327 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio)) 2328 gpio_free(pdata->hs_extmute_gpio); 2329 2330 return 0; 2331 } 2332 2333 static struct snd_soc_codec_driver soc_codec_dev_twl4030 = { 2334 .probe = twl4030_soc_probe, 2335 .remove = twl4030_soc_remove, 2336 .read = twl4030_read_reg_cache, 2337 .write = twl4030_write, 2338 .set_bias_level = twl4030_set_bias_level, 2339 .idle_bias_off = true, 2340 .reg_cache_size = sizeof(twl4030_reg), 2341 .reg_word_size = sizeof(u8), 2342 .reg_cache_default = twl4030_reg, 2343 2344 .controls = twl4030_snd_controls, 2345 .num_controls = ARRAY_SIZE(twl4030_snd_controls), 2346 .dapm_widgets = twl4030_dapm_widgets, 2347 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets), 2348 .dapm_routes = intercon, 2349 .num_dapm_routes = ARRAY_SIZE(intercon), 2350 }; 2351 2352 static int twl4030_codec_probe(struct platform_device *pdev) 2353 { 2354 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030, 2355 twl4030_dai, ARRAY_SIZE(twl4030_dai)); 2356 } 2357 2358 static int twl4030_codec_remove(struct platform_device *pdev) 2359 { 2360 snd_soc_unregister_codec(&pdev->dev); 2361 return 0; 2362 } 2363 2364 MODULE_ALIAS("platform:twl4030-codec"); 2365 2366 static struct platform_driver twl4030_codec_driver = { 2367 .probe = twl4030_codec_probe, 2368 .remove = twl4030_codec_remove, 2369 .driver = { 2370 .name = "twl4030-codec", 2371 .owner = THIS_MODULE, 2372 }, 2373 }; 2374 2375 module_platform_driver(twl4030_codec_driver); 2376 2377 MODULE_DESCRIPTION("ASoC TWL4030 codec driver"); 2378 MODULE_AUTHOR("Steve Sakoman"); 2379 MODULE_LICENSE("GPL"); 2380