1 /* 2 * Texas Instruments TLV320AIC26 low power audio CODEC 3 * ALSA SoC CODEC driver 4 * 5 * Copyright (C) 2008 Secret Lab Technologies Ltd. 6 */ 7 8 #include <linux/module.h> 9 #include <linux/moduleparam.h> 10 #include <linux/init.h> 11 #include <linux/delay.h> 12 #include <linux/pm.h> 13 #include <linux/device.h> 14 #include <linux/sysfs.h> 15 #include <linux/spi/spi.h> 16 #include <linux/slab.h> 17 #include <sound/core.h> 18 #include <sound/pcm.h> 19 #include <sound/pcm_params.h> 20 #include <sound/soc.h> 21 #include <sound/initval.h> 22 23 #include "tlv320aic26.h" 24 25 MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver"); 26 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); 27 MODULE_LICENSE("GPL"); 28 29 /* AIC26 driver private data */ 30 struct aic26 { 31 struct spi_device *spi; 32 struct snd_soc_codec codec; 33 int master; 34 int datfm; 35 int mclk; 36 37 /* Keyclick parameters */ 38 int keyclick_amplitude; 39 int keyclick_freq; 40 int keyclick_len; 41 }; 42 43 /* --------------------------------------------------------------------- 44 * Register access routines 45 */ 46 static unsigned int aic26_reg_read(struct snd_soc_codec *codec, 47 unsigned int reg) 48 { 49 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 50 u16 *cache = codec->reg_cache; 51 u16 cmd, value; 52 u8 buffer[2]; 53 int rc; 54 55 if (reg >= AIC26_NUM_REGS) { 56 WARN_ON_ONCE(1); 57 return 0; 58 } 59 60 /* Do SPI transfer; first 16bits are command; remaining is 61 * register contents */ 62 cmd = AIC26_READ_COMMAND_WORD(reg); 63 buffer[0] = (cmd >> 8) & 0xff; 64 buffer[1] = cmd & 0xff; 65 rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2); 66 if (rc) { 67 dev_err(&aic26->spi->dev, "AIC26 reg read error\n"); 68 return -EIO; 69 } 70 value = (buffer[0] << 8) | buffer[1]; 71 72 /* Update the cache before returning with the value */ 73 cache[reg] = value; 74 return value; 75 } 76 77 static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec, 78 unsigned int reg) 79 { 80 u16 *cache = codec->reg_cache; 81 82 if (reg >= AIC26_NUM_REGS) { 83 WARN_ON_ONCE(1); 84 return 0; 85 } 86 87 return cache[reg]; 88 } 89 90 static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg, 91 unsigned int value) 92 { 93 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 94 u16 *cache = codec->reg_cache; 95 u16 cmd; 96 u8 buffer[4]; 97 int rc; 98 99 if (reg >= AIC26_NUM_REGS) { 100 WARN_ON_ONCE(1); 101 return -EINVAL; 102 } 103 104 /* Do SPI transfer; first 16bits are command; remaining is data 105 * to write into register */ 106 cmd = AIC26_WRITE_COMMAND_WORD(reg); 107 buffer[0] = (cmd >> 8) & 0xff; 108 buffer[1] = cmd & 0xff; 109 buffer[2] = value >> 8; 110 buffer[3] = value; 111 rc = spi_write(aic26->spi, buffer, 4); 112 if (rc) { 113 dev_err(&aic26->spi->dev, "AIC26 reg read error\n"); 114 return -EIO; 115 } 116 117 /* update cache before returning */ 118 cache[reg] = value; 119 return 0; 120 } 121 122 /* --------------------------------------------------------------------- 123 * Digital Audio Interface Operations 124 */ 125 static int aic26_hw_params(struct snd_pcm_substream *substream, 126 struct snd_pcm_hw_params *params, 127 struct snd_soc_dai *dai) 128 { 129 struct snd_soc_pcm_runtime *rtd = substream->private_data; 130 struct snd_soc_codec *codec = rtd->codec; 131 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 132 int fsref, divisor, wlen, pval, jval, dval, qval; 133 u16 reg; 134 135 dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n", 136 substream, params); 137 dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params), 138 params_format(params)); 139 140 switch (params_rate(params)) { 141 case 8000: fsref = 48000; divisor = AIC26_DIV_6; break; 142 case 11025: fsref = 44100; divisor = AIC26_DIV_4; break; 143 case 12000: fsref = 48000; divisor = AIC26_DIV_4; break; 144 case 16000: fsref = 48000; divisor = AIC26_DIV_3; break; 145 case 22050: fsref = 44100; divisor = AIC26_DIV_2; break; 146 case 24000: fsref = 48000; divisor = AIC26_DIV_2; break; 147 case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break; 148 case 44100: fsref = 44100; divisor = AIC26_DIV_1; break; 149 case 48000: fsref = 48000; divisor = AIC26_DIV_1; break; 150 default: 151 dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL; 152 } 153 154 /* select data word length */ 155 switch (params_format(params)) { 156 case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break; 157 case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break; 158 case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break; 159 case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break; 160 default: 161 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; 162 } 163 164 /* Configure PLL */ 165 pval = 1; 166 jval = (fsref == 44100) ? 7 : 8; 167 dval = (fsref == 44100) ? 5264 : 1920; 168 qval = 0; 169 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2; 170 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg); 171 reg = dval << 2; 172 aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg); 173 174 /* Audio Control 3 (master mode, fsref rate) */ 175 reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3); 176 reg &= ~0xf800; 177 if (aic26->master) 178 reg |= 0x0800; 179 if (fsref == 48000) 180 reg |= 0x2000; 181 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg); 182 183 /* Audio Control 1 (FSref divisor) */ 184 reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1); 185 reg &= ~0x0fff; 186 reg |= wlen | aic26->datfm | (divisor << 3) | divisor; 187 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg); 188 189 return 0; 190 } 191 192 /** 193 * aic26_mute - Mute control to reduce noise when changing audio format 194 */ 195 static int aic26_mute(struct snd_soc_dai *dai, int mute) 196 { 197 struct snd_soc_codec *codec = dai->codec; 198 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 199 u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN); 200 201 dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n", 202 dai, mute); 203 204 if (mute) 205 reg |= 0x8080; 206 else 207 reg &= ~0x8080; 208 aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg); 209 210 return 0; 211 } 212 213 static int aic26_set_sysclk(struct snd_soc_dai *codec_dai, 214 int clk_id, unsigned int freq, int dir) 215 { 216 struct snd_soc_codec *codec = codec_dai->codec; 217 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 218 219 dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i," 220 " freq=%i, dir=%i)\n", 221 codec_dai, clk_id, freq, dir); 222 223 /* MCLK needs to fall between 2MHz and 50 MHz */ 224 if ((freq < 2000000) || (freq > 50000000)) 225 return -EINVAL; 226 227 aic26->mclk = freq; 228 return 0; 229 } 230 231 static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 232 { 233 struct snd_soc_codec *codec = codec_dai->codec; 234 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 235 236 dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n", 237 codec_dai, fmt); 238 239 /* set master/slave audio interface */ 240 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 241 case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break; 242 case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break; 243 default: 244 dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL; 245 } 246 247 /* interface format */ 248 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 249 case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break; 250 case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break; 251 case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break; 252 case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break; 253 default: 254 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; 255 } 256 257 return 0; 258 } 259 260 /* --------------------------------------------------------------------- 261 * Digital Audio Interface Definition 262 */ 263 #define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 264 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ 265 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ 266 SNDRV_PCM_RATE_48000) 267 #define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\ 268 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE) 269 270 static struct snd_soc_dai_ops aic26_dai_ops = { 271 .hw_params = aic26_hw_params, 272 .digital_mute = aic26_mute, 273 .set_sysclk = aic26_set_sysclk, 274 .set_fmt = aic26_set_fmt, 275 }; 276 277 static struct snd_soc_dai_driver aic26_dai = { 278 .name = "tlv320aic26-hifi", 279 .playback = { 280 .stream_name = "Playback", 281 .channels_min = 2, 282 .channels_max = 2, 283 .rates = AIC26_RATES, 284 .formats = AIC26_FORMATS, 285 }, 286 .capture = { 287 .stream_name = "Capture", 288 .channels_min = 2, 289 .channels_max = 2, 290 .rates = AIC26_RATES, 291 .formats = AIC26_FORMATS, 292 }, 293 .ops = &aic26_dai_ops, 294 }; 295 296 /* --------------------------------------------------------------------- 297 * ALSA controls 298 */ 299 static const char *aic26_capture_src_text[] = {"Mic", "Aux"}; 300 static const struct soc_enum aic26_capture_src_enum = 301 SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text); 302 303 static const struct snd_kcontrol_new aic26_snd_controls[] = { 304 /* Output */ 305 SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1), 306 SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1), 307 SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0), 308 SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1), 309 SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0), 310 SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0), 311 SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0), 312 SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0), 313 SOC_ENUM("Capture Source", aic26_capture_src_enum), 314 }; 315 316 /* --------------------------------------------------------------------- 317 * SPI device portion of driver: sysfs files for debugging 318 */ 319 320 static ssize_t aic26_keyclick_show(struct device *dev, 321 struct device_attribute *attr, char *buf) 322 { 323 struct aic26 *aic26 = dev_get_drvdata(dev); 324 int val, amp, freq, len; 325 326 val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2); 327 amp = (val >> 12) & 0x7; 328 freq = (125 << ((val >> 8) & 0x7)) >> 1; 329 len = 2 * (1 + ((val >> 4) & 0xf)); 330 331 return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len); 332 } 333 334 /* Any write to the keyclick attribute will trigger the keyclick event */ 335 static ssize_t aic26_keyclick_set(struct device *dev, 336 struct device_attribute *attr, 337 const char *buf, size_t count) 338 { 339 struct aic26 *aic26 = dev_get_drvdata(dev); 340 int val; 341 342 val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2); 343 val |= 0x8000; 344 aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val); 345 346 return count; 347 } 348 349 static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set); 350 351 /* --------------------------------------------------------------------- 352 * SoC CODEC portion of driver: probe and release routines 353 */ 354 static int aic26_probe(struct snd_soc_codec *codec) 355 { 356 int ret, err, i, reg; 357 358 dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n"); 359 360 /* Reset the codec to power on defaults */ 361 aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00); 362 363 /* Power up CODEC */ 364 aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0); 365 366 /* Audio Control 3 (master mode, fsref rate) */ 367 reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3); 368 reg &= ~0xf800; 369 reg |= 0x0800; /* set master mode */ 370 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg); 371 372 /* Fill register cache */ 373 for (i = 0; i < codec->driver->reg_cache_size; i++) 374 aic26_reg_read(codec, i); 375 376 /* Register the sysfs files for debugging */ 377 /* Create SysFS files */ 378 ret = device_create_file(codec->dev, &dev_attr_keyclick); 379 if (ret) 380 dev_info(codec->dev, "error creating sysfs files\n"); 381 382 /* register controls */ 383 dev_dbg(codec->dev, "Registering controls\n"); 384 err = snd_soc_add_controls(codec, aic26_snd_controls, 385 ARRAY_SIZE(aic26_snd_controls)); 386 WARN_ON(err < 0); 387 388 return 0; 389 } 390 391 static struct snd_soc_codec_driver aic26_soc_codec_dev = { 392 .probe = aic26_probe, 393 .read = aic26_reg_read, 394 .write = aic26_reg_write, 395 .reg_cache_size = AIC26_NUM_REGS, 396 .reg_word_size = sizeof(u16), 397 }; 398 399 /* --------------------------------------------------------------------- 400 * SPI device portion of driver: probe and release routines and SPI 401 * driver registration. 402 */ 403 static int aic26_spi_probe(struct spi_device *spi) 404 { 405 struct aic26 *aic26; 406 int ret; 407 408 dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n"); 409 410 /* Allocate driver data */ 411 aic26 = kzalloc(sizeof *aic26, GFP_KERNEL); 412 if (!aic26) 413 return -ENOMEM; 414 415 /* Initialize the driver data */ 416 aic26->spi = spi; 417 dev_set_drvdata(&spi->dev, aic26); 418 aic26->master = 1; 419 420 ret = snd_soc_register_codec(&spi->dev, 421 &aic26_soc_codec_dev, &aic26_dai, 1); 422 if (ret < 0) 423 kfree(aic26); 424 return ret; 425 426 dev_dbg(&spi->dev, "SPI device initialized\n"); 427 return 0; 428 } 429 430 static int aic26_spi_remove(struct spi_device *spi) 431 { 432 snd_soc_unregister_codec(&spi->dev); 433 kfree(spi_get_drvdata(spi)); 434 return 0; 435 } 436 437 static struct spi_driver aic26_spi = { 438 .driver = { 439 .name = "tlv320aic26-codec", 440 .owner = THIS_MODULE, 441 }, 442 .probe = aic26_spi_probe, 443 .remove = aic26_spi_remove, 444 }; 445 446 static int __init aic26_init(void) 447 { 448 return spi_register_driver(&aic26_spi); 449 } 450 module_init(aic26_init); 451 452 static void __exit aic26_exit(void) 453 { 454 spi_unregister_driver(&aic26_spi); 455 } 456 module_exit(aic26_exit); 457