1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Driver for the TAS5805M Audio Amplifier 4 // 5 // Author: Andy Liu <andy-liu@ti.com> 6 // Author: Daniel Beer <daniel.beer@igorinstitute.com> 7 // 8 // This is based on a driver originally written by Andy Liu at TI and 9 // posted here: 10 // 11 // https://e2e.ti.com/support/audio-group/audio/f/audio-forum/722027/linux-tas5825m-linux-drivers 12 // 13 // It has been simplified a little and reworked for the 5.x ALSA SoC API. 14 15 #include <linux/module.h> 16 #include <linux/moduleparam.h> 17 #include <linux/kernel.h> 18 #include <linux/firmware.h> 19 #include <linux/slab.h> 20 #include <linux/of.h> 21 #include <linux/init.h> 22 #include <linux/i2c.h> 23 #include <linux/regmap.h> 24 #include <linux/gpio/consumer.h> 25 #include <linux/regulator/consumer.h> 26 #include <linux/atomic.h> 27 #include <linux/workqueue.h> 28 29 #include <sound/soc.h> 30 #include <sound/pcm.h> 31 #include <sound/initval.h> 32 33 /* Datasheet-defined registers on page 0, book 0 */ 34 #define REG_PAGE 0x00 35 #define REG_DEVICE_CTRL_1 0x02 36 #define REG_DEVICE_CTRL_2 0x03 37 #define REG_SIG_CH_CTRL 0x28 38 #define REG_SAP_CTRL_1 0x33 39 #define REG_FS_MON 0x37 40 #define REG_BCK_MON 0x38 41 #define REG_CLKDET_STATUS 0x39 42 #define REG_VOL_CTL 0x4c 43 #define REG_AGAIN 0x54 44 #define REG_ADR_PIN_CTRL 0x60 45 #define REG_ADR_PIN_CONFIG 0x61 46 #define REG_CHAN_FAULT 0x70 47 #define REG_GLOBAL_FAULT1 0x71 48 #define REG_GLOBAL_FAULT2 0x72 49 #define REG_FAULT 0x78 50 #define REG_BOOK 0x7f 51 52 /* DEVICE_CTRL_2 register values */ 53 #define DCTRL2_MODE_DEEP_SLEEP 0x00 54 #define DCTRL2_MODE_SLEEP 0x01 55 #define DCTRL2_MODE_HIZ 0x02 56 #define DCTRL2_MODE_PLAY 0x03 57 58 #define DCTRL2_MUTE 0x08 59 #define DCTRL2_DIS_DSP 0x10 60 61 /* This sequence of register writes must always be sent, prior to the 62 * 5ms delay while we wait for the DSP to boot. 63 */ 64 static const uint8_t dsp_cfg_preboot[] = { 65 0x00, 0x00, 0x7f, 0x00, 0x03, 0x02, 0x01, 0x11, 66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 67 0x00, 0x00, 0x7f, 0x00, 0x03, 0x02, 68 }; 69 70 static const uint32_t tas5805m_volume[] = { 71 0x0000001B, /* 0, -110dB */ 0x0000001E, /* 1, -109dB */ 72 0x00000021, /* 2, -108dB */ 0x00000025, /* 3, -107dB */ 73 0x0000002A, /* 4, -106dB */ 0x0000002F, /* 5, -105dB */ 74 0x00000035, /* 6, -104dB */ 0x0000003B, /* 7, -103dB */ 75 0x00000043, /* 8, -102dB */ 0x0000004B, /* 9, -101dB */ 76 0x00000054, /* 10, -100dB */ 0x0000005E, /* 11, -99dB */ 77 0x0000006A, /* 12, -98dB */ 0x00000076, /* 13, -97dB */ 78 0x00000085, /* 14, -96dB */ 0x00000095, /* 15, -95dB */ 79 0x000000A7, /* 16, -94dB */ 0x000000BC, /* 17, -93dB */ 80 0x000000D3, /* 18, -92dB */ 0x000000EC, /* 19, -91dB */ 81 0x00000109, /* 20, -90dB */ 0x0000012A, /* 21, -89dB */ 82 0x0000014E, /* 22, -88dB */ 0x00000177, /* 23, -87dB */ 83 0x000001A4, /* 24, -86dB */ 0x000001D8, /* 25, -85dB */ 84 0x00000211, /* 26, -84dB */ 0x00000252, /* 27, -83dB */ 85 0x0000029A, /* 28, -82dB */ 0x000002EC, /* 29, -81dB */ 86 0x00000347, /* 30, -80dB */ 0x000003AD, /* 31, -79dB */ 87 0x00000420, /* 32, -78dB */ 0x000004A1, /* 33, -77dB */ 88 0x00000532, /* 34, -76dB */ 0x000005D4, /* 35, -75dB */ 89 0x0000068A, /* 36, -74dB */ 0x00000756, /* 37, -73dB */ 90 0x0000083B, /* 38, -72dB */ 0x0000093C, /* 39, -71dB */ 91 0x00000A5D, /* 40, -70dB */ 0x00000BA0, /* 41, -69dB */ 92 0x00000D0C, /* 42, -68dB */ 0x00000EA3, /* 43, -67dB */ 93 0x0000106C, /* 44, -66dB */ 0x0000126D, /* 45, -65dB */ 94 0x000014AD, /* 46, -64dB */ 0x00001733, /* 47, -63dB */ 95 0x00001A07, /* 48, -62dB */ 0x00001D34, /* 49, -61dB */ 96 0x000020C5, /* 50, -60dB */ 0x000024C4, /* 51, -59dB */ 97 0x00002941, /* 52, -58dB */ 0x00002E49, /* 53, -57dB */ 98 0x000033EF, /* 54, -56dB */ 0x00003A45, /* 55, -55dB */ 99 0x00004161, /* 56, -54dB */ 0x0000495C, /* 57, -53dB */ 100 0x0000524F, /* 58, -52dB */ 0x00005C5A, /* 59, -51dB */ 101 0x0000679F, /* 60, -50dB */ 0x00007444, /* 61, -49dB */ 102 0x00008274, /* 62, -48dB */ 0x0000925F, /* 63, -47dB */ 103 0x0000A43B, /* 64, -46dB */ 0x0000B845, /* 65, -45dB */ 104 0x0000CEC1, /* 66, -44dB */ 0x0000E7FB, /* 67, -43dB */ 105 0x00010449, /* 68, -42dB */ 0x0001240C, /* 69, -41dB */ 106 0x000147AE, /* 70, -40dB */ 0x00016FAA, /* 71, -39dB */ 107 0x00019C86, /* 72, -38dB */ 0x0001CEDC, /* 73, -37dB */ 108 0x00020756, /* 74, -36dB */ 0x000246B5, /* 75, -35dB */ 109 0x00028DCF, /* 76, -34dB */ 0x0002DD96, /* 77, -33dB */ 110 0x00033718, /* 78, -32dB */ 0x00039B87, /* 79, -31dB */ 111 0x00040C37, /* 80, -30dB */ 0x00048AA7, /* 81, -29dB */ 112 0x00051884, /* 82, -28dB */ 0x0005B7B1, /* 83, -27dB */ 113 0x00066A4A, /* 84, -26dB */ 0x000732AE, /* 85, -25dB */ 114 0x00081385, /* 86, -24dB */ 0x00090FCC, /* 87, -23dB */ 115 0x000A2ADB, /* 88, -22dB */ 0x000B6873, /* 89, -21dB */ 116 0x000CCCCD, /* 90, -20dB */ 0x000E5CA1, /* 91, -19dB */ 117 0x00101D3F, /* 92, -18dB */ 0x0012149A, /* 93, -17dB */ 118 0x00144961, /* 94, -16dB */ 0x0016C311, /* 95, -15dB */ 119 0x00198A13, /* 96, -14dB */ 0x001CA7D7, /* 97, -13dB */ 120 0x002026F3, /* 98, -12dB */ 0x00241347, /* 99, -11dB */ 121 0x00287A27, /* 100, -10dB */ 0x002D6A86, /* 101, -9dB */ 122 0x0032F52D, /* 102, -8dB */ 0x00392CEE, /* 103, -7dB */ 123 0x004026E7, /* 104, -6dB */ 0x0047FACD, /* 105, -5dB */ 124 0x0050C336, /* 106, -4dB */ 0x005A9DF8, /* 107, -3dB */ 125 0x0065AC8C, /* 108, -2dB */ 0x00721483, /* 109, -1dB */ 126 0x00800000, /* 110, 0dB */ 0x008F9E4D, /* 111, 1dB */ 127 0x00A12478, /* 112, 2dB */ 0x00B4CE08, /* 113, 3dB */ 128 0x00CADDC8, /* 114, 4dB */ 0x00E39EA9, /* 115, 5dB */ 129 0x00FF64C1, /* 116, 6dB */ 0x011E8E6A, /* 117, 7dB */ 130 0x0141857F, /* 118, 8dB */ 0x0168C0C6, /* 119, 9dB */ 131 0x0194C584, /* 120, 10dB */ 0x01C62940, /* 121, 11dB */ 132 0x01FD93C2, /* 122, 12dB */ 0x023BC148, /* 123, 13dB */ 133 0x02818508, /* 124, 14dB */ 0x02CFCC01, /* 125, 15dB */ 134 0x0327A01A, /* 126, 16dB */ 0x038A2BAD, /* 127, 17dB */ 135 0x03F8BD7A, /* 128, 18dB */ 0x0474CD1B, /* 129, 19dB */ 136 0x05000000, /* 130, 20dB */ 0x059C2F02, /* 131, 21dB */ 137 0x064B6CAE, /* 132, 22dB */ 0x07100C4D, /* 133, 23dB */ 138 0x07ECA9CD, /* 134, 24dB */ 0x08E43299, /* 135, 25dB */ 139 0x09F9EF8E, /* 136, 26dB */ 0x0B319025, /* 137, 27dB */ 140 0x0C8F36F2, /* 138, 28dB */ 0x0E1787B8, /* 139, 29dB */ 141 0x0FCFB725, /* 140, 30dB */ 0x11BD9C84, /* 141, 31dB */ 142 0x13E7C594, /* 142, 32dB */ 0x16558CCB, /* 143, 33dB */ 143 0x190F3254, /* 144, 34dB */ 0x1C1DF80E, /* 145, 35dB */ 144 0x1F8C4107, /* 146, 36dB */ 0x2365B4BF, /* 147, 37dB */ 145 0x27B766C2, /* 148, 38dB */ 0x2C900313, /* 149, 39dB */ 146 0x32000000, /* 150, 40dB */ 0x3819D612, /* 151, 41dB */ 147 0x3EF23ECA, /* 152, 42dB */ 0x46A07B07, /* 153, 43dB */ 148 0x4F3EA203, /* 154, 44dB */ 0x58E9F9F9, /* 155, 45dB */ 149 0x63C35B8E, /* 156, 46dB */ 0x6FEFA16D, /* 157, 47dB */ 150 0x7D982575, /* 158, 48dB */ 151 }; 152 153 #define TAS5805M_VOLUME_MAX ((int)ARRAY_SIZE(tas5805m_volume) - 1) 154 #define TAS5805M_VOLUME_MIN 0 155 156 struct tas5805m_priv { 157 struct regulator *pvdd; 158 struct gpio_desc *gpio_pdn_n; 159 160 uint8_t *dsp_cfg_data; 161 int dsp_cfg_len; 162 163 struct regmap *regmap; 164 165 int vol[2]; 166 bool is_powered; 167 bool is_muted; 168 }; 169 170 static void set_dsp_scale(struct regmap *rm, int offset, int vol) 171 { 172 uint8_t v[4]; 173 uint32_t x = tas5805m_volume[vol]; 174 int i; 175 176 for (i = 0; i < 4; i++) { 177 v[3 - i] = x; 178 x >>= 8; 179 } 180 181 regmap_bulk_write(rm, offset, v, ARRAY_SIZE(v)); 182 } 183 184 static void tas5805m_refresh(struct snd_soc_component *component) 185 { 186 struct tas5805m_priv *tas5805m = 187 snd_soc_component_get_drvdata(component); 188 struct regmap *rm = tas5805m->regmap; 189 190 dev_dbg(component->dev, "refresh: is_muted=%d, vol=%d/%d\n", 191 tas5805m->is_muted, tas5805m->vol[0], tas5805m->vol[1]); 192 193 regmap_write(rm, REG_PAGE, 0x00); 194 regmap_write(rm, REG_BOOK, 0x8c); 195 regmap_write(rm, REG_PAGE, 0x2a); 196 197 /* Refresh volume. The actual volume control documented in the 198 * datasheet doesn't seem to work correctly. This is a pair of 199 * DSP registers which are *not* documented in the datasheet. 200 */ 201 set_dsp_scale(rm, 0x24, tas5805m->vol[0]); 202 set_dsp_scale(rm, 0x28, tas5805m->vol[1]); 203 204 /* Set/clear digital soft-mute */ 205 regmap_write(rm, REG_DEVICE_CTRL_2, 206 (tas5805m->is_muted ? DCTRL2_MUTE : 0) | 207 DCTRL2_MODE_PLAY); 208 } 209 210 static int tas5805m_vol_info(struct snd_kcontrol *kcontrol, 211 struct snd_ctl_elem_info *uinfo) 212 { 213 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 214 uinfo->count = 2; 215 216 uinfo->value.integer.min = TAS5805M_VOLUME_MIN; 217 uinfo->value.integer.max = TAS5805M_VOLUME_MAX; 218 return 0; 219 } 220 221 static int tas5805m_vol_get(struct snd_kcontrol *kcontrol, 222 struct snd_ctl_elem_value *ucontrol) 223 { 224 struct snd_soc_component *component = 225 snd_soc_kcontrol_component(kcontrol); 226 struct tas5805m_priv *tas5805m = 227 snd_soc_component_get_drvdata(component); 228 229 ucontrol->value.integer.value[0] = tas5805m->vol[0]; 230 ucontrol->value.integer.value[1] = tas5805m->vol[1]; 231 return 0; 232 } 233 234 static inline int volume_is_valid(int v) 235 { 236 return (v >= TAS5805M_VOLUME_MIN) && (v <= TAS5805M_VOLUME_MAX); 237 } 238 239 static int tas5805m_vol_put(struct snd_kcontrol *kcontrol, 240 struct snd_ctl_elem_value *ucontrol) 241 { 242 struct snd_soc_component *component = 243 snd_soc_kcontrol_component(kcontrol); 244 struct tas5805m_priv *tas5805m = 245 snd_soc_component_get_drvdata(component); 246 247 if (!(volume_is_valid(ucontrol->value.integer.value[0]) && 248 volume_is_valid(ucontrol->value.integer.value[1]))) 249 return -EINVAL; 250 251 if (tas5805m->vol[0] != ucontrol->value.integer.value[0] || 252 tas5805m->vol[1] != ucontrol->value.integer.value[1]) { 253 tas5805m->vol[0] = ucontrol->value.integer.value[0]; 254 tas5805m->vol[1] = ucontrol->value.integer.value[1]; 255 dev_dbg(component->dev, "set vol=%d/%d (is_powered=%d)\n", 256 tas5805m->vol[0], tas5805m->vol[1], 257 tas5805m->is_powered); 258 if (tas5805m->is_powered) 259 tas5805m_refresh(component); 260 return 1; 261 } 262 263 return 0; 264 } 265 266 static const struct snd_kcontrol_new tas5805m_snd_controls[] = { 267 { 268 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 269 .name = "Master Playback Volume", 270 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | 271 SNDRV_CTL_ELEM_ACCESS_READWRITE, 272 .info = tas5805m_vol_info, 273 .get = tas5805m_vol_get, 274 .put = tas5805m_vol_put, 275 }, 276 }; 277 278 static void send_cfg(struct regmap *rm, 279 const uint8_t *s, unsigned int len) 280 { 281 unsigned int i; 282 283 for (i = 0; i + 1 < len; i += 2) 284 regmap_write(rm, s[i], s[i + 1]); 285 } 286 287 /* The TAS5805M DSP can't be configured until the I2S clock has been 288 * present and stable for 5ms, or else it won't boot and we get no 289 * sound. 290 */ 291 static int tas5805m_trigger(struct snd_pcm_substream *substream, int cmd, 292 struct snd_soc_dai *dai) 293 { 294 struct snd_soc_component *component = dai->component; 295 struct tas5805m_priv *tas5805m = 296 snd_soc_component_get_drvdata(component); 297 struct regmap *rm = tas5805m->regmap; 298 unsigned int chan, global1, global2; 299 300 switch (cmd) { 301 case SNDRV_PCM_TRIGGER_START: 302 case SNDRV_PCM_TRIGGER_RESUME: 303 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 304 dev_dbg(component->dev, "DSP startup\n"); 305 306 /* We mustn't issue any I2C transactions until the I2S 307 * clock is stable. Furthermore, we must allow a 5ms 308 * delay after the first set of register writes to 309 * allow the DSP to boot before configuring it. 310 */ 311 usleep_range(5000, 10000); 312 send_cfg(rm, dsp_cfg_preboot, 313 ARRAY_SIZE(dsp_cfg_preboot)); 314 usleep_range(5000, 15000); 315 send_cfg(rm, tas5805m->dsp_cfg_data, 316 tas5805m->dsp_cfg_len); 317 318 tas5805m->is_powered = true; 319 tas5805m_refresh(component); 320 break; 321 322 case SNDRV_PCM_TRIGGER_STOP: 323 case SNDRV_PCM_TRIGGER_SUSPEND: 324 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 325 dev_dbg(component->dev, "DSP shutdown\n"); 326 327 tas5805m->is_powered = false; 328 329 regmap_write(rm, REG_PAGE, 0x00); 330 regmap_write(rm, REG_BOOK, 0x00); 331 332 regmap_read(rm, REG_CHAN_FAULT, &chan); 333 regmap_read(rm, REG_GLOBAL_FAULT1, &global1); 334 regmap_read(rm, REG_GLOBAL_FAULT2, &global2); 335 336 dev_dbg(component->dev, 337 "fault regs: CHAN=%02x, GLOBAL1=%02x, GLOBAL2=%02x\n", 338 chan, global1, global2); 339 340 regmap_write(rm, REG_DEVICE_CTRL_2, DCTRL2_MODE_HIZ); 341 break; 342 343 default: 344 return -EINVAL; 345 } 346 347 return 0; 348 } 349 350 static const struct snd_soc_dapm_route tas5805m_audio_map[] = { 351 { "DAC", NULL, "DAC IN" }, 352 { "OUT", NULL, "DAC" }, 353 }; 354 355 static const struct snd_soc_dapm_widget tas5805m_dapm_widgets[] = { 356 SND_SOC_DAPM_AIF_IN("DAC IN", "Playback", 0, SND_SOC_NOPM, 0, 0), 357 SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0), 358 SND_SOC_DAPM_OUTPUT("OUT") 359 }; 360 361 static const struct snd_soc_component_driver soc_codec_dev_tas5805m = { 362 .controls = tas5805m_snd_controls, 363 .num_controls = ARRAY_SIZE(tas5805m_snd_controls), 364 .dapm_widgets = tas5805m_dapm_widgets, 365 .num_dapm_widgets = ARRAY_SIZE(tas5805m_dapm_widgets), 366 .dapm_routes = tas5805m_audio_map, 367 .num_dapm_routes = ARRAY_SIZE(tas5805m_audio_map), 368 .use_pmdown_time = 1, 369 .endianness = 1, 370 }; 371 372 static int tas5805m_mute(struct snd_soc_dai *dai, int mute, int direction) 373 { 374 struct snd_soc_component *component = dai->component; 375 struct tas5805m_priv *tas5805m = 376 snd_soc_component_get_drvdata(component); 377 378 dev_dbg(component->dev, "set mute=%d (is_powered=%d)\n", 379 mute, tas5805m->is_powered); 380 tas5805m->is_muted = mute; 381 if (tas5805m->is_powered) 382 tas5805m_refresh(component); 383 384 return 0; 385 } 386 387 static const struct snd_soc_dai_ops tas5805m_dai_ops = { 388 .trigger = tas5805m_trigger, 389 .mute_stream = tas5805m_mute, 390 .no_capture_mute = 1, 391 }; 392 393 static struct snd_soc_dai_driver tas5805m_dai = { 394 .name = "tas5805m-amplifier", 395 .playback = { 396 .stream_name = "Playback", 397 .channels_min = 2, 398 .channels_max = 2, 399 .rates = SNDRV_PCM_RATE_48000, 400 .formats = SNDRV_PCM_FMTBIT_S32_LE, 401 }, 402 .ops = &tas5805m_dai_ops, 403 }; 404 405 static const struct regmap_config tas5805m_regmap = { 406 .reg_bits = 8, 407 .val_bits = 8, 408 409 /* We have quite a lot of multi-level bank switching and a 410 * relatively small number of register writes between bank 411 * switches. 412 */ 413 .cache_type = REGCACHE_NONE, 414 }; 415 416 static int tas5805m_i2c_probe(struct i2c_client *i2c) 417 { 418 struct device *dev = &i2c->dev; 419 struct regmap *regmap; 420 struct tas5805m_priv *tas5805m; 421 char filename[128]; 422 const char *config_name; 423 const struct firmware *fw; 424 int ret; 425 426 regmap = devm_regmap_init_i2c(i2c, &tas5805m_regmap); 427 if (IS_ERR(regmap)) { 428 ret = PTR_ERR(regmap); 429 dev_err(dev, "unable to allocate register map: %d\n", ret); 430 return ret; 431 } 432 433 tas5805m = devm_kzalloc(dev, sizeof(struct tas5805m_priv), GFP_KERNEL); 434 if (!tas5805m) 435 return -ENOMEM; 436 437 tas5805m->pvdd = devm_regulator_get(dev, "pvdd"); 438 if (IS_ERR(tas5805m->pvdd)) { 439 dev_err(dev, "failed to get pvdd supply: %ld\n", 440 PTR_ERR(tas5805m->pvdd)); 441 return PTR_ERR(tas5805m->pvdd); 442 } 443 444 dev_set_drvdata(dev, tas5805m); 445 tas5805m->regmap = regmap; 446 tas5805m->gpio_pdn_n = devm_gpiod_get(dev, "pdn", GPIOD_OUT_LOW); 447 if (IS_ERR(tas5805m->gpio_pdn_n)) { 448 dev_err(dev, "error requesting PDN gpio: %ld\n", 449 PTR_ERR(tas5805m->gpio_pdn_n)); 450 return PTR_ERR(tas5805m->gpio_pdn_n); 451 } 452 453 /* This configuration must be generated by PPC3. The file loaded 454 * consists of a sequence of register writes, where bytes at 455 * even indices are register addresses and those at odd indices 456 * are register values. 457 * 458 * The fixed portion of PPC3's output prior to the 5ms delay 459 * should be omitted. 460 */ 461 if (device_property_read_string(dev, "ti,dsp-config-name", 462 &config_name)) 463 config_name = "default"; 464 465 snprintf(filename, sizeof(filename), "tas5805m_dsp_%s.bin", 466 config_name); 467 ret = request_firmware(&fw, filename, dev); 468 if (ret) 469 return ret; 470 471 if ((fw->size < 2) || (fw->size & 1)) { 472 dev_err(dev, "firmware is invalid\n"); 473 release_firmware(fw); 474 return -EINVAL; 475 } 476 477 tas5805m->dsp_cfg_len = fw->size; 478 tas5805m->dsp_cfg_data = devm_kmalloc(dev, fw->size, GFP_KERNEL); 479 if (!tas5805m->dsp_cfg_data) { 480 release_firmware(fw); 481 return -ENOMEM; 482 } 483 memcpy(tas5805m->dsp_cfg_data, fw->data, fw->size); 484 485 release_firmware(fw); 486 487 /* Do the first part of the power-on here, while we can expect 488 * the I2S interface to be quiet. We must raise PDN# and then 489 * wait 5ms before any I2S clock is sent, or else the internal 490 * regulator apparently won't come on. 491 * 492 * Also, we must keep the device in power down for 100ms or so 493 * after PVDD is applied, or else the ADR pin is sampled 494 * incorrectly and the device comes up with an unpredictable I2C 495 * address. 496 */ 497 tas5805m->vol[0] = TAS5805M_VOLUME_MIN; 498 tas5805m->vol[1] = TAS5805M_VOLUME_MIN; 499 500 ret = regulator_enable(tas5805m->pvdd); 501 if (ret < 0) { 502 dev_err(dev, "failed to enable pvdd: %d\n", ret); 503 return ret; 504 } 505 506 usleep_range(100000, 150000); 507 gpiod_set_value(tas5805m->gpio_pdn_n, 1); 508 usleep_range(10000, 15000); 509 510 /* Don't register through devm. We need to be able to unregister 511 * the component prior to deasserting PDN# 512 */ 513 ret = snd_soc_register_component(dev, &soc_codec_dev_tas5805m, 514 &tas5805m_dai, 1); 515 if (ret < 0) { 516 dev_err(dev, "unable to register codec: %d\n", ret); 517 gpiod_set_value(tas5805m->gpio_pdn_n, 0); 518 regulator_disable(tas5805m->pvdd); 519 return ret; 520 } 521 522 return 0; 523 } 524 525 static void tas5805m_i2c_remove(struct i2c_client *i2c) 526 { 527 struct device *dev = &i2c->dev; 528 struct tas5805m_priv *tas5805m = dev_get_drvdata(dev); 529 530 snd_soc_unregister_component(dev); 531 gpiod_set_value(tas5805m->gpio_pdn_n, 0); 532 usleep_range(10000, 15000); 533 regulator_disable(tas5805m->pvdd); 534 } 535 536 static const struct i2c_device_id tas5805m_i2c_id[] = { 537 { "tas5805m", }, 538 { } 539 }; 540 MODULE_DEVICE_TABLE(i2c, tas5805m_i2c_id); 541 542 #if IS_ENABLED(CONFIG_OF) 543 static const struct of_device_id tas5805m_of_match[] = { 544 { .compatible = "ti,tas5805m", }, 545 { } 546 }; 547 MODULE_DEVICE_TABLE(of, tas5805m_of_match); 548 #endif 549 550 static struct i2c_driver tas5805m_i2c_driver = { 551 .probe_new = tas5805m_i2c_probe, 552 .remove = tas5805m_i2c_remove, 553 .id_table = tas5805m_i2c_id, 554 .driver = { 555 .name = "tas5805m", 556 .of_match_table = of_match_ptr(tas5805m_of_match), 557 }, 558 }; 559 560 module_i2c_driver(tas5805m_i2c_driver); 561 562 MODULE_AUTHOR("Andy Liu <andy-liu@ti.com>"); 563 MODULE_AUTHOR("Daniel Beer <daniel.beer@igorinstitute.com>"); 564 MODULE_DESCRIPTION("TAS5805M Audio Amplifier Driver"); 565 MODULE_LICENSE("GPL v2"); 566