1eae9f9ceSRaphael-Xu // SPDX-License-Identifier: GPL-2.0
2eae9f9ceSRaphael-Xu // Driver for the Texas Instruments TAS2780 Mono
3eae9f9ceSRaphael-Xu // Audio amplifier
4eae9f9ceSRaphael-Xu // Copyright (C) 2022 Texas Instruments Inc.
5eae9f9ceSRaphael-Xu
6eae9f9ceSRaphael-Xu #include <linux/module.h>
7eae9f9ceSRaphael-Xu #include <linux/err.h>
8eae9f9ceSRaphael-Xu #include <linux/pm.h>
9eae9f9ceSRaphael-Xu #include <linux/i2c.h>
10eae9f9ceSRaphael-Xu #include <linux/gpio.h>
11eae9f9ceSRaphael-Xu #include <linux/gpio/consumer.h>
12eae9f9ceSRaphael-Xu #include <linux/regmap.h>
13eae9f9ceSRaphael-Xu #include <linux/of.h>
14eae9f9ceSRaphael-Xu #include <linux/of_gpio.h>
15eae9f9ceSRaphael-Xu #include <sound/soc.h>
16eae9f9ceSRaphael-Xu #include <sound/pcm.h>
17eae9f9ceSRaphael-Xu #include <sound/pcm_params.h>
18eae9f9ceSRaphael-Xu #include <sound/tlv.h>
19eae9f9ceSRaphael-Xu
20eae9f9ceSRaphael-Xu #include "tas2780.h"
21eae9f9ceSRaphael-Xu
22eae9f9ceSRaphael-Xu struct tas2780_priv {
23eae9f9ceSRaphael-Xu struct snd_soc_component *component;
24eae9f9ceSRaphael-Xu struct gpio_desc *reset_gpio;
25eae9f9ceSRaphael-Xu struct regmap *regmap;
26eae9f9ceSRaphael-Xu struct device *dev;
27eae9f9ceSRaphael-Xu int v_sense_slot;
28eae9f9ceSRaphael-Xu int i_sense_slot;
29eae9f9ceSRaphael-Xu };
30eae9f9ceSRaphael-Xu
tas2780_reset(struct tas2780_priv * tas2780)31eae9f9ceSRaphael-Xu static void tas2780_reset(struct tas2780_priv *tas2780)
32eae9f9ceSRaphael-Xu {
33eae9f9ceSRaphael-Xu int ret = 0;
34eae9f9ceSRaphael-Xu
35eae9f9ceSRaphael-Xu if (tas2780->reset_gpio) {
36eae9f9ceSRaphael-Xu gpiod_set_value_cansleep(tas2780->reset_gpio, 0);
37eae9f9ceSRaphael-Xu usleep_range(2000, 2050);
38eae9f9ceSRaphael-Xu gpiod_set_value_cansleep(tas2780->reset_gpio, 1);
39eae9f9ceSRaphael-Xu usleep_range(2000, 2050);
40eae9f9ceSRaphael-Xu }
41eae9f9ceSRaphael-Xu
42*4e9a429aSRoy Chateau ret = snd_soc_component_write(tas2780->component, TAS2780_SW_RST,
43eae9f9ceSRaphael-Xu TAS2780_RST);
44eae9f9ceSRaphael-Xu if (ret)
45eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%x Reset error!\n",
46eae9f9ceSRaphael-Xu __func__, ret);
47eae9f9ceSRaphael-Xu }
48eae9f9ceSRaphael-Xu
49eae9f9ceSRaphael-Xu #ifdef CONFIG_PM
tas2780_codec_suspend(struct snd_soc_component * component)50eae9f9ceSRaphael-Xu static int tas2780_codec_suspend(struct snd_soc_component *component)
51eae9f9ceSRaphael-Xu {
52eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780 =
53eae9f9ceSRaphael-Xu snd_soc_component_get_drvdata(component);
54eae9f9ceSRaphael-Xu int ret = 0;
55eae9f9ceSRaphael-Xu
56eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_PWR_CTRL,
57eae9f9ceSRaphael-Xu TAS2780_PWR_CTRL_MASK, TAS2780_PWR_CTRL_SHUTDOWN);
58eae9f9ceSRaphael-Xu if (ret < 0) {
59eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%0x:power down error\n",
60eae9f9ceSRaphael-Xu __func__, ret);
61eae9f9ceSRaphael-Xu goto err;
62eae9f9ceSRaphael-Xu }
63eae9f9ceSRaphael-Xu ret = 0;
64eae9f9ceSRaphael-Xu regcache_cache_only(tas2780->regmap, true);
65eae9f9ceSRaphael-Xu regcache_mark_dirty(tas2780->regmap);
66eae9f9ceSRaphael-Xu err:
67eae9f9ceSRaphael-Xu return ret;
68eae9f9ceSRaphael-Xu }
69eae9f9ceSRaphael-Xu
tas2780_codec_resume(struct snd_soc_component * component)70eae9f9ceSRaphael-Xu static int tas2780_codec_resume(struct snd_soc_component *component)
71eae9f9ceSRaphael-Xu {
72eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780 =
73eae9f9ceSRaphael-Xu snd_soc_component_get_drvdata(component);
74eae9f9ceSRaphael-Xu int ret = 0;
75eae9f9ceSRaphael-Xu
76eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_PWR_CTRL,
77eae9f9ceSRaphael-Xu TAS2780_PWR_CTRL_MASK, TAS2780_PWR_CTRL_ACTIVE);
78eae9f9ceSRaphael-Xu
79eae9f9ceSRaphael-Xu if (ret < 0) {
80eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%0x:power down error\n",
81eae9f9ceSRaphael-Xu __func__, ret);
82eae9f9ceSRaphael-Xu goto err;
83eae9f9ceSRaphael-Xu }
84eae9f9ceSRaphael-Xu ret = 0;
85eae9f9ceSRaphael-Xu regcache_cache_only(tas2780->regmap, false);
86eae9f9ceSRaphael-Xu ret = regcache_sync(tas2780->regmap);
87eae9f9ceSRaphael-Xu err:
88eae9f9ceSRaphael-Xu return ret;
89eae9f9ceSRaphael-Xu }
90eae9f9ceSRaphael-Xu #endif
91eae9f9ceSRaphael-Xu
92eae9f9ceSRaphael-Xu static const char * const tas2780_ASI1_src[] = {
93eae9f9ceSRaphael-Xu "I2C offset", "Left", "Right", "LeftRightDiv2",
94eae9f9ceSRaphael-Xu };
95eae9f9ceSRaphael-Xu
96eae9f9ceSRaphael-Xu static SOC_ENUM_SINGLE_DECL(
97eae9f9ceSRaphael-Xu tas2780_ASI1_src_enum, TAS2780_TDM_CFG2, 4, tas2780_ASI1_src);
98eae9f9ceSRaphael-Xu
99eae9f9ceSRaphael-Xu static const struct snd_kcontrol_new tas2780_asi1_mux =
100eae9f9ceSRaphael-Xu SOC_DAPM_ENUM("ASI1 Source", tas2780_ASI1_src_enum);
101eae9f9ceSRaphael-Xu
102eae9f9ceSRaphael-Xu static const struct snd_kcontrol_new isense_switch =
103eae9f9ceSRaphael-Xu SOC_DAPM_SINGLE("Switch", TAS2780_PWR_CTRL,
104eae9f9ceSRaphael-Xu TAS2780_ISENSE_POWER_EN, 1, 1);
105eae9f9ceSRaphael-Xu static const struct snd_kcontrol_new vsense_switch =
106eae9f9ceSRaphael-Xu SOC_DAPM_SINGLE("Switch", TAS2780_PWR_CTRL,
107eae9f9ceSRaphael-Xu TAS2780_VSENSE_POWER_EN, 1, 1);
108eae9f9ceSRaphael-Xu
109eae9f9ceSRaphael-Xu static const struct snd_soc_dapm_widget tas2780_dapm_widgets[] = {
110eae9f9ceSRaphael-Xu SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
111eae9f9ceSRaphael-Xu SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2780_asi1_mux),
112eae9f9ceSRaphael-Xu SND_SOC_DAPM_SWITCH("ISENSE", TAS2780_PWR_CTRL,
113eae9f9ceSRaphael-Xu TAS2780_ISENSE_POWER_EN, 1, &isense_switch),
114eae9f9ceSRaphael-Xu SND_SOC_DAPM_SWITCH("VSENSE", TAS2780_PWR_CTRL,
115eae9f9ceSRaphael-Xu TAS2780_VSENSE_POWER_EN, 1, &vsense_switch),
116eae9f9ceSRaphael-Xu SND_SOC_DAPM_OUTPUT("OUT"),
117eae9f9ceSRaphael-Xu SND_SOC_DAPM_SIGGEN("VMON"),
118eae9f9ceSRaphael-Xu SND_SOC_DAPM_SIGGEN("IMON")
119eae9f9ceSRaphael-Xu };
120eae9f9ceSRaphael-Xu
121eae9f9ceSRaphael-Xu static const struct snd_soc_dapm_route tas2780_audio_map[] = {
122eae9f9ceSRaphael-Xu {"ASI1 Sel", "I2C offset", "ASI1"},
123eae9f9ceSRaphael-Xu {"ASI1 Sel", "Left", "ASI1"},
124eae9f9ceSRaphael-Xu {"ASI1 Sel", "Right", "ASI1"},
125eae9f9ceSRaphael-Xu {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
126eae9f9ceSRaphael-Xu {"OUT", NULL, "ASI1 Sel"},
127eae9f9ceSRaphael-Xu {"ISENSE", "Switch", "IMON"},
128eae9f9ceSRaphael-Xu {"VSENSE", "Switch", "VMON"},
129eae9f9ceSRaphael-Xu };
130eae9f9ceSRaphael-Xu
tas2780_mute(struct snd_soc_dai * dai,int mute,int direction)131eae9f9ceSRaphael-Xu static int tas2780_mute(struct snd_soc_dai *dai, int mute, int direction)
132eae9f9ceSRaphael-Xu {
133eae9f9ceSRaphael-Xu struct snd_soc_component *component = dai->component;
134eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780 =
135eae9f9ceSRaphael-Xu snd_soc_component_get_drvdata(component);
136eae9f9ceSRaphael-Xu int ret = 0;
137eae9f9ceSRaphael-Xu
138eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_PWR_CTRL,
139eae9f9ceSRaphael-Xu TAS2780_PWR_CTRL_MASK,
140eae9f9ceSRaphael-Xu mute ? TAS2780_PWR_CTRL_MUTE : 0);
141eae9f9ceSRaphael-Xu if (ret < 0) {
142eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s: Failed to set powercontrol\n",
143eae9f9ceSRaphael-Xu __func__);
144eae9f9ceSRaphael-Xu goto err;
145eae9f9ceSRaphael-Xu }
146eae9f9ceSRaphael-Xu ret = 0;
147eae9f9ceSRaphael-Xu err:
148eae9f9ceSRaphael-Xu return ret;
149eae9f9ceSRaphael-Xu }
150eae9f9ceSRaphael-Xu
tas2780_set_bitwidth(struct tas2780_priv * tas2780,int bitwidth)151eae9f9ceSRaphael-Xu static int tas2780_set_bitwidth(struct tas2780_priv *tas2780, int bitwidth)
152eae9f9ceSRaphael-Xu {
153eae9f9ceSRaphael-Xu struct snd_soc_component *component = tas2780->component;
154eae9f9ceSRaphael-Xu int sense_en;
155eae9f9ceSRaphael-Xu int val;
156eae9f9ceSRaphael-Xu int ret;
157eae9f9ceSRaphael-Xu int slot_size;
158eae9f9ceSRaphael-Xu
159eae9f9ceSRaphael-Xu switch (bitwidth) {
160eae9f9ceSRaphael-Xu case SNDRV_PCM_FORMAT_S16_LE:
161eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component,
162eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2,
163eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_RXW_MASK,
164eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_RXW_16BITS);
165eae9f9ceSRaphael-Xu slot_size = TAS2780_TDM_CFG2_RXS_16BITS;
166eae9f9ceSRaphael-Xu break;
167eae9f9ceSRaphael-Xu case SNDRV_PCM_FORMAT_S24_LE:
168eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component,
169eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2,
170eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_RXW_MASK,
171eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_RXW_24BITS);
172eae9f9ceSRaphael-Xu slot_size = TAS2780_TDM_CFG2_RXS_24BITS;
173eae9f9ceSRaphael-Xu break;
174eae9f9ceSRaphael-Xu case SNDRV_PCM_FORMAT_S32_LE:
175eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component,
176eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2,
177eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_RXW_MASK,
178eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_RXW_32BITS);
179eae9f9ceSRaphael-Xu slot_size = TAS2780_TDM_CFG2_RXS_32BITS;
180eae9f9ceSRaphael-Xu break;
181eae9f9ceSRaphael-Xu
182eae9f9ceSRaphael-Xu default:
183eae9f9ceSRaphael-Xu ret = -EINVAL;
184eae9f9ceSRaphael-Xu }
185eae9f9ceSRaphael-Xu
186eae9f9ceSRaphael-Xu if (ret < 0) {
187eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%x set bitwidth error\n",
188eae9f9ceSRaphael-Xu __func__, ret);
189eae9f9ceSRaphael-Xu goto err;
190eae9f9ceSRaphael-Xu }
191eae9f9ceSRaphael-Xu
192eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_TDM_CFG2,
193eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_RXS_MASK, slot_size);
194eae9f9ceSRaphael-Xu if (ret < 0) {
195eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
196eae9f9ceSRaphael-Xu "%s:errCode:0x%x set RX slot size error\n",
197eae9f9ceSRaphael-Xu __func__, ret);
198eae9f9ceSRaphael-Xu goto err;
199eae9f9ceSRaphael-Xu }
200eae9f9ceSRaphael-Xu
201eae9f9ceSRaphael-Xu val = snd_soc_component_read(tas2780->component, TAS2780_PWR_CTRL);
202eae9f9ceSRaphael-Xu if (val < 0) {
203eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%x read PWR_CTRL error\n",
204eae9f9ceSRaphael-Xu __func__, val);
205eae9f9ceSRaphael-Xu ret = val;
206eae9f9ceSRaphael-Xu goto err;
207eae9f9ceSRaphael-Xu }
208eae9f9ceSRaphael-Xu
209eae9f9ceSRaphael-Xu if (val & (1 << TAS2780_VSENSE_POWER_EN))
210eae9f9ceSRaphael-Xu sense_en = 0;
211eae9f9ceSRaphael-Xu else
212eae9f9ceSRaphael-Xu sense_en = TAS2780_TDM_CFG5_VSNS_ENABLE;
213eae9f9ceSRaphael-Xu
214eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(tas2780->component,
215eae9f9ceSRaphael-Xu TAS2780_TDM_CFG5, TAS2780_TDM_CFG5_VSNS_ENABLE, sense_en);
216eae9f9ceSRaphael-Xu if (ret < 0) {
217eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%x enable vSNS error\n",
218eae9f9ceSRaphael-Xu __func__, ret);
219eae9f9ceSRaphael-Xu goto err;
220eae9f9ceSRaphael-Xu }
221eae9f9ceSRaphael-Xu
222eae9f9ceSRaphael-Xu if (val & (1 << TAS2780_ISENSE_POWER_EN))
223eae9f9ceSRaphael-Xu sense_en = 0;
224eae9f9ceSRaphael-Xu else
225eae9f9ceSRaphael-Xu sense_en = TAS2780_TDM_CFG6_ISNS_ENABLE;
226eae9f9ceSRaphael-Xu
227eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(tas2780->component,
228eae9f9ceSRaphael-Xu TAS2780_TDM_CFG6, TAS2780_TDM_CFG6_ISNS_ENABLE, sense_en);
229eae9f9ceSRaphael-Xu if (ret < 0) {
230eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%x enable iSNS error\n",
231eae9f9ceSRaphael-Xu __func__, ret);
232eae9f9ceSRaphael-Xu goto err;
233eae9f9ceSRaphael-Xu }
234eae9f9ceSRaphael-Xu ret = 0;
235eae9f9ceSRaphael-Xu err:
236eae9f9ceSRaphael-Xu return ret;
237eae9f9ceSRaphael-Xu }
238eae9f9ceSRaphael-Xu
tas2780_set_samplerate(struct tas2780_priv * tas2780,int samplerate)239eae9f9ceSRaphael-Xu static int tas2780_set_samplerate(
240eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780, int samplerate)
241eae9f9ceSRaphael-Xu {
242eae9f9ceSRaphael-Xu struct snd_soc_component *component = tas2780->component;
243eae9f9ceSRaphael-Xu int ramp_rate_val;
244eae9f9ceSRaphael-Xu int ret;
245eae9f9ceSRaphael-Xu
246eae9f9ceSRaphael-Xu switch (samplerate) {
247eae9f9ceSRaphael-Xu case 48000:
248eae9f9ceSRaphael-Xu ramp_rate_val = TAS2780_TDM_CFG0_SMP_48KHZ |
249eae9f9ceSRaphael-Xu TAS2780_TDM_CFG0_44_1_48KHZ;
250eae9f9ceSRaphael-Xu break;
251eae9f9ceSRaphael-Xu case 44100:
252eae9f9ceSRaphael-Xu ramp_rate_val = TAS2780_TDM_CFG0_SMP_44_1KHZ |
253eae9f9ceSRaphael-Xu TAS2780_TDM_CFG0_44_1_48KHZ;
254eae9f9ceSRaphael-Xu break;
255eae9f9ceSRaphael-Xu case 96000:
256eae9f9ceSRaphael-Xu ramp_rate_val = TAS2780_TDM_CFG0_SMP_48KHZ |
257eae9f9ceSRaphael-Xu TAS2780_TDM_CFG0_88_2_96KHZ;
258eae9f9ceSRaphael-Xu break;
259eae9f9ceSRaphael-Xu case 88200:
260eae9f9ceSRaphael-Xu ramp_rate_val = TAS2780_TDM_CFG0_SMP_44_1KHZ |
261eae9f9ceSRaphael-Xu TAS2780_TDM_CFG0_88_2_96KHZ;
262eae9f9ceSRaphael-Xu break;
263eae9f9ceSRaphael-Xu default:
264eae9f9ceSRaphael-Xu return -EINVAL;
265eae9f9ceSRaphael-Xu }
266eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_TDM_CFG0,
267eae9f9ceSRaphael-Xu TAS2780_TDM_CFG0_SMP_MASK | TAS2780_TDM_CFG0_MASK,
268eae9f9ceSRaphael-Xu ramp_rate_val);
269eae9f9ceSRaphael-Xu if (ret < 0) {
270eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
271eae9f9ceSRaphael-Xu "%s:errCode:0x%x Failed to set ramp_rate_val\n",
272eae9f9ceSRaphael-Xu __func__, ret);
273eae9f9ceSRaphael-Xu goto err;
274eae9f9ceSRaphael-Xu }
275eae9f9ceSRaphael-Xu ret = 0;
276eae9f9ceSRaphael-Xu err:
277eae9f9ceSRaphael-Xu return ret;
278eae9f9ceSRaphael-Xu }
279eae9f9ceSRaphael-Xu
tas2780_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)280eae9f9ceSRaphael-Xu static int tas2780_hw_params(struct snd_pcm_substream *substream,
281eae9f9ceSRaphael-Xu struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
282eae9f9ceSRaphael-Xu {
283eae9f9ceSRaphael-Xu struct snd_soc_component *component = dai->component;
284eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780 =
285eae9f9ceSRaphael-Xu snd_soc_component_get_drvdata(component);
286eae9f9ceSRaphael-Xu int ret;
287eae9f9ceSRaphael-Xu
288eae9f9ceSRaphael-Xu ret = tas2780_set_bitwidth(tas2780, params_format(params));
289eae9f9ceSRaphael-Xu if (ret < 0)
290eae9f9ceSRaphael-Xu return ret;
291eae9f9ceSRaphael-Xu
292eae9f9ceSRaphael-Xu return tas2780_set_samplerate(tas2780, params_rate(params));
293eae9f9ceSRaphael-Xu }
294eae9f9ceSRaphael-Xu
tas2780_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)295eae9f9ceSRaphael-Xu static int tas2780_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
296eae9f9ceSRaphael-Xu {
297eae9f9ceSRaphael-Xu struct snd_soc_component *component = dai->component;
298eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780 =
299eae9f9ceSRaphael-Xu snd_soc_component_get_drvdata(component);
300eae9f9ceSRaphael-Xu u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0;
301eae9f9ceSRaphael-Xu int iface;
302eae9f9ceSRaphael-Xu int ret = 0;
303eae9f9ceSRaphael-Xu
304eae9f9ceSRaphael-Xu switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
305eae9f9ceSRaphael-Xu case SND_SOC_DAIFMT_NB_NF:
306eae9f9ceSRaphael-Xu asi_cfg_1 = TAS2780_TDM_CFG1_RX_RISING;
307eae9f9ceSRaphael-Xu break;
308eae9f9ceSRaphael-Xu case SND_SOC_DAIFMT_IB_NF:
309eae9f9ceSRaphael-Xu asi_cfg_1 = TAS2780_TDM_CFG1_RX_FALLING;
310eae9f9ceSRaphael-Xu break;
311eae9f9ceSRaphael-Xu default:
312eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "ASI format Inverse is not found\n");
313eae9f9ceSRaphael-Xu return -EINVAL;
314eae9f9ceSRaphael-Xu }
315eae9f9ceSRaphael-Xu
316eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_TDM_CFG1,
317eae9f9ceSRaphael-Xu TAS2780_TDM_CFG1_RX_MASK, asi_cfg_1);
318eae9f9ceSRaphael-Xu if (ret < 0) {
319eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
320eae9f9ceSRaphael-Xu "%s:errCode:0x%x Failed to set asi_cfg_1\n",
321eae9f9ceSRaphael-Xu __func__, ret);
322eae9f9ceSRaphael-Xu goto err;
323eae9f9ceSRaphael-Xu }
324eae9f9ceSRaphael-Xu
325eae9f9ceSRaphael-Xu if (((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_I2S)
326eae9f9ceSRaphael-Xu || ((fmt & SND_SOC_DAIFMT_FORMAT_MASK)
327eae9f9ceSRaphael-Xu == SND_SOC_DAIFMT_DSP_A)){
328eae9f9ceSRaphael-Xu iface = TAS2780_TDM_CFG2_SCFG_I2S;
329eae9f9ceSRaphael-Xu tdm_rx_start_slot = 1;
330eae9f9ceSRaphael-Xu } else {
331eae9f9ceSRaphael-Xu if (((fmt & SND_SOC_DAIFMT_FORMAT_MASK)
332eae9f9ceSRaphael-Xu == SND_SOC_DAIFMT_DSP_B)
333eae9f9ceSRaphael-Xu || ((fmt & SND_SOC_DAIFMT_FORMAT_MASK)
334eae9f9ceSRaphael-Xu == SND_SOC_DAIFMT_LEFT_J)) {
335eae9f9ceSRaphael-Xu iface = TAS2780_TDM_CFG2_SCFG_LEFT_J;
336eae9f9ceSRaphael-Xu tdm_rx_start_slot = 0;
337eae9f9ceSRaphael-Xu } else {
338eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
339eae9f9ceSRaphael-Xu "%s:DAI Format is not found, fmt=0x%x\n",
340eae9f9ceSRaphael-Xu __func__, fmt);
341eae9f9ceSRaphael-Xu ret = -EINVAL;
342eae9f9ceSRaphael-Xu goto err;
343eae9f9ceSRaphael-Xu }
344eae9f9ceSRaphael-Xu }
345eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_TDM_CFG1,
346eae9f9ceSRaphael-Xu TAS2780_TDM_CFG1_MASK,
347eae9f9ceSRaphael-Xu (tdm_rx_start_slot << TAS2780_TDM_CFG1_51_SHIFT));
348eae9f9ceSRaphael-Xu if (ret < 0) {
349eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
350eae9f9ceSRaphael-Xu "%s:errCode:0x%x Failed to set tdm_rx_start_slot\n",
351eae9f9ceSRaphael-Xu __func__, ret);
352eae9f9ceSRaphael-Xu goto err;
353eae9f9ceSRaphael-Xu }
354eae9f9ceSRaphael-Xu
355eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_TDM_CFG2,
356eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_SCFG_MASK, iface);
357eae9f9ceSRaphael-Xu if (ret < 0) {
358eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%x Failed to set iface\n",
359eae9f9ceSRaphael-Xu __func__, ret);
360eae9f9ceSRaphael-Xu goto err;
361eae9f9ceSRaphael-Xu }
362eae9f9ceSRaphael-Xu ret = 0;
363eae9f9ceSRaphael-Xu err:
364eae9f9ceSRaphael-Xu return ret;
365eae9f9ceSRaphael-Xu }
366eae9f9ceSRaphael-Xu
tas2780_set_dai_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)367eae9f9ceSRaphael-Xu static int tas2780_set_dai_tdm_slot(struct snd_soc_dai *dai,
368eae9f9ceSRaphael-Xu unsigned int tx_mask,
369eae9f9ceSRaphael-Xu unsigned int rx_mask,
370eae9f9ceSRaphael-Xu int slots, int slot_width)
371eae9f9ceSRaphael-Xu {
372eae9f9ceSRaphael-Xu struct snd_soc_component *component = dai->component;
373eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780 =
374eae9f9ceSRaphael-Xu snd_soc_component_get_drvdata(component);
375eae9f9ceSRaphael-Xu int left_slot, right_slot;
376eae9f9ceSRaphael-Xu int slots_cfg;
377eae9f9ceSRaphael-Xu int slot_size;
378eae9f9ceSRaphael-Xu int ret = 0;
379eae9f9ceSRaphael-Xu
380eae9f9ceSRaphael-Xu if (tx_mask == 0 || rx_mask != 0)
381eae9f9ceSRaphael-Xu return -EINVAL;
382eae9f9ceSRaphael-Xu
383eae9f9ceSRaphael-Xu left_slot = __ffs(tx_mask);
384eae9f9ceSRaphael-Xu tx_mask &= ~(1 << left_slot);
385eae9f9ceSRaphael-Xu if (tx_mask == 0) {
386eae9f9ceSRaphael-Xu right_slot = left_slot;
387eae9f9ceSRaphael-Xu } else {
388eae9f9ceSRaphael-Xu right_slot = __ffs(tx_mask);
389eae9f9ceSRaphael-Xu tx_mask &= ~(1 << right_slot);
390eae9f9ceSRaphael-Xu }
391eae9f9ceSRaphael-Xu
392eae9f9ceSRaphael-Xu if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
393eae9f9ceSRaphael-Xu return -EINVAL;
394eae9f9ceSRaphael-Xu
395eae9f9ceSRaphael-Xu slots_cfg = (right_slot << TAS2780_TDM_CFG3_RXS_SHIFT) | left_slot;
396eae9f9ceSRaphael-Xu ret = snd_soc_component_write(component, TAS2780_TDM_CFG3, slots_cfg);
397eae9f9ceSRaphael-Xu if (ret) {
398eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
399eae9f9ceSRaphael-Xu "%s:errCode:0x%x Failed to set slots_cfg\n",
400eae9f9ceSRaphael-Xu __func__, ret);
401eae9f9ceSRaphael-Xu goto err;
402eae9f9ceSRaphael-Xu }
403eae9f9ceSRaphael-Xu
404eae9f9ceSRaphael-Xu switch (slot_width) {
405eae9f9ceSRaphael-Xu case 16:
406eae9f9ceSRaphael-Xu slot_size = TAS2780_TDM_CFG2_RXS_16BITS;
407eae9f9ceSRaphael-Xu break;
408eae9f9ceSRaphael-Xu case 24:
409eae9f9ceSRaphael-Xu slot_size = TAS2780_TDM_CFG2_RXS_24BITS;
410eae9f9ceSRaphael-Xu break;
411eae9f9ceSRaphael-Xu case 32:
412eae9f9ceSRaphael-Xu slot_size = TAS2780_TDM_CFG2_RXS_32BITS;
413eae9f9ceSRaphael-Xu break;
414eae9f9ceSRaphael-Xu default:
415eae9f9ceSRaphael-Xu ret = -EINVAL;
416eae9f9ceSRaphael-Xu goto err;
417eae9f9ceSRaphael-Xu }
418eae9f9ceSRaphael-Xu
419eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_TDM_CFG2,
420eae9f9ceSRaphael-Xu TAS2780_TDM_CFG2_RXS_MASK, slot_size);
421eae9f9ceSRaphael-Xu if (ret < 0) {
422eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
423eae9f9ceSRaphael-Xu "%s:errCode:0x%x Failed to set slot_size\n",
424eae9f9ceSRaphael-Xu __func__, ret);
425eae9f9ceSRaphael-Xu goto err;
426eae9f9ceSRaphael-Xu }
427eae9f9ceSRaphael-Xu
428eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_TDM_CFG5,
429eae9f9ceSRaphael-Xu TAS2780_TDM_CFG5_50_MASK, tas2780->v_sense_slot);
430eae9f9ceSRaphael-Xu if (ret < 0) {
431eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
432eae9f9ceSRaphael-Xu "%s:errCode:0x%x Failed to set v_sense_slot\n",
433eae9f9ceSRaphael-Xu __func__, ret);
434eae9f9ceSRaphael-Xu goto err;
435eae9f9ceSRaphael-Xu }
436eae9f9ceSRaphael-Xu
437eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component, TAS2780_TDM_CFG6,
438eae9f9ceSRaphael-Xu TAS2780_TDM_CFG6_50_MASK, tas2780->i_sense_slot);
439eae9f9ceSRaphael-Xu if (ret < 0) {
440eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
441eae9f9ceSRaphael-Xu "%s:errCode:0x%x Failed to set i_sense_slot\n",
442eae9f9ceSRaphael-Xu __func__, ret);
443eae9f9ceSRaphael-Xu goto err;
444eae9f9ceSRaphael-Xu }
445eae9f9ceSRaphael-Xu ret = 0;
446eae9f9ceSRaphael-Xu err:
447eae9f9ceSRaphael-Xu return ret;
448eae9f9ceSRaphael-Xu }
449eae9f9ceSRaphael-Xu
450eae9f9ceSRaphael-Xu static const struct snd_soc_dai_ops tas2780_dai_ops = {
451eae9f9ceSRaphael-Xu .mute_stream = tas2780_mute,
452eae9f9ceSRaphael-Xu .hw_params = tas2780_hw_params,
453eae9f9ceSRaphael-Xu .set_fmt = tas2780_set_fmt,
454eae9f9ceSRaphael-Xu .set_tdm_slot = tas2780_set_dai_tdm_slot,
455eae9f9ceSRaphael-Xu .no_capture_mute = 1,
456eae9f9ceSRaphael-Xu };
457eae9f9ceSRaphael-Xu
458eae9f9ceSRaphael-Xu #define TAS2780_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
459eae9f9ceSRaphael-Xu SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
460eae9f9ceSRaphael-Xu
461eae9f9ceSRaphael-Xu #define TAS2780_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
462eae9f9ceSRaphael-Xu SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_88200)
463eae9f9ceSRaphael-Xu
464eae9f9ceSRaphael-Xu static struct snd_soc_dai_driver tas2780_dai_driver[] = {
465eae9f9ceSRaphael-Xu {
466eae9f9ceSRaphael-Xu .name = "tas2780 ASI1",
467eae9f9ceSRaphael-Xu .id = 0,
468eae9f9ceSRaphael-Xu .playback = {
469eae9f9ceSRaphael-Xu .stream_name = "ASI1 Playback",
470eae9f9ceSRaphael-Xu .channels_min = 2,
471eae9f9ceSRaphael-Xu .channels_max = 2,
472eae9f9ceSRaphael-Xu .rates = TAS2780_RATES,
473eae9f9ceSRaphael-Xu .formats = TAS2780_FORMATS,
474eae9f9ceSRaphael-Xu },
475eae9f9ceSRaphael-Xu .capture = {
476eae9f9ceSRaphael-Xu .stream_name = "ASI1 Capture",
477eae9f9ceSRaphael-Xu .channels_min = 1,
478eae9f9ceSRaphael-Xu .channels_max = 2,
479eae9f9ceSRaphael-Xu .rates = TAS2780_RATES,
480eae9f9ceSRaphael-Xu .formats = TAS2780_FORMATS,
481eae9f9ceSRaphael-Xu },
482eae9f9ceSRaphael-Xu .ops = &tas2780_dai_ops,
483eae9f9ceSRaphael-Xu .symmetric_rate = 1,
484eae9f9ceSRaphael-Xu },
485eae9f9ceSRaphael-Xu };
486eae9f9ceSRaphael-Xu
tas2780_codec_probe(struct snd_soc_component * component)487eae9f9ceSRaphael-Xu static int tas2780_codec_probe(struct snd_soc_component *component)
488eae9f9ceSRaphael-Xu {
489eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780 =
490eae9f9ceSRaphael-Xu snd_soc_component_get_drvdata(component);
491eae9f9ceSRaphael-Xu int ret = 0;
492eae9f9ceSRaphael-Xu
493eae9f9ceSRaphael-Xu tas2780->component = component;
494eae9f9ceSRaphael-Xu
495eae9f9ceSRaphael-Xu tas2780_reset(tas2780);
496eae9f9ceSRaphael-Xu ret = snd_soc_component_update_bits(component,
497eae9f9ceSRaphael-Xu TAS2780_IC_CFG, TAS2780_IC_CFG_MASK,
498eae9f9ceSRaphael-Xu TAS2780_IC_CFG_ENABLE);
499eae9f9ceSRaphael-Xu if (ret < 0)
500eae9f9ceSRaphael-Xu dev_err(tas2780->dev, "%s:errCode:0x%0x\n",
501eae9f9ceSRaphael-Xu __func__, ret);
502eae9f9ceSRaphael-Xu
503eae9f9ceSRaphael-Xu return ret;
504eae9f9ceSRaphael-Xu }
505eae9f9ceSRaphael-Xu
506eae9f9ceSRaphael-Xu static DECLARE_TLV_DB_SCALE(tas2780_digital_tlv, 1100, 50, 0);
507eae9f9ceSRaphael-Xu static DECLARE_TLV_DB_SCALE(tas2780_playback_volume, -10000, 50, 0);
508eae9f9ceSRaphael-Xu
509eae9f9ceSRaphael-Xu static const struct snd_kcontrol_new tas2780_snd_controls[] = {
510eae9f9ceSRaphael-Xu SOC_SINGLE_TLV("Speaker Volume", TAS2780_DVC, 0,
511eae9f9ceSRaphael-Xu TAS2780_DVC_MAX, 1, tas2780_playback_volume),
512eae9f9ceSRaphael-Xu SOC_SINGLE_TLV("Amp Gain Volume", TAS2780_CHNL_0, 0, 0x14, 0,
513eae9f9ceSRaphael-Xu tas2780_digital_tlv),
514eae9f9ceSRaphael-Xu };
515eae9f9ceSRaphael-Xu
516eae9f9ceSRaphael-Xu static const struct snd_soc_component_driver soc_component_driver_tas2780 = {
517eae9f9ceSRaphael-Xu .probe = tas2780_codec_probe,
518eae9f9ceSRaphael-Xu #ifdef CONFIG_PM
519eae9f9ceSRaphael-Xu .suspend = tas2780_codec_suspend,
520eae9f9ceSRaphael-Xu .resume = tas2780_codec_resume,
521eae9f9ceSRaphael-Xu #endif
522eae9f9ceSRaphael-Xu .controls = tas2780_snd_controls,
523eae9f9ceSRaphael-Xu .num_controls = ARRAY_SIZE(tas2780_snd_controls),
524eae9f9ceSRaphael-Xu .dapm_widgets = tas2780_dapm_widgets,
525eae9f9ceSRaphael-Xu .num_dapm_widgets = ARRAY_SIZE(tas2780_dapm_widgets),
526eae9f9ceSRaphael-Xu .dapm_routes = tas2780_audio_map,
527eae9f9ceSRaphael-Xu .num_dapm_routes = ARRAY_SIZE(tas2780_audio_map),
528eae9f9ceSRaphael-Xu .idle_bias_on = 1,
529eae9f9ceSRaphael-Xu .endianness = 1,
530eae9f9ceSRaphael-Xu };
531eae9f9ceSRaphael-Xu
532eae9f9ceSRaphael-Xu static const struct reg_default tas2780_reg_defaults[] = {
533eae9f9ceSRaphael-Xu { TAS2780_PAGE, 0x00 },
534eae9f9ceSRaphael-Xu { TAS2780_SW_RST, 0x00 },
535eae9f9ceSRaphael-Xu { TAS2780_PWR_CTRL, 0x1a },
536eae9f9ceSRaphael-Xu { TAS2780_DVC, 0x00 },
537eae9f9ceSRaphael-Xu { TAS2780_CHNL_0, 0x00 },
538eae9f9ceSRaphael-Xu { TAS2780_TDM_CFG0, 0x09 },
539eae9f9ceSRaphael-Xu { TAS2780_TDM_CFG1, 0x02 },
540eae9f9ceSRaphael-Xu { TAS2780_TDM_CFG2, 0x0a },
541eae9f9ceSRaphael-Xu { TAS2780_TDM_CFG3, 0x10 },
542eae9f9ceSRaphael-Xu { TAS2780_TDM_CFG5, 0x42 },
543eae9f9ceSRaphael-Xu };
544eae9f9ceSRaphael-Xu
545eae9f9ceSRaphael-Xu static const struct regmap_range_cfg tas2780_regmap_ranges[] = {
546eae9f9ceSRaphael-Xu {
547eae9f9ceSRaphael-Xu .range_min = 0,
548eae9f9ceSRaphael-Xu .range_max = 1 * 128,
549eae9f9ceSRaphael-Xu .selector_reg = TAS2780_PAGE,
550eae9f9ceSRaphael-Xu .selector_mask = 0xff,
551eae9f9ceSRaphael-Xu .selector_shift = 0,
552eae9f9ceSRaphael-Xu .window_start = 0,
553eae9f9ceSRaphael-Xu .window_len = 128,
554eae9f9ceSRaphael-Xu },
555eae9f9ceSRaphael-Xu };
556eae9f9ceSRaphael-Xu
557eae9f9ceSRaphael-Xu static const struct regmap_config tas2780_i2c_regmap = {
558eae9f9ceSRaphael-Xu .reg_bits = 8,
559eae9f9ceSRaphael-Xu .val_bits = 8,
560eae9f9ceSRaphael-Xu .reg_defaults = tas2780_reg_defaults,
561eae9f9ceSRaphael-Xu .num_reg_defaults = ARRAY_SIZE(tas2780_reg_defaults),
562eae9f9ceSRaphael-Xu .cache_type = REGCACHE_RBTREE,
563eae9f9ceSRaphael-Xu .ranges = tas2780_regmap_ranges,
564eae9f9ceSRaphael-Xu .num_ranges = ARRAY_SIZE(tas2780_regmap_ranges),
565eae9f9ceSRaphael-Xu .max_register = 1 * 128,
566eae9f9ceSRaphael-Xu };
567eae9f9ceSRaphael-Xu
tas2780_parse_dt(struct device * dev,struct tas2780_priv * tas2780)568eae9f9ceSRaphael-Xu static int tas2780_parse_dt(struct device *dev, struct tas2780_priv *tas2780)
569eae9f9ceSRaphael-Xu {
570eae9f9ceSRaphael-Xu int ret = 0;
571eae9f9ceSRaphael-Xu
572eae9f9ceSRaphael-Xu tas2780->reset_gpio = devm_gpiod_get_optional(tas2780->dev, "reset",
573eae9f9ceSRaphael-Xu GPIOD_OUT_HIGH);
574eae9f9ceSRaphael-Xu if (IS_ERR(tas2780->reset_gpio)) {
575eae9f9ceSRaphael-Xu if (PTR_ERR(tas2780->reset_gpio) == -EPROBE_DEFER) {
576eae9f9ceSRaphael-Xu tas2780->reset_gpio = NULL;
577eae9f9ceSRaphael-Xu return -EPROBE_DEFER;
578eae9f9ceSRaphael-Xu }
579eae9f9ceSRaphael-Xu }
580eae9f9ceSRaphael-Xu
581eae9f9ceSRaphael-Xu ret = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
582eae9f9ceSRaphael-Xu &tas2780->i_sense_slot);
583eae9f9ceSRaphael-Xu if (ret)
584eae9f9ceSRaphael-Xu tas2780->i_sense_slot = 0;
585eae9f9ceSRaphael-Xu
586eae9f9ceSRaphael-Xu ret = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
587eae9f9ceSRaphael-Xu &tas2780->v_sense_slot);
588eae9f9ceSRaphael-Xu if (ret)
589eae9f9ceSRaphael-Xu tas2780->v_sense_slot = 2;
590eae9f9ceSRaphael-Xu
591eae9f9ceSRaphael-Xu return 0;
592eae9f9ceSRaphael-Xu }
593eae9f9ceSRaphael-Xu
tas2780_i2c_probe(struct i2c_client * client)59488ade2abSUwe Kleine-König static int tas2780_i2c_probe(struct i2c_client *client)
595eae9f9ceSRaphael-Xu {
596eae9f9ceSRaphael-Xu struct tas2780_priv *tas2780;
597eae9f9ceSRaphael-Xu int result;
598eae9f9ceSRaphael-Xu
599eae9f9ceSRaphael-Xu tas2780 = devm_kzalloc(&client->dev, sizeof(struct tas2780_priv),
600eae9f9ceSRaphael-Xu GFP_KERNEL);
601eae9f9ceSRaphael-Xu if (!tas2780)
602eae9f9ceSRaphael-Xu return -ENOMEM;
603eae9f9ceSRaphael-Xu tas2780->dev = &client->dev;
604eae9f9ceSRaphael-Xu i2c_set_clientdata(client, tas2780);
605eae9f9ceSRaphael-Xu dev_set_drvdata(&client->dev, tas2780);
606eae9f9ceSRaphael-Xu
607eae9f9ceSRaphael-Xu tas2780->regmap = devm_regmap_init_i2c(client, &tas2780_i2c_regmap);
608eae9f9ceSRaphael-Xu if (IS_ERR(tas2780->regmap)) {
609eae9f9ceSRaphael-Xu result = PTR_ERR(tas2780->regmap);
610eae9f9ceSRaphael-Xu dev_err(&client->dev, "Failed to allocate register map: %d\n",
611eae9f9ceSRaphael-Xu result);
612eae9f9ceSRaphael-Xu return result;
613eae9f9ceSRaphael-Xu }
614eae9f9ceSRaphael-Xu
615eae9f9ceSRaphael-Xu if (client->dev.of_node) {
616eae9f9ceSRaphael-Xu result = tas2780_parse_dt(&client->dev, tas2780);
617eae9f9ceSRaphael-Xu if (result) {
618eae9f9ceSRaphael-Xu dev_err(tas2780->dev,
619eae9f9ceSRaphael-Xu "%s: Failed to parse devicetree\n", __func__);
620eae9f9ceSRaphael-Xu return result;
621eae9f9ceSRaphael-Xu }
622eae9f9ceSRaphael-Xu }
623eae9f9ceSRaphael-Xu
624eae9f9ceSRaphael-Xu return devm_snd_soc_register_component(tas2780->dev,
625eae9f9ceSRaphael-Xu &soc_component_driver_tas2780, tas2780_dai_driver,
626eae9f9ceSRaphael-Xu ARRAY_SIZE(tas2780_dai_driver));
627eae9f9ceSRaphael-Xu }
628eae9f9ceSRaphael-Xu
629eae9f9ceSRaphael-Xu static const struct i2c_device_id tas2780_i2c_id[] = {
630eae9f9ceSRaphael-Xu { "tas2780", 0},
631eae9f9ceSRaphael-Xu { }
632eae9f9ceSRaphael-Xu };
633eae9f9ceSRaphael-Xu MODULE_DEVICE_TABLE(i2c, tas2780_i2c_id);
634eae9f9ceSRaphael-Xu
635eae9f9ceSRaphael-Xu #if defined(CONFIG_OF)
636eae9f9ceSRaphael-Xu static const struct of_device_id tas2780_of_match[] = {
637eae9f9ceSRaphael-Xu { .compatible = "ti,tas2780" },
638eae9f9ceSRaphael-Xu {},
639eae9f9ceSRaphael-Xu };
640eae9f9ceSRaphael-Xu MODULE_DEVICE_TABLE(of, tas2780_of_match);
641eae9f9ceSRaphael-Xu #endif
642eae9f9ceSRaphael-Xu
643eae9f9ceSRaphael-Xu static struct i2c_driver tas2780_i2c_driver = {
644eae9f9ceSRaphael-Xu .driver = {
645eae9f9ceSRaphael-Xu .name = "tas2780",
646eae9f9ceSRaphael-Xu .of_match_table = of_match_ptr(tas2780_of_match),
647eae9f9ceSRaphael-Xu },
6489abcd240SUwe Kleine-König .probe = tas2780_i2c_probe,
649eae9f9ceSRaphael-Xu .id_table = tas2780_i2c_id,
650eae9f9ceSRaphael-Xu };
651eae9f9ceSRaphael-Xu module_i2c_driver(tas2780_i2c_driver);
652eae9f9ceSRaphael-Xu
653eae9f9ceSRaphael-Xu MODULE_AUTHOR("Raphael Xu <raphael-xu@ti.com>");
654eae9f9ceSRaphael-Xu MODULE_DESCRIPTION("TAS2780 I2C Smart Amplifier driver");
655eae9f9ceSRaphael-Xu MODULE_LICENSE("GPL");
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