xref: /openbmc/linux/sound/soc/codecs/tas2770.h (revision 5856d8bd)
11a476abcSFrank Shi /* SPDX-License-Identifier: GPL-2.0
21a476abcSFrank Shi  *
31a476abcSFrank Shi  * ALSA SoC TAS2770 codec driver
41a476abcSFrank Shi  *
55856d8bdSAlexander A. Klimov  *  Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
61a476abcSFrank Shi  */
71a476abcSFrank Shi #ifndef __TAS2770__
81a476abcSFrank Shi #define __TAS2770__
91a476abcSFrank Shi 
101a476abcSFrank Shi /* Book Control Register (available in page0 of each book) */
111a476abcSFrank Shi #define TAS2770_BOOKCTL_PAGE            0
121a476abcSFrank Shi #define TAS2770_BOOKCTL_REG         127
131a476abcSFrank Shi #define TAS2770_REG(page, reg)        ((page * 128) + reg)
141a476abcSFrank Shi     /* Page */
151a476abcSFrank Shi #define TAS2770_PAGE  TAS2770_REG(0X0, 0x00)
161a476abcSFrank Shi #define TAS2770_PAGE_PAGE_MASK  255
171a476abcSFrank Shi     /* Software Reset */
181a476abcSFrank Shi #define TAS2770_SW_RST  TAS2770_REG(0X0, 0x01)
191a476abcSFrank Shi #define TAS2770_RST  BIT(0)
201a476abcSFrank Shi     /* Power Control */
211a476abcSFrank Shi #define TAS2770_PWR_CTRL  TAS2770_REG(0X0, 0x02)
221a476abcSFrank Shi #define TAS2770_PWR_CTRL_MASK  0x3
231a476abcSFrank Shi #define TAS2770_PWR_CTRL_ACTIVE  0x0
241a476abcSFrank Shi #define TAS2770_PWR_CTRL_MUTE  BIT(0)
251a476abcSFrank Shi #define TAS2770_PWR_CTRL_SHUTDOWN  0x2
261a476abcSFrank Shi     /* Playback Configuration Reg0 */
271a476abcSFrank Shi #define TAS2770_PLAY_CFG_REG0  TAS2770_REG(0X0, 0x03)
281a476abcSFrank Shi     /* Playback Configuration Reg1 */
291a476abcSFrank Shi #define TAS2770_PLAY_CFG_REG1  TAS2770_REG(0X0, 0x04)
301a476abcSFrank Shi     /* Playback Configuration Reg2 */
311a476abcSFrank Shi #define TAS2770_PLAY_CFG_REG2  TAS2770_REG(0X0, 0x05)
321a476abcSFrank Shi #define TAS2770_PLAY_CFG_REG2_VMAX 0xc9
331a476abcSFrank Shi     /* Misc Configuration Reg0 */
341a476abcSFrank Shi #define TAS2770_MSC_CFG_REG0  TAS2770_REG(0X0, 0x07)
351a476abcSFrank Shi     /* TDM Configuration Reg0 */
361a476abcSFrank Shi #define TAS2770_TDM_CFG_REG0  TAS2770_REG(0X0, 0x0A)
371a476abcSFrank Shi #define TAS2770_TDM_CFG_REG0_SMP_MASK  BIT(5)
381a476abcSFrank Shi #define TAS2770_TDM_CFG_REG0_SMP_48KHZ  0x0
391a476abcSFrank Shi #define TAS2770_TDM_CFG_REG0_SMP_44_1KHZ  BIT(5)
401a476abcSFrank Shi #define TAS2770_TDM_CFG_REG0_31_MASK  0xe
411a476abcSFrank Shi #define TAS2770_TDM_CFG_REG0_31_44_1_48KHZ  0x6
421a476abcSFrank Shi #define TAS2770_TDM_CFG_REG0_31_88_2_96KHZ  0x8
431a476abcSFrank Shi #define TAS2770_TDM_CFG_REG0_31_176_4_192KHZ  0xa
441a476abcSFrank Shi     /* TDM Configuration Reg1 */
451a476abcSFrank Shi #define TAS2770_TDM_CFG_REG1  TAS2770_REG(0X0, 0x0B)
461a476abcSFrank Shi #define TAS2770_TDM_CFG_REG1_MASK 0x3e
471a476abcSFrank Shi #define TAS2770_TDM_CFG_REG1_51_SHIFT  1
481a476abcSFrank Shi #define TAS2770_TDM_CFG_REG1_RX_MASK  BIT(0)
491a476abcSFrank Shi #define TAS2770_TDM_CFG_REG1_RX_RSING  0x0
501a476abcSFrank Shi #define TAS2770_TDM_CFG_REG1_RX_FALING  BIT(0)
511a476abcSFrank Shi     /* TDM Configuration Reg2 */
521a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2  TAS2770_REG(0X0, 0x0C)
531a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2_RXW_MASK  0xc
541a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2_RXW_16BITS  0x0
551a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2_RXW_24BITS  0x8
561a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2_RXW_32BITS  0xc
571a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2_RXS_MASK    0x3
581a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2_RXS_16BITS  0x0
591a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2_RXS_24BITS  BIT(0)
601a476abcSFrank Shi #define TAS2770_TDM_CFG_REG2_RXS_32BITS  0x2
611a476abcSFrank Shi     /* TDM Configuration Reg3 */
621a476abcSFrank Shi #define TAS2770_TDM_CFG_REG3  TAS2770_REG(0X0, 0x0D)
631a476abcSFrank Shi #define TAS2770_TDM_CFG_REG3_RXS_MASK  0xf0
641a476abcSFrank Shi #define TAS2770_TDM_CFG_REG3_RXS_SHIFT 0x4
651a476abcSFrank Shi #define TAS2770_TDM_CFG_REG3_30_MASK  0xf
661a476abcSFrank Shi #define TAS2770_TDM_CFG_REG3_30_SHIFT 0
671a476abcSFrank Shi     /* TDM Configuration Reg5 */
681a476abcSFrank Shi #define TAS2770_TDM_CFG_REG5  TAS2770_REG(0X0, 0x0F)
691a476abcSFrank Shi #define TAS2770_TDM_CFG_REG5_VSNS_MASK  BIT(6)
701a476abcSFrank Shi #define TAS2770_TDM_CFG_REG5_VSNS_ENABLE  BIT(6)
711a476abcSFrank Shi #define TAS2770_TDM_CFG_REG5_50_MASK  0x3f
721a476abcSFrank Shi     /* TDM Configuration Reg6 */
731a476abcSFrank Shi #define TAS2770_TDM_CFG_REG6  TAS2770_REG(0X0, 0x10)
741a476abcSFrank Shi #define TAS2770_TDM_CFG_REG6_ISNS_MASK  BIT(6)
751a476abcSFrank Shi #define TAS2770_TDM_CFG_REG6_ISNS_ENABLE  BIT(6)
761a476abcSFrank Shi #define TAS2770_TDM_CFG_REG6_50_MASK  0x3f
771a476abcSFrank Shi     /* Brown Out Prevention Reg0 */
781a476abcSFrank Shi #define TAS2770_BO_PRV_REG0  TAS2770_REG(0X0, 0x1B)
791a476abcSFrank Shi     /* Interrupt MASK Reg0 */
801a476abcSFrank Shi #define TAS2770_INT_MASK_REG0  TAS2770_REG(0X0, 0x20)
811a476abcSFrank Shi #define TAS2770_INT_REG0_DEFAULT  0xfc
821a476abcSFrank Shi #define TAS2770_INT_MASK_REG0_DISABLE 0xff
831a476abcSFrank Shi     /* Interrupt MASK Reg1 */
841a476abcSFrank Shi #define TAS2770_INT_MASK_REG1  TAS2770_REG(0X0, 0x21)
851a476abcSFrank Shi #define TAS2770_INT_REG1_DEFAULT  0xb1
861a476abcSFrank Shi #define TAS2770_INT_MASK_REG1_DISABLE 0xff
871a476abcSFrank Shi     /* Live-Interrupt Reg0 */
881a476abcSFrank Shi #define TAS2770_LVE_INT_REG0  TAS2770_REG(0X0, 0x22)
891a476abcSFrank Shi     /* Live-Interrupt Reg1 */
901a476abcSFrank Shi #define TAS2770_LVE_INT_REG1  TAS2770_REG(0X0, 0x23)
911a476abcSFrank Shi     /* Latched-Interrupt Reg0 */
921a476abcSFrank Shi #define TAS2770_LAT_INT_REG0  TAS2770_REG(0X0, 0x24)
931a476abcSFrank Shi #define TAS2770_LAT_INT_REG0_OCE_FLG  BIT(1)
941a476abcSFrank Shi #define TAS2770_LAT_INT_REG0_OTE_FLG  BIT(0)
951a476abcSFrank Shi     /* Latched-Interrupt Reg1 */
961a476abcSFrank Shi #define TAS2770_LAT_INT_REG1  TAS2770_REG(0X0, 0x25)
971a476abcSFrank Shi #define TAS2770_LAT_INT_REG1_VBA_TOV  BIT(3)
981a476abcSFrank Shi #define TAS2770_LAT_INT_REG1_VBA_TUV  BIT(2)
991a476abcSFrank Shi #define TAS2770_LAT_INT_REG1_BOUT_FLG  BIT(1)
1001a476abcSFrank Shi     /* VBAT MSB */
1011a476abcSFrank Shi #define TAS2770_VBAT_MSB  TAS2770_REG(0X0, 0x27)
1021a476abcSFrank Shi     /* VBAT LSB */
1031a476abcSFrank Shi #define TAS2770_VBAT_LSB  TAS2770_REG(0X0, 0x28)
1041a476abcSFrank Shi     /* TEMP MSB */
1051a476abcSFrank Shi #define TAS2770_TEMP_MSB  TAS2770_REG(0X0, 0x29)
1061a476abcSFrank Shi     /* TEMP LSB */
1071a476abcSFrank Shi #define TAS2770_TEMP_LSB  TAS2770_REG(0X0, 0x2A)
1081a476abcSFrank Shi     /* Interrupt Configuration */
1091a476abcSFrank Shi #define TAS2770_INT_CFG  TAS2770_REG(0X0, 0x30)
1101a476abcSFrank Shi     /* Misc IRQ */
1111a476abcSFrank Shi #define TAS2770_MISC_IRQ  TAS2770_REG(0X0, 0x32)
1121a476abcSFrank Shi     /* Clock Configuration */
1131a476abcSFrank Shi #define TAS2770_CLK_CGF  TAS2770_REG(0X0, 0x3C)
1141a476abcSFrank Shi     /* TDM Clock detection monitor */
1151a476abcSFrank Shi #define TAS2770_TDM_CLK_DETC  TAS2770_REG(0X0, 0x77)
1161a476abcSFrank Shi     /* Revision and PG ID */
1171a476abcSFrank Shi #define TAS2770_REV_AND_GPID  TAS2770_REG(0X0, 0x7D)
1181a476abcSFrank Shi 
1191a476abcSFrank Shi #define TAS2770_POWER_ACTIVE 0
1201a476abcSFrank Shi #define TAS2770_POWER_MUTE 1
1211a476abcSFrank Shi #define TAS2770_POWER_SHUTDOWN 2
1221a476abcSFrank Shi #define ERROR_OVER_CURRENT  0x0000001
1231a476abcSFrank Shi #define ERROR_DIE_OVERTEMP  0x0000002
1241a476abcSFrank Shi #define ERROR_OVER_VOLTAGE  0x0000004
1251a476abcSFrank Shi #define ERROR_UNDER_VOLTAGE 0x0000008
1261a476abcSFrank Shi #define ERROR_BROWNOUT      0x0000010
1271a476abcSFrank Shi #define ERROR_CLASSD_PWR    0x0000020
1281a476abcSFrank Shi 
1291a476abcSFrank Shi struct tas2770_priv {
1301a476abcSFrank Shi 	struct device *dev;
1311a476abcSFrank Shi 	struct regmap *regmap;
1321a476abcSFrank Shi 	struct snd_soc_component *component;
1331a476abcSFrank Shi 	int power_state;
1341a476abcSFrank Shi 	int asi_format;
1351a476abcSFrank Shi 	struct gpio_desc *reset_gpio;
1361a476abcSFrank Shi 	int sampling_rate;
1371a476abcSFrank Shi 	int channel_size;
1381a476abcSFrank Shi 	int slot_width;
1391a476abcSFrank Shi 	int v_sense_slot;
1401a476abcSFrank Shi 	int i_sense_slot;
1411a476abcSFrank Shi };
1421a476abcSFrank Shi 
1431a476abcSFrank Shi #endif /* __TAS2770__ */
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