xref: /openbmc/linux/sound/soc/codecs/tas2552.h (revision 5df7f71d)
15df7f71dSDan Murphy /*
25df7f71dSDan Murphy  * tas2552.h - ALSA SoC Texas Instruments TAS2552 Mono Audio Amplifier
35df7f71dSDan Murphy  *
45df7f71dSDan Murphy  * Copyright (C) 2014 Texas Instruments Incorporated -  http://www.ti.com
55df7f71dSDan Murphy  *
65df7f71dSDan Murphy  * Author: Dan Murphy <dmurphy@ti.com>
75df7f71dSDan Murphy  *
85df7f71dSDan Murphy  * This program is free software; you can redistribute it and/or
95df7f71dSDan Murphy  * modify it under the terms of the GNU General Public License
105df7f71dSDan Murphy  * version 2 as published by the Free Software Foundation.
115df7f71dSDan Murphy  *
125df7f71dSDan Murphy  * This program is distributed in the hope that it will be useful, but
135df7f71dSDan Murphy  * WITHOUT ANY WARRANTY; without even the implied warranty of
145df7f71dSDan Murphy  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
155df7f71dSDan Murphy  * General Public License for more details.
165df7f71dSDan Murphy  */
175df7f71dSDan Murphy 
185df7f71dSDan Murphy #ifndef __TAS2552_H__
195df7f71dSDan Murphy #define __TAS2552_H__
205df7f71dSDan Murphy 
215df7f71dSDan Murphy /* Register Address Map */
225df7f71dSDan Murphy #define TAS2552_DEVICE_STATUS	0x00
235df7f71dSDan Murphy #define TAS2552_CFG_1			0x01
245df7f71dSDan Murphy #define TAS2552_CFG_2			0x02
255df7f71dSDan Murphy #define TAS2552_CFG_3			0x03
265df7f71dSDan Murphy #define TAS2552_DOUT			0x04
275df7f71dSDan Murphy #define TAS2552_SER_CTRL_1		0x05
285df7f71dSDan Murphy #define TAS2552_SER_CTRL_2		0x06
295df7f71dSDan Murphy #define TAS2552_OUTPUT_DATA		0x07
305df7f71dSDan Murphy #define TAS2552_PLL_CTRL_1		0x08
315df7f71dSDan Murphy #define TAS2552_PLL_CTRL_2		0x09
325df7f71dSDan Murphy #define TAS2552_PLL_CTRL_3		0x0a
335df7f71dSDan Murphy #define TAS2552_BTIP			0x0b
345df7f71dSDan Murphy #define TAS2552_BTS_CTRL		0x0c
355df7f71dSDan Murphy #define TAS2552_RESERVED_0D		0x0d
365df7f71dSDan Murphy #define TAS2552_LIMIT_RATE_HYS	0x0e
375df7f71dSDan Murphy #define TAS2552_LIMIT_RELEASE	0x0f
385df7f71dSDan Murphy #define TAS2552_LIMIT_INT_COUNT	0x10
395df7f71dSDan Murphy #define TAS2552_PDM_CFG			0x11
405df7f71dSDan Murphy #define TAS2552_PGA_GAIN		0x12
415df7f71dSDan Murphy #define TAS2552_EDGE_RATE_CTRL	0x13
425df7f71dSDan Murphy #define TAS2552_BOOST_PT_CTRL	0x14
435df7f71dSDan Murphy #define TAS2552_VER_NUM			0x16
445df7f71dSDan Murphy #define TAS2552_VBAT_DATA		0x19
455df7f71dSDan Murphy #define TAS2552_MAX_REG			0x20
465df7f71dSDan Murphy 
475df7f71dSDan Murphy /* CFG1 Register Masks */
485df7f71dSDan Murphy #define TAS2552_MUTE_MASK		(1 << 2)
495df7f71dSDan Murphy #define TAS2552_SWS_MASK		(1 << 1)
505df7f71dSDan Murphy #define TAS2552_WCLK_MASK		0x07
515df7f71dSDan Murphy #define TAS2552_CLASSD_EN_MASK	(1 << 7)
525df7f71dSDan Murphy 
535df7f71dSDan Murphy /* CFG2 Register Masks */
545df7f71dSDan Murphy #define TAS2552_CLASSD_EN		(1 << 7)
555df7f71dSDan Murphy #define TAS2552_BOOST_EN		(1 << 6)
565df7f71dSDan Murphy #define TAS2552_APT_EN			(1 << 5)
575df7f71dSDan Murphy #define TAS2552_PLL_ENABLE		(1 << 3)
585df7f71dSDan Murphy #define TAS2552_LIM_EN			(1 << 2)
595df7f71dSDan Murphy #define TAS2552_IVSENSE_EN		(1 << 1)
605df7f71dSDan Murphy 
615df7f71dSDan Murphy /* CFG3 Register Masks */
625df7f71dSDan Murphy #define TAS2552_WORD_CLK_MASK		(1 << 7)
635df7f71dSDan Murphy #define TAS2552_BIT_CLK_MASK		(1 << 6)
645df7f71dSDan Murphy #define TAS2552_DATA_FORMAT_MASK	(0x11 << 2)
655df7f71dSDan Murphy 
665df7f71dSDan Murphy #define TAS2552_DAIFMT_I2S_MASK		0xf3
675df7f71dSDan Murphy #define TAS2552_DAIFMT_DSP			(1 << 3)
685df7f71dSDan Murphy #define TAS2552_DAIFMT_RIGHT_J		(1 << 4)
695df7f71dSDan Murphy #define TAS2552_DAIFMT_LEFT_J		(0x11 << 3)
705df7f71dSDan Murphy 
715df7f71dSDan Murphy #define TAS2552_PLL_SRC_MCLK	0x00
725df7f71dSDan Murphy #define TAS2552_PLL_SRC_BCLK	(1 << 3)
735df7f71dSDan Murphy #define TAS2552_PLL_SRC_IVCLKIN	(1 << 4)
745df7f71dSDan Murphy #define TAS2552_PLL_SRC_1_8_FIXED (0x11 << 3)
755df7f71dSDan Murphy 
765df7f71dSDan Murphy #define TAS2552_DIN_SRC_SEL_MUTED	0x00
775df7f71dSDan Murphy #define TAS2552_DIN_SRC_SEL_LEFT	(1 << 4)
785df7f71dSDan Murphy #define TAS2552_DIN_SRC_SEL_RIGHT	(1 << 5)
795df7f71dSDan Murphy #define TAS2552_DIN_SRC_SEL_AVG_L_R	(0x11 << 4)
805df7f71dSDan Murphy 
815df7f71dSDan Murphy #define TAS2552_PDM_IN_SEL		(1 << 5)
825df7f71dSDan Murphy #define TAS2552_I2S_OUT_SEL		(1 << 6)
835df7f71dSDan Murphy #define TAS2552_ANALOG_IN_SEL	(1 << 7)
845df7f71dSDan Murphy 
855df7f71dSDan Murphy /* CFG3 WCLK Dividers */
865df7f71dSDan Murphy #define TAS2552_8KHZ		0x00
875df7f71dSDan Murphy #define TAS2552_11_12KHZ	(1 << 1)
885df7f71dSDan Murphy #define TAS2552_16KHZ		(1 << 2)
895df7f71dSDan Murphy #define TAS2552_22_24KHZ	(1 << 3)
905df7f71dSDan Murphy #define TAS2552_32KHZ		(1 << 4)
915df7f71dSDan Murphy #define TAS2552_44_48KHZ	(1 << 5)
925df7f71dSDan Murphy #define TAS2552_88_96KHZ	(1 << 6)
935df7f71dSDan Murphy #define TAS2552_176_192KHZ	(1 << 7)
945df7f71dSDan Murphy 
955df7f71dSDan Murphy /* OUTPUT_DATA register */
965df7f71dSDan Murphy #define TAS2552_PDM_DATA_I		0x00
975df7f71dSDan Murphy #define TAS2552_PDM_DATA_V		(1 << 6)
985df7f71dSDan Murphy #define TAS2552_PDM_DATA_I_V	(1 << 7)
995df7f71dSDan Murphy #define TAS2552_PDM_DATA_V_I	(0x11 << 6)
1005df7f71dSDan Murphy 
1015df7f71dSDan Murphy /* PDM CFG Register */
1025df7f71dSDan Murphy #define TAS2552_PDM_DATA_ES_RISE 0x4
1035df7f71dSDan Murphy 
1045df7f71dSDan Murphy #define TAS2552_PDM_PLL_CLK_SEL 0x00
1055df7f71dSDan Murphy #define TAS2552_PDM_IV_CLK_SEL	(1 << 1)
1065df7f71dSDan Murphy #define TAS2552_PDM_BCLK_SEL	(1 << 2)
1075df7f71dSDan Murphy #define TAS2552_PDM_MCLK_SEL	(1 << 3)
1085df7f71dSDan Murphy 
1095df7f71dSDan Murphy /* Boost pass-through register */
1105df7f71dSDan Murphy #define TAS2552_APT_DELAY_50	0x00
1115df7f71dSDan Murphy #define TAS2552_APT_DELAY_75	(1 << 1)
1125df7f71dSDan Murphy #define TAS2552_APT_DELAY_125	(1 << 2)
1135df7f71dSDan Murphy #define TAS2552_APT_DELAY_200	(1 << 3)
1145df7f71dSDan Murphy 
1155df7f71dSDan Murphy #define TAS2552_APT_THRESH_2_5		0x00
1165df7f71dSDan Murphy #define TAS2552_APT_THRESH_1_7		(1 << 3)
1175df7f71dSDan Murphy #define TAS2552_APT_THRESH_1_4_1_1	(1 << 4)
1185df7f71dSDan Murphy #define TAS2552_APT_THRESH_2_1_7	(0x11 << 2)
1195df7f71dSDan Murphy 
1205df7f71dSDan Murphy /* PLL Control Register */
1215df7f71dSDan Murphy #define TAS2552_245MHZ_CLK			24576000
1225df7f71dSDan Murphy #define TAS2552_225MHZ_CLK			22579200
1235df7f71dSDan Murphy #define TAS2552_PLL_J_MASK			0x7f
1245df7f71dSDan Murphy #define TAS2552_PLL_D_UPPER_MASK	0x3f
1255df7f71dSDan Murphy #define TAS2552_PLL_D_LOWER_MASK	0xff
1265df7f71dSDan Murphy #define TAS2552_PLL_BYPASS_MASK		0x80
1275df7f71dSDan Murphy #define TAS2552_PLL_BYPASS			0x80
1285df7f71dSDan Murphy 
1295df7f71dSDan Murphy #endif
130