1b7138212SCliff Cai /* 2b7138212SCliff Cai * File: sound/soc/codecs/ssm2602.h 3b7138212SCliff Cai * Author: Cliff Cai <Cliff.Cai@analog.com> 4b7138212SCliff Cai * 5b7138212SCliff Cai * Created: Tue June 06 2008 6b7138212SCliff Cai * 7b7138212SCliff Cai * Modified: 8b7138212SCliff Cai * Copyright 2008 Analog Devices Inc. 9b7138212SCliff Cai * 10b7138212SCliff Cai * Bugs: Enter bugs at http://blackfin.uclinux.org/ 11b7138212SCliff Cai * 12b7138212SCliff Cai * This program is free software; you can redistribute it and/or modify 13b7138212SCliff Cai * it under the terms of the GNU General Public License as published by 14b7138212SCliff Cai * the Free Software Foundation; either version 2 of the License, or 15b7138212SCliff Cai * (at your option) any later version. 16b7138212SCliff Cai * 17b7138212SCliff Cai * This program is distributed in the hope that it will be useful, 18b7138212SCliff Cai * but WITHOUT ANY WARRANTY; without even the implied warranty of 19b7138212SCliff Cai * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20b7138212SCliff Cai * GNU General Public License for more details. 21b7138212SCliff Cai * 22b7138212SCliff Cai * You should have received a copy of the GNU General Public License 23b7138212SCliff Cai * along with this program; if not, see the file COPYING, or write 24b7138212SCliff Cai * to the Free Software Foundation, Inc., 25b7138212SCliff Cai * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 26b7138212SCliff Cai */ 27b7138212SCliff Cai 28b7138212SCliff Cai #ifndef _SSM2602_H 29b7138212SCliff Cai #define _SSM2602_H 30b7138212SCliff Cai 31b7138212SCliff Cai /* SSM2602 Codec Register definitions */ 32b7138212SCliff Cai 33b7138212SCliff Cai #define SSM2602_LINVOL 0x00 34b7138212SCliff Cai #define SSM2602_RINVOL 0x01 35b7138212SCliff Cai #define SSM2602_LOUT1V 0x02 36b7138212SCliff Cai #define SSM2602_ROUT1V 0x03 37b7138212SCliff Cai #define SSM2602_APANA 0x04 38b7138212SCliff Cai #define SSM2602_APDIGI 0x05 39b7138212SCliff Cai #define SSM2602_PWR 0x06 40b7138212SCliff Cai #define SSM2602_IFACE 0x07 41b7138212SCliff Cai #define SSM2602_SRATE 0x08 42b7138212SCliff Cai #define SSM2602_ACTIVE 0x09 43b7138212SCliff Cai #define SSM2602_RESET 0x0f 44b7138212SCliff Cai 45b7138212SCliff Cai /*SSM2602 Codec Register Field definitions 46b7138212SCliff Cai *(Mask value to extract the corresponding Register field) 47b7138212SCliff Cai */ 48b7138212SCliff Cai 49b7138212SCliff Cai /*Left ADC Volume Control (SSM2602_REG_LEFT_ADC_VOL)*/ 50b7138212SCliff Cai #define LINVOL_LIN_VOL 0x01F /* Left Channel PGA Volume control */ 51b7138212SCliff Cai #define LINVOL_LIN_ENABLE_MUTE 0x080 /* Left Channel Input Mute */ 52b7138212SCliff Cai #define LINVOL_LRIN_BOTH 0x100 /* Left Channel Line Input Volume update */ 53b7138212SCliff Cai 54b7138212SCliff Cai /*Right ADC Volume Control (SSM2602_REG_RIGHT_ADC_VOL)*/ 55b7138212SCliff Cai #define RINVOL_RIN_VOL 0x01F /* Right Channel PGA Volume control */ 56b7138212SCliff Cai #define RINVOL_RIN_ENABLE_MUTE 0x080 /* Right Channel Input Mute */ 57b7138212SCliff Cai #define RINVOL_RLIN_BOTH 0x100 /* Right Channel Line Input Volume update */ 58b7138212SCliff Cai 59b7138212SCliff Cai /*Left DAC Volume Control (SSM2602_REG_LEFT_DAC_VOL)*/ 60b7138212SCliff Cai #define LOUT1V_LHP_VOL 0x07F /* Left Channel Headphone volume control */ 61b7138212SCliff Cai #define LOUT1V_ENABLE_LZC 0x080 /* Left Channel Zero cross detect enable */ 62b7138212SCliff Cai #define LOUT1V_LRHP_BOTH 0x100 /* Left Channel Headphone volume update */ 63b7138212SCliff Cai 64b7138212SCliff Cai /*Right DAC Volume Control (SSM2602_REG_RIGHT_DAC_VOL)*/ 65b7138212SCliff Cai #define ROUT1V_RHP_VOL 0x07F /* Right Channel Headphone volume control */ 66b7138212SCliff Cai #define ROUT1V_ENABLE_RZC 0x080 /* Right Channel Zero cross detect enable */ 67b7138212SCliff Cai #define ROUT1V_RLHP_BOTH 0x100 /* Right Channel Headphone volume update */ 68b7138212SCliff Cai 69b7138212SCliff Cai /*Analogue Audio Path Control (SSM2602_REG_ANALOGUE_PATH)*/ 70b7138212SCliff Cai #define APANA_ENABLE_MIC_BOOST 0x001 /* Primary Microphone Amplifier gain booster control */ 71b7138212SCliff Cai #define APANA_ENABLE_MIC_MUTE 0x002 /* Microphone Mute Control */ 72b7138212SCliff Cai #define APANA_ADC_IN_SELECT 0x004 /* Microphone/Line IN select to ADC (1=MIC, 0=Line In) */ 73b7138212SCliff Cai #define APANA_ENABLE_BYPASS 0x008 /* Line input bypass to line output */ 74b7138212SCliff Cai #define APANA_SELECT_DAC 0x010 /* Select DAC (1=Select DAC, 0=Don't Select DAC) */ 75b7138212SCliff Cai #define APANA_ENABLE_SIDETONE 0x020 /* Enable/Disable Side Tone */ 76b7138212SCliff Cai #define APANA_SIDETONE_ATTN 0x0C0 /* Side Tone Attenuation */ 77b7138212SCliff Cai #define APANA_ENABLE_MIC_BOOST2 0x100 /* Secondary Microphone Amplifier gain booster control */ 78b7138212SCliff Cai 79b7138212SCliff Cai /*Digital Audio Path Control (SSM2602_REG_DIGITAL_PATH)*/ 80b7138212SCliff Cai #define APDIGI_ENABLE_ADC_HPF 0x001 /* Enable/Disable ADC Highpass Filter */ 81b7138212SCliff Cai #define APDIGI_DE_EMPHASIS 0x006 /* De-Emphasis Control */ 82b7138212SCliff Cai #define APDIGI_ENABLE_DAC_MUTE 0x008 /* DAC Mute Control */ 83b7138212SCliff Cai #define APDIGI_STORE_OFFSET 0x010 /* Store/Clear DC offset when HPF is disabled */ 84b7138212SCliff Cai 85b7138212SCliff Cai /*Power Down Control (SSM2602_REG_POWER) 86b7138212SCliff Cai *(1=Enable PowerDown, 0=Disable PowerDown) 87b7138212SCliff Cai */ 88b7138212SCliff Cai #define PWR_LINE_IN_PDN 0x001 /* Line Input Power Down */ 89b7138212SCliff Cai #define PWR_MIC_PDN 0x002 /* Microphone Input & Bias Power Down */ 90b7138212SCliff Cai #define PWR_ADC_PDN 0x004 /* ADC Power Down */ 91b7138212SCliff Cai #define PWR_DAC_PDN 0x008 /* DAC Power Down */ 92b7138212SCliff Cai #define PWR_OUT_PDN 0x010 /* Outputs Power Down */ 93b7138212SCliff Cai #define PWR_OSC_PDN 0x020 /* Oscillator Power Down */ 94b7138212SCliff Cai #define PWR_CLK_OUT_PDN 0x040 /* CLKOUT Power Down */ 95b7138212SCliff Cai #define PWR_POWER_OFF 0x080 /* POWEROFF Mode */ 96b7138212SCliff Cai 97b7138212SCliff Cai /*Digital Audio Interface Format (SSM2602_REG_DIGITAL_IFACE)*/ 98b7138212SCliff Cai #define IFACE_IFACE_FORMAT 0x003 /* Digital Audio input format control */ 99b7138212SCliff Cai #define IFACE_AUDIO_DATA_LEN 0x00C /* Audio Data word length control */ 100b7138212SCliff Cai #define IFACE_DAC_LR_POLARITY 0x010 /* Polarity Control for clocks in RJ,LJ and I2S modes */ 101b7138212SCliff Cai #define IFACE_DAC_LR_SWAP 0x020 /* Swap DAC data control */ 102b7138212SCliff Cai #define IFACE_ENABLE_MASTER 0x040 /* Enable/Disable Master Mode */ 103b7138212SCliff Cai #define IFACE_BCLK_INVERT 0x080 /* Bit Clock Inversion control */ 104b7138212SCliff Cai 105b7138212SCliff Cai /*Sampling Control (SSM2602_REG_SAMPLING_CTRL)*/ 106b7138212SCliff Cai #define SRATE_ENABLE_USB_MODE 0x001 /* Enable/Disable USB Mode */ 107b7138212SCliff Cai #define SRATE_BOS_RATE 0x002 /* Base Over-Sampling rate */ 108b7138212SCliff Cai #define SRATE_SAMPLE_RATE 0x03C /* Clock setting condition (Sampling rate control) */ 109b7138212SCliff Cai #define SRATE_CORECLK_DIV2 0x040 /* Core Clock divider select */ 110b7138212SCliff Cai #define SRATE_CLKOUT_DIV2 0x080 /* Clock Out divider select */ 111b7138212SCliff Cai 112b7138212SCliff Cai /*Active Control (SSM2602_REG_ACTIVE_CTRL)*/ 113b7138212SCliff Cai #define ACTIVE_ACTIVATE_CODEC 0x001 /* Activate Codec Digital Audio Interface */ 114b7138212SCliff Cai 115b7138212SCliff Cai /*********************************************************************/ 116b7138212SCliff Cai 117b7138212SCliff Cai #define SSM2602_CACHEREGNUM 10 118b7138212SCliff Cai 11902890535SLars-Peter Clausen enum ssm2602_clk { 12002890535SLars-Peter Clausen SSM2602_SYSCLK, 12102890535SLars-Peter Clausen SSM2602_CLK_CLKOUT, 12202890535SLars-Peter Clausen SSM2602_CLK_XTO 12302890535SLars-Peter Clausen }; 124b7138212SCliff Cai 125b7138212SCliff Cai #endif 126