1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * rt715.h -- RT715 ALSA SoC audio driver header 4 * 5 * Copyright(c) 2019 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT715_H__ 9 #define __RT715_H__ 10 11 #include <linux/regulator/consumer.h> 12 13 struct rt715_priv { 14 struct regmap *regmap; 15 struct regmap *sdw_regmap; 16 struct snd_soc_codec *codec; 17 struct sdw_slave *slave; 18 int dbg_nid; 19 int dbg_vid; 20 int dbg_payload; 21 enum sdw_slave_status status; 22 struct sdw_bus_params params; 23 bool hw_init; 24 bool first_hw_init; 25 }; 26 27 struct sdw_stream_data { 28 struct sdw_stream_runtime *sdw_stream; 29 }; 30 31 /* NID */ 32 #define RT715_AUDIO_FUNCTION_GROUP 0x01 33 #define RT715_MIC_ADC 0x07 34 #define RT715_LINE_ADC 0x08 35 #define RT715_MIX_ADC 0x09 36 #define RT715_DMIC1 0x12 37 #define RT715_DMIC2 0x13 38 #define RT715_MIC1 0x18 39 #define RT715_MIC2 0x19 40 #define RT715_LINE1 0x1a 41 #define RT715_LINE2 0x1b 42 #define RT715_DMIC3 0x1d 43 #define RT715_DMIC4 0x29 44 #define RT715_VENDOR_REGISTERS 0x20 45 #define RT715_MUX_IN1 0x22 46 #define RT715_MUX_IN2 0x23 47 #define RT715_MUX_IN3 0x24 48 #define RT715_MUX_IN4 0x25 49 #define RT715_MIX_ADC2 0x27 50 #define RT715_INLINE_CMD 0x55 51 52 /* Index (NID:20h) */ 53 #define RT715_SDW_INPUT_SEL 0x39 54 #define RT715_EXT_DMIC_CLK_CTRL2 0x54 55 56 /* Verb */ 57 #define RT715_VERB_SET_CONNECT_SEL 0x3100 58 #define RT715_VERB_GET_CONNECT_SEL 0xb100 59 #define RT715_VERB_SET_EAPD_BTLENABLE 0x3c00 60 #define RT715_VERB_SET_POWER_STATE 0x3500 61 #define RT715_VERB_SET_CHANNEL_STREAMID 0x3600 62 #define RT715_VERB_SET_PIN_WIDGET_CONTROL 0x3700 63 #define RT715_VERB_SET_CONFIG_DEFAULT1 0x4c00 64 #define RT715_VERB_SET_CONFIG_DEFAULT2 0x4d00 65 #define RT715_VERB_SET_CONFIG_DEFAULT3 0x4e00 66 #define RT715_VERB_SET_CONFIG_DEFAULT4 0x4f00 67 #define RT715_VERB_SET_UNSOLICITED_ENABLE 0x3800 68 #define RT715_SET_AMP_GAIN_MUTE_H 0x7300 69 #define RT715_SET_AMP_GAIN_MUTE_L 0x8380 70 #define RT715_READ_HDA_3 0x2012 71 #define RT715_READ_HDA_2 0x2013 72 #define RT715_READ_HDA_1 0x2014 73 #define RT715_READ_HDA_0 0x2015 74 #define RT715_PRIV_INDEX_W_H 0x7520 75 #define RT715_PRIV_INDEX_W_L 0x85a0 76 #define RT715_PRIV_DATA_W_H 0x7420 77 #define RT715_PRIV_DATA_W_L 0x84a0 78 #define RT715_PRIV_INDEX_R_H 0x9d20 79 #define RT715_PRIV_INDEX_R_L 0xada0 80 #define RT715_PRIV_DATA_R_H 0x9c20 81 #define RT715_PRIV_DATA_R_L 0xaca0 82 #define RT715_MIC_ADC_FORMAT_H 0x7207 83 #define RT715_MIC_ADC_FORMAT_L 0x8287 84 #define RT715_MIC_LINE_FORMAT_H 0x7208 85 #define RT715_MIC_LINE_FORMAT_L 0x8288 86 #define RT715_MIX_ADC_FORMAT_H 0x7209 87 #define RT715_MIX_ADC_FORMAT_L 0x8289 88 #define RT715_MIX_ADC2_FORMAT_H 0x7227 89 #define RT715_MIX_ADC2_FORMAT_L 0x82a7 90 #define RT715_FUNC_RESET 0xff01 91 92 #define RT715_SET_AUDIO_POWER_STATE\ 93 (RT715_VERB_SET_POWER_STATE | RT715_AUDIO_FUNCTION_GROUP) 94 #define RT715_SET_PIN_DMIC1\ 95 (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC1) 96 #define RT715_SET_PIN_DMIC2\ 97 (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC2) 98 #define RT715_SET_PIN_DMIC3\ 99 (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC3) 100 #define RT715_SET_PIN_DMIC4\ 101 (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC4) 102 #define RT715_SET_PIN_MIC1\ 103 (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_MIC1) 104 #define RT715_SET_PIN_MIC2\ 105 (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_MIC2) 106 #define RT715_SET_PIN_LINE1\ 107 (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_LINE1) 108 #define RT715_SET_PIN_LINE2\ 109 (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_LINE2) 110 #define RT715_SET_MIC1_UNSOLICITED_ENABLE\ 111 (RT715_VERB_SET_UNSOLICITED_ENABLE | RT715_MIC1) 112 #define RT715_SET_MIC2_UNSOLICITED_ENABLE\ 113 (RT715_VERB_SET_UNSOLICITED_ENABLE | RT715_MIC2) 114 #define RT715_SET_STREAMID_MIC_ADC\ 115 (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIC_ADC) 116 #define RT715_SET_STREAMID_LINE_ADC\ 117 (RT715_VERB_SET_CHANNEL_STREAMID | RT715_LINE_ADC) 118 #define RT715_SET_STREAMID_MIX_ADC\ 119 (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIX_ADC) 120 #define RT715_SET_STREAMID_MIX_ADC2\ 121 (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIX_ADC2) 122 #define RT715_SET_GAIN_MIC_ADC_L\ 123 (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC_ADC) 124 #define RT715_SET_GAIN_MIC_ADC_H\ 125 (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC_ADC) 126 #define RT715_SET_GAIN_LINE_ADC_L\ 127 (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE_ADC) 128 #define RT715_SET_GAIN_LINE_ADC_H\ 129 (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE_ADC) 130 #define RT715_SET_GAIN_MIX_ADC_L\ 131 (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIX_ADC) 132 #define RT715_SET_GAIN_MIX_ADC_H\ 133 (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIX_ADC) 134 #define RT715_SET_GAIN_MIX_ADC2_L\ 135 (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIX_ADC2) 136 #define RT715_SET_GAIN_MIX_ADC2_H\ 137 (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIX_ADC2) 138 #define RT715_SET_GAIN_DMIC1_L\ 139 (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC1) 140 #define RT715_SET_GAIN_DMIC1_H\ 141 (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC1) 142 #define RT715_SET_GAIN_DMIC2_L\ 143 (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC2) 144 #define RT715_SET_GAIN_DMIC2_H\ 145 (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC2) 146 #define RT715_SET_GAIN_DMIC3_L\ 147 (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC3) 148 #define RT715_SET_GAIN_DMIC3_H\ 149 (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC3) 150 #define RT715_SET_GAIN_DMIC4_L\ 151 (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC4) 152 #define RT715_SET_GAIN_DMIC4_H\ 153 (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC4) 154 #define RT715_SET_GAIN_MIC1_L\ 155 (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC1) 156 #define RT715_SET_GAIN_MIC1_H\ 157 (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC1) 158 #define RT715_SET_GAIN_MIC2_L\ 159 (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC2) 160 #define RT715_SET_GAIN_MIC2_H\ 161 (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC2) 162 #define RT715_SET_GAIN_LINE1_L\ 163 (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE1) 164 #define RT715_SET_GAIN_LINE1_H\ 165 (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE1) 166 #define RT715_SET_GAIN_LINE2_L\ 167 (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE2) 168 #define RT715_SET_GAIN_LINE2_H\ 169 (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE2) 170 #define RT715_SET_DMIC1_CONFIG_DEFAULT1\ 171 (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC1) 172 #define RT715_SET_DMIC2_CONFIG_DEFAULT1\ 173 (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC2) 174 #define RT715_SET_DMIC1_CONFIG_DEFAULT2\ 175 (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC1) 176 #define RT715_SET_DMIC2_CONFIG_DEFAULT2\ 177 (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC2) 178 #define RT715_SET_DMIC1_CONFIG_DEFAULT3\ 179 (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC1) 180 #define RT715_SET_DMIC2_CONFIG_DEFAULT3\ 181 (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC2) 182 #define RT715_SET_DMIC1_CONFIG_DEFAULT4\ 183 (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC1) 184 #define RT715_SET_DMIC2_CONFIG_DEFAULT4\ 185 (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC2) 186 #define RT715_SET_DMIC3_CONFIG_DEFAULT1\ 187 (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC3) 188 #define RT715_SET_DMIC4_CONFIG_DEFAULT1\ 189 (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC4) 190 #define RT715_SET_DMIC3_CONFIG_DEFAULT2\ 191 (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC3) 192 #define RT715_SET_DMIC4_CONFIG_DEFAULT2\ 193 (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC4) 194 #define RT715_SET_DMIC3_CONFIG_DEFAULT3\ 195 (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC3) 196 #define RT715_SET_DMIC4_CONFIG_DEFAULT3\ 197 (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC4) 198 #define RT715_SET_DMIC3_CONFIG_DEFAULT4\ 199 (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC3) 200 #define RT715_SET_DMIC4_CONFIG_DEFAULT4\ 201 (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC4) 202 203 #define RT715_MUTE_SFT 7 204 #define RT715_DIR_IN_SFT 6 205 #define RT715_DIR_OUT_SFT 7 206 207 enum { 208 RT715_AIF1, 209 RT715_AIF2, 210 }; 211 212 #define RT715_POWER_UP_DELAY_MS 400 213 214 int rt715_io_init(struct device *dev, struct sdw_slave *slave); 215 int rt715_init(struct device *dev, struct regmap *sdw_regmap, 216 struct regmap *regmap, struct sdw_slave *slave); 217 218 int hda_to_sdw(unsigned int nid, unsigned int verb, unsigned int payload, 219 unsigned int *sdw_addr_h, unsigned int *sdw_data_h, 220 unsigned int *sdw_addr_l, unsigned int *sdw_data_l); 221 int rt715_clock_config(struct device *dev); 222 #endif /* __RT715_H__ */ 223