1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt715-sdca.c -- rt715 ALSA SoC audio driver 4 // 5 // Copyright(c) 2020 Realtek Semiconductor Corp. 6 // 7 // 8 // 9 10 #include <linux/module.h> 11 #include <linux/moduleparam.h> 12 #include <linux/kernel.h> 13 #include <linux/init.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/pm.h> 16 #include <linux/soundwire/sdw.h> 17 #include <linux/regmap.h> 18 #include <linux/slab.h> 19 #include <linux/platform_device.h> 20 #include <sound/core.h> 21 #include <sound/pcm.h> 22 #include <sound/pcm_params.h> 23 #include <sound/sdw.h> 24 #include <sound/soc.h> 25 #include <sound/soc-dapm.h> 26 #include <sound/initval.h> 27 #include <sound/tlv.h> 28 #include <linux/soundwire/sdw_registers.h> 29 30 #include "rt715-sdca.h" 31 32 static int rt715_sdca_index_write(struct rt715_sdca_priv *rt715, 33 unsigned int nid, unsigned int reg, unsigned int value) 34 { 35 struct regmap *regmap = rt715->mbq_regmap; 36 unsigned int addr; 37 int ret; 38 39 addr = (nid << 20) | reg; 40 41 ret = regmap_write(regmap, addr, value); 42 if (ret < 0) 43 dev_err(&rt715->slave->dev, 44 "Failed to set private value: %08x <= %04x %d\n", ret, addr, 45 value); 46 47 return ret; 48 } 49 50 static int rt715_sdca_index_read(struct rt715_sdca_priv *rt715, 51 unsigned int nid, unsigned int reg, unsigned int *value) 52 { 53 struct regmap *regmap = rt715->mbq_regmap; 54 unsigned int addr; 55 int ret; 56 57 addr = (nid << 20) | reg; 58 59 ret = regmap_read(regmap, addr, value); 60 if (ret < 0) 61 dev_err(&rt715->slave->dev, 62 "Failed to get private value: %06x => %04x ret=%d\n", 63 addr, *value, ret); 64 65 return ret; 66 } 67 68 static int rt715_sdca_index_update_bits(struct rt715_sdca_priv *rt715, 69 unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val) 70 { 71 unsigned int tmp; 72 int ret; 73 74 ret = rt715_sdca_index_read(rt715, nid, reg, &tmp); 75 if (ret < 0) 76 return ret; 77 78 set_mask_bits(&tmp, mask, val); 79 80 return rt715_sdca_index_write(rt715, nid, reg, tmp); 81 } 82 83 static inline unsigned int rt715_sdca_vol_gain(unsigned int u_ctrl_val, 84 unsigned int vol_max, unsigned int vol_gain_sft) 85 { 86 unsigned int val; 87 88 if (u_ctrl_val > vol_max) 89 u_ctrl_val = vol_max; 90 val = u_ctrl_val; 91 u_ctrl_val = 92 ((abs(u_ctrl_val - vol_gain_sft) * RT715_SDCA_DB_STEP) << 8) / 1000; 93 if (val <= vol_gain_sft) { 94 u_ctrl_val = ~u_ctrl_val; 95 u_ctrl_val += 1; 96 } 97 u_ctrl_val &= 0xffff; 98 99 return u_ctrl_val; 100 } 101 102 static inline unsigned int rt715_sdca_boost_gain(unsigned int u_ctrl_val, 103 unsigned int b_max, unsigned int b_gain_sft) 104 { 105 if (u_ctrl_val > b_max) 106 u_ctrl_val = b_max; 107 108 return (u_ctrl_val * 10) << b_gain_sft; 109 } 110 111 static inline unsigned int rt715_sdca_get_gain(unsigned int reg_val, 112 unsigned int gain_sft) 113 { 114 unsigned int neg_flag = 0; 115 116 if (reg_val & BIT(15)) { 117 reg_val = ~(reg_val - 1) & 0xffff; 118 neg_flag = 1; 119 } 120 reg_val *= 1000; 121 reg_val >>= 8; 122 if (neg_flag) 123 reg_val = gain_sft - reg_val / RT715_SDCA_DB_STEP; 124 else 125 reg_val = gain_sft + reg_val / RT715_SDCA_DB_STEP; 126 127 return reg_val; 128 } 129 130 /* SDCA Volume/Boost control */ 131 static int rt715_sdca_set_amp_gain_put(struct snd_kcontrol *kcontrol, 132 struct snd_ctl_elem_value *ucontrol) 133 { 134 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 135 struct soc_mixer_control *mc = 136 (struct soc_mixer_control *)kcontrol->private_value; 137 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 138 unsigned int gain_val, i, k_changed = 0; 139 int ret; 140 141 for (i = 0; i < 2; i++) { 142 if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_orig[i]) { 143 k_changed = 1; 144 break; 145 } 146 } 147 148 for (i = 0; i < 2; i++) { 149 rt715->kctl_2ch_orig[i] = ucontrol->value.integer.value[i]; 150 gain_val = 151 rt715_sdca_vol_gain(ucontrol->value.integer.value[i], mc->max, 152 mc->shift); 153 ret = regmap_write(rt715->mbq_regmap, mc->reg + i, gain_val); 154 if (ret != 0) { 155 dev_err(component->dev, "Failed to write 0x%x=0x%x\n", 156 mc->reg + i, gain_val); 157 return ret; 158 } 159 } 160 161 return k_changed; 162 } 163 164 static int rt715_sdca_set_amp_gain_4ch_put(struct snd_kcontrol *kcontrol, 165 struct snd_ctl_elem_value *ucontrol) 166 { 167 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 168 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 169 struct rt715_sdca_kcontrol_private *p = 170 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; 171 unsigned int reg_base = p->reg_base, k_changed = 0; 172 const unsigned int gain_sft = 0x2f; 173 unsigned int gain_val, i; 174 int ret; 175 176 for (i = 0; i < 4; i++) { 177 if (ucontrol->value.integer.value[i] != rt715->kctl_4ch_orig[i]) { 178 k_changed = 1; 179 break; 180 } 181 } 182 183 for (i = 0; i < 4; i++) { 184 rt715->kctl_4ch_orig[i] = ucontrol->value.integer.value[i]; 185 gain_val = 186 rt715_sdca_vol_gain(ucontrol->value.integer.value[i], p->max, 187 gain_sft); 188 ret = regmap_write(rt715->mbq_regmap, reg_base + i, 189 gain_val); 190 if (ret != 0) { 191 dev_err(component->dev, "Failed to write 0x%x=0x%x\n", 192 reg_base + i, gain_val); 193 return ret; 194 } 195 } 196 197 return k_changed; 198 } 199 200 static int rt715_sdca_set_amp_gain_8ch_put(struct snd_kcontrol *kcontrol, 201 struct snd_ctl_elem_value *ucontrol) 202 { 203 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 204 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 205 struct rt715_sdca_kcontrol_private *p = 206 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; 207 unsigned int reg_base = p->reg_base, i, k_changed = 0; 208 const unsigned int gain_sft = 8; 209 unsigned int gain_val, reg; 210 int ret; 211 212 for (i = 0; i < 8; i++) { 213 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_orig[i]) { 214 k_changed = 1; 215 break; 216 } 217 } 218 219 for (i = 0; i < 8; i++) { 220 rt715->kctl_8ch_orig[i] = ucontrol->value.integer.value[i]; 221 gain_val = 222 rt715_sdca_boost_gain(ucontrol->value.integer.value[i], p->max, 223 gain_sft); 224 reg = i < 7 ? reg_base + i : (reg_base - 1) | BIT(15); 225 ret = regmap_write(rt715->mbq_regmap, reg, gain_val); 226 if (ret != 0) { 227 dev_err(component->dev, "Failed to write 0x%x=0x%x\n", 228 reg, gain_val); 229 return ret; 230 } 231 } 232 233 return k_changed; 234 } 235 236 static int rt715_sdca_set_amp_gain_get(struct snd_kcontrol *kcontrol, 237 struct snd_ctl_elem_value *ucontrol) 238 { 239 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 240 struct soc_mixer_control *mc = 241 (struct soc_mixer_control *)kcontrol->private_value; 242 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 243 unsigned int val, i; 244 int ret; 245 246 for (i = 0; i < 2; i++) { 247 ret = regmap_read(rt715->mbq_regmap, mc->reg + i, &val); 248 if (ret < 0) { 249 dev_err(component->dev, "Failed to read 0x%x, ret=%d\n", 250 mc->reg + i, ret); 251 return ret; 252 } 253 ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, mc->shift); 254 } 255 256 return 0; 257 } 258 259 static int rt715_sdca_set_amp_gain_4ch_get(struct snd_kcontrol *kcontrol, 260 struct snd_ctl_elem_value *ucontrol) 261 { 262 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 263 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 264 struct rt715_sdca_kcontrol_private *p = 265 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; 266 unsigned int reg_base = p->reg_base, i; 267 const unsigned int gain_sft = 0x2f; 268 unsigned int val; 269 int ret; 270 271 for (i = 0; i < 4; i++) { 272 ret = regmap_read(rt715->mbq_regmap, reg_base + i, &val); 273 if (ret < 0) { 274 dev_err(component->dev, "Failed to read 0x%x, ret=%d\n", 275 reg_base + i, ret); 276 return ret; 277 } 278 ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, gain_sft); 279 } 280 281 return 0; 282 } 283 284 static int rt715_sdca_set_amp_gain_8ch_get(struct snd_kcontrol *kcontrol, 285 struct snd_ctl_elem_value *ucontrol) 286 { 287 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 288 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 289 struct rt715_sdca_kcontrol_private *p = 290 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; 291 unsigned int reg_base = p->reg_base; 292 const unsigned int gain_sft = 8; 293 unsigned int val_l, val_r; 294 unsigned int i, reg; 295 int ret; 296 297 for (i = 0; i < 8; i += 2) { 298 ret = regmap_read(rt715->mbq_regmap, reg_base + i, &val_l); 299 if (ret < 0) { 300 dev_err(component->dev, "Failed to read 0x%x, ret=%d\n", 301 reg_base + i, ret); 302 return ret; 303 } 304 ucontrol->value.integer.value[i] = (val_l >> gain_sft) / 10; 305 306 reg = (i == 6) ? (reg_base - 1) | BIT(15) : reg_base + 1 + i; 307 ret = regmap_read(rt715->mbq_regmap, reg, &val_r); 308 if (ret < 0) { 309 dev_err(component->dev, "Failed to read 0x%x, ret=%d\n", 310 reg, ret); 311 return ret; 312 } 313 ucontrol->value.integer.value[i + 1] = (val_r >> gain_sft) / 10; 314 } 315 316 return 0; 317 } 318 319 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -17625, 375, 0); 320 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0); 321 322 static int rt715_sdca_get_volsw(struct snd_kcontrol *kcontrol, 323 struct snd_ctl_elem_value *ucontrol) 324 { 325 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 326 struct rt715_sdca_kcontrol_private *p = 327 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; 328 unsigned int reg_base = p->reg_base; 329 unsigned int invert = p->invert, i; 330 int val; 331 332 for (i = 0; i < p->count; i += 2) { 333 val = snd_soc_component_read(component, reg_base + i); 334 if (val < 0) 335 return -EINVAL; 336 ucontrol->value.integer.value[i] = invert ? p->max - val : val; 337 338 val = snd_soc_component_read(component, reg_base + 1 + i); 339 if (val < 0) 340 return -EINVAL; 341 ucontrol->value.integer.value[i + 1] = 342 invert ? p->max - val : val; 343 } 344 345 return 0; 346 } 347 348 static int rt715_sdca_put_volsw(struct snd_kcontrol *kcontrol, 349 struct snd_ctl_elem_value *ucontrol) 350 { 351 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 352 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 353 struct rt715_sdca_kcontrol_private *p = 354 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; 355 unsigned int val[4] = {0}, val_mask, i, k_changed = 0; 356 unsigned int reg = p->reg_base; 357 unsigned int shift = p->shift; 358 unsigned int max = p->max; 359 unsigned int mask = (1 << fls(max)) - 1; 360 unsigned int invert = p->invert; 361 int err; 362 363 for (i = 0; i < 4; i++) { 364 if (ucontrol->value.integer.value[i] != rt715->kctl_switch_orig[i]) { 365 k_changed = 1; 366 break; 367 } 368 } 369 370 for (i = 0; i < 2; i++) { 371 rt715->kctl_switch_orig[i * 2] = ucontrol->value.integer.value[i * 2]; 372 val[i * 2] = ucontrol->value.integer.value[i * 2] & mask; 373 if (invert) 374 val[i * 2] = max - val[i * 2]; 375 val_mask = mask << shift; 376 val[i * 2] <<= shift; 377 378 rt715->kctl_switch_orig[i * 2 + 1] = 379 ucontrol->value.integer.value[i * 2 + 1]; 380 val[i * 2 + 1] = 381 ucontrol->value.integer.value[i * 2 + 1] & mask; 382 if (invert) 383 val[i * 2 + 1] = max - val[i * 2 + 1]; 384 385 val[i * 2 + 1] <<= shift; 386 387 err = snd_soc_component_update_bits(component, reg + i * 2, val_mask, 388 val[i * 2]); 389 if (err < 0) 390 return err; 391 392 err = snd_soc_component_update_bits(component, reg + 1 + i * 2, 393 val_mask, val[i * 2 + 1]); 394 if (err < 0) 395 return err; 396 } 397 398 return k_changed; 399 } 400 401 static int rt715_sdca_fu_info(struct snd_kcontrol *kcontrol, 402 struct snd_ctl_elem_info *uinfo) 403 { 404 struct rt715_sdca_kcontrol_private *p = 405 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value; 406 407 if (p->max == 1) 408 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 409 else 410 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 411 uinfo->count = p->count; 412 uinfo->value.integer.min = 0; 413 uinfo->value.integer.max = p->max; 414 return 0; 415 } 416 417 #define RT715_SDCA_PR_VALUE(xreg_base, xcount, xmax, xshift, xinvert) \ 418 ((unsigned long)&(struct rt715_sdca_kcontrol_private) \ 419 {.reg_base = xreg_base, .count = xcount, .max = xmax, \ 420 .shift = xshift, .invert = xinvert}) 421 422 #define RT715_SDCA_FU_CTRL(xname, reg_base, xshift, xmax, xinvert, xcount) \ 423 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ 424 .info = rt715_sdca_fu_info, \ 425 .get = rt715_sdca_get_volsw, \ 426 .put = rt715_sdca_put_volsw, \ 427 .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, \ 428 xshift, xinvert)} 429 430 #define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\ 431 xhandler_get, xhandler_put) \ 432 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ 433 .info = snd_soc_info_volsw, \ 434 .get = xhandler_get, .put = xhandler_put, \ 435 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \ 436 xmax, xinvert) } 437 438 #define RT715_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\ 439 xhandler_put, tlv_array, xcount, xmax) \ 440 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ 441 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ 442 SNDRV_CTL_ELEM_ACCESS_READWRITE, \ 443 .tlv.p = (tlv_array), \ 444 .info = rt715_sdca_fu_info, \ 445 .get = xhandler_get, .put = xhandler_put, \ 446 .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, 0, 0) } 447 448 #define RT715_SDCA_BOOST_EXT_TLV(xname, reg_base, xhandler_get,\ 449 xhandler_put, tlv_array, xcount, xmax) \ 450 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ 451 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ 452 SNDRV_CTL_ELEM_ACCESS_READWRITE, \ 453 .tlv.p = (tlv_array), \ 454 .info = rt715_sdca_fu_info, \ 455 .get = xhandler_get, .put = xhandler_put, \ 456 .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, 0, 0) } 457 458 static const struct snd_kcontrol_new rt715_sdca_snd_controls[] = { 459 /* Capture switch */ 460 SOC_DOUBLE_R("FU0A Capture Switch", 461 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL, 462 RT715_SDCA_FU_MUTE_CTRL, CH_01), 463 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL, 464 RT715_SDCA_FU_MUTE_CTRL, CH_02), 465 0, 1, 1), 466 RT715_SDCA_FU_CTRL("FU02 Capture Switch", 467 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL, 468 RT715_SDCA_FU_MUTE_CTRL, CH_01), 469 0, 1, 1, 4), 470 RT715_SDCA_FU_CTRL("FU06 Capture Switch", 471 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL, 472 RT715_SDCA_FU_MUTE_CTRL, CH_01), 473 0, 1, 1, 4), 474 /* Volume Control */ 475 SOC_DOUBLE_R_EXT_TLV("FU0A Capture Volume", 476 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL, 477 RT715_SDCA_FU_VOL_CTRL, CH_01), 478 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL, 479 RT715_SDCA_FU_VOL_CTRL, CH_02), 480 0x2f, 0x7f, 0, 481 rt715_sdca_set_amp_gain_get, rt715_sdca_set_amp_gain_put, 482 in_vol_tlv), 483 RT715_SDCA_EXT_TLV("FU02 Capture Volume", 484 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL, 485 RT715_SDCA_FU_VOL_CTRL, CH_01), 486 rt715_sdca_set_amp_gain_4ch_get, 487 rt715_sdca_set_amp_gain_4ch_put, 488 in_vol_tlv, 4, 0x7f), 489 RT715_SDCA_EXT_TLV("FU06 Capture Volume", 490 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL, 491 RT715_SDCA_FU_VOL_CTRL, CH_01), 492 rt715_sdca_set_amp_gain_4ch_get, 493 rt715_sdca_set_amp_gain_4ch_put, 494 in_vol_tlv, 4, 0x7f), 495 /* MIC Boost Control */ 496 RT715_SDCA_BOOST_EXT_TLV("FU0E Boost", 497 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN, 498 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01), 499 rt715_sdca_set_amp_gain_8ch_get, 500 rt715_sdca_set_amp_gain_8ch_put, 501 mic_vol_tlv, 8, 3), 502 RT715_SDCA_BOOST_EXT_TLV("FU0C Boost", 503 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN, 504 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01), 505 rt715_sdca_set_amp_gain_8ch_get, 506 rt715_sdca_set_amp_gain_8ch_put, 507 mic_vol_tlv, 8, 3), 508 }; 509 510 static int rt715_sdca_mux_get(struct snd_kcontrol *kcontrol, 511 struct snd_ctl_elem_value *ucontrol) 512 { 513 struct snd_soc_component *component = 514 snd_soc_dapm_kcontrol_component(kcontrol); 515 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 516 unsigned int val, mask_sft; 517 518 if (strstr(ucontrol->id.name, "ADC 22 Mux")) 519 mask_sft = 12; 520 else if (strstr(ucontrol->id.name, "ADC 23 Mux")) 521 mask_sft = 8; 522 else if (strstr(ucontrol->id.name, "ADC 24 Mux")) 523 mask_sft = 4; 524 else if (strstr(ucontrol->id.name, "ADC 25 Mux")) 525 mask_sft = 0; 526 else 527 return -EINVAL; 528 529 rt715_sdca_index_read(rt715, RT715_VENDOR_HDA_CTL, 530 RT715_HDA_LEGACY_MUX_CTL1, &val); 531 val = (val >> mask_sft) & 0xf; 532 533 /* 534 * The first two indices of ADC Mux 24/25 are routed to the same 535 * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2. 536 * To have a unique set of inputs, we skip the index1 of the muxes. 537 */ 538 if ((strstr(ucontrol->id.name, "ADC 24 Mux") || 539 strstr(ucontrol->id.name, "ADC 25 Mux")) && val > 0) 540 val -= 1; 541 ucontrol->value.enumerated.item[0] = val; 542 543 return 0; 544 } 545 546 static int rt715_sdca_mux_put(struct snd_kcontrol *kcontrol, 547 struct snd_ctl_elem_value *ucontrol) 548 { 549 struct snd_soc_component *component = 550 snd_soc_dapm_kcontrol_component(kcontrol); 551 struct snd_soc_dapm_context *dapm = 552 snd_soc_dapm_kcontrol_dapm(kcontrol); 553 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 554 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 555 unsigned int *item = ucontrol->value.enumerated.item; 556 unsigned int val, val2 = 0, change, mask_sft; 557 558 if (item[0] >= e->items) 559 return -EINVAL; 560 561 if (strstr(ucontrol->id.name, "ADC 22 Mux")) 562 mask_sft = 12; 563 else if (strstr(ucontrol->id.name, "ADC 23 Mux")) 564 mask_sft = 8; 565 else if (strstr(ucontrol->id.name, "ADC 24 Mux")) 566 mask_sft = 4; 567 else if (strstr(ucontrol->id.name, "ADC 25 Mux")) 568 mask_sft = 0; 569 else 570 return -EINVAL; 571 572 /* Verb ID = 0x701h, nid = e->reg */ 573 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; 574 575 rt715_sdca_index_read(rt715, RT715_VENDOR_HDA_CTL, 576 RT715_HDA_LEGACY_MUX_CTL1, &val2); 577 val2 = (val2 >> mask_sft) & 0xf; 578 579 change = val != val2; 580 581 if (change) 582 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_HDA_CTL, 583 RT715_HDA_LEGACY_MUX_CTL1, 0xf << mask_sft, val << mask_sft); 584 585 snd_soc_dapm_mux_update_power(dapm, kcontrol, item[0], e, NULL); 586 587 return change; 588 } 589 590 static const char * const adc_22_23_mux_text[] = { 591 "MIC1", 592 "MIC2", 593 "LINE1", 594 "LINE2", 595 "DMIC1", 596 "DMIC2", 597 "DMIC3", 598 "DMIC4", 599 }; 600 601 /* 602 * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and 603 * 1 will be connected to the same dmic source, therefore we skip index 1 to 604 * avoid misunderstanding on usage of dapm routing. 605 */ 606 static int rt715_adc_24_25_values[] = { 607 0, 608 2, 609 3, 610 4, 611 5, 612 }; 613 614 static const char * const adc_24_mux_text[] = { 615 "MIC2", 616 "DMIC1", 617 "DMIC2", 618 "DMIC3", 619 "DMIC4", 620 }; 621 622 static const char * const adc_25_mux_text[] = { 623 "MIC1", 624 "DMIC1", 625 "DMIC2", 626 "DMIC3", 627 "DMIC4", 628 }; 629 630 static SOC_ENUM_SINGLE_DECL(rt715_adc22_enum, SND_SOC_NOPM, 0, 631 adc_22_23_mux_text); 632 633 static SOC_ENUM_SINGLE_DECL(rt715_adc23_enum, SND_SOC_NOPM, 0, 634 adc_22_23_mux_text); 635 636 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum, 637 SND_SOC_NOPM, 0, 0xf, 638 adc_24_mux_text, rt715_adc_24_25_values); 639 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum, 640 SND_SOC_NOPM, 0, 0xf, 641 adc_25_mux_text, rt715_adc_24_25_values); 642 643 static const struct snd_kcontrol_new rt715_adc22_mux = 644 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum, 645 rt715_sdca_mux_get, rt715_sdca_mux_put); 646 647 static const struct snd_kcontrol_new rt715_adc23_mux = 648 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum, 649 rt715_sdca_mux_get, rt715_sdca_mux_put); 650 651 static const struct snd_kcontrol_new rt715_adc24_mux = 652 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum, 653 rt715_sdca_mux_get, rt715_sdca_mux_put); 654 655 static const struct snd_kcontrol_new rt715_adc25_mux = 656 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum, 657 rt715_sdca_mux_get, rt715_sdca_mux_put); 658 659 static int rt715_sdca_pde23_24_event(struct snd_soc_dapm_widget *w, 660 struct snd_kcontrol *kcontrol, int event) 661 { 662 struct snd_soc_component *component = 663 snd_soc_dapm_to_component(w->dapm); 664 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 665 666 switch (event) { 667 case SND_SOC_DAPM_POST_PMU: 668 regmap_write(rt715->regmap, 669 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CREQ_POW_EN, 670 RT715_SDCA_REQ_POW_CTRL, 671 CH_00), 0x00); 672 break; 673 case SND_SOC_DAPM_PRE_PMD: 674 regmap_write(rt715->regmap, 675 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CREQ_POW_EN, 676 RT715_SDCA_REQ_POW_CTRL, 677 CH_00), 0x03); 678 break; 679 } 680 return 0; 681 } 682 683 static const struct snd_soc_dapm_widget rt715_sdca_dapm_widgets[] = { 684 SND_SOC_DAPM_INPUT("DMIC1"), 685 SND_SOC_DAPM_INPUT("DMIC2"), 686 SND_SOC_DAPM_INPUT("DMIC3"), 687 SND_SOC_DAPM_INPUT("DMIC4"), 688 SND_SOC_DAPM_INPUT("MIC1"), 689 SND_SOC_DAPM_INPUT("MIC2"), 690 SND_SOC_DAPM_INPUT("LINE1"), 691 SND_SOC_DAPM_INPUT("LINE2"), 692 693 SND_SOC_DAPM_SUPPLY("PDE23_24", SND_SOC_NOPM, 0, 0, 694 rt715_sdca_pde23_24_event, 695 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 696 697 SND_SOC_DAPM_ADC("ADC 07", NULL, SND_SOC_NOPM, 4, 0), 698 SND_SOC_DAPM_ADC("ADC 08", NULL, SND_SOC_NOPM, 4, 0), 699 SND_SOC_DAPM_ADC("ADC 09", NULL, SND_SOC_NOPM, 4, 0), 700 SND_SOC_DAPM_ADC("ADC 27", NULL, SND_SOC_NOPM, 4, 0), 701 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0, 702 &rt715_adc22_mux), 703 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0, 704 &rt715_adc23_mux), 705 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0, 706 &rt715_adc24_mux), 707 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0, 708 &rt715_adc25_mux), 709 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0), 710 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0), 711 }; 712 713 static const struct snd_soc_dapm_route rt715_sdca_audio_map[] = { 714 {"DP6TX", NULL, "ADC 09"}, 715 {"DP6TX", NULL, "ADC 08"}, 716 {"DP4TX", NULL, "ADC 07"}, 717 {"DP4TX", NULL, "ADC 27"}, 718 {"DP4TX", NULL, "ADC 09"}, 719 {"DP4TX", NULL, "ADC 08"}, 720 721 {"LINE1", NULL, "PDE23_24"}, 722 {"LINE2", NULL, "PDE23_24"}, 723 {"MIC1", NULL, "PDE23_24"}, 724 {"MIC2", NULL, "PDE23_24"}, 725 {"DMIC1", NULL, "PDE23_24"}, 726 {"DMIC2", NULL, "PDE23_24"}, 727 {"DMIC3", NULL, "PDE23_24"}, 728 {"DMIC4", NULL, "PDE23_24"}, 729 730 {"ADC 09", NULL, "ADC 22 Mux"}, 731 {"ADC 08", NULL, "ADC 23 Mux"}, 732 {"ADC 07", NULL, "ADC 24 Mux"}, 733 {"ADC 27", NULL, "ADC 25 Mux"}, 734 {"ADC 22 Mux", "MIC1", "MIC1"}, 735 {"ADC 22 Mux", "MIC2", "MIC2"}, 736 {"ADC 22 Mux", "LINE1", "LINE1"}, 737 {"ADC 22 Mux", "LINE2", "LINE2"}, 738 {"ADC 22 Mux", "DMIC1", "DMIC1"}, 739 {"ADC 22 Mux", "DMIC2", "DMIC2"}, 740 {"ADC 22 Mux", "DMIC3", "DMIC3"}, 741 {"ADC 22 Mux", "DMIC4", "DMIC4"}, 742 {"ADC 23 Mux", "MIC1", "MIC1"}, 743 {"ADC 23 Mux", "MIC2", "MIC2"}, 744 {"ADC 23 Mux", "LINE1", "LINE1"}, 745 {"ADC 23 Mux", "LINE2", "LINE2"}, 746 {"ADC 23 Mux", "DMIC1", "DMIC1"}, 747 {"ADC 23 Mux", "DMIC2", "DMIC2"}, 748 {"ADC 23 Mux", "DMIC3", "DMIC3"}, 749 {"ADC 23 Mux", "DMIC4", "DMIC4"}, 750 {"ADC 24 Mux", "MIC2", "MIC2"}, 751 {"ADC 24 Mux", "DMIC1", "DMIC1"}, 752 {"ADC 24 Mux", "DMIC2", "DMIC2"}, 753 {"ADC 24 Mux", "DMIC3", "DMIC3"}, 754 {"ADC 24 Mux", "DMIC4", "DMIC4"}, 755 {"ADC 25 Mux", "MIC1", "MIC1"}, 756 {"ADC 25 Mux", "DMIC1", "DMIC1"}, 757 {"ADC 25 Mux", "DMIC2", "DMIC2"}, 758 {"ADC 25 Mux", "DMIC3", "DMIC3"}, 759 {"ADC 25 Mux", "DMIC4", "DMIC4"}, 760 }; 761 762 static int rt715_sdca_probe(struct snd_soc_component *component) 763 { 764 int ret; 765 766 ret = pm_runtime_resume(component->dev); 767 if (ret < 0 && ret != -EACCES) 768 return ret; 769 770 return 0; 771 } 772 773 static const struct snd_soc_component_driver soc_codec_dev_rt715_sdca = { 774 .probe = rt715_sdca_probe, 775 .controls = rt715_sdca_snd_controls, 776 .num_controls = ARRAY_SIZE(rt715_sdca_snd_controls), 777 .dapm_widgets = rt715_sdca_dapm_widgets, 778 .num_dapm_widgets = ARRAY_SIZE(rt715_sdca_dapm_widgets), 779 .dapm_routes = rt715_sdca_audio_map, 780 .num_dapm_routes = ARRAY_SIZE(rt715_sdca_audio_map), 781 .endianness = 1, 782 }; 783 784 static int rt715_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 785 int direction) 786 { 787 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 788 789 return 0; 790 } 791 792 static void rt715_sdca_shutdown(struct snd_pcm_substream *substream, 793 struct snd_soc_dai *dai) 794 795 { 796 snd_soc_dai_set_dma_data(dai, substream, NULL); 797 } 798 799 static int rt715_sdca_pcm_hw_params(struct snd_pcm_substream *substream, 800 struct snd_pcm_hw_params *params, 801 struct snd_soc_dai *dai) 802 { 803 struct snd_soc_component *component = dai->component; 804 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 805 struct sdw_stream_config stream_config = {0}; 806 struct sdw_port_config port_config = {0}; 807 struct sdw_stream_runtime *sdw_stream; 808 int retval; 809 unsigned int val; 810 811 sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 812 813 if (!sdw_stream) 814 return -EINVAL; 815 816 if (!rt715->slave) 817 return -EINVAL; 818 819 snd_sdw_params_to_config(substream, params, &stream_config, &port_config); 820 821 switch (dai->id) { 822 case RT715_AIF1: 823 port_config.num = 6; 824 rt715_sdca_index_write(rt715, RT715_VENDOR_REG, RT715_SDW_INPUT_SEL, 825 0xa500); 826 break; 827 case RT715_AIF2: 828 port_config.num = 4; 829 rt715_sdca_index_write(rt715, RT715_VENDOR_REG, RT715_SDW_INPUT_SEL, 830 0xaf00); 831 break; 832 default: 833 dev_err(component->dev, "Invalid DAI id %d\n", dai->id); 834 return -EINVAL; 835 } 836 837 retval = sdw_stream_add_slave(rt715->slave, &stream_config, 838 &port_config, 1, sdw_stream); 839 if (retval) { 840 dev_err(component->dev, "Unable to configure port, retval:%d\n", 841 retval); 842 return retval; 843 } 844 845 switch (params_rate(params)) { 846 case 8000: 847 val = 0x1; 848 break; 849 case 11025: 850 val = 0x2; 851 break; 852 case 12000: 853 val = 0x3; 854 break; 855 case 16000: 856 val = 0x4; 857 break; 858 case 22050: 859 val = 0x5; 860 break; 861 case 24000: 862 val = 0x6; 863 break; 864 case 32000: 865 val = 0x7; 866 break; 867 case 44100: 868 val = 0x8; 869 break; 870 case 48000: 871 val = 0x9; 872 break; 873 case 88200: 874 val = 0xa; 875 break; 876 case 96000: 877 val = 0xb; 878 break; 879 case 176400: 880 val = 0xc; 881 break; 882 case 192000: 883 val = 0xd; 884 break; 885 case 384000: 886 val = 0xe; 887 break; 888 case 768000: 889 val = 0xf; 890 break; 891 default: 892 dev_err(component->dev, "Unsupported sample rate %d\n", 893 params_rate(params)); 894 return -EINVAL; 895 } 896 897 regmap_write(rt715->regmap, 898 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CS_FREQ_IND_EN, 899 RT715_SDCA_FREQ_IND_CTRL, CH_00), val); 900 901 return 0; 902 } 903 904 static int rt715_sdca_pcm_hw_free(struct snd_pcm_substream *substream, 905 struct snd_soc_dai *dai) 906 { 907 struct snd_soc_component *component = dai->component; 908 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component); 909 struct sdw_stream_runtime *sdw_stream = 910 snd_soc_dai_get_dma_data(dai, substream); 911 912 if (!rt715->slave) 913 return -EINVAL; 914 915 sdw_stream_remove_slave(rt715->slave, sdw_stream); 916 return 0; 917 } 918 919 #define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) 920 #define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 921 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 922 923 static const struct snd_soc_dai_ops rt715_sdca_ops = { 924 .hw_params = rt715_sdca_pcm_hw_params, 925 .hw_free = rt715_sdca_pcm_hw_free, 926 .set_stream = rt715_sdca_set_sdw_stream, 927 .shutdown = rt715_sdca_shutdown, 928 }; 929 930 static struct snd_soc_dai_driver rt715_sdca_dai[] = { 931 { 932 .name = "rt715-aif1", 933 .id = RT715_AIF1, 934 .capture = { 935 .stream_name = "DP6 Capture", 936 .channels_min = 1, 937 .channels_max = 2, 938 .rates = RT715_STEREO_RATES, 939 .formats = RT715_FORMATS, 940 }, 941 .ops = &rt715_sdca_ops, 942 }, 943 { 944 .name = "rt715-aif2", 945 .id = RT715_AIF2, 946 .capture = { 947 .stream_name = "DP4 Capture", 948 .channels_min = 1, 949 .channels_max = 2, 950 .rates = RT715_STEREO_RATES, 951 .formats = RT715_FORMATS, 952 }, 953 .ops = &rt715_sdca_ops, 954 }, 955 }; 956 957 /* Bus clock frequency */ 958 #define RT715_CLK_FREQ_9600000HZ 9600000 959 #define RT715_CLK_FREQ_12000000HZ 12000000 960 #define RT715_CLK_FREQ_6000000HZ 6000000 961 #define RT715_CLK_FREQ_4800000HZ 4800000 962 #define RT715_CLK_FREQ_2400000HZ 2400000 963 #define RT715_CLK_FREQ_12288000HZ 12288000 964 965 int rt715_sdca_init(struct device *dev, struct regmap *mbq_regmap, 966 struct regmap *regmap, struct sdw_slave *slave) 967 { 968 struct rt715_sdca_priv *rt715; 969 int ret; 970 971 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL); 972 if (!rt715) 973 return -ENOMEM; 974 975 dev_set_drvdata(dev, rt715); 976 rt715->slave = slave; 977 rt715->regmap = regmap; 978 rt715->mbq_regmap = mbq_regmap; 979 rt715->hw_sdw_ver = slave->id.sdw_version; 980 /* 981 * Mark hw_init to false 982 * HW init will be performed when device reports present 983 */ 984 rt715->hw_init = false; 985 rt715->first_hw_init = false; 986 987 ret = devm_snd_soc_register_component(dev, 988 &soc_codec_dev_rt715_sdca, 989 rt715_sdca_dai, 990 ARRAY_SIZE(rt715_sdca_dai)); 991 992 return ret; 993 } 994 995 int rt715_sdca_io_init(struct device *dev, struct sdw_slave *slave) 996 { 997 struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev); 998 unsigned int hw_ver; 999 1000 if (rt715->hw_init) 1001 return 0; 1002 1003 /* 1004 * PM runtime is only enabled when a Slave reports as Attached 1005 */ 1006 if (!rt715->first_hw_init) { 1007 /* set autosuspend parameters */ 1008 pm_runtime_set_autosuspend_delay(&slave->dev, 3000); 1009 pm_runtime_use_autosuspend(&slave->dev); 1010 1011 /* update count of parent 'active' children */ 1012 pm_runtime_set_active(&slave->dev); 1013 1014 /* make sure the device does not suspend immediately */ 1015 pm_runtime_mark_last_busy(&slave->dev); 1016 1017 pm_runtime_enable(&slave->dev); 1018 1019 rt715->first_hw_init = true; 1020 } 1021 1022 pm_runtime_get_noresume(&slave->dev); 1023 1024 rt715_sdca_index_read(rt715, RT715_VENDOR_REG, 1025 RT715_PRODUCT_NUM, &hw_ver); 1026 hw_ver = hw_ver & 0x000f; 1027 1028 /* set clock selector = external */ 1029 regmap_write(rt715->regmap, 1030 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CX_CLK_SEL_EN, 1031 RT715_SDCA_CX_CLK_SEL_CTRL, CH_00), 0x1); 1032 /* set GPIO_4/5/6 to be 3rd/4th DMIC usage */ 1033 if (hw_ver == 0x0) 1034 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG, 1035 RT715_AD_FUNC_EN, 0x54, 0x54); 1036 else if (hw_ver == 0x1) { 1037 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG, 1038 RT715_AD_FUNC_EN, 0x55, 0x55); 1039 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG, 1040 RT715_REV_1, 0x40, 0x40); 1041 } 1042 /* DFLL Calibration trigger */ 1043 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG, 1044 RT715_DFLL_VAD, 0x1, 0x1); 1045 /* trigger mode = VAD enable */ 1046 regmap_write(rt715->regmap, 1047 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN, 1048 RT715_SDCA_SMPU_TRIG_EN_CTRL, CH_00), 0x2); 1049 /* SMPU-1 interrupt enable mask */ 1050 regmap_update_bits(rt715->regmap, RT715_INT_MASK, 0x1, 0x1); 1051 1052 /* Mark Slave initialization complete */ 1053 rt715->hw_init = true; 1054 1055 pm_runtime_mark_last_busy(&slave->dev); 1056 pm_runtime_put_autosuspend(&slave->dev); 1057 1058 return 0; 1059 } 1060 1061 MODULE_DESCRIPTION("ASoC rt715 driver SDW SDCA"); 1062 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>"); 1063 MODULE_LICENSE("GPL v2"); 1064