1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt715-sdca-sdw.c -- rt715 ALSA SoC audio driver
4 //
5 // Copyright(c) 2020 Realtek Semiconductor Corp.
6 //
7 //
8 
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/mod_devicetable.h>
12 #include <linux/soundwire/sdw.h>
13 #include <linux/soundwire/sdw_type.h>
14 #include <linux/soundwire/sdw_registers.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regmap.h>
18 #include <sound/soc.h>
19 #include "rt715-sdca.h"
20 #include "rt715-sdca-sdw.h"
21 
22 static bool rt715_sdca_readable_register(struct device *dev, unsigned int reg)
23 {
24 	switch (reg) {
25 	case 0x201a ... 0x2027:
26 	case 0x2029 ... 0x202a:
27 	case 0x202d ... 0x2034:
28 	case 0x2200 ... 0x2204:
29 	case 0x2206 ... 0x2212:
30 	case 0x2230 ... 0x2239:
31 	case 0x2f5b:
32 	case SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
33 		RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00):
34 		return true;
35 	default:
36 		return false;
37 	}
38 }
39 
40 static bool rt715_sdca_volatile_register(struct device *dev, unsigned int reg)
41 {
42 	switch (reg) {
43 	case 0x201b:
44 	case 0x201c:
45 	case 0x201d:
46 	case 0x201f:
47 	case 0x2021:
48 	case 0x2023:
49 	case 0x2230:
50 	case 0x202d ... 0x202f: /* BRA */
51 	case 0x2200 ... 0x2212: /* i2c debug */
52 	case 0x2f07:
53 	case 0x2f1b ... 0x2f1e:
54 	case 0x2f30 ... 0x2f34:
55 	case 0x2f50 ... 0x2f51:
56 	case 0x2f53 ... 0x2f59:
57 	case 0x2f5c ... 0x2f5f:
58 	case SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
59 		RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00): /* VAD Searching status */
60 		return true;
61 	default:
62 		return false;
63 	}
64 }
65 
66 static bool rt715_sdca_mbq_readable_register(struct device *dev, unsigned int reg)
67 {
68 	switch (reg) {
69 	case 0x2000000:
70 	case 0x200002b:
71 	case 0x2000036:
72 	case 0x2000037:
73 	case 0x2000039:
74 	case 0x2000044:
75 	case 0x6100000:
76 		return true;
77 	default:
78 		return false;
79 	}
80 }
81 
82 static bool rt715_sdca_mbq_volatile_register(struct device *dev, unsigned int reg)
83 {
84 	switch (reg) {
85 	case 0x2000000:
86 		return true;
87 	default:
88 		return false;
89 	}
90 }
91 
92 static const struct regmap_config rt715_sdca_regmap = {
93 	.reg_bits = 32,
94 	.val_bits = 8,
95 	.readable_reg = rt715_sdca_readable_register,
96 	.volatile_reg = rt715_sdca_volatile_register,
97 	.max_register = 0x43ffffff,
98 	.reg_defaults = rt715_reg_defaults_sdca,
99 	.num_reg_defaults = ARRAY_SIZE(rt715_reg_defaults_sdca),
100 	.cache_type = REGCACHE_RBTREE,
101 	.use_single_read = true,
102 	.use_single_write = true,
103 };
104 
105 static const struct regmap_config rt715_sdca_mbq_regmap = {
106 	.name = "sdw-mbq",
107 	.reg_bits = 32,
108 	.val_bits = 16,
109 	.readable_reg = rt715_sdca_mbq_readable_register,
110 	.volatile_reg = rt715_sdca_mbq_volatile_register,
111 	.max_register = 0x43ffffff,
112 	.reg_defaults = rt715_mbq_reg_defaults_sdca,
113 	.num_reg_defaults = ARRAY_SIZE(rt715_mbq_reg_defaults_sdca),
114 	.cache_type = REGCACHE_RBTREE,
115 	.use_single_read = true,
116 	.use_single_write = true,
117 };
118 
119 static int rt715_sdca_update_status(struct sdw_slave *slave,
120 				enum sdw_slave_status status)
121 {
122 	struct rt715_sdca_priv *rt715 = dev_get_drvdata(&slave->dev);
123 
124 	/* Update the status */
125 	rt715->status = status;
126 
127 	/*
128 	 * Perform initialization only if slave status is present and
129 	 * hw_init flag is false
130 	 */
131 	if (rt715->hw_init || rt715->status != SDW_SLAVE_ATTACHED)
132 		return 0;
133 
134 	/* perform I/O transfers required for Slave initialization */
135 	return rt715_sdca_io_init(&slave->dev, slave);
136 }
137 
138 static int rt715_sdca_read_prop(struct sdw_slave *slave)
139 {
140 	struct sdw_slave_prop *prop = &slave->prop;
141 	int nval, i;
142 	u32 bit;
143 	unsigned long addr;
144 	struct sdw_dpn_prop *dpn;
145 
146 	prop->paging_support = true;
147 
148 	/* first we need to allocate memory for set bits in port lists */
149 	prop->source_ports = 0x50;/* BITMAP: 01010000 */
150 	prop->sink_ports = 0x0;	/* BITMAP:  00000000 */
151 
152 	nval = hweight32(prop->source_ports);
153 	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
154 					sizeof(*prop->src_dpn_prop),
155 					GFP_KERNEL);
156 	if (!prop->src_dpn_prop)
157 		return -ENOMEM;
158 
159 	dpn = prop->src_dpn_prop;
160 	i = 0;
161 	addr = prop->source_ports;
162 	for_each_set_bit(bit, &addr, 32) {
163 		dpn[i].num = bit;
164 		dpn[i].simple_ch_prep_sm = true;
165 		dpn[i].ch_prep_timeout = 10;
166 		i++;
167 	}
168 
169 	/* set the timeout values */
170 	prop->clk_stop_timeout = 20;
171 
172 	return 0;
173 }
174 
175 static struct sdw_slave_ops rt715_sdca_slave_ops = {
176 	.read_prop = rt715_sdca_read_prop,
177 	.update_status = rt715_sdca_update_status,
178 };
179 
180 static int rt715_sdca_sdw_probe(struct sdw_slave *slave,
181 			   const struct sdw_device_id *id)
182 {
183 	struct regmap *mbq_regmap, *regmap;
184 
185 	/* Regmap Initialization */
186 	mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt715_sdca_mbq_regmap);
187 	if (IS_ERR(mbq_regmap))
188 		return PTR_ERR(mbq_regmap);
189 
190 	regmap = devm_regmap_init_sdw(slave, &rt715_sdca_regmap);
191 	if (IS_ERR(regmap))
192 		return PTR_ERR(regmap);
193 
194 	return rt715_sdca_init(&slave->dev, mbq_regmap, regmap, slave);
195 }
196 
197 static int rt715_sdca_sdw_remove(struct sdw_slave *slave)
198 {
199 	struct rt715_sdca_priv *rt715 = dev_get_drvdata(&slave->dev);
200 
201 	if (rt715->first_hw_init)
202 		pm_runtime_disable(&slave->dev);
203 
204 	return 0;
205 }
206 
207 static const struct sdw_device_id rt715_sdca_id[] = {
208 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x715, 0x3, 0x1, 0),
209 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x714, 0x3, 0x1, 0),
210 	{},
211 };
212 MODULE_DEVICE_TABLE(sdw, rt715_sdca_id);
213 
214 static int __maybe_unused rt715_dev_suspend(struct device *dev)
215 {
216 	struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev);
217 
218 	if (!rt715->hw_init)
219 		return 0;
220 
221 	regcache_cache_only(rt715->regmap, true);
222 	regcache_mark_dirty(rt715->regmap);
223 	regcache_cache_only(rt715->mbq_regmap, true);
224 	regcache_mark_dirty(rt715->mbq_regmap);
225 
226 	return 0;
227 }
228 
229 #define RT715_PROBE_TIMEOUT 5000
230 
231 static int __maybe_unused rt715_dev_resume(struct device *dev)
232 {
233 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
234 	struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev);
235 	unsigned long time;
236 
237 	if (!rt715->first_hw_init)
238 		return 0;
239 
240 	if (!slave->unattach_request)
241 		goto regmap_sync;
242 
243 	time = wait_for_completion_timeout(&slave->enumeration_complete,
244 					   msecs_to_jiffies(RT715_PROBE_TIMEOUT));
245 	if (!time) {
246 		dev_err(&slave->dev, "Enumeration not complete, timed out\n");
247 		return -ETIMEDOUT;
248 	}
249 
250 regmap_sync:
251 	slave->unattach_request = 0;
252 	regcache_cache_only(rt715->regmap, false);
253 	regcache_sync_region(rt715->regmap,
254 		SDW_SDCA_CTL(FUN_JACK_CODEC, RT715_SDCA_ST_EN, RT715_SDCA_ST_CTRL,
255 			CH_00),
256 		SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
257 			RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00));
258 	regcache_cache_only(rt715->mbq_regmap, false);
259 	regcache_sync_region(rt715->mbq_regmap, 0x2000000, 0x61020ff);
260 	regcache_sync_region(rt715->mbq_regmap,
261 		SDW_SDCA_CTL(FUN_JACK_CODEC, RT715_SDCA_ST_EN, RT715_SDCA_ST_CTRL,
262 			CH_00),
263 		SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
264 			RT715_SDCA_SMPU_TRIG_ST_CTRL, CH_00));
265 
266 	return 0;
267 }
268 
269 static const struct dev_pm_ops rt715_pm = {
270 	SET_SYSTEM_SLEEP_PM_OPS(rt715_dev_suspend, rt715_dev_resume)
271 	SET_RUNTIME_PM_OPS(rt715_dev_suspend, rt715_dev_resume, NULL)
272 };
273 
274 static struct sdw_driver rt715_sdw_driver = {
275 	.driver = {
276 		.name = "rt715-sdca",
277 		.owner = THIS_MODULE,
278 		.pm = &rt715_pm,
279 	},
280 	.probe = rt715_sdca_sdw_probe,
281 	.remove = rt715_sdca_sdw_remove,
282 	.ops = &rt715_sdca_slave_ops,
283 	.id_table = rt715_sdca_id,
284 };
285 module_sdw_driver(rt715_sdw_driver);
286 
287 MODULE_DESCRIPTION("ASoC RT715 driver SDW SDCA");
288 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
289 MODULE_LICENSE("GPL v2");
290