1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt712-sdca-dmic.c -- rt712 SDCA DMIC ALSA SoC audio driver
4 //
5 // Copyright(c) 2023 Realtek Semiconductor Corp.
6 //
7 //
8 
9 #include <linux/module.h>
10 #include <linux/mod_devicetable.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/soundwire/sdw_registers.h>
13 #include <linux/slab.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <sound/pcm_params.h>
17 #include <sound/tlv.h>
18 #include "rt712-sdca.h"
19 #include "rt712-sdca-dmic.h"
20 
21 static bool rt712_sdca_dmic_readable_register(struct device *dev, unsigned int reg)
22 {
23 	switch (reg) {
24 	case 0x201a ... 0x201f:
25 	case 0x2029 ... 0x202a:
26 	case 0x202d ... 0x2034:
27 	case 0x2230 ... 0x2232:
28 	case 0x2f01 ... 0x2f0a:
29 	case 0x2f35 ... 0x2f36:
30 	case 0x2f52:
31 	case 0x2f58 ... 0x2f59:
32 	case 0x3201:
33 	case 0x320c:
34 		return true;
35 	default:
36 		return false;
37 	}
38 }
39 
40 static bool rt712_sdca_dmic_volatile_register(struct device *dev, unsigned int reg)
41 {
42 	switch (reg) {
43 	case 0x201b:
44 	case 0x201c:
45 	case 0x201d:
46 	case 0x201f:
47 	case 0x202d ... 0x202f:
48 	case 0x2230:
49 	case 0x2f01:
50 	case 0x2f35:
51 	case 0x320c:
52 		return true;
53 	default:
54 		return false;
55 	}
56 }
57 
58 static bool rt712_sdca_dmic_mbq_readable_register(struct device *dev, unsigned int reg)
59 {
60 	switch (reg) {
61 	case 0x2000000 ... 0x200008e:
62 	case 0x5300000 ... 0x530000e:
63 	case 0x5400000 ... 0x540000e:
64 	case 0x5600000 ... 0x5600008:
65 	case 0x5700000 ... 0x570000d:
66 	case 0x5800000 ... 0x5800021:
67 	case 0x5900000 ... 0x5900028:
68 	case 0x5a00000 ... 0x5a00009:
69 	case 0x5b00000 ... 0x5b00051:
70 	case 0x5c00000 ... 0x5c0009a:
71 	case 0x5d00000 ... 0x5d00009:
72 	case 0x5f00000 ... 0x5f00030:
73 	case 0x6100000 ... 0x6100068:
74 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01):
75 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02):
76 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03):
77 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04):
78 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01):
79 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02):
80 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03):
81 	case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04):
82 		return true;
83 	default:
84 		return false;
85 	}
86 }
87 
88 static bool rt712_sdca_dmic_mbq_volatile_register(struct device *dev, unsigned int reg)
89 {
90 	switch (reg) {
91 	case 0x2000000:
92 	case 0x200001a:
93 	case 0x2000024:
94 	case 0x2000046:
95 	case 0x200008a:
96 	case 0x5800000:
97 	case 0x5800001:
98 	case 0x6100008:
99 		return true;
100 	default:
101 		return false;
102 	}
103 }
104 
105 static const struct regmap_config rt712_sdca_dmic_regmap = {
106 	.reg_bits = 32,
107 	.val_bits = 8,
108 	.readable_reg = rt712_sdca_dmic_readable_register,
109 	.volatile_reg = rt712_sdca_dmic_volatile_register,
110 	.max_register = 0x40981300,
111 	.reg_defaults = rt712_sdca_dmic_reg_defaults,
112 	.num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_reg_defaults),
113 	.cache_type = REGCACHE_RBTREE,
114 	.use_single_read = true,
115 	.use_single_write = true,
116 };
117 
118 static const struct regmap_config rt712_sdca_dmic_mbq_regmap = {
119 	.name = "sdw-mbq",
120 	.reg_bits = 32,
121 	.val_bits = 16,
122 	.readable_reg = rt712_sdca_dmic_mbq_readable_register,
123 	.volatile_reg = rt712_sdca_dmic_mbq_volatile_register,
124 	.max_register = 0x40800f14,
125 	.reg_defaults = rt712_sdca_dmic_mbq_defaults,
126 	.num_reg_defaults = ARRAY_SIZE(rt712_sdca_dmic_mbq_defaults),
127 	.cache_type = REGCACHE_RBTREE,
128 	.use_single_read = true,
129 	.use_single_write = true,
130 };
131 
132 static int rt712_sdca_dmic_index_write(struct rt712_sdca_dmic_priv *rt712,
133 		unsigned int nid, unsigned int reg, unsigned int value)
134 {
135 	int ret;
136 	struct regmap *regmap = rt712->mbq_regmap;
137 	unsigned int addr = (nid << 20) | reg;
138 
139 	ret = regmap_write(regmap, addr, value);
140 	if (ret < 0)
141 		dev_err(&rt712->slave->dev,
142 			"Failed to set private value: %06x <= %04x ret=%d\n",
143 			addr, value, ret);
144 
145 	return ret;
146 }
147 
148 static int rt712_sdca_dmic_index_read(struct rt712_sdca_dmic_priv *rt712,
149 		unsigned int nid, unsigned int reg, unsigned int *value)
150 {
151 	int ret;
152 	struct regmap *regmap = rt712->mbq_regmap;
153 	unsigned int addr = (nid << 20) | reg;
154 
155 	ret = regmap_read(regmap, addr, value);
156 	if (ret < 0)
157 		dev_err(&rt712->slave->dev,
158 			"Failed to get private value: %06x => %04x ret=%d\n",
159 			addr, *value, ret);
160 
161 	return ret;
162 }
163 
164 static int rt712_sdca_dmic_index_update_bits(struct rt712_sdca_dmic_priv *rt712,
165 	unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
166 {
167 	unsigned int tmp;
168 	int ret;
169 
170 	ret = rt712_sdca_dmic_index_read(rt712, nid, reg, &tmp);
171 	if (ret < 0)
172 		return ret;
173 
174 	set_mask_bits(&tmp, mask, val);
175 	return rt712_sdca_dmic_index_write(rt712, nid, reg, tmp);
176 }
177 
178 static int rt712_sdca_dmic_io_init(struct device *dev, struct sdw_slave *slave)
179 {
180 	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
181 
182 	if (rt712->hw_init)
183 		return 0;
184 
185 	if (rt712->first_hw_init) {
186 		regcache_cache_only(rt712->regmap, false);
187 		regcache_cache_bypass(rt712->regmap, true);
188 		regcache_cache_only(rt712->mbq_regmap, false);
189 		regcache_cache_bypass(rt712->mbq_regmap, true);
190 	} else {
191 		/*
192 		 * PM runtime is only enabled when a Slave reports as Attached
193 		 */
194 
195 		/* set autosuspend parameters */
196 		pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
197 		pm_runtime_use_autosuspend(&slave->dev);
198 
199 		/* update count of parent 'active' children */
200 		pm_runtime_set_active(&slave->dev);
201 
202 		/* make sure the device does not suspend immediately */
203 		pm_runtime_mark_last_busy(&slave->dev);
204 
205 		pm_runtime_enable(&slave->dev);
206 	}
207 
208 	pm_runtime_get_noresume(&slave->dev);
209 
210 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
211 		RT712_ADC0A_08_PDE_FLOAT_CTL, 0x1112);
212 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
213 		RT712_ADC0B_11_PDE_FLOAT_CTL, 0x1111);
214 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
215 		RT712_DMIC1_2_PDE_FLOAT_CTL, 0x1111);
216 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
217 		RT712_I2S_IN_OUT_PDE_FLOAT_CTL, 0x1155);
218 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
219 		RT712_DMIC_ENT_FLOAT_CTL, 0x2626);
220 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
221 		RT712_ADC_ENT_FLOAT_CTL, 0x1e19);
222 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
223 		RT712_DMIC_GAIN_ENT_FLOAT_CTL0, 0x1515);
224 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
225 		RT712_ADC_VOL_CH_FLOAT_CTL2, 0x0304);
226 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
227 		RT712_DMIC_GAIN_ENT_FLOAT_CTL2, 0x0304);
228 	rt712_sdca_dmic_index_write(rt712, RT712_VENDOR_HDA_CTL,
229 		RT712_HDA_LEGACY_CONFIG_CTL0, 0x0050);
230 	regmap_write(rt712->regmap,
231 		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT26, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x01);
232 	rt712_sdca_dmic_index_write(rt712, RT712_ULTRA_SOUND_DET,
233 		RT712_ULTRA_SOUND_DETECTOR6, 0x3200);
234 	regmap_write(rt712->regmap, RT712_RC_CAL, 0x23);
235 	regmap_write(rt712->regmap, 0x2f52, 0x00);
236 
237 	if (rt712->first_hw_init) {
238 		regcache_cache_bypass(rt712->regmap, false);
239 		regcache_mark_dirty(rt712->regmap);
240 		regcache_cache_bypass(rt712->mbq_regmap, false);
241 		regcache_mark_dirty(rt712->mbq_regmap);
242 	} else
243 		rt712->first_hw_init = true;
244 
245 	/* Mark Slave initialization complete */
246 	rt712->hw_init = true;
247 
248 	pm_runtime_mark_last_busy(&slave->dev);
249 	pm_runtime_put_autosuspend(&slave->dev);
250 
251 	dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
252 	return 0;
253 }
254 
255 static int rt712_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
256 		struct snd_ctl_elem_value *ucontrol)
257 {
258 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
259 	struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
260 	struct rt712_sdca_dmic_kctrl_priv *p =
261 		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
262 	unsigned int regvalue, ctl, i;
263 	unsigned int adc_vol_flag = 0;
264 	const unsigned int interval_offset = 0xc0;
265 
266 	if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
267 		adc_vol_flag = 1;
268 
269 	/* check all channels */
270 	for (i = 0; i < p->count; i++) {
271 		regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue);
272 
273 		if (!adc_vol_flag) /* boost gain */
274 			ctl = regvalue / 0x0a00;
275 		else { /* ADC gain */
276 			if (adc_vol_flag)
277 				ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset);
278 			else
279 				ctl = p->max - (((0 - regvalue) & 0xffff) / interval_offset);
280 		}
281 
282 		ucontrol->value.integer.value[i] = ctl;
283 	}
284 
285 	return 0;
286 }
287 
288 static int rt712_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
289 		struct snd_ctl_elem_value *ucontrol)
290 {
291 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
292 	struct rt712_sdca_dmic_kctrl_priv *p =
293 		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
294 	struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
295 	unsigned int gain_val[4];
296 	unsigned int i, adc_vol_flag = 0, changed = 0;
297 	unsigned int regvalue[4];
298 	const unsigned int interval_offset = 0xc0;
299 	int err;
300 
301 	if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
302 		adc_vol_flag = 1;
303 
304 	/* check all channels */
305 	for (i = 0; i < p->count; i++) {
306 		regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue[i]);
307 
308 		gain_val[i] = ucontrol->value.integer.value[i];
309 		if (gain_val[i] > p->max)
310 			gain_val[i] = p->max;
311 
312 		if (!adc_vol_flag) /* boost gain */
313 			gain_val[i] = gain_val[i] * 0x0a00;
314 		else { /* ADC gain */
315 			gain_val[i] = 0x1e00 - ((p->max - gain_val[i]) * interval_offset);
316 			gain_val[i] &= 0xffff;
317 		}
318 
319 		if (regvalue[i] != gain_val[i])
320 			changed = 1;
321 	}
322 
323 	if (!changed)
324 		return 0;
325 
326 	for (i = 0; i < p->count; i++) {
327 		err = regmap_write(rt712->mbq_regmap, p->reg_base + i, gain_val[i]);
328 		if (err < 0)
329 			dev_err(&rt712->slave->dev, "0x%08x can't be set\n", p->reg_base + i);
330 	}
331 
332 	return changed;
333 }
334 
335 static int rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_dmic_priv *rt712)
336 {
337 	int err, i;
338 	unsigned int ch_mute;
339 
340 	for (i = 0; i < ARRAY_SIZE(rt712->fu1e_mixer_mute); i++) {
341 		ch_mute = (rt712->fu1e_dapm_mute || rt712->fu1e_mixer_mute[i]) ? 0x01 : 0x00;
342 		err = regmap_write(rt712->regmap,
343 				SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E,
344 				RT712_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
345 		if (err < 0)
346 			return err;
347 	}
348 
349 	return 0;
350 }
351 
352 static int rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol *kcontrol,
353 			struct snd_ctl_elem_value *ucontrol)
354 {
355 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
356 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
357 	struct rt712_sdca_dmic_kctrl_priv *p =
358 		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
359 	unsigned int i;
360 
361 	for (i = 0; i < p->count; i++)
362 		ucontrol->value.integer.value[i] = !rt712->fu1e_mixer_mute[i];
363 
364 	return 0;
365 }
366 
367 static int rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol *kcontrol,
368 			struct snd_ctl_elem_value *ucontrol)
369 {
370 	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
371 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
372 	struct rt712_sdca_dmic_kctrl_priv *p =
373 		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
374 	int err, changed = 0, i;
375 
376 	for (i = 0; i < p->count; i++) {
377 		if (rt712->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
378 			changed = 1;
379 		rt712->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
380 	}
381 
382 	err = rt712_sdca_set_fu1e_capture_ctl(rt712);
383 	if (err < 0)
384 		return err;
385 
386 	return changed;
387 }
388 
389 static int rt712_sdca_fu_info(struct snd_kcontrol *kcontrol,
390 	struct snd_ctl_elem_info *uinfo)
391 {
392 	struct rt712_sdca_dmic_kctrl_priv *p =
393 		(struct rt712_sdca_dmic_kctrl_priv *)kcontrol->private_value;
394 
395 	if (p->max == 1)
396 		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
397 	else
398 		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
399 	uinfo->count = p->count;
400 	uinfo->value.integer.min = 0;
401 	uinfo->value.integer.max = p->max;
402 	return 0;
403 }
404 
405 #define RT712_SDCA_PR_VALUE(xreg_base, xcount, xmax, xinvert) \
406 	((unsigned long)&(struct rt712_sdca_dmic_kctrl_priv) \
407 		{.reg_base = xreg_base, .count = xcount, .max = xmax, \
408 		.invert = xinvert})
409 
410 #define RT712_SDCA_FU_CTRL(xname, reg_base, xmax, xinvert, xcount) \
411 {	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
412 	.info = rt712_sdca_fu_info, \
413 	.get = rt712_sdca_dmic_fu1e_capture_get, \
414 	.put = rt712_sdca_dmic_fu1e_capture_put, \
415 	.private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, xinvert)}
416 
417 #define RT712_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
418 	 xhandler_put, xcount, xmax, tlv_array) \
419 {	.iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
420 	.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
421 		 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
422 	.tlv.p = (tlv_array), \
423 	.info = rt712_sdca_fu_info, \
424 	.get = xhandler_get, .put = xhandler_put, \
425 	.private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, 0) }
426 
427 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
428 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
429 
430 static const struct snd_kcontrol_new rt712_sdca_dmic_snd_controls[] = {
431 	RT712_SDCA_FU_CTRL("FU1E Capture Switch",
432 		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01),
433 		1, 1, 4),
434 	RT712_SDCA_EXT_TLV("FU1E Capture Volume",
435 		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01),
436 		rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 0x3f, in_vol_tlv),
437 	RT712_SDCA_EXT_TLV("FU15 Boost Volume",
438 		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01),
439 		rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 3, mic_vol_tlv),
440 };
441 
442 static int rt712_sdca_dmic_mux_get(struct snd_kcontrol *kcontrol,
443 			struct snd_ctl_elem_value *ucontrol)
444 {
445 	struct snd_soc_component *component =
446 		snd_soc_dapm_kcontrol_component(kcontrol);
447 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
448 	unsigned int val = 0, mask_sft;
449 
450 	if (strstr(ucontrol->id.name, "ADC 25 Mux"))
451 		mask_sft = 8;
452 	else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
453 		mask_sft = 4;
454 	else
455 		return -EINVAL;
456 
457 	rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
458 		RT712_HDA_LEGACY_MUX_CTL0, &val);
459 
460 	ucontrol->value.enumerated.item[0] = (val >> mask_sft) & 0x7;
461 
462 	return 0;
463 }
464 
465 static int rt712_sdca_dmic_mux_put(struct snd_kcontrol *kcontrol,
466 			struct snd_ctl_elem_value *ucontrol)
467 {
468 	struct snd_soc_component *component =
469 		snd_soc_dapm_kcontrol_component(kcontrol);
470 	struct snd_soc_dapm_context *dapm =
471 		snd_soc_dapm_kcontrol_dapm(kcontrol);
472 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
473 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
474 	unsigned int *item = ucontrol->value.enumerated.item;
475 	unsigned int val, val2 = 0, change, mask_sft;
476 
477 	if (item[0] >= e->items)
478 		return -EINVAL;
479 
480 	if (strstr(ucontrol->id.name, "ADC 25 Mux"))
481 		mask_sft = 8;
482 	else if (strstr(ucontrol->id.name, "ADC 26 Mux"))
483 		mask_sft = 4;
484 	else
485 		return -EINVAL;
486 
487 	val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
488 
489 	rt712_sdca_dmic_index_read(rt712, RT712_VENDOR_HDA_CTL,
490 		RT712_HDA_LEGACY_MUX_CTL0, &val2);
491 	val2 = (0x7 << mask_sft) & val2;
492 
493 	if (val == val2)
494 		change = 0;
495 	else
496 		change = 1;
497 
498 	if (change)
499 		rt712_sdca_dmic_index_update_bits(rt712, RT712_VENDOR_HDA_CTL,
500 			RT712_HDA_LEGACY_MUX_CTL0, 0x7 << mask_sft,
501 			val << mask_sft);
502 
503 	snd_soc_dapm_mux_update_power(dapm, kcontrol,
504 		item[0], e, NULL);
505 
506 	return change;
507 }
508 
509 static const char * const adc_mux_text[] = {
510 	"DMIC1",
511 	"DMIC2",
512 };
513 
514 static SOC_ENUM_SINGLE_DECL(
515 	rt712_adc25_enum, SND_SOC_NOPM, 0, adc_mux_text);
516 
517 static SOC_ENUM_SINGLE_DECL(
518 	rt712_adc26_enum, SND_SOC_NOPM, 0, adc_mux_text);
519 
520 static const struct snd_kcontrol_new rt712_sdca_dmic_adc25_mux =
521 	SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt712_adc25_enum,
522 			rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
523 
524 static const struct snd_kcontrol_new rt712_sdca_dmic_adc26_mux =
525 	SOC_DAPM_ENUM_EXT("ADC 26 Mux", rt712_adc26_enum,
526 			rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
527 
528 static int rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget *w,
529 	struct snd_kcontrol *kcontrol, int event)
530 {
531 	struct snd_soc_component *component =
532 		snd_soc_dapm_to_component(w->dapm);
533 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
534 
535 	switch (event) {
536 	case SND_SOC_DAPM_POST_PMU:
537 		rt712->fu1e_dapm_mute = false;
538 		rt712_sdca_set_fu1e_capture_ctl(rt712);
539 		break;
540 	case SND_SOC_DAPM_PRE_PMD:
541 		rt712->fu1e_dapm_mute = true;
542 		rt712_sdca_set_fu1e_capture_ctl(rt712);
543 		break;
544 	}
545 	return 0;
546 }
547 
548 static int rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget *w,
549 	struct snd_kcontrol *kcontrol, int event)
550 {
551 	struct snd_soc_component *component =
552 		snd_soc_dapm_to_component(w->dapm);
553 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
554 	unsigned char ps0 = 0x0, ps3 = 0x3;
555 
556 	switch (event) {
557 	case SND_SOC_DAPM_POST_PMU:
558 		regmap_write(rt712->regmap,
559 			SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
560 				RT712_SDCA_CTL_REQ_POWER_STATE, 0),
561 				ps0);
562 		break;
563 	case SND_SOC_DAPM_PRE_PMD:
564 		regmap_write(rt712->regmap,
565 			SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
566 				RT712_SDCA_CTL_REQ_POWER_STATE, 0),
567 				ps3);
568 		break;
569 	}
570 	return 0;
571 }
572 
573 static const struct snd_soc_dapm_widget rt712_sdca_dmic_dapm_widgets[] = {
574 	SND_SOC_DAPM_INPUT("DMIC1"),
575 	SND_SOC_DAPM_INPUT("DMIC2"),
576 
577 	SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
578 		rt712_sdca_dmic_pde11_event,
579 		SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
580 
581 	SND_SOC_DAPM_ADC_E("FU 1E", NULL, SND_SOC_NOPM, 0, 0,
582 		rt712_sdca_dmic_fu1e_event,
583 		SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
584 	SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
585 		&rt712_sdca_dmic_adc25_mux),
586 	SND_SOC_DAPM_MUX("ADC 26 Mux", SND_SOC_NOPM, 0, 0,
587 		&rt712_sdca_dmic_adc26_mux),
588 
589 	SND_SOC_DAPM_AIF_OUT("DP2TX", "DP2 Capture", 0, SND_SOC_NOPM, 0, 0),
590 };
591 
592 static const struct snd_soc_dapm_route rt712_sdca_dmic_audio_map[] = {
593 	{"DP2TX", NULL, "FU 1E"},
594 
595 	{"FU 1E", NULL, "PDE 11"},
596 	{"FU 1E", NULL, "ADC 25 Mux"},
597 	{"FU 1E", NULL, "ADC 26 Mux"},
598 	{"ADC 25 Mux", "DMIC1", "DMIC1"},
599 	{"ADC 25 Mux", "DMIC2", "DMIC2"},
600 	{"ADC 26 Mux", "DMIC1", "DMIC1"},
601 	{"ADC 26 Mux", "DMIC2", "DMIC2"},
602 };
603 
604 static int rt712_sdca_dmic_probe(struct snd_soc_component *component)
605 {
606 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
607 	int ret;
608 
609 	rt712->component = component;
610 
611 	ret = pm_runtime_resume(component->dev);
612 	if (ret < 0 && ret != -EACCES)
613 		return ret;
614 
615 	return 0;
616 }
617 
618 static const struct snd_soc_component_driver soc_sdca_dev_rt712_dmic = {
619 	.probe = rt712_sdca_dmic_probe,
620 	.controls = rt712_sdca_dmic_snd_controls,
621 	.num_controls = ARRAY_SIZE(rt712_sdca_dmic_snd_controls),
622 	.dapm_widgets = rt712_sdca_dmic_dapm_widgets,
623 	.num_dapm_widgets = ARRAY_SIZE(rt712_sdca_dmic_dapm_widgets),
624 	.dapm_routes = rt712_sdca_dmic_audio_map,
625 	.num_dapm_routes = ARRAY_SIZE(rt712_sdca_dmic_audio_map),
626 	.endianness = 1,
627 };
628 
629 static int rt712_sdca_dmic_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
630 				int direction)
631 {
632 	snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
633 
634 	return 0;
635 }
636 
637 static void rt712_sdca_dmic_shutdown(struct snd_pcm_substream *substream,
638 				struct snd_soc_dai *dai)
639 {
640 	snd_soc_dai_set_dma_data(dai, substream, NULL);
641 }
642 
643 static int rt712_sdca_dmic_hw_params(struct snd_pcm_substream *substream,
644 				struct snd_pcm_hw_params *params,
645 				struct snd_soc_dai *dai)
646 {
647 	struct snd_soc_component *component = dai->component;
648 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
649 	struct sdw_stream_config stream_config;
650 	struct sdw_port_config port_config;
651 	struct sdw_stream_runtime *sdw_stream;
652 	int retval, num_channels;
653 	unsigned int sampling_rate;
654 
655 	dev_dbg(dai->dev, "%s %s", __func__, dai->name);
656 	sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
657 
658 	if (!sdw_stream)
659 		return -EINVAL;
660 
661 	if (!rt712->slave)
662 		return -EINVAL;
663 
664 	stream_config.frame_rate = params_rate(params);
665 	stream_config.ch_count = params_channels(params);
666 	stream_config.bps = snd_pcm_format_width(params_format(params));
667 	stream_config.direction = SDW_DATA_DIR_TX;
668 
669 	num_channels = params_channels(params);
670 	port_config.ch_mask = GENMASK(num_channels - 1, 0);
671 	port_config.num = 2;
672 
673 	retval = sdw_stream_add_slave(rt712->slave, &stream_config,
674 					&port_config, 1, sdw_stream);
675 	if (retval) {
676 		dev_err(dai->dev, "Unable to configure port\n");
677 		return retval;
678 	}
679 
680 	if (params_channels(params) > 4) {
681 		dev_err(component->dev, "Unsupported channels %d\n",
682 			params_channels(params));
683 		return -EINVAL;
684 	}
685 
686 	/* sampling rate configuration */
687 	switch (params_rate(params)) {
688 	case 16000:
689 		sampling_rate = RT712_SDCA_RATE_16000HZ;
690 		break;
691 	case 32000:
692 		sampling_rate = RT712_SDCA_RATE_32000HZ;
693 		break;
694 	case 44100:
695 		sampling_rate = RT712_SDCA_RATE_44100HZ;
696 		break;
697 	case 48000:
698 		sampling_rate = RT712_SDCA_RATE_48000HZ;
699 		break;
700 	case 96000:
701 		sampling_rate = RT712_SDCA_RATE_96000HZ;
702 		break;
703 	case 192000:
704 		sampling_rate = RT712_SDCA_RATE_192000HZ;
705 		break;
706 	default:
707 		dev_err(component->dev, "Rate %d is not supported\n",
708 			params_rate(params));
709 		return -EINVAL;
710 	}
711 
712 	/* set sampling frequency */
713 	regmap_write(rt712->regmap,
714 		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
715 		sampling_rate);
716 	regmap_write(rt712->regmap,
717 		SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
718 		sampling_rate);
719 
720 	return 0;
721 }
722 
723 static int rt712_sdca_dmic_hw_free(struct snd_pcm_substream *substream,
724 				struct snd_soc_dai *dai)
725 {
726 	struct snd_soc_component *component = dai->component;
727 	struct rt712_sdca_dmic_priv *rt712 = snd_soc_component_get_drvdata(component);
728 	struct sdw_stream_runtime *sdw_stream =
729 		snd_soc_dai_get_dma_data(dai, substream);
730 
731 	if (!rt712->slave)
732 		return -EINVAL;
733 
734 	sdw_stream_remove_slave(rt712->slave, sdw_stream);
735 	return 0;
736 }
737 
738 #define RT712_STEREO_RATES (SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
739 			SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
740 #define RT712_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
741 			SNDRV_PCM_FMTBIT_S24_LE)
742 
743 static const struct snd_soc_dai_ops rt712_sdca_dmic_ops = {
744 	.hw_params	= rt712_sdca_dmic_hw_params,
745 	.hw_free	= rt712_sdca_dmic_hw_free,
746 	.set_stream	= rt712_sdca_dmic_set_sdw_stream,
747 	.shutdown	= rt712_sdca_dmic_shutdown,
748 };
749 
750 static struct snd_soc_dai_driver rt712_sdca_dmic_dai[] = {
751 	{
752 		.name = "rt712-sdca-dmic-aif1",
753 		.id = RT712_AIF1,
754 		.capture = {
755 			.stream_name = "DP2 Capture",
756 			.channels_min = 1,
757 			.channels_max = 4,
758 			.rates = RT712_STEREO_RATES,
759 			.formats = RT712_FORMATS,
760 		},
761 		.ops = &rt712_sdca_dmic_ops,
762 	},
763 };
764 
765 static int rt712_sdca_dmic_init(struct device *dev, struct regmap *regmap,
766 			struct regmap *mbq_regmap, struct sdw_slave *slave)
767 {
768 	struct rt712_sdca_dmic_priv *rt712;
769 	int ret;
770 
771 	rt712 = devm_kzalloc(dev, sizeof(*rt712), GFP_KERNEL);
772 	if (!rt712)
773 		return -ENOMEM;
774 
775 	dev_set_drvdata(dev, rt712);
776 	rt712->slave = slave;
777 	rt712->regmap = regmap;
778 	rt712->mbq_regmap = mbq_regmap;
779 
780 	/*
781 	 * Mark hw_init to false
782 	 * HW init will be performed when device reports present
783 	 */
784 	rt712->hw_init = false;
785 	rt712->first_hw_init = false;
786 	rt712->fu1e_dapm_mute = true;
787 	rt712->fu1e_mixer_mute[0] = rt712->fu1e_mixer_mute[1] =
788 		rt712->fu1e_mixer_mute[2] = rt712->fu1e_mixer_mute[3] = true;
789 
790 	ret =  devm_snd_soc_register_component(dev,
791 			&soc_sdca_dev_rt712_dmic,
792 			rt712_sdca_dmic_dai,
793 			ARRAY_SIZE(rt712_sdca_dmic_dai));
794 
795 	dev_dbg(&slave->dev, "%s\n", __func__);
796 
797 	return ret;
798 }
799 
800 
801 static int rt712_sdca_dmic_update_status(struct sdw_slave *slave,
802 				enum sdw_slave_status status)
803 {
804 	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(&slave->dev);
805 
806 	/* Update the status */
807 	rt712->status = status;
808 
809 	if (status == SDW_SLAVE_UNATTACHED)
810 		rt712->hw_init = false;
811 
812 	/*
813 	 * Perform initialization only if slave status is present and
814 	 * hw_init flag is false
815 	 */
816 	if (rt712->hw_init || rt712->status != SDW_SLAVE_ATTACHED)
817 		return 0;
818 
819 	/* perform I/O transfers required for Slave initialization */
820 	return rt712_sdca_dmic_io_init(&slave->dev, slave);
821 }
822 
823 static int rt712_sdca_dmic_read_prop(struct sdw_slave *slave)
824 {
825 	struct sdw_slave_prop *prop = &slave->prop;
826 	int nval, i;
827 	u32 bit;
828 	unsigned long addr;
829 	struct sdw_dpn_prop *dpn;
830 
831 	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
832 	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
833 
834 	prop->paging_support = true;
835 
836 	/* first we need to allocate memory for set bits in port lists */
837 	prop->source_ports = BIT(2); /* BITMAP: 00000100 */
838 	prop->sink_ports = 0;
839 
840 	nval = hweight32(prop->source_ports);
841 	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
842 		sizeof(*prop->src_dpn_prop), GFP_KERNEL);
843 	if (!prop->src_dpn_prop)
844 		return -ENOMEM;
845 
846 	i = 0;
847 	dpn = prop->src_dpn_prop;
848 	addr = prop->source_ports;
849 	for_each_set_bit(bit, &addr, 32) {
850 		dpn[i].num = bit;
851 		dpn[i].type = SDW_DPN_FULL;
852 		dpn[i].simple_ch_prep_sm = true;
853 		dpn[i].ch_prep_timeout = 10;
854 		i++;
855 	}
856 
857 	/* set the timeout values */
858 	prop->clk_stop_timeout = 200;
859 
860 	/* wake-up event */
861 	prop->wake_capable = 1;
862 
863 	return 0;
864 }
865 
866 static const struct sdw_device_id rt712_sdca_dmic_id[] = {
867 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1712, 0x3, 0x1, 0),
868 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1713, 0x3, 0x1, 0),
869 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1716, 0x3, 0x1, 0),
870 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x1717, 0x3, 0x1, 0),
871 	{},
872 };
873 MODULE_DEVICE_TABLE(sdw, rt712_sdca_dmic_id);
874 
875 static int __maybe_unused rt712_sdca_dmic_dev_suspend(struct device *dev)
876 {
877 	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
878 
879 	if (!rt712->hw_init)
880 		return 0;
881 
882 	regcache_cache_only(rt712->regmap, true);
883 	regcache_cache_only(rt712->mbq_regmap, true);
884 
885 	return 0;
886 }
887 
888 static int __maybe_unused rt712_sdca_dmic_dev_system_suspend(struct device *dev)
889 {
890 	struct rt712_sdca_dmic_priv *rt712_sdca = dev_get_drvdata(dev);
891 
892 	if (!rt712_sdca->hw_init)
893 		return 0;
894 
895 	return rt712_sdca_dmic_dev_suspend(dev);
896 }
897 
898 #define RT712_PROBE_TIMEOUT 5000
899 
900 static int __maybe_unused rt712_sdca_dmic_dev_resume(struct device *dev)
901 {
902 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
903 	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(dev);
904 	unsigned long time;
905 
906 	if (!rt712->first_hw_init)
907 		return 0;
908 
909 	if (!slave->unattach_request)
910 		goto regmap_sync;
911 
912 	time = wait_for_completion_timeout(&slave->initialization_complete,
913 				msecs_to_jiffies(RT712_PROBE_TIMEOUT));
914 	if (!time) {
915 		dev_err(&slave->dev, "Initialization not complete, timed out\n");
916 		sdw_show_ping_status(slave->bus, true);
917 
918 		return -ETIMEDOUT;
919 	}
920 
921 regmap_sync:
922 	slave->unattach_request = 0;
923 	regcache_cache_only(rt712->regmap, false);
924 	regcache_sync(rt712->regmap);
925 	regcache_cache_only(rt712->mbq_regmap, false);
926 	regcache_sync(rt712->mbq_regmap);
927 	return 0;
928 }
929 
930 static const struct dev_pm_ops rt712_sdca_dmic_pm = {
931 	SET_SYSTEM_SLEEP_PM_OPS(rt712_sdca_dmic_dev_system_suspend, rt712_sdca_dmic_dev_resume)
932 	SET_RUNTIME_PM_OPS(rt712_sdca_dmic_dev_suspend, rt712_sdca_dmic_dev_resume, NULL)
933 };
934 
935 
936 static struct sdw_slave_ops rt712_sdca_dmic_slave_ops = {
937 	.read_prop = rt712_sdca_dmic_read_prop,
938 	.update_status = rt712_sdca_dmic_update_status,
939 };
940 
941 static int rt712_sdca_dmic_sdw_probe(struct sdw_slave *slave,
942 				const struct sdw_device_id *id)
943 {
944 	struct regmap *regmap, *mbq_regmap;
945 
946 	/* Regmap Initialization */
947 	mbq_regmap = devm_regmap_init_sdw_mbq(slave, &rt712_sdca_dmic_mbq_regmap);
948 	if (IS_ERR(mbq_regmap))
949 		return PTR_ERR(mbq_regmap);
950 
951 	regmap = devm_regmap_init_sdw(slave, &rt712_sdca_dmic_regmap);
952 	if (IS_ERR(regmap))
953 		return PTR_ERR(regmap);
954 
955 	return rt712_sdca_dmic_init(&slave->dev, regmap, mbq_regmap, slave);
956 }
957 
958 static int rt712_sdca_dmic_sdw_remove(struct sdw_slave *slave)
959 {
960 	struct rt712_sdca_dmic_priv *rt712 = dev_get_drvdata(&slave->dev);
961 
962 	if (rt712->first_hw_init)
963 		pm_runtime_disable(&slave->dev);
964 
965 	return 0;
966 }
967 
968 static struct sdw_driver rt712_sdca_dmic_sdw_driver = {
969 	.driver = {
970 		.name = "rt712-sdca-dmic",
971 		.owner = THIS_MODULE,
972 		.pm = &rt712_sdca_dmic_pm,
973 	},
974 	.probe = rt712_sdca_dmic_sdw_probe,
975 	.remove = rt712_sdca_dmic_sdw_remove,
976 	.ops = &rt712_sdca_dmic_slave_ops,
977 	.id_table = rt712_sdca_dmic_id,
978 };
979 module_sdw_driver(rt712_sdca_dmic_sdw_driver);
980 
981 MODULE_DESCRIPTION("ASoC RT712 SDCA DMIC SDW driver");
982 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>");
983 MODULE_LICENSE("GPL");
984