1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // rt711-sdw.c -- rt711 ALSA SoC audio driver 4 // 5 // Copyright(c) 2019 Realtek Semiconductor Corp. 6 // 7 // 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/mod_devicetable.h> 12 #include <linux/soundwire/sdw.h> 13 #include <linux/soundwire/sdw_type.h> 14 #include <linux/soundwire/sdw_registers.h> 15 #include <linux/module.h> 16 #include <linux/regmap.h> 17 #include <sound/soc.h> 18 #include "rt711.h" 19 #include "rt711-sdw.h" 20 21 static bool rt711_readable_register(struct device *dev, unsigned int reg) 22 { 23 switch (reg) { 24 case 0x00e0: 25 case 0x00f0: 26 case 0x2012 ... 0x2016: 27 case 0x201a ... 0x2027: 28 case 0x2029 ... 0x202a: 29 case 0x202d ... 0x2034: 30 case 0x2201 ... 0x2204: 31 case 0x2206 ... 0x2212: 32 case 0x2220 ... 0x2223: 33 case 0x2230 ... 0x2239: 34 case 0x2f01 ... 0x2f0f: 35 case 0x3000 ... 0x3fff: 36 case 0x7000 ... 0x7fff: 37 case 0x8300 ... 0x83ff: 38 case 0x9c00 ... 0x9cff: 39 case 0xb900 ... 0xb9ff: 40 case 0x752009: 41 case 0x752011: 42 case 0x75201a: 43 case 0x752045: 44 case 0x752046: 45 case 0x752048: 46 case 0x75204a: 47 case 0x75206b: 48 case 0x75206f: 49 case 0x752080: 50 case 0x752081: 51 case 0x752091: 52 case 0x755800: 53 return true; 54 default: 55 return false; 56 } 57 } 58 59 static bool rt711_volatile_register(struct device *dev, unsigned int reg) 60 { 61 switch (reg) { 62 case 0x2016: 63 case 0x201b: 64 case 0x201c: 65 case 0x201d: 66 case 0x201f: 67 case 0x2021: 68 case 0x2023: 69 case 0x2230: 70 case 0x2012 ... 0x2015: /* HD-A read */ 71 case 0x202d ... 0x202f: /* BRA */ 72 case 0x2201 ... 0x2212: /* i2c debug */ 73 case 0x2220 ... 0x2223: /* decoded HD-A */ 74 case 0x9c00 ... 0x9cff: 75 case 0xb900 ... 0xb9ff: 76 case 0xff01: 77 case 0x75201a: 78 case 0x752046: 79 case 0x752080: 80 case 0x752081: 81 case 0x755800: 82 return true; 83 default: 84 return false; 85 } 86 } 87 88 static int rt711_sdw_read(void *context, unsigned int reg, unsigned int *val) 89 { 90 struct device *dev = context; 91 struct rt711_priv *rt711 = dev_get_drvdata(dev); 92 unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0; 93 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; 94 unsigned int is_hda_reg = 1, is_index_reg = 0; 95 int ret; 96 97 if (reg > 0xffff) 98 is_index_reg = 1; 99 100 mask = reg & 0xf000; 101 102 if (is_index_reg) { /* index registers */ 103 val2 = reg & 0xff; 104 reg = reg >> 8; 105 nid = reg & 0xff; 106 ret = regmap_write(rt711->sdw_regmap, reg, 0); 107 if (ret < 0) 108 return ret; 109 reg2 = reg + 0x1000; 110 reg2 |= 0x80; 111 ret = regmap_write(rt711->sdw_regmap, reg2, val2); 112 if (ret < 0) 113 return ret; 114 115 reg3 = RT711_PRIV_DATA_R_H | nid; 116 ret = regmap_write(rt711->sdw_regmap, 117 reg3, ((*val >> 8) & 0xff)); 118 if (ret < 0) 119 return ret; 120 reg4 = reg3 + 0x1000; 121 reg4 |= 0x80; 122 ret = regmap_write(rt711->sdw_regmap, reg4, (*val & 0xff)); 123 if (ret < 0) 124 return ret; 125 } else if (mask == 0x3000) { 126 reg += 0x8000; 127 ret = regmap_write(rt711->sdw_regmap, reg, *val); 128 if (ret < 0) 129 return ret; 130 } else if (mask == 0x7000) { 131 reg += 0x2000; 132 reg |= 0x800; 133 ret = regmap_write(rt711->sdw_regmap, 134 reg, ((*val >> 8) & 0xff)); 135 if (ret < 0) 136 return ret; 137 reg2 = reg + 0x1000; 138 reg2 |= 0x80; 139 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff)); 140 if (ret < 0) 141 return ret; 142 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */ 143 reg2 = reg - 0x1000; 144 reg2 &= ~0x80; 145 ret = regmap_write(rt711->sdw_regmap, 146 reg2, ((*val >> 8) & 0xff)); 147 if (ret < 0) 148 return ret; 149 ret = regmap_write(rt711->sdw_regmap, reg, (*val & 0xff)); 150 if (ret < 0) 151 return ret; 152 } else if (mask == 0x9000) { 153 ret = regmap_write(rt711->sdw_regmap, 154 reg, ((*val >> 8) & 0xff)); 155 if (ret < 0) 156 return ret; 157 reg2 = reg + 0x1000; 158 reg2 |= 0x80; 159 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff)); 160 if (ret < 0) 161 return ret; 162 } else if (mask == 0xb000) { 163 ret = regmap_write(rt711->sdw_regmap, reg, *val); 164 if (ret < 0) 165 return ret; 166 } else { 167 ret = regmap_read(rt711->sdw_regmap, reg, val); 168 if (ret < 0) 169 return ret; 170 is_hda_reg = 0; 171 } 172 173 if (is_hda_reg || is_index_reg) { 174 sdw_data_3 = 0; 175 sdw_data_2 = 0; 176 sdw_data_1 = 0; 177 sdw_data_0 = 0; 178 ret = regmap_read(rt711->sdw_regmap, 179 RT711_READ_HDA_3, &sdw_data_3); 180 if (ret < 0) 181 return ret; 182 ret = regmap_read(rt711->sdw_regmap, 183 RT711_READ_HDA_2, &sdw_data_2); 184 if (ret < 0) 185 return ret; 186 ret = regmap_read(rt711->sdw_regmap, 187 RT711_READ_HDA_1, &sdw_data_1); 188 if (ret < 0) 189 return ret; 190 ret = regmap_read(rt711->sdw_regmap, 191 RT711_READ_HDA_0, &sdw_data_0); 192 if (ret < 0) 193 return ret; 194 *val = ((sdw_data_3 & 0xff) << 24) | 195 ((sdw_data_2 & 0xff) << 16) | 196 ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff); 197 } 198 199 if (is_hda_reg == 0) 200 dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val); 201 else if (is_index_reg) 202 dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n", 203 __func__, reg, reg2, reg3, reg4, *val); 204 else 205 dev_dbg(dev, "[%s] %04x %04x => %08x\n", 206 __func__, reg, reg2, *val); 207 208 return 0; 209 } 210 211 static int rt711_sdw_write(void *context, unsigned int reg, unsigned int val) 212 { 213 struct device *dev = context; 214 struct rt711_priv *rt711 = dev_get_drvdata(dev); 215 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; 216 unsigned int is_index_reg = 0; 217 int ret; 218 219 if (reg > 0xffff) 220 is_index_reg = 1; 221 222 mask = reg & 0xf000; 223 224 if (is_index_reg) { /* index registers */ 225 val2 = reg & 0xff; 226 reg = reg >> 8; 227 nid = reg & 0xff; 228 ret = regmap_write(rt711->sdw_regmap, reg, 0); 229 if (ret < 0) 230 return ret; 231 reg2 = reg + 0x1000; 232 reg2 |= 0x80; 233 ret = regmap_write(rt711->sdw_regmap, reg2, val2); 234 if (ret < 0) 235 return ret; 236 237 reg3 = RT711_PRIV_DATA_W_H | nid; 238 ret = regmap_write(rt711->sdw_regmap, 239 reg3, ((val >> 8) & 0xff)); 240 if (ret < 0) 241 return ret; 242 reg4 = reg3 + 0x1000; 243 reg4 |= 0x80; 244 ret = regmap_write(rt711->sdw_regmap, reg4, (val & 0xff)); 245 if (ret < 0) 246 return ret; 247 is_index_reg = 1; 248 } else if (reg < 0x4fff) { 249 ret = regmap_write(rt711->sdw_regmap, reg, val); 250 if (ret < 0) 251 return ret; 252 } else if (reg == RT711_FUNC_RESET) { 253 ret = regmap_write(rt711->sdw_regmap, reg, val); 254 if (ret < 0) 255 return ret; 256 } else if (mask == 0x7000) { 257 ret = regmap_write(rt711->sdw_regmap, 258 reg, ((val >> 8) & 0xff)); 259 if (ret < 0) 260 return ret; 261 reg2 = reg + 0x1000; 262 reg2 |= 0x80; 263 ret = regmap_write(rt711->sdw_regmap, reg2, (val & 0xff)); 264 if (ret < 0) 265 return ret; 266 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */ 267 reg2 = reg - 0x1000; 268 reg2 &= ~0x80; 269 ret = regmap_write(rt711->sdw_regmap, 270 reg2, ((val >> 8) & 0xff)); 271 if (ret < 0) 272 return ret; 273 ret = regmap_write(rt711->sdw_regmap, reg, (val & 0xff)); 274 if (ret < 0) 275 return ret; 276 } 277 278 if (reg2 == 0) 279 dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 280 else if (is_index_reg) 281 dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n", 282 __func__, reg, reg2, reg3, reg4, val2, val); 283 else 284 dev_dbg(dev, "[%s] %04x %04x <= %04x\n", 285 __func__, reg, reg2, val); 286 287 return 0; 288 } 289 290 static const struct regmap_config rt711_regmap = { 291 .reg_bits = 24, 292 .val_bits = 32, 293 .readable_reg = rt711_readable_register, 294 .volatile_reg = rt711_volatile_register, 295 .max_register = 0x755800, 296 .reg_defaults = rt711_reg_defaults, 297 .num_reg_defaults = ARRAY_SIZE(rt711_reg_defaults), 298 .cache_type = REGCACHE_RBTREE, 299 .use_single_read = true, 300 .use_single_write = true, 301 .reg_read = rt711_sdw_read, 302 .reg_write = rt711_sdw_write, 303 }; 304 305 static const struct regmap_config rt711_sdw_regmap = { 306 .name = "sdw", 307 .reg_bits = 32, 308 .val_bits = 8, 309 .readable_reg = rt711_readable_register, 310 .max_register = 0xff01, 311 .cache_type = REGCACHE_NONE, 312 .use_single_read = true, 313 .use_single_write = true, 314 }; 315 316 static int rt711_update_status(struct sdw_slave *slave, 317 enum sdw_slave_status status) 318 { 319 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev); 320 321 /* Update the status */ 322 rt711->status = status; 323 324 if (status == SDW_SLAVE_UNATTACHED) 325 rt711->hw_init = false; 326 327 /* 328 * Perform initialization only if slave status is present and 329 * hw_init flag is false 330 */ 331 if (rt711->hw_init || rt711->status != SDW_SLAVE_ATTACHED) 332 return 0; 333 334 /* perform I/O transfers required for Slave initialization */ 335 return rt711_io_init(&slave->dev, slave); 336 } 337 338 static int rt711_read_prop(struct sdw_slave *slave) 339 { 340 struct sdw_slave_prop *prop = &slave->prop; 341 int nval, i; 342 u32 bit; 343 unsigned long addr; 344 struct sdw_dpn_prop *dpn; 345 346 prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 347 SDW_SCP_INT1_PARITY; 348 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 349 350 prop->paging_support = false; 351 352 /* first we need to allocate memory for set bits in port lists */ 353 prop->source_ports = 0x14; /* BITMAP: 00010100 */ 354 prop->sink_ports = 0x8; /* BITMAP: 00001000 */ 355 356 nval = hweight32(prop->source_ports); 357 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 358 sizeof(*prop->src_dpn_prop), 359 GFP_KERNEL); 360 if (!prop->src_dpn_prop) 361 return -ENOMEM; 362 363 i = 0; 364 dpn = prop->src_dpn_prop; 365 addr = prop->source_ports; 366 for_each_set_bit(bit, &addr, 32) { 367 dpn[i].num = bit; 368 dpn[i].type = SDW_DPN_FULL; 369 dpn[i].simple_ch_prep_sm = true; 370 dpn[i].ch_prep_timeout = 10; 371 i++; 372 } 373 374 /* do this again for sink now */ 375 nval = hweight32(prop->sink_ports); 376 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 377 sizeof(*prop->sink_dpn_prop), 378 GFP_KERNEL); 379 if (!prop->sink_dpn_prop) 380 return -ENOMEM; 381 382 i = 0; 383 dpn = prop->sink_dpn_prop; 384 addr = prop->sink_ports; 385 for_each_set_bit(bit, &addr, 32) { 386 dpn[i].num = bit; 387 dpn[i].type = SDW_DPN_FULL; 388 dpn[i].simple_ch_prep_sm = true; 389 dpn[i].ch_prep_timeout = 10; 390 i++; 391 } 392 393 /* set the timeout values */ 394 prop->clk_stop_timeout = 20; 395 396 /* wake-up event */ 397 prop->wake_capable = 1; 398 399 return 0; 400 } 401 402 static int rt711_bus_config(struct sdw_slave *slave, 403 struct sdw_bus_params *params) 404 { 405 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev); 406 int ret; 407 408 memcpy(&rt711->params, params, sizeof(*params)); 409 410 ret = rt711_clock_config(&slave->dev); 411 if (ret < 0) 412 dev_err(&slave->dev, "Invalid clk config"); 413 414 return ret; 415 } 416 417 static int rt711_interrupt_callback(struct sdw_slave *slave, 418 struct sdw_slave_intr_status *status) 419 { 420 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev); 421 422 dev_dbg(&slave->dev, 423 "%s control_port_stat=%x", __func__, status->control_port); 424 425 if (status->control_port & 0x4) { 426 mod_delayed_work(system_power_efficient_wq, 427 &rt711->jack_detect_work, msecs_to_jiffies(250)); 428 } 429 430 return 0; 431 } 432 433 static struct sdw_slave_ops rt711_slave_ops = { 434 .read_prop = rt711_read_prop, 435 .interrupt_callback = rt711_interrupt_callback, 436 .update_status = rt711_update_status, 437 .bus_config = rt711_bus_config, 438 }; 439 440 static int rt711_sdw_probe(struct sdw_slave *slave, 441 const struct sdw_device_id *id) 442 { 443 struct regmap *sdw_regmap, *regmap; 444 445 /* Regmap Initialization */ 446 sdw_regmap = devm_regmap_init_sdw(slave, &rt711_sdw_regmap); 447 if (!sdw_regmap) 448 return -EINVAL; 449 450 regmap = devm_regmap_init(&slave->dev, NULL, 451 &slave->dev, &rt711_regmap); 452 if (IS_ERR(regmap)) 453 return PTR_ERR(regmap); 454 455 rt711_init(&slave->dev, sdw_regmap, regmap, slave); 456 457 return 0; 458 } 459 460 static int rt711_sdw_remove(struct sdw_slave *slave) 461 { 462 struct rt711_priv *rt711 = dev_get_drvdata(&slave->dev); 463 464 if (rt711 && rt711->hw_init) { 465 cancel_delayed_work(&rt711->jack_detect_work); 466 cancel_delayed_work(&rt711->jack_btn_check_work); 467 cancel_work_sync(&rt711->calibration_work); 468 } 469 470 return 0; 471 } 472 473 static const struct sdw_device_id rt711_id[] = { 474 SDW_SLAVE_ENTRY(0x025d, 0x711, 0), 475 {}, 476 }; 477 MODULE_DEVICE_TABLE(sdw, rt711_id); 478 479 static int __maybe_unused rt711_dev_suspend(struct device *dev) 480 { 481 struct rt711_priv *rt711 = dev_get_drvdata(dev); 482 483 if (!rt711->hw_init) 484 return 0; 485 486 regcache_cache_only(rt711->regmap, true); 487 488 return 0; 489 } 490 491 #define RT711_PROBE_TIMEOUT 2000 492 493 static int __maybe_unused rt711_dev_resume(struct device *dev) 494 { 495 struct sdw_slave *slave = dev_to_sdw_dev(dev); 496 struct rt711_priv *rt711 = dev_get_drvdata(dev); 497 unsigned long time; 498 499 if (!rt711->hw_init) 500 return 0; 501 502 if (!slave->unattach_request) 503 goto regmap_sync; 504 505 time = wait_for_completion_timeout(&slave->initialization_complete, 506 msecs_to_jiffies(RT711_PROBE_TIMEOUT)); 507 if (!time) { 508 dev_err(&slave->dev, "Initialization not complete, timed out\n"); 509 return -ETIMEDOUT; 510 } 511 512 regmap_sync: 513 slave->unattach_request = 0; 514 regcache_cache_only(rt711->regmap, false); 515 regcache_sync_region(rt711->regmap, 0x3000, 0x8fff); 516 regcache_sync_region(rt711->regmap, 0x752009, 0x752091); 517 518 return 0; 519 } 520 521 static const struct dev_pm_ops rt711_pm = { 522 SET_SYSTEM_SLEEP_PM_OPS(rt711_dev_suspend, rt711_dev_resume) 523 SET_RUNTIME_PM_OPS(rt711_dev_suspend, rt711_dev_resume, NULL) 524 }; 525 526 static struct sdw_driver rt711_sdw_driver = { 527 .driver = { 528 .name = "rt711", 529 .owner = THIS_MODULE, 530 .pm = &rt711_pm, 531 }, 532 .probe = rt711_sdw_probe, 533 .remove = rt711_sdw_remove, 534 .ops = &rt711_slave_ops, 535 .id_table = rt711_id, 536 }; 537 module_sdw_driver(rt711_sdw_driver); 538 539 MODULE_DESCRIPTION("ASoC RT711 SDW driver"); 540 MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>"); 541 MODULE_LICENSE("GPL"); 542