xref: /openbmc/linux/sound/soc/codecs/rt5682-sdw.c (revision d58f75de)
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt5682-sdw.c  --  RT5682 ALSA SoC audio component driver
4 //
5 // Copyright 2019 Realtek Semiconductor Corp.
6 // Author: Oder Chiou <oder_chiou@realtek.com>
7 //
8 
9 #include <linux/module.h>
10 #include <linux/moduleparam.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/pm.h>
14 #include <linux/acpi.h>
15 #include <linux/gpio.h>
16 #include <linux/of_gpio.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/mutex.h>
20 #include <linux/soundwire/sdw.h>
21 #include <linux/soundwire/sdw_type.h>
22 #include <linux/soundwire/sdw_registers.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/jack.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31 
32 #include "rt5682.h"
33 
34 #define RT5682_SDW_ADDR_L			0x3000
35 #define RT5682_SDW_ADDR_H			0x3001
36 #define RT5682_SDW_DATA_L			0x3004
37 #define RT5682_SDW_DATA_H			0x3005
38 #define RT5682_SDW_CMD				0x3008
39 
40 static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val)
41 {
42 	struct device *dev = context;
43 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
44 	unsigned int data_l, data_h;
45 
46 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0);
47 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
48 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
49 	regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h);
50 	regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l);
51 
52 	*val = (data_h << 8) | data_l;
53 
54 	dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val);
55 
56 	return 0;
57 }
58 
59 static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val)
60 {
61 	struct device *dev = context;
62 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
63 
64 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1);
65 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff);
66 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff));
67 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff);
68 	regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff));
69 
70 	dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val);
71 
72 	return 0;
73 }
74 
75 static const struct regmap_config rt5682_sdw_indirect_regmap = {
76 	.reg_bits = 16,
77 	.val_bits = 16,
78 	.max_register = RT5682_I2C_MODE,
79 	.volatile_reg = rt5682_volatile_register,
80 	.readable_reg = rt5682_readable_register,
81 	.cache_type = REGCACHE_RBTREE,
82 	.reg_defaults = rt5682_reg,
83 	.num_reg_defaults = RT5682_REG_NUM,
84 	.use_single_read = true,
85 	.use_single_write = true,
86 	.reg_read = rt5682_sdw_read,
87 	.reg_write = rt5682_sdw_write,
88 };
89 
90 struct sdw_stream_data {
91 	struct sdw_stream_runtime *sdw_stream;
92 };
93 
94 static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
95 				 int direction)
96 {
97 	struct sdw_stream_data *stream;
98 
99 	if (!sdw_stream)
100 		return 0;
101 
102 	stream = kzalloc(sizeof(*stream), GFP_KERNEL);
103 	if (!stream)
104 		return -ENOMEM;
105 
106 	stream->sdw_stream = sdw_stream;
107 
108 	/* Use tx_mask or rx_mask to configure stream tag and set dma_data */
109 	if (direction == SNDRV_PCM_STREAM_PLAYBACK)
110 		dai->playback_dma_data = stream;
111 	else
112 		dai->capture_dma_data = stream;
113 
114 	return 0;
115 }
116 
117 static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream,
118 				struct snd_soc_dai *dai)
119 {
120 	struct sdw_stream_data *stream;
121 
122 	stream = snd_soc_dai_get_dma_data(dai, substream);
123 	snd_soc_dai_set_dma_data(dai, substream, NULL);
124 	kfree(stream);
125 }
126 
127 static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream,
128 				struct snd_pcm_hw_params *params,
129 				struct snd_soc_dai *dai)
130 {
131 	struct snd_soc_component *component = dai->component;
132 	struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
133 	struct sdw_stream_config stream_config;
134 	struct sdw_port_config port_config;
135 	enum sdw_data_direction direction;
136 	struct sdw_stream_data *stream;
137 	int retval, port, num_channels;
138 	unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0;
139 
140 	dev_dbg(dai->dev, "%s %s", __func__, dai->name);
141 
142 	stream = snd_soc_dai_get_dma_data(dai, substream);
143 	if (!stream)
144 		return -ENOMEM;
145 
146 	if (!rt5682->slave)
147 		return -EINVAL;
148 
149 	/* SoundWire specific configuration */
150 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
151 		direction = SDW_DATA_DIR_RX;
152 		port = 1;
153 	} else {
154 		direction = SDW_DATA_DIR_TX;
155 		port = 2;
156 	}
157 
158 	stream_config.frame_rate = params_rate(params);
159 	stream_config.ch_count = params_channels(params);
160 	stream_config.bps = snd_pcm_format_width(params_format(params));
161 	stream_config.direction = direction;
162 
163 	num_channels = params_channels(params);
164 	port_config.ch_mask = (1 << (num_channels)) - 1;
165 	port_config.num = port;
166 
167 	retval = sdw_stream_add_slave(rt5682->slave, &stream_config,
168 				      &port_config, 1, stream->sdw_stream);
169 	if (retval) {
170 		dev_err(dai->dev, "Unable to configure port\n");
171 		return retval;
172 	}
173 
174 	switch (params_rate(params)) {
175 	case 48000:
176 		val_p = RT5682_SDW_REF_1_48K;
177 		val_c = RT5682_SDW_REF_2_48K;
178 		break;
179 	case 96000:
180 		val_p = RT5682_SDW_REF_1_96K;
181 		val_c = RT5682_SDW_REF_2_96K;
182 		break;
183 	case 192000:
184 		val_p = RT5682_SDW_REF_1_192K;
185 		val_c = RT5682_SDW_REF_2_192K;
186 		break;
187 	case 32000:
188 		val_p = RT5682_SDW_REF_1_32K;
189 		val_c = RT5682_SDW_REF_2_32K;
190 		break;
191 	case 24000:
192 		val_p = RT5682_SDW_REF_1_24K;
193 		val_c = RT5682_SDW_REF_2_24K;
194 		break;
195 	case 16000:
196 		val_p = RT5682_SDW_REF_1_16K;
197 		val_c = RT5682_SDW_REF_2_16K;
198 		break;
199 	case 12000:
200 		val_p = RT5682_SDW_REF_1_12K;
201 		val_c = RT5682_SDW_REF_2_12K;
202 		break;
203 	case 8000:
204 		val_p = RT5682_SDW_REF_1_8K;
205 		val_c = RT5682_SDW_REF_2_8K;
206 		break;
207 	case 44100:
208 		val_p = RT5682_SDW_REF_1_44K;
209 		val_c = RT5682_SDW_REF_2_44K;
210 		break;
211 	case 88200:
212 		val_p = RT5682_SDW_REF_1_88K;
213 		val_c = RT5682_SDW_REF_2_88K;
214 		break;
215 	case 176400:
216 		val_p = RT5682_SDW_REF_1_176K;
217 		val_c = RT5682_SDW_REF_2_176K;
218 		break;
219 	case 22050:
220 		val_p = RT5682_SDW_REF_1_22K;
221 		val_c = RT5682_SDW_REF_2_22K;
222 		break;
223 	case 11025:
224 		val_p = RT5682_SDW_REF_1_11K;
225 		val_c = RT5682_SDW_REF_2_11K;
226 		break;
227 	default:
228 		return -EINVAL;
229 	}
230 
231 	if (params_rate(params) <= 48000) {
232 		osr_p = RT5682_DAC_OSR_D_8;
233 		osr_c = RT5682_ADC_OSR_D_8;
234 	} else if (params_rate(params) <= 96000) {
235 		osr_p = RT5682_DAC_OSR_D_4;
236 		osr_c = RT5682_ADC_OSR_D_4;
237 	} else {
238 		osr_p = RT5682_DAC_OSR_D_2;
239 		osr_c = RT5682_ADC_OSR_D_2;
240 	}
241 
242 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
243 		regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
244 			RT5682_SDW_REF_1_MASK, val_p);
245 		regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
246 			RT5682_DAC_OSR_MASK, osr_p);
247 	} else {
248 		regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK,
249 			RT5682_SDW_REF_2_MASK, val_c);
250 		regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1,
251 			RT5682_ADC_OSR_MASK, osr_c);
252 	}
253 
254 	return retval;
255 }
256 
257 static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream,
258 			      struct snd_soc_dai *dai)
259 {
260 	struct snd_soc_component *component = dai->component;
261 	struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
262 	struct sdw_stream_data *stream =
263 		snd_soc_dai_get_dma_data(dai, substream);
264 
265 	if (!rt5682->slave)
266 		return -EINVAL;
267 
268 	sdw_stream_remove_slave(rt5682->slave, stream->sdw_stream);
269 	return 0;
270 }
271 
272 static const struct snd_soc_dai_ops rt5682_sdw_ops = {
273 	.hw_params	= rt5682_sdw_hw_params,
274 	.hw_free	= rt5682_sdw_hw_free,
275 	.set_sdw_stream	= rt5682_set_sdw_stream,
276 	.shutdown	= rt5682_sdw_shutdown,
277 };
278 
279 static struct snd_soc_dai_driver rt5682_dai[] = {
280 	{
281 		.name = "rt5682-aif1",
282 		.id = RT5682_AIF1,
283 		.playback = {
284 			.stream_name = "AIF1 Playback",
285 			.channels_min = 1,
286 			.channels_max = 2,
287 			.rates = RT5682_STEREO_RATES,
288 			.formats = RT5682_FORMATS,
289 		},
290 		.capture = {
291 			.stream_name = "AIF1 Capture",
292 			.channels_min = 1,
293 			.channels_max = 2,
294 			.rates = RT5682_STEREO_RATES,
295 			.formats = RT5682_FORMATS,
296 		},
297 		.ops = &rt5682_aif1_dai_ops,
298 	},
299 	{
300 		.name = "rt5682-aif2",
301 		.id = RT5682_AIF2,
302 		.capture = {
303 			.stream_name = "AIF2 Capture",
304 			.channels_min = 1,
305 			.channels_max = 2,
306 			.rates = RT5682_STEREO_RATES,
307 			.formats = RT5682_FORMATS,
308 		},
309 		.ops = &rt5682_aif2_dai_ops,
310 	},
311 	{
312 		.name = "rt5682-sdw",
313 		.id = RT5682_SDW,
314 		.playback = {
315 			.stream_name = "SDW Playback",
316 			.channels_min = 1,
317 			.channels_max = 2,
318 			.rates = RT5682_STEREO_RATES,
319 			.formats = RT5682_FORMATS,
320 		},
321 		.capture = {
322 			.stream_name = "SDW Capture",
323 			.channels_min = 1,
324 			.channels_max = 2,
325 			.rates = RT5682_STEREO_RATES,
326 			.formats = RT5682_FORMATS,
327 		},
328 		.ops = &rt5682_sdw_ops,
329 	},
330 };
331 
332 static int rt5682_sdw_init(struct device *dev, struct regmap *regmap,
333 			   struct sdw_slave *slave)
334 {
335 	struct rt5682_priv *rt5682;
336 	int ret;
337 
338 	rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL);
339 	if (!rt5682)
340 		return -ENOMEM;
341 
342 	dev_set_drvdata(dev, rt5682);
343 	rt5682->slave = slave;
344 	rt5682->sdw_regmap = regmap;
345 	rt5682->is_sdw = true;
346 
347 	rt5682->regmap = devm_regmap_init(dev, NULL, dev,
348 					  &rt5682_sdw_indirect_regmap);
349 	if (IS_ERR(rt5682->regmap)) {
350 		ret = PTR_ERR(rt5682->regmap);
351 		dev_err(dev, "Failed to allocate register map: %d\n",
352 			ret);
353 		return ret;
354 	}
355 
356 	/*
357 	 * Mark hw_init to false
358 	 * HW init will be performed when device reports present
359 	 */
360 	rt5682->hw_init = false;
361 	rt5682->first_hw_init = false;
362 
363 	mutex_init(&rt5682->calibrate_mutex);
364 	INIT_DELAYED_WORK(&rt5682->jack_detect_work,
365 		rt5682_jack_detect_handler);
366 
367 	ret = devm_snd_soc_register_component(dev,
368 					      &rt5682_soc_component_dev,
369 					      rt5682_dai, ARRAY_SIZE(rt5682_dai));
370 	dev_dbg(&slave->dev, "%s\n", __func__);
371 
372 	return ret;
373 }
374 
375 static int rt5682_io_init(struct device *dev, struct sdw_slave *slave)
376 {
377 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
378 	int ret = 0, loop = 10;
379 	unsigned int val;
380 
381 	if (rt5682->hw_init)
382 		return 0;
383 
384 	/*
385 	 * PM runtime is only enabled when a Slave reports as Attached
386 	 */
387 	if (!rt5682->first_hw_init) {
388 		/* set autosuspend parameters */
389 		pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
390 		pm_runtime_use_autosuspend(&slave->dev);
391 
392 		/* update count of parent 'active' children */
393 		pm_runtime_set_active(&slave->dev);
394 
395 		/* make sure the device does not suspend immediately */
396 		pm_runtime_mark_last_busy(&slave->dev);
397 
398 		pm_runtime_enable(&slave->dev);
399 	}
400 
401 	pm_runtime_get_noresume(&slave->dev);
402 
403 	while (loop > 0) {
404 		regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val);
405 		if (val == DEVICE_ID)
406 			break;
407 		dev_warn(dev, "Device with ID register %x is not rt5682\n", val);
408 		usleep_range(30000, 30005);
409 		loop--;
410 	}
411 	if (val != DEVICE_ID) {
412 		dev_err(dev, "Device with ID register %x is not rt5682\n", val);
413 		return -ENODEV;
414 	}
415 
416 	if (rt5682->first_hw_init) {
417 		regcache_cache_only(rt5682->regmap, false);
418 		regcache_cache_bypass(rt5682->regmap, true);
419 	}
420 
421 	rt5682_calibrate(rt5682);
422 
423 	if (rt5682->first_hw_init) {
424 		regcache_cache_bypass(rt5682->regmap, false);
425 		regcache_mark_dirty(rt5682->regmap);
426 		regcache_sync(rt5682->regmap);
427 
428 		/* volatile registers */
429 		regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
430 			RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
431 
432 		goto reinit;
433 	}
434 
435 	rt5682_apply_patch_list(rt5682, dev);
436 
437 	regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000);
438 
439 	regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
440 		RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK,
441 		RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X);
442 	regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
443 	regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000);
444 	regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8,
445 		RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA);
446 	regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1,
447 		RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ);
448 	regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1,
449 		RT5682_PM_HP_MASK, RT5682_PM_HP_HV);
450 
451 	/* Soundwire */
452 	regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266);
453 	regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700);
454 	regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006);
455 	regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600);
456 	regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f);
457 	regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000);
458 	regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000);
459 	regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK,
460 		RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK,
461 		RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW);
462 
463 	regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2,
464 		RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL);
465 	regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd042);
466 	regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3,
467 		RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN);
468 	regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1,
469 		RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN);
470 	regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
471 		RT5682_POW_IRQ | RT5682_POW_JDH |
472 		RT5682_POW_ANA, RT5682_POW_IRQ |
473 		RT5682_POW_JDH | RT5682_POW_ANA);
474 	regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
475 		RT5682_PWR_JDH, RT5682_PWR_JDH);
476 	regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
477 		RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK,
478 		RT5682_JD1_EN | RT5682_JD1_IRQ_PUL);
479 
480 reinit:
481 	mod_delayed_work(system_power_efficient_wq,
482 		&rt5682->jack_detect_work, msecs_to_jiffies(250));
483 
484 	/* Mark Slave initialization complete */
485 	rt5682->hw_init = true;
486 	rt5682->first_hw_init = true;
487 
488 	pm_runtime_mark_last_busy(&slave->dev);
489 	pm_runtime_put_autosuspend(&slave->dev);
490 
491 	dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
492 
493 	return ret;
494 }
495 
496 static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg)
497 {
498 	switch (reg) {
499 	case 0x00e0:
500 	case 0x00f0:
501 	case 0x3000:
502 	case 0x3001:
503 	case 0x3004:
504 	case 0x3005:
505 	case 0x3008:
506 		return true;
507 	default:
508 		return false;
509 	}
510 }
511 
512 static const struct regmap_config rt5682_sdw_regmap = {
513 	.name = "sdw",
514 	.reg_bits = 32,
515 	.val_bits = 8,
516 	.max_register = RT5682_I2C_MODE,
517 	.readable_reg = rt5682_sdw_readable_register,
518 	.cache_type = REGCACHE_NONE,
519 	.use_single_read = true,
520 	.use_single_write = true,
521 };
522 
523 static int rt5682_update_status(struct sdw_slave *slave,
524 					enum sdw_slave_status status)
525 {
526 	struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
527 
528 	/* Update the status */
529 	rt5682->status = status;
530 
531 	if (status == SDW_SLAVE_UNATTACHED)
532 		rt5682->hw_init = false;
533 
534 	/*
535 	 * Perform initialization only if slave status is present and
536 	 * hw_init flag is false
537 	 */
538 	if (rt5682->hw_init || rt5682->status != SDW_SLAVE_ATTACHED)
539 		return 0;
540 
541 	/* perform I/O transfers required for Slave initialization */
542 	return rt5682_io_init(&slave->dev, slave);
543 }
544 
545 static int rt5682_read_prop(struct sdw_slave *slave)
546 {
547 	struct sdw_slave_prop *prop = &slave->prop;
548 	int nval, i;
549 	u32 bit;
550 	unsigned long addr;
551 	struct sdw_dpn_prop *dpn;
552 
553 	prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH |
554 		SDW_SCP_INT1_PARITY;
555 	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
556 
557 	prop->paging_support = false;
558 
559 	/* first we need to allocate memory for set bits in port lists */
560 	prop->source_ports = 0x4;	/* BITMAP: 00000100 */
561 	prop->sink_ports = 0x2;		/* BITMAP: 00000010 */
562 
563 	nval = hweight32(prop->source_ports);
564 	prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
565 					  sizeof(*prop->src_dpn_prop),
566 					  GFP_KERNEL);
567 	if (!prop->src_dpn_prop)
568 		return -ENOMEM;
569 
570 	i = 0;
571 	dpn = prop->src_dpn_prop;
572 	addr = prop->source_ports;
573 	for_each_set_bit(bit, &addr, 32) {
574 		dpn[i].num = bit;
575 		dpn[i].type = SDW_DPN_FULL;
576 		dpn[i].simple_ch_prep_sm = true;
577 		dpn[i].ch_prep_timeout = 10;
578 		i++;
579 	}
580 
581 	/* do this again for sink now */
582 	nval = hweight32(prop->sink_ports);
583 	prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
584 					   sizeof(*prop->sink_dpn_prop),
585 					   GFP_KERNEL);
586 	if (!prop->sink_dpn_prop)
587 		return -ENOMEM;
588 
589 	i = 0;
590 	dpn = prop->sink_dpn_prop;
591 	addr = prop->sink_ports;
592 	for_each_set_bit(bit, &addr, 32) {
593 		dpn[i].num = bit;
594 		dpn[i].type = SDW_DPN_FULL;
595 		dpn[i].simple_ch_prep_sm = true;
596 		dpn[i].ch_prep_timeout = 10;
597 		i++;
598 	}
599 
600 	/* set the timeout values */
601 	prop->clk_stop_timeout = 20;
602 
603 	/* wake-up event */
604 	prop->wake_capable = 1;
605 
606 	return 0;
607 }
608 
609 /* Bus clock frequency */
610 #define RT5682_CLK_FREQ_9600000HZ 9600000
611 #define RT5682_CLK_FREQ_12000000HZ 12000000
612 #define RT5682_CLK_FREQ_6000000HZ 6000000
613 #define RT5682_CLK_FREQ_4800000HZ 4800000
614 #define RT5682_CLK_FREQ_2400000HZ 2400000
615 #define RT5682_CLK_FREQ_12288000HZ 12288000
616 
617 static int rt5682_clock_config(struct device *dev)
618 {
619 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
620 	unsigned int clk_freq, value;
621 
622 	clk_freq = (rt5682->params.curr_dr_freq >> 1);
623 
624 	switch (clk_freq) {
625 	case RT5682_CLK_FREQ_12000000HZ:
626 		value = 0x0;
627 		break;
628 	case RT5682_CLK_FREQ_6000000HZ:
629 		value = 0x1;
630 		break;
631 	case RT5682_CLK_FREQ_9600000HZ:
632 		value = 0x2;
633 		break;
634 	case RT5682_CLK_FREQ_4800000HZ:
635 		value = 0x3;
636 		break;
637 	case RT5682_CLK_FREQ_2400000HZ:
638 		value = 0x4;
639 		break;
640 	case RT5682_CLK_FREQ_12288000HZ:
641 		value = 0x5;
642 		break;
643 	default:
644 		return -EINVAL;
645 	}
646 
647 	regmap_write(rt5682->sdw_regmap, 0xe0, value);
648 	regmap_write(rt5682->sdw_regmap, 0xf0, value);
649 
650 	dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq);
651 
652 	return 0;
653 }
654 
655 static int rt5682_bus_config(struct sdw_slave *slave,
656 					struct sdw_bus_params *params)
657 {
658 	struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
659 	int ret;
660 
661 	memcpy(&rt5682->params, params, sizeof(*params));
662 
663 	ret = rt5682_clock_config(&slave->dev);
664 	if (ret < 0)
665 		dev_err(&slave->dev, "Invalid clk config");
666 
667 	return ret;
668 }
669 
670 static int rt5682_interrupt_callback(struct sdw_slave *slave,
671 					struct sdw_slave_intr_status *status)
672 {
673 	struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
674 
675 	dev_dbg(&slave->dev,
676 		"%s control_port_stat=%x", __func__, status->control_port);
677 
678 	if (status->control_port & 0x4) {
679 		mod_delayed_work(system_power_efficient_wq,
680 			&rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time));
681 	}
682 
683 	return 0;
684 }
685 
686 static const struct sdw_slave_ops rt5682_slave_ops = {
687 	.read_prop = rt5682_read_prop,
688 	.interrupt_callback = rt5682_interrupt_callback,
689 	.update_status = rt5682_update_status,
690 	.bus_config = rt5682_bus_config,
691 };
692 
693 static int rt5682_sdw_probe(struct sdw_slave *slave,
694 			   const struct sdw_device_id *id)
695 {
696 	struct regmap *regmap;
697 
698 	/* Regmap Initialization */
699 	regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap);
700 	if (IS_ERR(regmap))
701 		return -EINVAL;
702 
703 	rt5682_sdw_init(&slave->dev, regmap, slave);
704 
705 	return 0;
706 }
707 
708 static int rt5682_sdw_remove(struct sdw_slave *slave)
709 {
710 	struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev);
711 
712 	if (rt5682 && rt5682->hw_init)
713 		cancel_delayed_work_sync(&rt5682->jack_detect_work);
714 
715 	return 0;
716 }
717 
718 static const struct sdw_device_id rt5682_id[] = {
719 	SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0),
720 	{},
721 };
722 MODULE_DEVICE_TABLE(sdw, rt5682_id);
723 
724 static int __maybe_unused rt5682_dev_suspend(struct device *dev)
725 {
726 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
727 
728 	if (!rt5682->hw_init)
729 		return 0;
730 
731 	cancel_delayed_work_sync(&rt5682->jack_detect_work);
732 
733 	regcache_cache_only(rt5682->regmap, true);
734 	regcache_mark_dirty(rt5682->regmap);
735 
736 	return 0;
737 }
738 
739 static int __maybe_unused rt5682_dev_resume(struct device *dev)
740 {
741 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
742 	struct rt5682_priv *rt5682 = dev_get_drvdata(dev);
743 	unsigned long time;
744 
745 	if (!rt5682->hw_init)
746 		return 0;
747 
748 	if (!slave->unattach_request)
749 		goto regmap_sync;
750 
751 	time = wait_for_completion_timeout(&slave->initialization_complete,
752 				msecs_to_jiffies(RT5682_PROBE_TIMEOUT));
753 	if (!time) {
754 		dev_err(&slave->dev, "Initialization not complete, timed out\n");
755 		return -ETIMEDOUT;
756 	}
757 
758 regmap_sync:
759 	slave->unattach_request = 0;
760 	regcache_cache_only(rt5682->regmap, false);
761 	regcache_sync(rt5682->regmap);
762 
763 	return 0;
764 }
765 
766 static const struct dev_pm_ops rt5682_pm = {
767 	SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume)
768 	SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL)
769 };
770 
771 static struct sdw_driver rt5682_sdw_driver = {
772 	.driver = {
773 		.name = "rt5682",
774 		.owner = THIS_MODULE,
775 		.pm = &rt5682_pm,
776 	},
777 	.probe = rt5682_sdw_probe,
778 	.remove = rt5682_sdw_remove,
779 	.ops = &rt5682_slave_ops,
780 	.id_table = rt5682_id,
781 };
782 module_sdw_driver(rt5682_sdw_driver);
783 
784 MODULE_DESCRIPTION("ASoC RT5682 driver SDW");
785 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>");
786 MODULE_LICENSE("GPL v2");
787