1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // rt5682-sdw.c -- RT5682 ALSA SoC audio component driver 4 // 5 // Copyright 2019 Realtek Semiconductor Corp. 6 // Author: Oder Chiou <oder_chiou@realtek.com> 7 // 8 9 #include <linux/module.h> 10 #include <linux/moduleparam.h> 11 #include <linux/init.h> 12 #include <linux/delay.h> 13 #include <linux/pm.h> 14 #include <linux/acpi.h> 15 #include <linux/pm_runtime.h> 16 #include <linux/regulator/consumer.h> 17 #include <linux/mutex.h> 18 #include <linux/soundwire/sdw.h> 19 #include <linux/soundwire/sdw_type.h> 20 #include <linux/soundwire/sdw_registers.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/jack.h> 25 #include <sound/sdw.h> 26 #include <sound/soc.h> 27 #include <sound/soc-dapm.h> 28 #include <sound/initval.h> 29 #include <sound/tlv.h> 30 31 #include "rt5682.h" 32 33 #define RT5682_SDW_ADDR_L 0x3000 34 #define RT5682_SDW_ADDR_H 0x3001 35 #define RT5682_SDW_DATA_L 0x3004 36 #define RT5682_SDW_DATA_H 0x3005 37 #define RT5682_SDW_CMD 0x3008 38 39 static int rt5682_sdw_read(void *context, unsigned int reg, unsigned int *val) 40 { 41 struct device *dev = context; 42 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 43 unsigned int data_l, data_h; 44 45 regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 0); 46 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 47 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 48 regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_H, &data_h); 49 regmap_read(rt5682->sdw_regmap, RT5682_SDW_DATA_L, &data_l); 50 51 *val = (data_h << 8) | data_l; 52 53 dev_vdbg(dev, "[%s] %04x => %04x\n", __func__, reg, *val); 54 55 return 0; 56 } 57 58 static int rt5682_sdw_write(void *context, unsigned int reg, unsigned int val) 59 { 60 struct device *dev = context; 61 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 62 63 regmap_write(rt5682->sdw_regmap, RT5682_SDW_CMD, 1); 64 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_H, (reg >> 8) & 0xff); 65 regmap_write(rt5682->sdw_regmap, RT5682_SDW_ADDR_L, (reg & 0xff)); 66 regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_H, (val >> 8) & 0xff); 67 regmap_write(rt5682->sdw_regmap, RT5682_SDW_DATA_L, (val & 0xff)); 68 69 dev_vdbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 70 71 return 0; 72 } 73 74 static const struct regmap_config rt5682_sdw_indirect_regmap = { 75 .reg_bits = 16, 76 .val_bits = 16, 77 .max_register = RT5682_I2C_MODE, 78 .volatile_reg = rt5682_volatile_register, 79 .readable_reg = rt5682_readable_register, 80 .cache_type = REGCACHE_MAPLE, 81 .reg_defaults = rt5682_reg, 82 .num_reg_defaults = RT5682_REG_NUM, 83 .use_single_read = true, 84 .use_single_write = true, 85 .reg_read = rt5682_sdw_read, 86 .reg_write = rt5682_sdw_write, 87 }; 88 89 static int rt5682_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream, 90 int direction) 91 { 92 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 93 94 return 0; 95 } 96 97 static void rt5682_sdw_shutdown(struct snd_pcm_substream *substream, 98 struct snd_soc_dai *dai) 99 { 100 snd_soc_dai_set_dma_data(dai, substream, NULL); 101 } 102 103 static int rt5682_sdw_hw_params(struct snd_pcm_substream *substream, 104 struct snd_pcm_hw_params *params, 105 struct snd_soc_dai *dai) 106 { 107 struct snd_soc_component *component = dai->component; 108 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 109 struct sdw_stream_config stream_config = {0}; 110 struct sdw_port_config port_config = {0}; 111 struct sdw_stream_runtime *sdw_stream; 112 int retval; 113 unsigned int val_p = 0, val_c = 0, osr_p = 0, osr_c = 0; 114 115 dev_dbg(dai->dev, "%s %s", __func__, dai->name); 116 117 sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 118 if (!sdw_stream) 119 return -ENOMEM; 120 121 if (!rt5682->slave) 122 return -EINVAL; 123 124 /* SoundWire specific configuration */ 125 snd_sdw_params_to_config(substream, params, &stream_config, &port_config); 126 127 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 128 port_config.num = 1; 129 else 130 port_config.num = 2; 131 132 retval = sdw_stream_add_slave(rt5682->slave, &stream_config, 133 &port_config, 1, sdw_stream); 134 if (retval) { 135 dev_err(dai->dev, "Unable to configure port\n"); 136 return retval; 137 } 138 139 switch (params_rate(params)) { 140 case 48000: 141 val_p = RT5682_SDW_REF_1_48K; 142 val_c = RT5682_SDW_REF_2_48K; 143 break; 144 case 96000: 145 val_p = RT5682_SDW_REF_1_96K; 146 val_c = RT5682_SDW_REF_2_96K; 147 break; 148 case 192000: 149 val_p = RT5682_SDW_REF_1_192K; 150 val_c = RT5682_SDW_REF_2_192K; 151 break; 152 case 32000: 153 val_p = RT5682_SDW_REF_1_32K; 154 val_c = RT5682_SDW_REF_2_32K; 155 break; 156 case 24000: 157 val_p = RT5682_SDW_REF_1_24K; 158 val_c = RT5682_SDW_REF_2_24K; 159 break; 160 case 16000: 161 val_p = RT5682_SDW_REF_1_16K; 162 val_c = RT5682_SDW_REF_2_16K; 163 break; 164 case 12000: 165 val_p = RT5682_SDW_REF_1_12K; 166 val_c = RT5682_SDW_REF_2_12K; 167 break; 168 case 8000: 169 val_p = RT5682_SDW_REF_1_8K; 170 val_c = RT5682_SDW_REF_2_8K; 171 break; 172 case 44100: 173 val_p = RT5682_SDW_REF_1_44K; 174 val_c = RT5682_SDW_REF_2_44K; 175 break; 176 case 88200: 177 val_p = RT5682_SDW_REF_1_88K; 178 val_c = RT5682_SDW_REF_2_88K; 179 break; 180 case 176400: 181 val_p = RT5682_SDW_REF_1_176K; 182 val_c = RT5682_SDW_REF_2_176K; 183 break; 184 case 22050: 185 val_p = RT5682_SDW_REF_1_22K; 186 val_c = RT5682_SDW_REF_2_22K; 187 break; 188 case 11025: 189 val_p = RT5682_SDW_REF_1_11K; 190 val_c = RT5682_SDW_REF_2_11K; 191 break; 192 default: 193 return -EINVAL; 194 } 195 196 if (params_rate(params) <= 48000) { 197 osr_p = RT5682_DAC_OSR_D_8; 198 osr_c = RT5682_ADC_OSR_D_8; 199 } else if (params_rate(params) <= 96000) { 200 osr_p = RT5682_DAC_OSR_D_4; 201 osr_c = RT5682_ADC_OSR_D_4; 202 } else { 203 osr_p = RT5682_DAC_OSR_D_2; 204 osr_c = RT5682_ADC_OSR_D_2; 205 } 206 207 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 208 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 209 RT5682_SDW_REF_1_MASK, val_p); 210 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 211 RT5682_DAC_OSR_MASK, osr_p); 212 } else { 213 regmap_update_bits(rt5682->regmap, RT5682_SDW_REF_CLK, 214 RT5682_SDW_REF_2_MASK, val_c); 215 regmap_update_bits(rt5682->regmap, RT5682_ADDA_CLK_1, 216 RT5682_ADC_OSR_MASK, osr_c); 217 } 218 219 return retval; 220 } 221 222 static int rt5682_sdw_hw_free(struct snd_pcm_substream *substream, 223 struct snd_soc_dai *dai) 224 { 225 struct snd_soc_component *component = dai->component; 226 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component); 227 struct sdw_stream_runtime *sdw_stream = 228 snd_soc_dai_get_dma_data(dai, substream); 229 230 if (!rt5682->slave) 231 return -EINVAL; 232 233 sdw_stream_remove_slave(rt5682->slave, sdw_stream); 234 return 0; 235 } 236 237 static const struct snd_soc_dai_ops rt5682_sdw_ops = { 238 .hw_params = rt5682_sdw_hw_params, 239 .hw_free = rt5682_sdw_hw_free, 240 .set_stream = rt5682_set_sdw_stream, 241 .shutdown = rt5682_sdw_shutdown, 242 }; 243 244 static struct snd_soc_dai_driver rt5682_dai[] = { 245 { 246 .name = "rt5682-aif1", 247 .id = RT5682_AIF1, 248 .playback = { 249 .stream_name = "AIF1 Playback", 250 .channels_min = 1, 251 .channels_max = 2, 252 .rates = RT5682_STEREO_RATES, 253 .formats = RT5682_FORMATS, 254 }, 255 .capture = { 256 .stream_name = "AIF1 Capture", 257 .channels_min = 1, 258 .channels_max = 2, 259 .rates = RT5682_STEREO_RATES, 260 .formats = RT5682_FORMATS, 261 }, 262 .ops = &rt5682_aif1_dai_ops, 263 }, 264 { 265 .name = "rt5682-aif2", 266 .id = RT5682_AIF2, 267 .capture = { 268 .stream_name = "AIF2 Capture", 269 .channels_min = 1, 270 .channels_max = 2, 271 .rates = RT5682_STEREO_RATES, 272 .formats = RT5682_FORMATS, 273 }, 274 .ops = &rt5682_aif2_dai_ops, 275 }, 276 { 277 .name = "rt5682-sdw", 278 .id = RT5682_SDW, 279 .playback = { 280 .stream_name = "SDW Playback", 281 .channels_min = 1, 282 .channels_max = 2, 283 .rates = RT5682_STEREO_RATES, 284 .formats = RT5682_FORMATS, 285 }, 286 .capture = { 287 .stream_name = "SDW Capture", 288 .channels_min = 1, 289 .channels_max = 2, 290 .rates = RT5682_STEREO_RATES, 291 .formats = RT5682_FORMATS, 292 }, 293 .ops = &rt5682_sdw_ops, 294 }, 295 }; 296 297 static int rt5682_sdw_init(struct device *dev, struct regmap *regmap, 298 struct sdw_slave *slave) 299 { 300 struct rt5682_priv *rt5682; 301 int ret; 302 303 rt5682 = devm_kzalloc(dev, sizeof(*rt5682), GFP_KERNEL); 304 if (!rt5682) 305 return -ENOMEM; 306 307 dev_set_drvdata(dev, rt5682); 308 rt5682->slave = slave; 309 rt5682->sdw_regmap = regmap; 310 rt5682->is_sdw = true; 311 312 mutex_init(&rt5682->disable_irq_lock); 313 314 rt5682->regmap = devm_regmap_init(dev, NULL, dev, 315 &rt5682_sdw_indirect_regmap); 316 if (IS_ERR(rt5682->regmap)) { 317 ret = PTR_ERR(rt5682->regmap); 318 dev_err(dev, "Failed to allocate register map: %d\n", 319 ret); 320 return ret; 321 } 322 323 regcache_cache_only(rt5682->sdw_regmap, true); 324 regcache_cache_only(rt5682->regmap, true); 325 326 /* 327 * Mark hw_init to false 328 * HW init will be performed when device reports present 329 */ 330 rt5682->hw_init = false; 331 rt5682->first_hw_init = false; 332 333 mutex_init(&rt5682->calibrate_mutex); 334 INIT_DELAYED_WORK(&rt5682->jack_detect_work, 335 rt5682_jack_detect_handler); 336 337 ret = devm_snd_soc_register_component(dev, 338 &rt5682_soc_component_dev, 339 rt5682_dai, ARRAY_SIZE(rt5682_dai)); 340 if (ret < 0) 341 return ret; 342 343 /* set autosuspend parameters */ 344 pm_runtime_set_autosuspend_delay(dev, 3000); 345 pm_runtime_use_autosuspend(dev); 346 347 /* make sure the device does not suspend immediately */ 348 pm_runtime_mark_last_busy(dev); 349 350 pm_runtime_enable(dev); 351 352 /* important note: the device is NOT tagged as 'active' and will remain 353 * 'suspended' until the hardware is enumerated/initialized. This is required 354 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently 355 * fail with -EACCESS because of race conditions between card creation and enumeration 356 */ 357 358 dev_dbg(dev, "%s\n", __func__); 359 360 return ret; 361 } 362 363 static int rt5682_io_init(struct device *dev, struct sdw_slave *slave) 364 { 365 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 366 int ret = 0, loop = 10; 367 unsigned int val; 368 369 rt5682->disable_irq = false; 370 371 if (rt5682->hw_init) 372 return 0; 373 374 regcache_cache_only(rt5682->sdw_regmap, false); 375 regcache_cache_only(rt5682->regmap, false); 376 if (rt5682->first_hw_init) 377 regcache_cache_bypass(rt5682->regmap, true); 378 379 /* 380 * PM runtime status is marked as 'active' only when a Slave reports as Attached 381 */ 382 if (!rt5682->first_hw_init) 383 /* update count of parent 'active' children */ 384 pm_runtime_set_active(&slave->dev); 385 386 pm_runtime_get_noresume(&slave->dev); 387 388 while (loop > 0) { 389 regmap_read(rt5682->regmap, RT5682_DEVICE_ID, &val); 390 if (val == DEVICE_ID) 391 break; 392 dev_warn(dev, "Device with ID register %x is not rt5682\n", val); 393 usleep_range(30000, 30005); 394 loop--; 395 } 396 397 if (val != DEVICE_ID) { 398 dev_err(dev, "Device with ID register %x is not rt5682\n", val); 399 ret = -ENODEV; 400 goto err_nodev; 401 } 402 403 rt5682_calibrate(rt5682); 404 405 if (rt5682->first_hw_init) { 406 regcache_cache_bypass(rt5682->regmap, false); 407 regcache_mark_dirty(rt5682->regmap); 408 regcache_sync(rt5682->regmap); 409 410 /* volatile registers */ 411 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 412 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 413 414 goto reinit; 415 } 416 417 rt5682_apply_patch_list(rt5682, dev); 418 419 regmap_write(rt5682->regmap, RT5682_DEPOP_1, 0x0000); 420 421 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1, 422 RT5682_LDO1_DVO_MASK | RT5682_HP_DRIVER_MASK, 423 RT5682_LDO1_DVO_12 | RT5682_HP_DRIVER_5X); 424 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080); 425 regmap_write(rt5682->regmap, RT5682_TEST_MODE_CTRL_1, 0x0000); 426 regmap_update_bits(rt5682->regmap, RT5682_BIAS_CUR_CTRL_8, 427 RT5682_HPA_CP_BIAS_CTRL_MASK, RT5682_HPA_CP_BIAS_3UA); 428 regmap_update_bits(rt5682->regmap, RT5682_CHARGE_PUMP_1, 429 RT5682_CP_CLK_HP_MASK, RT5682_CP_CLK_HP_300KHZ); 430 regmap_update_bits(rt5682->regmap, RT5682_HP_CHARGE_PUMP_1, 431 RT5682_PM_HP_MASK, RT5682_PM_HP_HV); 432 433 /* Soundwire */ 434 regmap_write(rt5682->regmap, RT5682_PLL2_INTERNAL, 0xa266); 435 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_1, 0x1700); 436 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_2, 0x0006); 437 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_3, 0x2600); 438 regmap_write(rt5682->regmap, RT5682_PLL2_CTRL_4, 0x0c8f); 439 regmap_write(rt5682->regmap, RT5682_PLL_TRACK_2, 0x3000); 440 regmap_write(rt5682->regmap, RT5682_PLL_TRACK_3, 0x4000); 441 regmap_update_bits(rt5682->regmap, RT5682_GLB_CLK, 442 RT5682_SCLK_SRC_MASK | RT5682_PLL2_SRC_MASK, 443 RT5682_SCLK_SRC_PLL2 | RT5682_PLL2_SRC_SDW); 444 445 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_2, 446 RT5682_EXT_JD_SRC, RT5682_EXT_JD_SRC_MANUAL); 447 regmap_write(rt5682->regmap, RT5682_CBJ_CTRL_1, 0xd142); 448 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_5, 0x0700, 0x0600); 449 regmap_update_bits(rt5682->regmap, RT5682_CBJ_CTRL_3, 450 RT5682_CBJ_IN_BUF_EN, RT5682_CBJ_IN_BUF_EN); 451 regmap_update_bits(rt5682->regmap, RT5682_SAR_IL_CMD_1, 452 RT5682_SAR_POW_MASK, RT5682_SAR_POW_EN); 453 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL, 454 RT5682_POW_IRQ | RT5682_POW_JDH | 455 RT5682_POW_ANA, RT5682_POW_IRQ | 456 RT5682_POW_JDH | RT5682_POW_ANA); 457 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2, 458 RT5682_PWR_JDH, RT5682_PWR_JDH); 459 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2, 460 RT5682_JD1_EN_MASK | RT5682_JD1_IRQ_MASK, 461 RT5682_JD1_EN | RT5682_JD1_IRQ_PUL); 462 463 reinit: 464 mod_delayed_work(system_power_efficient_wq, 465 &rt5682->jack_detect_work, msecs_to_jiffies(250)); 466 467 /* Mark Slave initialization complete */ 468 rt5682->hw_init = true; 469 rt5682->first_hw_init = true; 470 471 err_nodev: 472 pm_runtime_mark_last_busy(&slave->dev); 473 pm_runtime_put_autosuspend(&slave->dev); 474 475 dev_dbg(&slave->dev, "%s hw_init complete: %d\n", __func__, ret); 476 477 return ret; 478 } 479 480 static bool rt5682_sdw_readable_register(struct device *dev, unsigned int reg) 481 { 482 switch (reg) { 483 case 0x00e0: 484 case 0x00f0: 485 case 0x3000: 486 case 0x3001: 487 case 0x3004: 488 case 0x3005: 489 case 0x3008: 490 return true; 491 default: 492 return false; 493 } 494 } 495 496 static const struct regmap_config rt5682_sdw_regmap = { 497 .name = "sdw", 498 .reg_bits = 32, 499 .val_bits = 8, 500 .max_register = RT5682_I2C_MODE, 501 .readable_reg = rt5682_sdw_readable_register, 502 .cache_type = REGCACHE_NONE, 503 .use_single_read = true, 504 .use_single_write = true, 505 }; 506 507 static int rt5682_update_status(struct sdw_slave *slave, 508 enum sdw_slave_status status) 509 { 510 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 511 512 if (status == SDW_SLAVE_UNATTACHED) 513 rt5682->hw_init = false; 514 515 /* 516 * Perform initialization only if slave status is present and 517 * hw_init flag is false 518 */ 519 if (rt5682->hw_init || status != SDW_SLAVE_ATTACHED) 520 return 0; 521 522 /* perform I/O transfers required for Slave initialization */ 523 return rt5682_io_init(&slave->dev, slave); 524 } 525 526 static int rt5682_read_prop(struct sdw_slave *slave) 527 { 528 struct sdw_slave_prop *prop = &slave->prop; 529 int nval, i; 530 u32 bit; 531 unsigned long addr; 532 struct sdw_dpn_prop *dpn; 533 534 prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 535 SDW_SCP_INT1_PARITY; 536 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 537 538 prop->paging_support = false; 539 540 /* first we need to allocate memory for set bits in port lists */ 541 prop->source_ports = 0x4; /* BITMAP: 00000100 */ 542 prop->sink_ports = 0x2; /* BITMAP: 00000010 */ 543 544 nval = hweight32(prop->source_ports); 545 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 546 sizeof(*prop->src_dpn_prop), 547 GFP_KERNEL); 548 if (!prop->src_dpn_prop) 549 return -ENOMEM; 550 551 i = 0; 552 dpn = prop->src_dpn_prop; 553 addr = prop->source_ports; 554 for_each_set_bit(bit, &addr, 32) { 555 dpn[i].num = bit; 556 dpn[i].type = SDW_DPN_FULL; 557 dpn[i].simple_ch_prep_sm = true; 558 dpn[i].ch_prep_timeout = 10; 559 i++; 560 } 561 562 /* do this again for sink now */ 563 nval = hweight32(prop->sink_ports); 564 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 565 sizeof(*prop->sink_dpn_prop), 566 GFP_KERNEL); 567 if (!prop->sink_dpn_prop) 568 return -ENOMEM; 569 570 i = 0; 571 dpn = prop->sink_dpn_prop; 572 addr = prop->sink_ports; 573 for_each_set_bit(bit, &addr, 32) { 574 dpn[i].num = bit; 575 dpn[i].type = SDW_DPN_FULL; 576 dpn[i].simple_ch_prep_sm = true; 577 dpn[i].ch_prep_timeout = 10; 578 i++; 579 } 580 581 /* set the timeout values */ 582 prop->clk_stop_timeout = 20; 583 584 /* wake-up event */ 585 prop->wake_capable = 1; 586 587 return 0; 588 } 589 590 /* Bus clock frequency */ 591 #define RT5682_CLK_FREQ_9600000HZ 9600000 592 #define RT5682_CLK_FREQ_12000000HZ 12000000 593 #define RT5682_CLK_FREQ_6000000HZ 6000000 594 #define RT5682_CLK_FREQ_4800000HZ 4800000 595 #define RT5682_CLK_FREQ_2400000HZ 2400000 596 #define RT5682_CLK_FREQ_12288000HZ 12288000 597 598 static int rt5682_clock_config(struct device *dev) 599 { 600 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 601 unsigned int clk_freq, value; 602 603 clk_freq = (rt5682->params.curr_dr_freq >> 1); 604 605 switch (clk_freq) { 606 case RT5682_CLK_FREQ_12000000HZ: 607 value = 0x0; 608 break; 609 case RT5682_CLK_FREQ_6000000HZ: 610 value = 0x1; 611 break; 612 case RT5682_CLK_FREQ_9600000HZ: 613 value = 0x2; 614 break; 615 case RT5682_CLK_FREQ_4800000HZ: 616 value = 0x3; 617 break; 618 case RT5682_CLK_FREQ_2400000HZ: 619 value = 0x4; 620 break; 621 case RT5682_CLK_FREQ_12288000HZ: 622 value = 0x5; 623 break; 624 default: 625 return -EINVAL; 626 } 627 628 regmap_write(rt5682->sdw_regmap, 0xe0, value); 629 regmap_write(rt5682->sdw_regmap, 0xf0, value); 630 631 dev_dbg(dev, "%s complete, clk_freq=%d\n", __func__, clk_freq); 632 633 return 0; 634 } 635 636 static int rt5682_bus_config(struct sdw_slave *slave, 637 struct sdw_bus_params *params) 638 { 639 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 640 int ret; 641 642 memcpy(&rt5682->params, params, sizeof(*params)); 643 644 ret = rt5682_clock_config(&slave->dev); 645 if (ret < 0) 646 dev_err(&slave->dev, "Invalid clk config"); 647 648 return ret; 649 } 650 651 static int rt5682_interrupt_callback(struct sdw_slave *slave, 652 struct sdw_slave_intr_status *status) 653 { 654 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 655 656 dev_dbg(&slave->dev, 657 "%s control_port_stat=%x", __func__, status->control_port); 658 659 mutex_lock(&rt5682->disable_irq_lock); 660 if (status->control_port & 0x4 && !rt5682->disable_irq) { 661 mod_delayed_work(system_power_efficient_wq, 662 &rt5682->jack_detect_work, msecs_to_jiffies(rt5682->irq_work_delay_time)); 663 } 664 mutex_unlock(&rt5682->disable_irq_lock); 665 666 return 0; 667 } 668 669 static const struct sdw_slave_ops rt5682_slave_ops = { 670 .read_prop = rt5682_read_prop, 671 .interrupt_callback = rt5682_interrupt_callback, 672 .update_status = rt5682_update_status, 673 .bus_config = rt5682_bus_config, 674 }; 675 676 static int rt5682_sdw_probe(struct sdw_slave *slave, 677 const struct sdw_device_id *id) 678 { 679 struct regmap *regmap; 680 681 /* Regmap Initialization */ 682 regmap = devm_regmap_init_sdw(slave, &rt5682_sdw_regmap); 683 if (IS_ERR(regmap)) 684 return -EINVAL; 685 686 return rt5682_sdw_init(&slave->dev, regmap, slave); 687 } 688 689 static int rt5682_sdw_remove(struct sdw_slave *slave) 690 { 691 struct rt5682_priv *rt5682 = dev_get_drvdata(&slave->dev); 692 693 if (rt5682->hw_init) 694 cancel_delayed_work_sync(&rt5682->jack_detect_work); 695 696 pm_runtime_disable(&slave->dev); 697 698 return 0; 699 } 700 701 static const struct sdw_device_id rt5682_id[] = { 702 SDW_SLAVE_ENTRY_EXT(0x025d, 0x5682, 0x2, 0, 0), 703 {}, 704 }; 705 MODULE_DEVICE_TABLE(sdw, rt5682_id); 706 707 static int __maybe_unused rt5682_dev_suspend(struct device *dev) 708 { 709 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 710 711 if (!rt5682->hw_init) 712 return 0; 713 714 cancel_delayed_work_sync(&rt5682->jack_detect_work); 715 716 regcache_cache_only(rt5682->sdw_regmap, true); 717 regcache_cache_only(rt5682->regmap, true); 718 regcache_mark_dirty(rt5682->regmap); 719 720 return 0; 721 } 722 723 static int __maybe_unused rt5682_dev_system_suspend(struct device *dev) 724 { 725 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 726 struct sdw_slave *slave = dev_to_sdw_dev(dev); 727 int ret; 728 729 if (!rt5682->hw_init) 730 return 0; 731 732 /* 733 * prevent new interrupts from being handled after the 734 * deferred work completes and before the parent disables 735 * interrupts on the link 736 */ 737 mutex_lock(&rt5682->disable_irq_lock); 738 rt5682->disable_irq = true; 739 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, 740 SDW_SCP_INT1_IMPL_DEF, 0); 741 mutex_unlock(&rt5682->disable_irq_lock); 742 743 if (ret < 0) { 744 /* log but don't prevent suspend from happening */ 745 dev_dbg(&slave->dev, "%s: could not disable imp-def interrupts\n:", __func__); 746 } 747 748 return rt5682_dev_suspend(dev); 749 } 750 751 static int __maybe_unused rt5682_dev_resume(struct device *dev) 752 { 753 struct sdw_slave *slave = dev_to_sdw_dev(dev); 754 struct rt5682_priv *rt5682 = dev_get_drvdata(dev); 755 unsigned long time; 756 757 if (!rt5682->first_hw_init) 758 return 0; 759 760 if (!slave->unattach_request) { 761 if (rt5682->disable_irq == true) { 762 mutex_lock(&rt5682->disable_irq_lock); 763 sdw_write_no_pm(slave, SDW_SCP_INTMASK1, SDW_SCP_INT1_IMPL_DEF); 764 rt5682->disable_irq = false; 765 mutex_unlock(&rt5682->disable_irq_lock); 766 } 767 goto regmap_sync; 768 } 769 770 time = wait_for_completion_timeout(&slave->initialization_complete, 771 msecs_to_jiffies(RT5682_PROBE_TIMEOUT)); 772 if (!time) { 773 dev_err(&slave->dev, "Initialization not complete, timed out\n"); 774 sdw_show_ping_status(slave->bus, true); 775 776 return -ETIMEDOUT; 777 } 778 779 regmap_sync: 780 slave->unattach_request = 0; 781 regcache_cache_only(rt5682->sdw_regmap, false); 782 regcache_cache_only(rt5682->regmap, false); 783 regcache_sync(rt5682->regmap); 784 785 return 0; 786 } 787 788 static const struct dev_pm_ops rt5682_pm = { 789 SET_SYSTEM_SLEEP_PM_OPS(rt5682_dev_system_suspend, rt5682_dev_resume) 790 SET_RUNTIME_PM_OPS(rt5682_dev_suspend, rt5682_dev_resume, NULL) 791 }; 792 793 static struct sdw_driver rt5682_sdw_driver = { 794 .driver = { 795 .name = "rt5682", 796 .owner = THIS_MODULE, 797 .pm = &rt5682_pm, 798 }, 799 .probe = rt5682_sdw_probe, 800 .remove = rt5682_sdw_remove, 801 .ops = &rt5682_slave_ops, 802 .id_table = rt5682_id, 803 }; 804 module_sdw_driver(rt5682_sdw_driver); 805 806 MODULE_DESCRIPTION("ASoC RT5682 driver SDW"); 807 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); 808 MODULE_LICENSE("GPL v2"); 809