1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * rt5670.c -- RT5670 ALSA SoC audio codec driver 4 * 5 * Copyright 2014 Realtek Semiconductor Corp. 6 * Author: Bard Liao <bardliao@realtek.com> 7 */ 8 9 #include <linux/module.h> 10 #include <linux/moduleparam.h> 11 #include <linux/init.h> 12 #include <linux/delay.h> 13 #include <linux/pm.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/i2c.h> 16 #include <linux/platform_device.h> 17 #include <linux/acpi.h> 18 #include <linux/spi/spi.h> 19 #include <linux/dmi.h> 20 #include <sound/core.h> 21 #include <sound/pcm.h> 22 #include <sound/pcm_params.h> 23 #include <sound/jack.h> 24 #include <sound/soc.h> 25 #include <sound/soc-dapm.h> 26 #include <sound/initval.h> 27 #include <sound/tlv.h> 28 #include <sound/rt5670.h> 29 30 #include "rl6231.h" 31 #include "rt5670.h" 32 #include "rt5670-dsp.h" 33 34 #define RT5670_DEV_GPIO BIT(0) 35 #define RT5670_IN2_DIFF BIT(1) 36 #define RT5670_DMIC_EN BIT(2) 37 #define RT5670_DMIC1_IN2P BIT(3) 38 #define RT5670_DMIC1_GPIO6 BIT(4) 39 #define RT5670_DMIC1_GPIO7 BIT(5) 40 #define RT5670_DMIC2_INR BIT(6) 41 #define RT5670_DMIC2_GPIO8 BIT(7) 42 #define RT5670_DMIC3_GPIO5 BIT(8) 43 #define RT5670_JD_MODE1 BIT(9) 44 #define RT5670_JD_MODE2 BIT(10) 45 #define RT5670_JD_MODE3 BIT(11) 46 #define RT5670_GPIO1_IS_EXT_SPK_EN BIT(12) 47 48 static unsigned long rt5670_quirk; 49 static unsigned int quirk_override; 50 module_param_named(quirk, quirk_override, uint, 0444); 51 MODULE_PARM_DESC(quirk, "Board-specific quirk override"); 52 53 #define RT5670_DEVICE_ID 0x6271 54 55 #define RT5670_PR_RANGE_BASE (0xff + 1) 56 #define RT5670_PR_SPACING 0x100 57 58 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING)) 59 60 static const struct regmap_range_cfg rt5670_ranges[] = { 61 { .name = "PR", .range_min = RT5670_PR_BASE, 62 .range_max = RT5670_PR_BASE + 0xf8, 63 .selector_reg = RT5670_PRIV_INDEX, 64 .selector_mask = 0xff, 65 .selector_shift = 0x0, 66 .window_start = RT5670_PRIV_DATA, 67 .window_len = 0x1, }, 68 }; 69 70 static const struct reg_sequence init_list[] = { 71 { RT5670_PR_BASE + 0x14, 0x9a8a }, 72 { RT5670_PR_BASE + 0x38, 0x1fe1 }, 73 { RT5670_PR_BASE + 0x3d, 0x3640 }, 74 { 0x8a, 0x0123 }, 75 }; 76 77 static const struct reg_default rt5670_reg[] = { 78 { 0x00, 0x0000 }, 79 { 0x02, 0x8888 }, 80 { 0x03, 0x8888 }, 81 { 0x0a, 0x0001 }, 82 { 0x0b, 0x0827 }, 83 { 0x0c, 0x0000 }, 84 { 0x0d, 0x0008 }, 85 { 0x0e, 0x0000 }, 86 { 0x0f, 0x0808 }, 87 { 0x19, 0xafaf }, 88 { 0x1a, 0xafaf }, 89 { 0x1b, 0x0011 }, 90 { 0x1c, 0x2f2f }, 91 { 0x1d, 0x2f2f }, 92 { 0x1e, 0x0000 }, 93 { 0x1f, 0x2f2f }, 94 { 0x20, 0x0000 }, 95 { 0x26, 0x7860 }, 96 { 0x27, 0x7860 }, 97 { 0x28, 0x7871 }, 98 { 0x29, 0x8080 }, 99 { 0x2a, 0x5656 }, 100 { 0x2b, 0x5454 }, 101 { 0x2c, 0xaaa0 }, 102 { 0x2d, 0x0000 }, 103 { 0x2e, 0x2f2f }, 104 { 0x2f, 0x1002 }, 105 { 0x30, 0x0000 }, 106 { 0x31, 0x5f00 }, 107 { 0x32, 0x0000 }, 108 { 0x33, 0x0000 }, 109 { 0x34, 0x0000 }, 110 { 0x35, 0x0000 }, 111 { 0x36, 0x0000 }, 112 { 0x37, 0x0000 }, 113 { 0x38, 0x0000 }, 114 { 0x3b, 0x0000 }, 115 { 0x3c, 0x007f }, 116 { 0x3d, 0x0000 }, 117 { 0x3e, 0x007f }, 118 { 0x45, 0xe00f }, 119 { 0x4c, 0x5380 }, 120 { 0x4f, 0x0073 }, 121 { 0x52, 0x00d3 }, 122 { 0x53, 0xf000 }, 123 { 0x61, 0x0000 }, 124 { 0x62, 0x0001 }, 125 { 0x63, 0x00c3 }, 126 { 0x64, 0x0000 }, 127 { 0x65, 0x0001 }, 128 { 0x66, 0x0000 }, 129 { 0x6f, 0x8000 }, 130 { 0x70, 0x8000 }, 131 { 0x71, 0x8000 }, 132 { 0x72, 0x8000 }, 133 { 0x73, 0x7770 }, 134 { 0x74, 0x0e00 }, 135 { 0x75, 0x1505 }, 136 { 0x76, 0x0015 }, 137 { 0x77, 0x0c00 }, 138 { 0x78, 0x4000 }, 139 { 0x79, 0x0123 }, 140 { 0x7f, 0x1100 }, 141 { 0x80, 0x0000 }, 142 { 0x81, 0x0000 }, 143 { 0x82, 0x0000 }, 144 { 0x83, 0x0000 }, 145 { 0x84, 0x0000 }, 146 { 0x85, 0x0000 }, 147 { 0x86, 0x0004 }, 148 { 0x87, 0x0000 }, 149 { 0x88, 0x0000 }, 150 { 0x89, 0x0000 }, 151 { 0x8a, 0x0123 }, 152 { 0x8b, 0x0000 }, 153 { 0x8c, 0x0003 }, 154 { 0x8d, 0x0000 }, 155 { 0x8e, 0x0004 }, 156 { 0x8f, 0x1100 }, 157 { 0x90, 0x0646 }, 158 { 0x91, 0x0c06 }, 159 { 0x93, 0x0000 }, 160 { 0x94, 0x1270 }, 161 { 0x95, 0x1000 }, 162 { 0x97, 0x0000 }, 163 { 0x98, 0x0000 }, 164 { 0x99, 0x0000 }, 165 { 0x9a, 0x2184 }, 166 { 0x9b, 0x010a }, 167 { 0x9c, 0x0aea }, 168 { 0x9d, 0x000c }, 169 { 0x9e, 0x0400 }, 170 { 0xae, 0x7000 }, 171 { 0xaf, 0x0000 }, 172 { 0xb0, 0x7000 }, 173 { 0xb1, 0x0000 }, 174 { 0xb2, 0x0000 }, 175 { 0xb3, 0x001f }, 176 { 0xb4, 0x220c }, 177 { 0xb5, 0x1f00 }, 178 { 0xb6, 0x0000 }, 179 { 0xb7, 0x0000 }, 180 { 0xbb, 0x0000 }, 181 { 0xbc, 0x0000 }, 182 { 0xbd, 0x0000 }, 183 { 0xbe, 0x0000 }, 184 { 0xbf, 0x0000 }, 185 { 0xc0, 0x0000 }, 186 { 0xc1, 0x0000 }, 187 { 0xc2, 0x0000 }, 188 { 0xcd, 0x0000 }, 189 { 0xce, 0x0000 }, 190 { 0xcf, 0x1813 }, 191 { 0xd0, 0x0690 }, 192 { 0xd1, 0x1c17 }, 193 { 0xd3, 0xa220 }, 194 { 0xd4, 0x0000 }, 195 { 0xd6, 0x0400 }, 196 { 0xd9, 0x0809 }, 197 { 0xda, 0x0000 }, 198 { 0xdb, 0x0001 }, 199 { 0xdc, 0x0049 }, 200 { 0xdd, 0x0024 }, 201 { 0xe6, 0x8000 }, 202 { 0xe7, 0x0000 }, 203 { 0xec, 0xa200 }, 204 { 0xed, 0x0000 }, 205 { 0xee, 0xa200 }, 206 { 0xef, 0x0000 }, 207 { 0xf8, 0x0000 }, 208 { 0xf9, 0x0000 }, 209 { 0xfa, 0x8010 }, 210 { 0xfb, 0x0033 }, 211 { 0xfc, 0x0100 }, 212 }; 213 214 static bool rt5670_volatile_register(struct device *dev, unsigned int reg) 215 { 216 int i; 217 218 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 219 if ((reg >= rt5670_ranges[i].window_start && 220 reg <= rt5670_ranges[i].window_start + 221 rt5670_ranges[i].window_len) || 222 (reg >= rt5670_ranges[i].range_min && 223 reg <= rt5670_ranges[i].range_max)) { 224 return true; 225 } 226 } 227 228 switch (reg) { 229 case RT5670_RESET: 230 case RT5670_PDM_DATA_CTRL1: 231 case RT5670_PDM1_DATA_CTRL4: 232 case RT5670_PDM2_DATA_CTRL4: 233 case RT5670_PRIV_DATA: 234 case RT5670_ASRC_5: 235 case RT5670_CJ_CTRL1: 236 case RT5670_CJ_CTRL2: 237 case RT5670_CJ_CTRL3: 238 case RT5670_A_JD_CTRL1: 239 case RT5670_A_JD_CTRL2: 240 case RT5670_VAD_CTRL5: 241 case RT5670_ADC_EQ_CTRL1: 242 case RT5670_EQ_CTRL1: 243 case RT5670_ALC_CTRL_1: 244 case RT5670_IRQ_CTRL2: 245 case RT5670_INT_IRQ_ST: 246 case RT5670_IL_CMD: 247 case RT5670_DSP_CTRL1: 248 case RT5670_DSP_CTRL2: 249 case RT5670_DSP_CTRL3: 250 case RT5670_DSP_CTRL4: 251 case RT5670_DSP_CTRL5: 252 case RT5670_VENDOR_ID: 253 case RT5670_VENDOR_ID1: 254 case RT5670_VENDOR_ID2: 255 return true; 256 default: 257 return false; 258 } 259 } 260 261 static bool rt5670_readable_register(struct device *dev, unsigned int reg) 262 { 263 int i; 264 265 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 266 if ((reg >= rt5670_ranges[i].window_start && 267 reg <= rt5670_ranges[i].window_start + 268 rt5670_ranges[i].window_len) || 269 (reg >= rt5670_ranges[i].range_min && 270 reg <= rt5670_ranges[i].range_max)) { 271 return true; 272 } 273 } 274 275 switch (reg) { 276 case RT5670_RESET: 277 case RT5670_HP_VOL: 278 case RT5670_LOUT1: 279 case RT5670_CJ_CTRL1: 280 case RT5670_CJ_CTRL2: 281 case RT5670_CJ_CTRL3: 282 case RT5670_IN2: 283 case RT5670_INL1_INR1_VOL: 284 case RT5670_DAC1_DIG_VOL: 285 case RT5670_DAC2_DIG_VOL: 286 case RT5670_DAC_CTRL: 287 case RT5670_STO1_ADC_DIG_VOL: 288 case RT5670_MONO_ADC_DIG_VOL: 289 case RT5670_STO2_ADC_DIG_VOL: 290 case RT5670_ADC_BST_VOL1: 291 case RT5670_ADC_BST_VOL2: 292 case RT5670_STO2_ADC_MIXER: 293 case RT5670_STO1_ADC_MIXER: 294 case RT5670_MONO_ADC_MIXER: 295 case RT5670_AD_DA_MIXER: 296 case RT5670_STO_DAC_MIXER: 297 case RT5670_DD_MIXER: 298 case RT5670_DIG_MIXER: 299 case RT5670_DSP_PATH1: 300 case RT5670_DSP_PATH2: 301 case RT5670_DIG_INF1_DATA: 302 case RT5670_DIG_INF2_DATA: 303 case RT5670_PDM_OUT_CTRL: 304 case RT5670_PDM_DATA_CTRL1: 305 case RT5670_PDM1_DATA_CTRL2: 306 case RT5670_PDM1_DATA_CTRL3: 307 case RT5670_PDM1_DATA_CTRL4: 308 case RT5670_PDM2_DATA_CTRL2: 309 case RT5670_PDM2_DATA_CTRL3: 310 case RT5670_PDM2_DATA_CTRL4: 311 case RT5670_REC_L1_MIXER: 312 case RT5670_REC_L2_MIXER: 313 case RT5670_REC_R1_MIXER: 314 case RT5670_REC_R2_MIXER: 315 case RT5670_HPO_MIXER: 316 case RT5670_MONO_MIXER: 317 case RT5670_OUT_L1_MIXER: 318 case RT5670_OUT_R1_MIXER: 319 case RT5670_LOUT_MIXER: 320 case RT5670_PWR_DIG1: 321 case RT5670_PWR_DIG2: 322 case RT5670_PWR_ANLG1: 323 case RT5670_PWR_ANLG2: 324 case RT5670_PWR_MIXER: 325 case RT5670_PWR_VOL: 326 case RT5670_PRIV_INDEX: 327 case RT5670_PRIV_DATA: 328 case RT5670_I2S4_SDP: 329 case RT5670_I2S1_SDP: 330 case RT5670_I2S2_SDP: 331 case RT5670_I2S3_SDP: 332 case RT5670_ADDA_CLK1: 333 case RT5670_ADDA_CLK2: 334 case RT5670_DMIC_CTRL1: 335 case RT5670_DMIC_CTRL2: 336 case RT5670_TDM_CTRL_1: 337 case RT5670_TDM_CTRL_2: 338 case RT5670_TDM_CTRL_3: 339 case RT5670_DSP_CLK: 340 case RT5670_GLB_CLK: 341 case RT5670_PLL_CTRL1: 342 case RT5670_PLL_CTRL2: 343 case RT5670_ASRC_1: 344 case RT5670_ASRC_2: 345 case RT5670_ASRC_3: 346 case RT5670_ASRC_4: 347 case RT5670_ASRC_5: 348 case RT5670_ASRC_7: 349 case RT5670_ASRC_8: 350 case RT5670_ASRC_9: 351 case RT5670_ASRC_10: 352 case RT5670_ASRC_11: 353 case RT5670_ASRC_12: 354 case RT5670_ASRC_13: 355 case RT5670_ASRC_14: 356 case RT5670_DEPOP_M1: 357 case RT5670_DEPOP_M2: 358 case RT5670_DEPOP_M3: 359 case RT5670_CHARGE_PUMP: 360 case RT5670_MICBIAS: 361 case RT5670_A_JD_CTRL1: 362 case RT5670_A_JD_CTRL2: 363 case RT5670_VAD_CTRL1: 364 case RT5670_VAD_CTRL2: 365 case RT5670_VAD_CTRL3: 366 case RT5670_VAD_CTRL4: 367 case RT5670_VAD_CTRL5: 368 case RT5670_ADC_EQ_CTRL1: 369 case RT5670_ADC_EQ_CTRL2: 370 case RT5670_EQ_CTRL1: 371 case RT5670_EQ_CTRL2: 372 case RT5670_ALC_DRC_CTRL1: 373 case RT5670_ALC_DRC_CTRL2: 374 case RT5670_ALC_CTRL_1: 375 case RT5670_ALC_CTRL_2: 376 case RT5670_ALC_CTRL_3: 377 case RT5670_JD_CTRL: 378 case RT5670_IRQ_CTRL1: 379 case RT5670_IRQ_CTRL2: 380 case RT5670_INT_IRQ_ST: 381 case RT5670_GPIO_CTRL1: 382 case RT5670_GPIO_CTRL2: 383 case RT5670_GPIO_CTRL3: 384 case RT5670_SCRABBLE_FUN: 385 case RT5670_SCRABBLE_CTRL: 386 case RT5670_BASE_BACK: 387 case RT5670_MP3_PLUS1: 388 case RT5670_MP3_PLUS2: 389 case RT5670_ADJ_HPF1: 390 case RT5670_ADJ_HPF2: 391 case RT5670_HP_CALIB_AMP_DET: 392 case RT5670_SV_ZCD1: 393 case RT5670_SV_ZCD2: 394 case RT5670_IL_CMD: 395 case RT5670_IL_CMD2: 396 case RT5670_IL_CMD3: 397 case RT5670_DRC_HL_CTRL1: 398 case RT5670_DRC_HL_CTRL2: 399 case RT5670_ADC_MONO_HP_CTRL1: 400 case RT5670_ADC_MONO_HP_CTRL2: 401 case RT5670_ADC_STO2_HP_CTRL1: 402 case RT5670_ADC_STO2_HP_CTRL2: 403 case RT5670_JD_CTRL3: 404 case RT5670_JD_CTRL4: 405 case RT5670_DIG_MISC: 406 case RT5670_DSP_CTRL1: 407 case RT5670_DSP_CTRL2: 408 case RT5670_DSP_CTRL3: 409 case RT5670_DSP_CTRL4: 410 case RT5670_DSP_CTRL5: 411 case RT5670_GEN_CTRL2: 412 case RT5670_GEN_CTRL3: 413 case RT5670_VENDOR_ID: 414 case RT5670_VENDOR_ID1: 415 case RT5670_VENDOR_ID2: 416 return true; 417 default: 418 return false; 419 } 420 } 421 422 /** 423 * rt5670_headset_detect - Detect headset. 424 * @component: SoC audio component device. 425 * @jack_insert: Jack insert or not. 426 * 427 * Detect whether is headset or not when jack inserted. 428 * 429 * Returns detect status. 430 */ 431 432 static int rt5670_headset_detect(struct snd_soc_component *component, int jack_insert) 433 { 434 int val; 435 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 436 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 437 438 if (jack_insert) { 439 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); 440 snd_soc_dapm_sync(dapm); 441 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x0); 442 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 443 RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD, 444 RT5670_CBJ_MN_JD); 445 snd_soc_component_write(component, RT5670_GPIO_CTRL2, 0x0004); 446 snd_soc_component_update_bits(component, RT5670_GPIO_CTRL1, 447 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 448 snd_soc_component_update_bits(component, RT5670_CJ_CTRL1, 449 RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN); 450 snd_soc_component_write(component, RT5670_JD_CTRL3, 0x00f0); 451 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 452 RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD); 453 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 454 RT5670_CBJ_MN_JD, 0); 455 msleep(300); 456 val = snd_soc_component_read32(component, RT5670_CJ_CTRL3) & 0x7; 457 if (val == 0x1 || val == 0x2) { 458 rt5670->jack_type = SND_JACK_HEADSET; 459 /* for push button */ 460 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x8); 461 snd_soc_component_update_bits(component, RT5670_IL_CMD, 0x40, 0x40); 462 snd_soc_component_read32(component, RT5670_IL_CMD); 463 } else { 464 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4); 465 rt5670->jack_type = SND_JACK_HEADPHONE; 466 snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); 467 snd_soc_dapm_sync(dapm); 468 } 469 } else { 470 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x0); 471 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4); 472 rt5670->jack_type = 0; 473 snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); 474 snd_soc_dapm_sync(dapm); 475 } 476 477 return rt5670->jack_type; 478 } 479 480 void rt5670_jack_suspend(struct snd_soc_component *component) 481 { 482 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 483 484 rt5670->jack_type_saved = rt5670->jack_type; 485 rt5670_headset_detect(component, 0); 486 } 487 EXPORT_SYMBOL_GPL(rt5670_jack_suspend); 488 489 void rt5670_jack_resume(struct snd_soc_component *component) 490 { 491 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 492 493 if (rt5670->jack_type_saved) 494 rt5670_headset_detect(component, 1); 495 } 496 EXPORT_SYMBOL_GPL(rt5670_jack_resume); 497 498 static int rt5670_button_detect(struct snd_soc_component *component) 499 { 500 int btn_type, val; 501 502 val = snd_soc_component_read32(component, RT5670_IL_CMD); 503 btn_type = val & 0xff80; 504 snd_soc_component_write(component, RT5670_IL_CMD, val); 505 if (btn_type != 0) { 506 msleep(20); 507 val = snd_soc_component_read32(component, RT5670_IL_CMD); 508 snd_soc_component_write(component, RT5670_IL_CMD, val); 509 } 510 511 return btn_type; 512 } 513 514 static int rt5670_irq_detection(void *data) 515 { 516 struct rt5670_priv *rt5670 = (struct rt5670_priv *)data; 517 struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio; 518 struct snd_soc_jack *jack = rt5670->jack; 519 int val, btn_type, report = jack->status; 520 521 if (rt5670->pdata.jd_mode == 1) /* 2 port */ 522 val = snd_soc_component_read32(rt5670->component, RT5670_A_JD_CTRL1) & 0x0070; 523 else 524 val = snd_soc_component_read32(rt5670->component, RT5670_A_JD_CTRL1) & 0x0020; 525 526 switch (val) { 527 /* jack in */ 528 case 0x30: /* 2 port */ 529 case 0x0: /* 1 port or 2 port */ 530 if (rt5670->jack_type == 0) { 531 report = rt5670_headset_detect(rt5670->component, 1); 532 /* for push button and jack out */ 533 gpio->debounce_time = 25; 534 break; 535 } 536 btn_type = 0; 537 if (snd_soc_component_read32(rt5670->component, RT5670_INT_IRQ_ST) & 0x4) { 538 /* button pressed */ 539 report = SND_JACK_HEADSET; 540 btn_type = rt5670_button_detect(rt5670->component); 541 switch (btn_type) { 542 case 0x2000: /* up */ 543 report |= SND_JACK_BTN_1; 544 break; 545 case 0x0400: /* center */ 546 report |= SND_JACK_BTN_0; 547 break; 548 case 0x0080: /* down */ 549 report |= SND_JACK_BTN_2; 550 break; 551 default: 552 dev_err(rt5670->component->dev, 553 "Unexpected button code 0x%04x\n", 554 btn_type); 555 break; 556 } 557 } 558 if (btn_type == 0)/* button release */ 559 report = rt5670->jack_type; 560 561 break; 562 /* jack out */ 563 case 0x70: /* 2 port */ 564 case 0x10: /* 2 port */ 565 case 0x20: /* 1 port */ 566 report = 0; 567 snd_soc_component_update_bits(rt5670->component, RT5670_INT_IRQ_ST, 0x1, 0x0); 568 rt5670_headset_detect(rt5670->component, 0); 569 gpio->debounce_time = 150; /* for jack in */ 570 break; 571 default: 572 break; 573 } 574 575 return report; 576 } 577 578 int rt5670_set_jack_detect(struct snd_soc_component *component, 579 struct snd_soc_jack *jack) 580 { 581 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 582 int ret; 583 584 rt5670->jack = jack; 585 rt5670->hp_gpio.gpiod_dev = component->dev; 586 rt5670->hp_gpio.name = "headset"; 587 rt5670->hp_gpio.report = SND_JACK_HEADSET | 588 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2; 589 rt5670->hp_gpio.debounce_time = 150; 590 rt5670->hp_gpio.wake = true; 591 rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670; 592 rt5670->hp_gpio.jack_status_check = rt5670_irq_detection; 593 594 ret = snd_soc_jack_add_gpios(rt5670->jack, 1, 595 &rt5670->hp_gpio); 596 if (ret) { 597 dev_err(component->dev, "Adding jack GPIO failed\n"); 598 return ret; 599 } 600 601 return 0; 602 } 603 EXPORT_SYMBOL_GPL(rt5670_set_jack_detect); 604 605 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 606 static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0); 607 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 608 static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000); 609 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 610 611 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 612 static const DECLARE_TLV_DB_RANGE(bst_tlv, 613 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 614 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 615 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 616 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 617 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 618 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 619 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) 620 ); 621 622 /* Interface data select */ 623 static const char * const rt5670_data_select[] = { 624 "Normal", "Swap", "left copy to right", "right copy to left" 625 }; 626 627 static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA, 628 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select); 629 630 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA, 631 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select); 632 633 static const struct snd_kcontrol_new rt5670_snd_controls[] = { 634 /* Headphone Output Volume */ 635 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL, 636 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 637 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL, 638 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 639 39, 1, out_vol_tlv), 640 /* OUTPUT Control */ 641 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1, 642 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1), 643 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1, 644 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv), 645 /* DAC Digital Volume */ 646 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL, 647 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1), 648 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL, 649 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 650 175, 0, dac_vol_tlv), 651 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL, 652 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 653 175, 0, dac_vol_tlv), 654 /* IN1/IN2 Control */ 655 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1, 656 RT5670_BST_SFT1, 8, 0, bst_tlv), 657 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2, 658 RT5670_BST_SFT1, 8, 0, bst_tlv), 659 /* INL/INR Volume Control */ 660 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL, 661 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT, 662 31, 1, in_vol_tlv), 663 /* ADC Digital Volume Control */ 664 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL, 665 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 666 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL, 667 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 668 127, 0, adc_vol_tlv), 669 670 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL, 671 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 672 127, 0, adc_vol_tlv), 673 674 /* ADC Boost Volume Control */ 675 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 676 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT, 677 3, 0, adc_bst_tlv), 678 679 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 680 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT, 681 3, 0, adc_bst_tlv), 682 683 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum), 684 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum), 685 }; 686 687 /** 688 * set_dmic_clk - Set parameter of dmic. 689 * 690 * @w: DAPM widget. 691 * @kcontrol: The kcontrol of this widget. 692 * @event: Event id. 693 * 694 * Choose dmic clock between 1MHz and 3MHz. 695 * It is better for clock to approximate 3MHz. 696 */ 697 static int set_dmic_clk(struct snd_soc_dapm_widget *w, 698 struct snd_kcontrol *kcontrol, int event) 699 { 700 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 701 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 702 int idx, rate; 703 704 rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap, 705 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT); 706 idx = rl6231_calc_dmic_clk(rate); 707 if (idx < 0) 708 dev_err(component->dev, "Failed to set DMIC clock\n"); 709 else 710 snd_soc_component_update_bits(component, RT5670_DMIC_CTRL1, 711 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT); 712 return idx; 713 } 714 715 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, 716 struct snd_soc_dapm_widget *sink) 717 { 718 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 719 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 720 721 if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1) 722 return 1; 723 else 724 return 0; 725 } 726 727 static int is_using_asrc(struct snd_soc_dapm_widget *source, 728 struct snd_soc_dapm_widget *sink) 729 { 730 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 731 unsigned int reg, shift, val; 732 733 switch (source->shift) { 734 case 0: 735 reg = RT5670_ASRC_3; 736 shift = 0; 737 break; 738 case 1: 739 reg = RT5670_ASRC_3; 740 shift = 4; 741 break; 742 case 2: 743 reg = RT5670_ASRC_5; 744 shift = 12; 745 break; 746 case 3: 747 reg = RT5670_ASRC_2; 748 shift = 0; 749 break; 750 case 8: 751 reg = RT5670_ASRC_2; 752 shift = 4; 753 break; 754 case 9: 755 reg = RT5670_ASRC_2; 756 shift = 8; 757 break; 758 case 10: 759 reg = RT5670_ASRC_2; 760 shift = 12; 761 break; 762 default: 763 return 0; 764 } 765 766 val = (snd_soc_component_read32(component, reg) >> shift) & 0xf; 767 switch (val) { 768 case 1: 769 case 2: 770 case 3: 771 case 4: 772 return 1; 773 default: 774 return 0; 775 } 776 777 } 778 779 static int can_use_asrc(struct snd_soc_dapm_widget *source, 780 struct snd_soc_dapm_widget *sink) 781 { 782 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 783 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 784 785 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384) 786 return 1; 787 788 return 0; 789 } 790 791 792 /** 793 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters 794 * @component: SoC audio component device. 795 * @filter_mask: mask of filters. 796 * @clk_src: clock source 797 * 798 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can 799 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to 800 * support special i2s clock format such as Intel's 100fs(100 * sampling rate). 801 * ASRC function will track i2s clock and generate a corresponding system clock 802 * for codec. This function provides an API to select the clock source for a 803 * set of filters specified by the mask. And the codec driver will turn on ASRC 804 * for these filters if ASRC is selected as their clock source. 805 */ 806 int rt5670_sel_asrc_clk_src(struct snd_soc_component *component, 807 unsigned int filter_mask, unsigned int clk_src) 808 { 809 unsigned int asrc2_mask = 0, asrc2_value = 0; 810 unsigned int asrc3_mask = 0, asrc3_value = 0; 811 812 if (clk_src > RT5670_CLK_SEL_SYS3) 813 return -EINVAL; 814 815 if (filter_mask & RT5670_DA_STEREO_FILTER) { 816 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK; 817 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK) 818 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT); 819 } 820 821 if (filter_mask & RT5670_DA_MONO_L_FILTER) { 822 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK; 823 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK) 824 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT); 825 } 826 827 if (filter_mask & RT5670_DA_MONO_R_FILTER) { 828 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK; 829 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK) 830 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT); 831 } 832 833 if (filter_mask & RT5670_AD_STEREO_FILTER) { 834 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK; 835 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK) 836 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT); 837 } 838 839 if (filter_mask & RT5670_AD_MONO_L_FILTER) { 840 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK; 841 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK) 842 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT); 843 } 844 845 if (filter_mask & RT5670_AD_MONO_R_FILTER) { 846 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK; 847 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK) 848 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT); 849 } 850 851 if (filter_mask & RT5670_UP_RATE_FILTER) { 852 asrc3_mask |= RT5670_UP_CLK_SEL_MASK; 853 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK) 854 | (clk_src << RT5670_UP_CLK_SEL_SFT); 855 } 856 857 if (filter_mask & RT5670_DOWN_RATE_FILTER) { 858 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK; 859 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK) 860 | (clk_src << RT5670_DOWN_CLK_SEL_SFT); 861 } 862 863 if (asrc2_mask) 864 snd_soc_component_update_bits(component, RT5670_ASRC_2, 865 asrc2_mask, asrc2_value); 866 867 if (asrc3_mask) 868 snd_soc_component_update_bits(component, RT5670_ASRC_3, 869 asrc3_mask, asrc3_value); 870 return 0; 871 } 872 EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src); 873 874 /* Digital Mixer */ 875 static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = { 876 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 877 RT5670_M_ADC_L1_SFT, 1, 1), 878 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 879 RT5670_M_ADC_L2_SFT, 1, 1), 880 }; 881 882 static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = { 883 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 884 RT5670_M_ADC_R1_SFT, 1, 1), 885 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 886 RT5670_M_ADC_R2_SFT, 1, 1), 887 }; 888 889 static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = { 890 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 891 RT5670_M_ADC_L1_SFT, 1, 1), 892 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 893 RT5670_M_ADC_L2_SFT, 1, 1), 894 }; 895 896 static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = { 897 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 898 RT5670_M_ADC_R1_SFT, 1, 1), 899 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 900 RT5670_M_ADC_R2_SFT, 1, 1), 901 }; 902 903 static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = { 904 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 905 RT5670_M_MONO_ADC_L1_SFT, 1, 1), 906 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 907 RT5670_M_MONO_ADC_L2_SFT, 1, 1), 908 }; 909 910 static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = { 911 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 912 RT5670_M_MONO_ADC_R1_SFT, 1, 1), 913 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 914 RT5670_M_MONO_ADC_R2_SFT, 1, 1), 915 }; 916 917 static const struct snd_kcontrol_new rt5670_dac_l_mix[] = { 918 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 919 RT5670_M_ADCMIX_L_SFT, 1, 1), 920 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, 921 RT5670_M_DAC1_L_SFT, 1, 1), 922 }; 923 924 static const struct snd_kcontrol_new rt5670_dac_r_mix[] = { 925 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 926 RT5670_M_ADCMIX_R_SFT, 1, 1), 927 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, 928 RT5670_M_DAC1_R_SFT, 1, 1), 929 }; 930 931 static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = { 932 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 933 RT5670_M_DAC_L1_SFT, 1, 1), 934 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER, 935 RT5670_M_DAC_L2_SFT, 1, 1), 936 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 937 RT5670_M_DAC_R1_STO_L_SFT, 1, 1), 938 }; 939 940 static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = { 941 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 942 RT5670_M_DAC_R1_SFT, 1, 1), 943 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER, 944 RT5670_M_DAC_R2_SFT, 1, 1), 945 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 946 RT5670_M_DAC_L1_STO_R_SFT, 1, 1), 947 }; 948 949 static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = { 950 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER, 951 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1), 952 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 953 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1), 954 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 955 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1), 956 }; 957 958 static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = { 959 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER, 960 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1), 961 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 962 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1), 963 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 964 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1), 965 }; 966 967 static const struct snd_kcontrol_new rt5670_dig_l_mix[] = { 968 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER, 969 RT5670_M_STO_L_DAC_L_SFT, 1, 1), 970 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 971 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1), 972 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 973 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1), 974 }; 975 976 static const struct snd_kcontrol_new rt5670_dig_r_mix[] = { 977 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER, 978 RT5670_M_STO_R_DAC_R_SFT, 1, 1), 979 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 980 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1), 981 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 982 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1), 983 }; 984 985 /* Analog Input Mixer */ 986 static const struct snd_kcontrol_new rt5670_rec_l_mix[] = { 987 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER, 988 RT5670_M_IN_L_RM_L_SFT, 1, 1), 989 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER, 990 RT5670_M_BST2_RM_L_SFT, 1, 1), 991 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER, 992 RT5670_M_BST1_RM_L_SFT, 1, 1), 993 }; 994 995 static const struct snd_kcontrol_new rt5670_rec_r_mix[] = { 996 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER, 997 RT5670_M_IN_R_RM_R_SFT, 1, 1), 998 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER, 999 RT5670_M_BST2_RM_R_SFT, 1, 1), 1000 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER, 1001 RT5670_M_BST1_RM_R_SFT, 1, 1), 1002 }; 1003 1004 static const struct snd_kcontrol_new rt5670_out_l_mix[] = { 1005 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER, 1006 RT5670_M_BST1_OM_L_SFT, 1, 1), 1007 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER, 1008 RT5670_M_IN_L_OM_L_SFT, 1, 1), 1009 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER, 1010 RT5670_M_DAC_L2_OM_L_SFT, 1, 1), 1011 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER, 1012 RT5670_M_DAC_L1_OM_L_SFT, 1, 1), 1013 }; 1014 1015 static const struct snd_kcontrol_new rt5670_out_r_mix[] = { 1016 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER, 1017 RT5670_M_BST2_OM_R_SFT, 1, 1), 1018 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER, 1019 RT5670_M_IN_R_OM_R_SFT, 1, 1), 1020 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER, 1021 RT5670_M_DAC_R2_OM_R_SFT, 1, 1), 1022 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER, 1023 RT5670_M_DAC_R1_OM_R_SFT, 1, 1), 1024 }; 1025 1026 static const struct snd_kcontrol_new rt5670_hpo_mix[] = { 1027 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1028 RT5670_M_DAC1_HM_SFT, 1, 1), 1029 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER, 1030 RT5670_M_HPVOL_HM_SFT, 1, 1), 1031 }; 1032 1033 static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = { 1034 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1035 RT5670_M_DACL1_HML_SFT, 1, 1), 1036 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER, 1037 RT5670_M_INL1_HML_SFT, 1, 1), 1038 }; 1039 1040 static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = { 1041 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1042 RT5670_M_DACR1_HMR_SFT, 1, 1), 1043 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER, 1044 RT5670_M_INR1_HMR_SFT, 1, 1), 1045 }; 1046 1047 static const struct snd_kcontrol_new rt5670_lout_mix[] = { 1048 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER, 1049 RT5670_M_DAC_L1_LM_SFT, 1, 1), 1050 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER, 1051 RT5670_M_DAC_R1_LM_SFT, 1, 1), 1052 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER, 1053 RT5670_M_OV_L_LM_SFT, 1, 1), 1054 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER, 1055 RT5670_M_OV_R_LM_SFT, 1, 1), 1056 }; 1057 1058 static const struct snd_kcontrol_new lout_l_enable_control = 1059 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 1060 RT5670_L_MUTE_SFT, 1, 1); 1061 1062 static const struct snd_kcontrol_new lout_r_enable_control = 1063 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 1064 RT5670_R_MUTE_SFT, 1, 1); 1065 1066 /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */ 1067 static const char * const rt5670_dac1_src[] = { 1068 "IF1 DAC", "IF2 DAC" 1069 }; 1070 1071 static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER, 1072 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src); 1073 1074 static const struct snd_kcontrol_new rt5670_dac1l_mux = 1075 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum); 1076 1077 static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER, 1078 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src); 1079 1080 static const struct snd_kcontrol_new rt5670_dac1r_mux = 1081 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum); 1082 1083 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ 1084 /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */ 1085 static const char * const rt5670_dac12_src[] = { 1086 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", 1087 "Bass", "VAD_ADC", "IF4 DAC" 1088 }; 1089 1090 static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL, 1091 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src); 1092 1093 static const struct snd_kcontrol_new rt5670_dac_l2_mux = 1094 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum); 1095 1096 static const char * const rt5670_dacr2_src[] = { 1097 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC" 1098 }; 1099 1100 static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL, 1101 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src); 1102 1103 static const struct snd_kcontrol_new rt5670_dac_r2_mux = 1104 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum); 1105 1106 /*RxDP source*/ /* MX-2D [15:13] */ 1107 static const char * const rt5670_rxdp_src[] = { 1108 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer", 1109 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1" 1110 }; 1111 1112 static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1, 1113 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src); 1114 1115 static const struct snd_kcontrol_new rt5670_rxdp_mux = 1116 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum); 1117 1118 /* MX-2D [1] [0] */ 1119 static const char * const rt5670_dsp_bypass_src[] = { 1120 "DSP", "Bypass" 1121 }; 1122 1123 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1, 1124 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src); 1125 1126 static const struct snd_kcontrol_new rt5670_dsp_ul_mux = 1127 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum); 1128 1129 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1, 1130 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src); 1131 1132 static const struct snd_kcontrol_new rt5670_dsp_dl_mux = 1133 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum); 1134 1135 /* Stereo2 ADC source */ 1136 /* MX-26 [15] */ 1137 static const char * const rt5670_stereo2_adc_lr_src[] = { 1138 "L", "LR" 1139 }; 1140 1141 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER, 1142 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src); 1143 1144 static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux = 1145 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum); 1146 1147 /* Stereo1 ADC source */ 1148 /* MX-27 MX-26 [12] */ 1149 static const char * const rt5670_stereo_adc1_src[] = { 1150 "DAC MIX", "ADC" 1151 }; 1152 1153 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER, 1154 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 1155 1156 static const struct snd_kcontrol_new rt5670_sto_adc_1_mux = 1157 SOC_DAPM_ENUM("Stereo1 ADC 1 Mux", rt5670_stereo1_adc1_enum); 1158 1159 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER, 1160 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 1161 1162 static const struct snd_kcontrol_new rt5670_sto2_adc_1_mux = 1163 SOC_DAPM_ENUM("Stereo2 ADC 1 Mux", rt5670_stereo2_adc1_enum); 1164 1165 1166 /* MX-27 MX-26 [11] */ 1167 static const char * const rt5670_stereo_adc2_src[] = { 1168 "DAC MIX", "DMIC" 1169 }; 1170 1171 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER, 1172 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1173 1174 static const struct snd_kcontrol_new rt5670_sto_adc_2_mux = 1175 SOC_DAPM_ENUM("Stereo1 ADC 2 Mux", rt5670_stereo1_adc2_enum); 1176 1177 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER, 1178 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1179 1180 static const struct snd_kcontrol_new rt5670_sto2_adc_2_mux = 1181 SOC_DAPM_ENUM("Stereo2 ADC 2 Mux", rt5670_stereo2_adc2_enum); 1182 1183 /* MX-27 MX-26 [9:8] */ 1184 static const char * const rt5670_stereo_dmic_src[] = { 1185 "DMIC1", "DMIC2", "DMIC3" 1186 }; 1187 1188 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER, 1189 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1190 1191 static const struct snd_kcontrol_new rt5670_sto1_dmic_mux = 1192 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum); 1193 1194 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER, 1195 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1196 1197 static const struct snd_kcontrol_new rt5670_sto2_dmic_mux = 1198 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum); 1199 1200 /* Mono ADC source */ 1201 /* MX-28 [12] */ 1202 static const char * const rt5670_mono_adc_l1_src[] = { 1203 "Mono DAC MIXL", "ADC1" 1204 }; 1205 1206 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER, 1207 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src); 1208 1209 static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux = 1210 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum); 1211 /* MX-28 [11] */ 1212 static const char * const rt5670_mono_adc_l2_src[] = { 1213 "Mono DAC MIXL", "DMIC" 1214 }; 1215 1216 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER, 1217 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src); 1218 1219 static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux = 1220 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum); 1221 1222 /* MX-28 [9:8] */ 1223 static const char * const rt5670_mono_dmic_src[] = { 1224 "DMIC1", "DMIC2", "DMIC3" 1225 }; 1226 1227 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER, 1228 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src); 1229 1230 static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux = 1231 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum); 1232 /* MX-28 [1:0] */ 1233 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER, 1234 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src); 1235 1236 static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux = 1237 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum); 1238 /* MX-28 [4] */ 1239 static const char * const rt5670_mono_adc_r1_src[] = { 1240 "Mono DAC MIXR", "ADC2" 1241 }; 1242 1243 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER, 1244 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src); 1245 1246 static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux = 1247 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum); 1248 /* MX-28 [3] */ 1249 static const char * const rt5670_mono_adc_r2_src[] = { 1250 "Mono DAC MIXR", "DMIC" 1251 }; 1252 1253 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER, 1254 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src); 1255 1256 static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux = 1257 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum); 1258 1259 /* MX-2D [3:2] */ 1260 static const char * const rt5670_txdp_slot_src[] = { 1261 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7" 1262 }; 1263 1264 static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1, 1265 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src); 1266 1267 static const struct snd_kcontrol_new rt5670_txdp_slot_mux = 1268 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum); 1269 1270 /* MX-2F [15] */ 1271 static const char * const rt5670_if1_adc2_in_src[] = { 1272 "IF_ADC2", "VAD_ADC" 1273 }; 1274 1275 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA, 1276 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src); 1277 1278 static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux = 1279 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum); 1280 1281 /* MX-2F [14:12] */ 1282 static const char * const rt5670_if2_adc_in_src[] = { 1283 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC" 1284 }; 1285 1286 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA, 1287 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src); 1288 1289 static const struct snd_kcontrol_new rt5670_if2_adc_in_mux = 1290 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum); 1291 1292 /* MX-31 [15] [13] [11] [9] */ 1293 static const char * const rt5670_pdm_src[] = { 1294 "Mono DAC", "Stereo DAC" 1295 }; 1296 1297 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL, 1298 RT5670_PDM1_L_SFT, rt5670_pdm_src); 1299 1300 static const struct snd_kcontrol_new rt5670_pdm1_l_mux = 1301 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum); 1302 1303 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL, 1304 RT5670_PDM1_R_SFT, rt5670_pdm_src); 1305 1306 static const struct snd_kcontrol_new rt5670_pdm1_r_mux = 1307 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum); 1308 1309 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL, 1310 RT5670_PDM2_L_SFT, rt5670_pdm_src); 1311 1312 static const struct snd_kcontrol_new rt5670_pdm2_l_mux = 1313 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum); 1314 1315 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL, 1316 RT5670_PDM2_R_SFT, rt5670_pdm_src); 1317 1318 static const struct snd_kcontrol_new rt5670_pdm2_r_mux = 1319 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum); 1320 1321 /* MX-FA [12] */ 1322 static const char * const rt5670_if1_adc1_in1_src[] = { 1323 "IF_ADC1", "IF1_ADC3" 1324 }; 1325 1326 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC, 1327 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src); 1328 1329 static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux = 1330 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum); 1331 1332 /* MX-FA [11] */ 1333 static const char * const rt5670_if1_adc1_in2_src[] = { 1334 "IF1_ADC1_IN1", "IF1_ADC4" 1335 }; 1336 1337 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC, 1338 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src); 1339 1340 static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux = 1341 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum); 1342 1343 /* MX-FA [10] */ 1344 static const char * const rt5670_if1_adc2_in1_src[] = { 1345 "IF1_ADC2_IN", "IF1_ADC4" 1346 }; 1347 1348 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC, 1349 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src); 1350 1351 static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux = 1352 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum); 1353 1354 /* MX-9D [9:8] */ 1355 static const char * const rt5670_vad_adc_src[] = { 1356 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L" 1357 }; 1358 1359 static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4, 1360 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src); 1361 1362 static const struct snd_kcontrol_new rt5670_vad_adc_mux = 1363 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum); 1364 1365 static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w, 1366 struct snd_kcontrol *kcontrol, int event) 1367 { 1368 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1369 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 1370 1371 switch (event) { 1372 case SND_SOC_DAPM_POST_PMU: 1373 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP, 1374 RT5670_PM_HP_MASK, RT5670_PM_HP_HV); 1375 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1376 0x0400, 0x0400); 1377 /* headphone amp power on */ 1378 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 1379 RT5670_PWR_HA | RT5670_PWR_FV1 | 1380 RT5670_PWR_FV2, RT5670_PWR_HA | 1381 RT5670_PWR_FV1 | RT5670_PWR_FV2); 1382 /* depop parameters */ 1383 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100); 1384 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009); 1385 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1386 RT5670_HP_DCC_INT1, 0x9f00); 1387 mdelay(20); 1388 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1389 break; 1390 case SND_SOC_DAPM_PRE_PMD: 1391 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004); 1392 msleep(30); 1393 break; 1394 default: 1395 return 0; 1396 } 1397 1398 return 0; 1399 } 1400 1401 static int rt5670_hp_event(struct snd_soc_dapm_widget *w, 1402 struct snd_kcontrol *kcontrol, int event) 1403 { 1404 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1405 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 1406 1407 switch (event) { 1408 case SND_SOC_DAPM_POST_PMU: 1409 /* headphone unmute sequence */ 1410 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1411 RT5670_MAMP_INT_REG2, 0xb400); 1412 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1413 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d); 1414 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1415 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1416 0x0300, 0x0300); 1417 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1418 RT5670_L_MUTE | RT5670_R_MUTE, 0); 1419 msleep(80); 1420 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1421 break; 1422 1423 case SND_SOC_DAPM_PRE_PMD: 1424 /* headphone mute sequence */ 1425 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1426 RT5670_MAMP_INT_REG2, 0xb400); 1427 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1428 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d); 1429 mdelay(10); 1430 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1431 mdelay(10); 1432 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1433 RT5670_L_MUTE | RT5670_R_MUTE, 1434 RT5670_L_MUTE | RT5670_R_MUTE); 1435 msleep(20); 1436 regmap_update_bits(rt5670->regmap, 1437 RT5670_GEN_CTRL2, 0x0300, 0x0); 1438 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1439 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707); 1440 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1441 RT5670_MAMP_INT_REG2, 0xfc00); 1442 break; 1443 1444 default: 1445 return 0; 1446 } 1447 1448 return 0; 1449 } 1450 1451 static int rt5670_spk_event(struct snd_soc_dapm_widget *w, 1452 struct snd_kcontrol *kcontrol, int event) 1453 { 1454 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1455 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 1456 1457 if (!rt5670->pdata.gpio1_is_ext_spk_en) 1458 return 0; 1459 1460 switch (event) { 1461 case SND_SOC_DAPM_POST_PMU: 1462 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 1463 RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_HI); 1464 break; 1465 1466 case SND_SOC_DAPM_PRE_PMD: 1467 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 1468 RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_LO); 1469 break; 1470 1471 default: 1472 return 0; 1473 } 1474 1475 return 0; 1476 } 1477 1478 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w, 1479 struct snd_kcontrol *kcontrol, int event) 1480 { 1481 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1482 1483 switch (event) { 1484 case SND_SOC_DAPM_POST_PMU: 1485 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1486 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P); 1487 break; 1488 1489 case SND_SOC_DAPM_PRE_PMD: 1490 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1491 RT5670_PWR_BST1_P, 0); 1492 break; 1493 1494 default: 1495 return 0; 1496 } 1497 1498 return 0; 1499 } 1500 1501 static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, 1502 struct snd_kcontrol *kcontrol, int event) 1503 { 1504 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1505 1506 switch (event) { 1507 case SND_SOC_DAPM_POST_PMU: 1508 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1509 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P); 1510 break; 1511 1512 case SND_SOC_DAPM_PRE_PMD: 1513 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1514 RT5670_PWR_BST2_P, 0); 1515 break; 1516 1517 default: 1518 return 0; 1519 } 1520 1521 return 0; 1522 } 1523 1524 static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { 1525 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, 1526 RT5670_PWR_PLL_BIT, 0, NULL, 0), 1527 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2, 1528 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0), 1529 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL, 1530 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0), 1531 1532 /* ASRC */ 1533 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1, 1534 11, 0, NULL, 0), 1535 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1, 1536 12, 0, NULL, 0), 1537 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1, 1538 10, 0, NULL, 0), 1539 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1, 1540 9, 0, NULL, 0), 1541 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1, 1542 8, 0, NULL, 0), 1543 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1, 1544 7, 0, NULL, 0), 1545 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1, 1546 6, 0, NULL, 0), 1547 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1, 1548 5, 0, NULL, 0), 1549 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1, 1550 4, 0, NULL, 0), 1551 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1, 1552 3, 0, NULL, 0), 1553 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1, 1554 2, 0, NULL, 0), 1555 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1, 1556 1, 0, NULL, 0), 1557 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1, 1558 0, 0, NULL, 0), 1559 1560 /* Input Side */ 1561 /* micbias */ 1562 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2, 1563 RT5670_PWR_MB1_BIT, 0, NULL, 0), 1564 1565 /* Input Lines */ 1566 SND_SOC_DAPM_INPUT("DMIC L1"), 1567 SND_SOC_DAPM_INPUT("DMIC R1"), 1568 SND_SOC_DAPM_INPUT("DMIC L2"), 1569 SND_SOC_DAPM_INPUT("DMIC R2"), 1570 SND_SOC_DAPM_INPUT("DMIC L3"), 1571 SND_SOC_DAPM_INPUT("DMIC R3"), 1572 1573 SND_SOC_DAPM_INPUT("IN1P"), 1574 SND_SOC_DAPM_INPUT("IN1N"), 1575 SND_SOC_DAPM_INPUT("IN2P"), 1576 SND_SOC_DAPM_INPUT("IN2N"), 1577 1578 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1579 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1580 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1581 1582 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, 1583 set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 1584 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1, 1585 RT5670_DMIC_1_EN_SFT, 0, NULL, 0), 1586 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1, 1587 RT5670_DMIC_2_EN_SFT, 0, NULL, 0), 1588 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1, 1589 RT5670_DMIC_3_EN_SFT, 0, NULL, 0), 1590 /* Boost */ 1591 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT, 1592 0, NULL, 0, rt5670_bst1_event, 1593 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1594 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT, 1595 0, NULL, 0, rt5670_bst2_event, 1596 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1597 /* Input Volume */ 1598 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL, 1599 RT5670_PWR_IN_L_BIT, 0, NULL, 0), 1600 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL, 1601 RT5670_PWR_IN_R_BIT, 0, NULL, 0), 1602 1603 /* REC Mixer */ 1604 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0, 1605 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)), 1606 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0, 1607 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)), 1608 /* ADCs */ 1609 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), 1610 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0), 1611 1612 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0), 1613 1614 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1, 1615 RT5670_PWR_ADC_L_BIT, 0, NULL, 0), 1616 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1, 1617 RT5670_PWR_ADC_R_BIT, 0, NULL, 0), 1618 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE + 1619 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0), 1620 /* ADC Mux */ 1621 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, 1622 &rt5670_sto1_dmic_mux), 1623 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1624 &rt5670_sto_adc_2_mux), 1625 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1626 &rt5670_sto_adc_2_mux), 1627 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1628 &rt5670_sto_adc_1_mux), 1629 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1630 &rt5670_sto_adc_1_mux), 1631 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0, 1632 &rt5670_sto2_dmic_mux), 1633 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1634 &rt5670_sto2_adc_2_mux), 1635 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1636 &rt5670_sto2_adc_2_mux), 1637 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1638 &rt5670_sto2_adc_1_mux), 1639 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1640 &rt5670_sto2_adc_1_mux), 1641 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0, 1642 &rt5670_sto2_adc_lr_mux), 1643 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, 1644 &rt5670_mono_dmic_l_mux), 1645 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, 1646 &rt5670_mono_dmic_r_mux), 1647 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1648 &rt5670_mono_adc_l2_mux), 1649 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1650 &rt5670_mono_adc_l1_mux), 1651 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1652 &rt5670_mono_adc_r1_mux), 1653 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1654 &rt5670_mono_adc_r2_mux), 1655 /* ADC Mixer */ 1656 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2, 1657 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0), 1658 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2, 1659 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0), 1660 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL, 1661 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix, 1662 ARRAY_SIZE(rt5670_sto1_adc_l_mix)), 1663 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL, 1664 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix, 1665 ARRAY_SIZE(rt5670_sto1_adc_r_mix)), 1666 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0, 1667 rt5670_sto2_adc_l_mix, 1668 ARRAY_SIZE(rt5670_sto2_adc_l_mix)), 1669 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0, 1670 rt5670_sto2_adc_r_mix, 1671 ARRAY_SIZE(rt5670_sto2_adc_r_mix)), 1672 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2, 1673 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0), 1674 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL, 1675 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix, 1676 ARRAY_SIZE(rt5670_mono_adc_l_mix)), 1677 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2, 1678 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0), 1679 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL, 1680 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix, 1681 ARRAY_SIZE(rt5670_mono_adc_r_mix)), 1682 1683 /* ADC PGA */ 1684 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1685 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1686 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1687 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1688 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1689 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1690 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1691 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1692 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1693 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1694 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1695 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1696 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1697 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1698 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1699 1700 /* DSP */ 1701 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1702 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0), 1703 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0), 1704 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1705 1706 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0, 1707 &rt5670_txdp_slot_mux), 1708 1709 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0, 1710 &rt5670_dsp_ul_mux), 1711 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0, 1712 &rt5670_dsp_dl_mux), 1713 1714 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0, 1715 &rt5670_rxdp_mux), 1716 1717 /* IF2 Mux */ 1718 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0, 1719 &rt5670_if2_adc_in_mux), 1720 1721 /* Digital Interface */ 1722 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1, 1723 RT5670_PWR_I2S1_BIT, 0, NULL, 0), 1724 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1725 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1726 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1727 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1728 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1729 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1730 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1731 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1732 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1733 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1, 1734 RT5670_PWR_I2S2_BIT, 0, NULL, 0), 1735 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1736 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1737 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1738 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1739 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1740 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1741 1742 /* Digital Interface Select */ 1743 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0, 1744 &rt5670_if1_adc1_in1_mux), 1745 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0, 1746 &rt5670_if1_adc1_in2_mux), 1747 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0, 1748 &rt5670_if1_adc2_in_mux), 1749 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0, 1750 &rt5670_if1_adc2_in1_mux), 1751 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0, 1752 &rt5670_vad_adc_mux), 1753 1754 /* Audio Interface */ 1755 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 1756 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1757 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1758 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, 1759 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1), 1760 1761 /* Audio DSP */ 1762 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), 1763 1764 /* Output Side */ 1765 /* DAC mixer before sound effect */ 1766 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, 1767 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)), 1768 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, 1769 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)), 1770 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1771 1772 /* DAC2 channel Mux */ 1773 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, 1774 &rt5670_dac_l2_mux), 1775 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, 1776 &rt5670_dac_r2_mux), 1777 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1, 1778 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0), 1779 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1, 1780 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0), 1781 1782 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux), 1783 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux), 1784 1785 /* DAC Mixer */ 1786 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2, 1787 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0), 1788 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2, 1789 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0), 1790 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2, 1791 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0), 1792 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 1793 rt5670_sto_dac_l_mix, 1794 ARRAY_SIZE(rt5670_sto_dac_l_mix)), 1795 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 1796 rt5670_sto_dac_r_mix, 1797 ARRAY_SIZE(rt5670_sto_dac_r_mix)), 1798 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, 1799 rt5670_mono_dac_l_mix, 1800 ARRAY_SIZE(rt5670_mono_dac_l_mix)), 1801 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, 1802 rt5670_mono_dac_r_mix, 1803 ARRAY_SIZE(rt5670_mono_dac_r_mix)), 1804 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1805 rt5670_dig_l_mix, 1806 ARRAY_SIZE(rt5670_dig_l_mix)), 1807 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1808 rt5670_dig_r_mix, 1809 ARRAY_SIZE(rt5670_dig_r_mix)), 1810 1811 /* DACs */ 1812 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1, 1813 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0), 1814 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1, 1815 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0), 1816 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), 1817 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), 1818 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1, 1819 RT5670_PWR_DAC_L2_BIT, 0), 1820 1821 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1, 1822 RT5670_PWR_DAC_R2_BIT, 0), 1823 /* OUT Mixer */ 1824 1825 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT, 1826 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)), 1827 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT, 1828 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)), 1829 /* Ouput Volume */ 1830 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL, 1831 RT5670_PWR_HV_L_BIT, 0, 1832 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)), 1833 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL, 1834 RT5670_PWR_HV_R_BIT, 0, 1835 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)), 1836 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), 1837 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), 1838 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), 1839 1840 /* HPO/LOUT/Mono Mixer */ 1841 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, 1842 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)), 1843 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT, 1844 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)), 1845 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0, 1846 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU | 1847 SND_SOC_DAPM_PRE_PMD), 1848 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1, 1849 RT5670_PWR_HP_L_BIT, 0, NULL, 0), 1850 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1, 1851 RT5670_PWR_HP_R_BIT, 0, NULL, 0), 1852 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, 1853 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD | 1854 SND_SOC_DAPM_POST_PMU), 1855 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, 1856 &lout_l_enable_control), 1857 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, 1858 &lout_r_enable_control), 1859 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0), 1860 1861 /* PDM */ 1862 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2, 1863 RT5670_PWR_PDM1_BIT, 0, NULL, 0), 1864 1865 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL, 1866 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux), 1867 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL, 1868 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux), 1869 1870 /* Output Lines */ 1871 SND_SOC_DAPM_OUTPUT("HPOL"), 1872 SND_SOC_DAPM_OUTPUT("HPOR"), 1873 SND_SOC_DAPM_OUTPUT("LOUTL"), 1874 SND_SOC_DAPM_OUTPUT("LOUTR"), 1875 }; 1876 1877 static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = { 1878 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2, 1879 RT5670_PWR_PDM2_BIT, 0, NULL, 0), 1880 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL, 1881 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux), 1882 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL, 1883 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux), 1884 SND_SOC_DAPM_OUTPUT("PDM1L"), 1885 SND_SOC_DAPM_OUTPUT("PDM1R"), 1886 SND_SOC_DAPM_OUTPUT("PDM2L"), 1887 SND_SOC_DAPM_OUTPUT("PDM2R"), 1888 }; 1889 1890 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = { 1891 SND_SOC_DAPM_PGA_E("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0, 1892 rt5670_spk_event, SND_SOC_DAPM_PRE_PMD | 1893 SND_SOC_DAPM_POST_PMU), 1894 SND_SOC_DAPM_OUTPUT("SPOLP"), 1895 SND_SOC_DAPM_OUTPUT("SPOLN"), 1896 SND_SOC_DAPM_OUTPUT("SPORP"), 1897 SND_SOC_DAPM_OUTPUT("SPORN"), 1898 }; 1899 1900 static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { 1901 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, 1902 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, 1903 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc }, 1904 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc }, 1905 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc }, 1906 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc }, 1907 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc }, 1908 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc }, 1909 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc }, 1910 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc }, 1911 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc }, 1912 1913 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc}, 1914 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc}, 1915 1916 { "DMIC1", NULL, "DMIC L1" }, 1917 { "DMIC1", NULL, "DMIC R1" }, 1918 { "DMIC2", NULL, "DMIC L2" }, 1919 { "DMIC2", NULL, "DMIC R2" }, 1920 { "DMIC3", NULL, "DMIC L3" }, 1921 { "DMIC3", NULL, "DMIC R3" }, 1922 1923 { "BST1", NULL, "IN1P" }, 1924 { "BST1", NULL, "IN1N" }, 1925 { "BST1", NULL, "Mic Det Power" }, 1926 { "BST2", NULL, "IN2P" }, 1927 { "BST2", NULL, "IN2N" }, 1928 1929 { "INL VOL", NULL, "IN2P" }, 1930 { "INR VOL", NULL, "IN2N" }, 1931 1932 { "RECMIXL", "INL Switch", "INL VOL" }, 1933 { "RECMIXL", "BST2 Switch", "BST2" }, 1934 { "RECMIXL", "BST1 Switch", "BST1" }, 1935 1936 { "RECMIXR", "INR Switch", "INR VOL" }, 1937 { "RECMIXR", "BST2 Switch", "BST2" }, 1938 { "RECMIXR", "BST1 Switch", "BST1" }, 1939 1940 { "ADC 1", NULL, "RECMIXL" }, 1941 { "ADC 1", NULL, "ADC 1 power" }, 1942 { "ADC 1", NULL, "ADC clock" }, 1943 { "ADC 2", NULL, "RECMIXR" }, 1944 { "ADC 2", NULL, "ADC 2 power" }, 1945 { "ADC 2", NULL, "ADC clock" }, 1946 1947 { "DMIC L1", NULL, "DMIC CLK" }, 1948 { "DMIC L1", NULL, "DMIC1 Power" }, 1949 { "DMIC R1", NULL, "DMIC CLK" }, 1950 { "DMIC R1", NULL, "DMIC1 Power" }, 1951 { "DMIC L2", NULL, "DMIC CLK" }, 1952 { "DMIC L2", NULL, "DMIC2 Power" }, 1953 { "DMIC R2", NULL, "DMIC CLK" }, 1954 { "DMIC R2", NULL, "DMIC2 Power" }, 1955 { "DMIC L3", NULL, "DMIC CLK" }, 1956 { "DMIC L3", NULL, "DMIC3 Power" }, 1957 { "DMIC R3", NULL, "DMIC CLK" }, 1958 { "DMIC R3", NULL, "DMIC3 Power" }, 1959 1960 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, 1961 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, 1962 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" }, 1963 1964 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" }, 1965 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" }, 1966 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" }, 1967 1968 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, 1969 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, 1970 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" }, 1971 1972 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, 1973 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, 1974 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" }, 1975 1976 { "ADC 1_2", NULL, "ADC 1" }, 1977 { "ADC 1_2", NULL, "ADC 2" }, 1978 1979 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1980 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 1981 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" }, 1982 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 1983 1984 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" }, 1985 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 1986 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1987 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 1988 1989 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, 1990 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 1991 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 1992 { "Mono ADC L1 Mux", "ADC1", "ADC 1" }, 1993 1994 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 1995 { "Mono ADC R1 Mux", "ADC2", "ADC 2" }, 1996 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, 1997 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 1998 1999 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, 2000 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, 2001 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, 2002 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, 2003 2004 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, 2005 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" }, 2006 2007 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, 2008 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" }, 2009 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2010 2011 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, 2012 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, 2013 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" }, 2014 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2015 2016 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, 2017 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, 2018 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" }, 2019 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2020 2021 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 2022 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 2023 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" }, 2024 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 2025 2026 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" }, 2027 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 2028 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 2029 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 2030 2031 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" }, 2032 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" }, 2033 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" }, 2034 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" }, 2035 2036 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" }, 2037 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" }, 2038 2039 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" }, 2040 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" }, 2041 2042 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" }, 2043 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" }, 2044 2045 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" }, 2046 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" }, 2047 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2048 2049 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, 2050 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, 2051 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, 2052 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" }, 2053 2054 { "VAD_ADC", NULL, "VAD ADC Mux" }, 2055 2056 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, 2057 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, 2058 { "IF_ADC2", NULL, "Mono ADC MIXL" }, 2059 { "IF_ADC2", NULL, "Mono ADC MIXR" }, 2060 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" }, 2061 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" }, 2062 2063 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" }, 2064 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" }, 2065 2066 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" }, 2067 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" }, 2068 2069 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" }, 2070 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" }, 2071 2072 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" }, 2073 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" }, 2074 2075 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" }, 2076 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" }, 2077 2078 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" }, 2079 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" }, 2080 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" }, 2081 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" }, 2082 { "Mono ADC MIX", NULL, "Mono ADC MIXL" }, 2083 { "Mono ADC MIX", NULL, "Mono ADC MIXR" }, 2084 2085 { "RxDP Mux", "IF2 DAC", "IF2 DAC" }, 2086 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" }, 2087 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" }, 2088 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" }, 2089 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" }, 2090 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" }, 2091 { "RxDP Mux", "DAC1", "DAC MIX" }, 2092 2093 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" }, 2094 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" }, 2095 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" }, 2096 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" }, 2097 2098 { "DSP UL Mux", "Bypass", "TDM Data Mux" }, 2099 { "DSP UL Mux", NULL, "I2S DSP" }, 2100 { "DSP DL Mux", "Bypass", "RxDP Mux" }, 2101 { "DSP DL Mux", NULL, "I2S DSP" }, 2102 2103 { "TxDP_ADC_L", NULL, "DSP UL Mux" }, 2104 { "TxDP_ADC_R", NULL, "DSP UL Mux" }, 2105 { "TxDC_DAC", NULL, "DSP DL Mux" }, 2106 2107 { "TxDP_ADC", NULL, "TxDP_ADC_L" }, 2108 { "TxDP_ADC", NULL, "TxDP_ADC_R" }, 2109 2110 { "IF1 ADC", NULL, "I2S1" }, 2111 { "IF1 ADC", NULL, "IF1_ADC1" }, 2112 { "IF1 ADC", NULL, "IF1_ADC2" }, 2113 { "IF1 ADC", NULL, "IF_ADC3" }, 2114 { "IF1 ADC", NULL, "TxDP_ADC" }, 2115 2116 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, 2117 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, 2118 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" }, 2119 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" }, 2120 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" }, 2121 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, 2122 2123 { "IF2 ADC L", NULL, "IF2 ADC Mux" }, 2124 { "IF2 ADC R", NULL, "IF2 ADC Mux" }, 2125 2126 { "IF2 ADC", NULL, "I2S2" }, 2127 { "IF2 ADC", NULL, "IF2 ADC L" }, 2128 { "IF2 ADC", NULL, "IF2 ADC R" }, 2129 2130 { "AIF1TX", NULL, "IF1 ADC" }, 2131 { "AIF2TX", NULL, "IF2 ADC" }, 2132 2133 { "IF1 DAC1", NULL, "AIF1RX" }, 2134 { "IF1 DAC2", NULL, "AIF1RX" }, 2135 { "IF2 DAC", NULL, "AIF2RX" }, 2136 2137 { "IF1 DAC1", NULL, "I2S1" }, 2138 { "IF1 DAC2", NULL, "I2S1" }, 2139 { "IF2 DAC", NULL, "I2S2" }, 2140 2141 { "IF1 DAC2 L", NULL, "IF1 DAC2" }, 2142 { "IF1 DAC2 R", NULL, "IF1 DAC2" }, 2143 { "IF1 DAC1 L", NULL, "IF1 DAC1" }, 2144 { "IF1 DAC1 R", NULL, "IF1 DAC1" }, 2145 { "IF2 DAC L", NULL, "IF2 DAC" }, 2146 { "IF2 DAC R", NULL, "IF2 DAC" }, 2147 2148 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" }, 2149 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, 2150 2151 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" }, 2152 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, 2153 2154 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, 2155 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, 2156 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" }, 2157 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, 2158 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, 2159 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" }, 2160 2161 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2162 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2163 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2164 2165 { "DAC MIX", NULL, "DAC1 MIXL" }, 2166 { "DAC MIX", NULL, "DAC1 MIXR" }, 2167 2168 { "Audio DSP", NULL, "DAC1 MIXL" }, 2169 { "Audio DSP", NULL, "DAC1 MIXR" }, 2170 2171 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" }, 2172 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, 2173 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" }, 2174 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, 2175 { "DAC L2 Volume", NULL, "DAC L2 Mux" }, 2176 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" }, 2177 2178 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" }, 2179 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, 2180 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" }, 2181 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" }, 2182 { "DAC R2 Volume", NULL, "DAC R2 Mux" }, 2183 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" }, 2184 2185 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2186 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, 2187 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2188 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" }, 2189 { "Stereo DAC MIXL", NULL, "DAC L1 Power" }, 2190 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2191 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, 2192 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2193 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" }, 2194 { "Stereo DAC MIXR", NULL, "DAC R1 Power" }, 2195 2196 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2197 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2198 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2199 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" }, 2200 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2201 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2202 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2203 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" }, 2204 2205 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, 2206 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2207 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2208 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, 2209 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2210 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2211 2212 { "DAC L1", NULL, "DAC L1 Power" }, 2213 { "DAC L1", NULL, "Stereo DAC MIXL" }, 2214 { "DAC R1", NULL, "DAC R1 Power" }, 2215 { "DAC R1", NULL, "Stereo DAC MIXR" }, 2216 { "DAC L2", NULL, "Mono DAC MIXL" }, 2217 { "DAC R2", NULL, "Mono DAC MIXR" }, 2218 2219 { "OUT MIXL", "BST1 Switch", "BST1" }, 2220 { "OUT MIXL", "INL Switch", "INL VOL" }, 2221 { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, 2222 { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, 2223 2224 { "OUT MIXR", "BST2 Switch", "BST2" }, 2225 { "OUT MIXR", "INR Switch", "INR VOL" }, 2226 { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, 2227 { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, 2228 2229 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, 2230 { "HPOVOL MIXL", "INL Switch", "INL VOL" }, 2231 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, 2232 { "HPOVOL MIXR", "INR Switch", "INR VOL" }, 2233 2234 { "DAC 2", NULL, "DAC L2" }, 2235 { "DAC 2", NULL, "DAC R2" }, 2236 { "DAC 1", NULL, "DAC L1" }, 2237 { "DAC 1", NULL, "DAC R1" }, 2238 { "HPOVOL", NULL, "HPOVOL MIXL" }, 2239 { "HPOVOL", NULL, "HPOVOL MIXR" }, 2240 { "HPO MIX", "DAC1 Switch", "DAC 1" }, 2241 { "HPO MIX", "HPVOL Switch", "HPOVOL" }, 2242 2243 { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, 2244 { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, 2245 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, 2246 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, 2247 2248 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2249 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2250 { "PDM1 L Mux", NULL, "PDM1 Power" }, 2251 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2252 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2253 { "PDM1 R Mux", NULL, "PDM1 Power" }, 2254 2255 { "HP Amp", NULL, "HPO MIX" }, 2256 { "HP Amp", NULL, "Mic Det Power" }, 2257 { "HPOL", NULL, "HP Amp" }, 2258 { "HPOL", NULL, "HP L Amp" }, 2259 { "HPOL", NULL, "Improve HP Amp Drv" }, 2260 { "HPOR", NULL, "HP Amp" }, 2261 { "HPOR", NULL, "HP R Amp" }, 2262 { "HPOR", NULL, "Improve HP Amp Drv" }, 2263 2264 { "LOUT Amp", NULL, "LOUT MIX" }, 2265 { "LOUT L Playback", "Switch", "LOUT Amp" }, 2266 { "LOUT R Playback", "Switch", "LOUT Amp" }, 2267 { "LOUTL", NULL, "LOUT L Playback" }, 2268 { "LOUTR", NULL, "LOUT R Playback" }, 2269 { "LOUTL", NULL, "Improve HP Amp Drv" }, 2270 { "LOUTR", NULL, "Improve HP Amp Drv" }, 2271 }; 2272 2273 static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = { 2274 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2275 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2276 { "PDM2 L Mux", NULL, "PDM2 Power" }, 2277 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2278 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2279 { "PDM2 R Mux", NULL, "PDM2 Power" }, 2280 { "PDM1L", NULL, "PDM1 L Mux" }, 2281 { "PDM1R", NULL, "PDM1 R Mux" }, 2282 { "PDM2L", NULL, "PDM2 L Mux" }, 2283 { "PDM2R", NULL, "PDM2 R Mux" }, 2284 }; 2285 2286 static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = { 2287 { "SPO Amp", NULL, "PDM1 L Mux" }, 2288 { "SPO Amp", NULL, "PDM1 R Mux" }, 2289 { "SPOLP", NULL, "SPO Amp" }, 2290 { "SPOLN", NULL, "SPO Amp" }, 2291 { "SPORP", NULL, "SPO Amp" }, 2292 { "SPORN", NULL, "SPO Amp" }, 2293 }; 2294 2295 static int rt5670_hw_params(struct snd_pcm_substream *substream, 2296 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 2297 { 2298 struct snd_soc_component *component = dai->component; 2299 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2300 unsigned int val_len = 0, val_clk, mask_clk; 2301 int pre_div, bclk_ms, frame_size; 2302 2303 rt5670->lrck[dai->id] = params_rate(params); 2304 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]); 2305 if (pre_div < 0) { 2306 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n", 2307 rt5670->lrck[dai->id], dai->id); 2308 return -EINVAL; 2309 } 2310 frame_size = snd_soc_params_to_frame_size(params); 2311 if (frame_size < 0) { 2312 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size); 2313 return -EINVAL; 2314 } 2315 bclk_ms = frame_size > 32; 2316 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms); 2317 2318 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 2319 rt5670->bclk[dai->id], rt5670->lrck[dai->id]); 2320 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 2321 bclk_ms, pre_div, dai->id); 2322 2323 switch (params_width(params)) { 2324 case 16: 2325 break; 2326 case 20: 2327 val_len |= RT5670_I2S_DL_20; 2328 break; 2329 case 24: 2330 val_len |= RT5670_I2S_DL_24; 2331 break; 2332 case 8: 2333 val_len |= RT5670_I2S_DL_8; 2334 break; 2335 default: 2336 return -EINVAL; 2337 } 2338 2339 switch (dai->id) { 2340 case RT5670_AIF1: 2341 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK; 2342 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT | 2343 pre_div << RT5670_I2S_PD1_SFT; 2344 snd_soc_component_update_bits(component, RT5670_I2S1_SDP, 2345 RT5670_I2S_DL_MASK, val_len); 2346 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk); 2347 break; 2348 case RT5670_AIF2: 2349 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK; 2350 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT | 2351 pre_div << RT5670_I2S_PD2_SFT; 2352 snd_soc_component_update_bits(component, RT5670_I2S2_SDP, 2353 RT5670_I2S_DL_MASK, val_len); 2354 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk); 2355 break; 2356 default: 2357 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2358 return -EINVAL; 2359 } 2360 2361 return 0; 2362 } 2363 2364 static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 2365 { 2366 struct snd_soc_component *component = dai->component; 2367 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2368 unsigned int reg_val = 0; 2369 2370 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2371 case SND_SOC_DAIFMT_CBM_CFM: 2372 rt5670->master[dai->id] = 1; 2373 break; 2374 case SND_SOC_DAIFMT_CBS_CFS: 2375 reg_val |= RT5670_I2S_MS_S; 2376 rt5670->master[dai->id] = 0; 2377 break; 2378 default: 2379 return -EINVAL; 2380 } 2381 2382 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2383 case SND_SOC_DAIFMT_NB_NF: 2384 break; 2385 case SND_SOC_DAIFMT_IB_NF: 2386 reg_val |= RT5670_I2S_BP_INV; 2387 break; 2388 default: 2389 return -EINVAL; 2390 } 2391 2392 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 2393 case SND_SOC_DAIFMT_I2S: 2394 break; 2395 case SND_SOC_DAIFMT_LEFT_J: 2396 reg_val |= RT5670_I2S_DF_LEFT; 2397 break; 2398 case SND_SOC_DAIFMT_DSP_A: 2399 reg_val |= RT5670_I2S_DF_PCM_A; 2400 break; 2401 case SND_SOC_DAIFMT_DSP_B: 2402 reg_val |= RT5670_I2S_DF_PCM_B; 2403 break; 2404 default: 2405 return -EINVAL; 2406 } 2407 2408 switch (dai->id) { 2409 case RT5670_AIF1: 2410 snd_soc_component_update_bits(component, RT5670_I2S1_SDP, 2411 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2412 RT5670_I2S_DF_MASK, reg_val); 2413 break; 2414 case RT5670_AIF2: 2415 snd_soc_component_update_bits(component, RT5670_I2S2_SDP, 2416 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2417 RT5670_I2S_DF_MASK, reg_val); 2418 break; 2419 default: 2420 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2421 return -EINVAL; 2422 } 2423 return 0; 2424 } 2425 2426 static int rt5670_set_codec_sysclk(struct snd_soc_component *component, int clk_id, 2427 int source, unsigned int freq, int dir) 2428 { 2429 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2430 unsigned int reg_val = 0; 2431 2432 switch (clk_id) { 2433 case RT5670_SCLK_S_MCLK: 2434 reg_val |= RT5670_SCLK_SRC_MCLK; 2435 break; 2436 case RT5670_SCLK_S_PLL1: 2437 reg_val |= RT5670_SCLK_SRC_PLL1; 2438 break; 2439 case RT5670_SCLK_S_RCCLK: 2440 reg_val |= RT5670_SCLK_SRC_RCCLK; 2441 break; 2442 default: 2443 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); 2444 return -EINVAL; 2445 } 2446 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2447 RT5670_SCLK_SRC_MASK, reg_val); 2448 rt5670->sysclk = freq; 2449 if (clk_id != RT5670_SCLK_S_RCCLK) 2450 rt5670->sysclk_src = clk_id; 2451 2452 dev_dbg(component->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id); 2453 2454 return 0; 2455 } 2456 2457 static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 2458 unsigned int freq_in, unsigned int freq_out) 2459 { 2460 struct snd_soc_component *component = dai->component; 2461 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2462 struct rl6231_pll_code pll_code; 2463 int ret; 2464 2465 if (source == rt5670->pll_src && freq_in == rt5670->pll_in && 2466 freq_out == rt5670->pll_out) 2467 return 0; 2468 2469 if (!freq_in || !freq_out) { 2470 dev_dbg(component->dev, "PLL disabled\n"); 2471 2472 rt5670->pll_in = 0; 2473 rt5670->pll_out = 0; 2474 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2475 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK); 2476 return 0; 2477 } 2478 2479 switch (source) { 2480 case RT5670_PLL1_S_MCLK: 2481 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2482 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK); 2483 break; 2484 case RT5670_PLL1_S_BCLK1: 2485 case RT5670_PLL1_S_BCLK2: 2486 case RT5670_PLL1_S_BCLK3: 2487 case RT5670_PLL1_S_BCLK4: 2488 switch (dai->id) { 2489 case RT5670_AIF1: 2490 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2491 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1); 2492 break; 2493 case RT5670_AIF2: 2494 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2495 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2); 2496 break; 2497 default: 2498 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2499 return -EINVAL; 2500 } 2501 break; 2502 default: 2503 dev_err(component->dev, "Unknown PLL source %d\n", source); 2504 return -EINVAL; 2505 } 2506 2507 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 2508 if (ret < 0) { 2509 dev_err(component->dev, "Unsupport input clock %d\n", freq_in); 2510 return ret; 2511 } 2512 2513 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", 2514 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 2515 pll_code.n_code, pll_code.k_code); 2516 2517 snd_soc_component_write(component, RT5670_PLL_CTRL1, 2518 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code); 2519 snd_soc_component_write(component, RT5670_PLL_CTRL2, 2520 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT | 2521 pll_code.m_bp << RT5670_PLL_M_BP_SFT); 2522 2523 rt5670->pll_in = freq_in; 2524 rt5670->pll_out = freq_out; 2525 rt5670->pll_src = source; 2526 2527 return 0; 2528 } 2529 2530 static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 2531 unsigned int rx_mask, int slots, int slot_width) 2532 { 2533 struct snd_soc_component *component = dai->component; 2534 unsigned int val = 0; 2535 2536 if (rx_mask || tx_mask) 2537 val |= (1 << 14); 2538 2539 switch (slots) { 2540 case 4: 2541 val |= (1 << 12); 2542 break; 2543 case 6: 2544 val |= (2 << 12); 2545 break; 2546 case 8: 2547 val |= (3 << 12); 2548 break; 2549 case 2: 2550 break; 2551 default: 2552 return -EINVAL; 2553 } 2554 2555 switch (slot_width) { 2556 case 20: 2557 val |= (1 << 10); 2558 break; 2559 case 24: 2560 val |= (2 << 10); 2561 break; 2562 case 32: 2563 val |= (3 << 10); 2564 break; 2565 case 16: 2566 break; 2567 default: 2568 return -EINVAL; 2569 } 2570 2571 snd_soc_component_update_bits(component, RT5670_TDM_CTRL_1, 0x7c00, val); 2572 2573 return 0; 2574 } 2575 2576 static int rt5670_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) 2577 { 2578 struct snd_soc_component *component = dai->component; 2579 2580 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio); 2581 if (dai->id != RT5670_AIF1) 2582 return 0; 2583 2584 if ((ratio % 50) == 0) 2585 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 2586 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_50FS); 2587 else 2588 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 2589 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_NOR); 2590 2591 return 0; 2592 } 2593 2594 static int rt5670_set_bias_level(struct snd_soc_component *component, 2595 enum snd_soc_bias_level level) 2596 { 2597 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2598 2599 switch (level) { 2600 case SND_SOC_BIAS_PREPARE: 2601 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) { 2602 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2603 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2604 RT5670_PWR_BG | RT5670_PWR_VREF2, 2605 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2606 RT5670_PWR_BG | RT5670_PWR_VREF2); 2607 mdelay(10); 2608 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2609 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2610 RT5670_PWR_FV1 | RT5670_PWR_FV2); 2611 snd_soc_component_update_bits(component, RT5670_CHARGE_PUMP, 2612 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK, 2613 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS); 2614 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x1); 2615 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2616 RT5670_LDO_SEL_MASK, 0x5); 2617 } 2618 break; 2619 case SND_SOC_BIAS_STANDBY: 2620 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2621 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 | 2622 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2623 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2624 RT5670_LDO_SEL_MASK, 0x3); 2625 break; 2626 case SND_SOC_BIAS_OFF: 2627 if (rt5670->pdata.jd_mode) 2628 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2629 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2630 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2631 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2632 RT5670_PWR_MB | RT5670_PWR_BG); 2633 else 2634 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2635 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2636 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2637 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2638 2639 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x0); 2640 break; 2641 2642 default: 2643 break; 2644 } 2645 2646 return 0; 2647 } 2648 2649 static int rt5670_probe(struct snd_soc_component *component) 2650 { 2651 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 2652 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2653 2654 switch (snd_soc_component_read32(component, RT5670_RESET) & RT5670_ID_MASK) { 2655 case RT5670_ID_5670: 2656 case RT5670_ID_5671: 2657 snd_soc_dapm_new_controls(dapm, 2658 rt5670_specific_dapm_widgets, 2659 ARRAY_SIZE(rt5670_specific_dapm_widgets)); 2660 snd_soc_dapm_add_routes(dapm, 2661 rt5670_specific_dapm_routes, 2662 ARRAY_SIZE(rt5670_specific_dapm_routes)); 2663 break; 2664 case RT5670_ID_5672: 2665 snd_soc_dapm_new_controls(dapm, 2666 rt5672_specific_dapm_widgets, 2667 ARRAY_SIZE(rt5672_specific_dapm_widgets)); 2668 snd_soc_dapm_add_routes(dapm, 2669 rt5672_specific_dapm_routes, 2670 ARRAY_SIZE(rt5672_specific_dapm_routes)); 2671 break; 2672 default: 2673 dev_err(component->dev, 2674 "The driver is for RT5670 RT5671 or RT5672 only\n"); 2675 return -ENODEV; 2676 } 2677 rt5670->component = component; 2678 2679 return 0; 2680 } 2681 2682 static void rt5670_remove(struct snd_soc_component *component) 2683 { 2684 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2685 2686 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2687 snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio); 2688 } 2689 2690 #ifdef CONFIG_PM 2691 static int rt5670_suspend(struct snd_soc_component *component) 2692 { 2693 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2694 2695 regcache_cache_only(rt5670->regmap, true); 2696 regcache_mark_dirty(rt5670->regmap); 2697 return 0; 2698 } 2699 2700 static int rt5670_resume(struct snd_soc_component *component) 2701 { 2702 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2703 2704 regcache_cache_only(rt5670->regmap, false); 2705 regcache_sync(rt5670->regmap); 2706 2707 return 0; 2708 } 2709 #else 2710 #define rt5670_suspend NULL 2711 #define rt5670_resume NULL 2712 #endif 2713 2714 #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000 2715 #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 2716 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 2717 2718 static const struct snd_soc_dai_ops rt5670_aif_dai_ops = { 2719 .hw_params = rt5670_hw_params, 2720 .set_fmt = rt5670_set_dai_fmt, 2721 .set_tdm_slot = rt5670_set_tdm_slot, 2722 .set_pll = rt5670_set_dai_pll, 2723 .set_bclk_ratio = rt5670_set_bclk_ratio, 2724 }; 2725 2726 static struct snd_soc_dai_driver rt5670_dai[] = { 2727 { 2728 .name = "rt5670-aif1", 2729 .id = RT5670_AIF1, 2730 .playback = { 2731 .stream_name = "AIF1 Playback", 2732 .channels_min = 1, 2733 .channels_max = 2, 2734 .rates = RT5670_STEREO_RATES, 2735 .formats = RT5670_FORMATS, 2736 }, 2737 .capture = { 2738 .stream_name = "AIF1 Capture", 2739 .channels_min = 1, 2740 .channels_max = 2, 2741 .rates = RT5670_STEREO_RATES, 2742 .formats = RT5670_FORMATS, 2743 }, 2744 .ops = &rt5670_aif_dai_ops, 2745 .symmetric_rates = 1, 2746 }, 2747 { 2748 .name = "rt5670-aif2", 2749 .id = RT5670_AIF2, 2750 .playback = { 2751 .stream_name = "AIF2 Playback", 2752 .channels_min = 1, 2753 .channels_max = 2, 2754 .rates = RT5670_STEREO_RATES, 2755 .formats = RT5670_FORMATS, 2756 }, 2757 .capture = { 2758 .stream_name = "AIF2 Capture", 2759 .channels_min = 1, 2760 .channels_max = 2, 2761 .rates = RT5670_STEREO_RATES, 2762 .formats = RT5670_FORMATS, 2763 }, 2764 .ops = &rt5670_aif_dai_ops, 2765 .symmetric_rates = 1, 2766 }, 2767 }; 2768 2769 static const struct snd_soc_component_driver soc_component_dev_rt5670 = { 2770 .probe = rt5670_probe, 2771 .remove = rt5670_remove, 2772 .suspend = rt5670_suspend, 2773 .resume = rt5670_resume, 2774 .set_bias_level = rt5670_set_bias_level, 2775 .set_sysclk = rt5670_set_codec_sysclk, 2776 .controls = rt5670_snd_controls, 2777 .num_controls = ARRAY_SIZE(rt5670_snd_controls), 2778 .dapm_widgets = rt5670_dapm_widgets, 2779 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets), 2780 .dapm_routes = rt5670_dapm_routes, 2781 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes), 2782 .use_pmdown_time = 1, 2783 .endianness = 1, 2784 .non_legacy_dai_naming = 1, 2785 }; 2786 2787 static const struct regmap_config rt5670_regmap = { 2788 .reg_bits = 8, 2789 .val_bits = 16, 2790 .use_single_read = true, 2791 .use_single_write = true, 2792 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) * 2793 RT5670_PR_SPACING), 2794 .volatile_reg = rt5670_volatile_register, 2795 .readable_reg = rt5670_readable_register, 2796 .cache_type = REGCACHE_RBTREE, 2797 .reg_defaults = rt5670_reg, 2798 .num_reg_defaults = ARRAY_SIZE(rt5670_reg), 2799 .ranges = rt5670_ranges, 2800 .num_ranges = ARRAY_SIZE(rt5670_ranges), 2801 }; 2802 2803 static const struct i2c_device_id rt5670_i2c_id[] = { 2804 { "rt5670", 0 }, 2805 { "rt5671", 0 }, 2806 { "rt5672", 0 }, 2807 { } 2808 }; 2809 MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); 2810 2811 #ifdef CONFIG_ACPI 2812 static const struct acpi_device_id rt5670_acpi_match[] = { 2813 { "10EC5670", 0}, 2814 { "10EC5672", 0}, 2815 { "10EC5640", 0}, /* quirk */ 2816 { }, 2817 }; 2818 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match); 2819 #endif 2820 2821 static int rt5670_quirk_cb(const struct dmi_system_id *id) 2822 { 2823 rt5670_quirk = (unsigned long)id->driver_data; 2824 return 1; 2825 } 2826 2827 static const struct dmi_system_id dmi_platform_intel_quirks[] = { 2828 { 2829 .callback = rt5670_quirk_cb, 2830 .ident = "Intel Braswell", 2831 .matches = { 2832 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), 2833 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"), 2834 }, 2835 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2836 RT5670_DMIC1_IN2P | 2837 RT5670_DEV_GPIO | 2838 RT5670_JD_MODE1), 2839 }, 2840 { 2841 .callback = rt5670_quirk_cb, 2842 .ident = "Dell Wyse 3040", 2843 .matches = { 2844 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 2845 DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"), 2846 }, 2847 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2848 RT5670_DMIC1_IN2P | 2849 RT5670_DEV_GPIO | 2850 RT5670_JD_MODE1), 2851 }, 2852 { 2853 .callback = rt5670_quirk_cb, 2854 .ident = "Lenovo Thinkpad Tablet 8", 2855 .matches = { 2856 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2857 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 8"), 2858 }, 2859 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2860 RT5670_DMIC2_INR | 2861 RT5670_DEV_GPIO | 2862 RT5670_JD_MODE1), 2863 }, 2864 { 2865 .callback = rt5670_quirk_cb, 2866 .ident = "Lenovo Thinkpad Tablet 10", 2867 .matches = { 2868 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2869 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"), 2870 }, 2871 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2872 RT5670_DMIC1_IN2P | 2873 RT5670_DEV_GPIO | 2874 RT5670_JD_MODE1), 2875 }, 2876 { 2877 .callback = rt5670_quirk_cb, 2878 .ident = "Lenovo Thinkpad Tablet 10", 2879 .matches = { 2880 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2881 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"), 2882 }, 2883 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2884 RT5670_DMIC1_IN2P | 2885 RT5670_DEV_GPIO | 2886 RT5670_JD_MODE1), 2887 }, 2888 { 2889 .callback = rt5670_quirk_cb, 2890 .ident = "Lenovo Miix 2 10", 2891 .matches = { 2892 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2893 DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"), 2894 }, 2895 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2896 RT5670_DMIC1_IN2P | 2897 RT5670_GPIO1_IS_EXT_SPK_EN | 2898 RT5670_JD_MODE2), 2899 }, 2900 { 2901 .callback = rt5670_quirk_cb, 2902 .ident = "Dell Venue 8 Pro 5855", 2903 .matches = { 2904 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 2905 DMI_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5855"), 2906 }, 2907 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2908 RT5670_DMIC2_INR | 2909 RT5670_DEV_GPIO | 2910 RT5670_JD_MODE3), 2911 }, 2912 { 2913 .callback = rt5670_quirk_cb, 2914 .ident = "Aegex 10 tablet (RU2)", 2915 .matches = { 2916 DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"), 2917 DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"), 2918 }, 2919 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2920 RT5670_DMIC2_INR | 2921 RT5670_DEV_GPIO | 2922 RT5670_JD_MODE3), 2923 }, 2924 {} 2925 }; 2926 2927 static int rt5670_i2c_probe(struct i2c_client *i2c, 2928 const struct i2c_device_id *id) 2929 { 2930 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev); 2931 struct rt5670_priv *rt5670; 2932 int ret; 2933 unsigned int val; 2934 2935 rt5670 = devm_kzalloc(&i2c->dev, 2936 sizeof(struct rt5670_priv), 2937 GFP_KERNEL); 2938 if (NULL == rt5670) 2939 return -ENOMEM; 2940 2941 i2c_set_clientdata(i2c, rt5670); 2942 2943 if (pdata) 2944 rt5670->pdata = *pdata; 2945 2946 dmi_check_system(dmi_platform_intel_quirks); 2947 if (quirk_override) { 2948 dev_info(&i2c->dev, "Overriding quirk 0x%x => 0x%x\n", 2949 (unsigned int)rt5670_quirk, quirk_override); 2950 rt5670_quirk = quirk_override; 2951 } 2952 2953 if (rt5670_quirk & RT5670_DEV_GPIO) { 2954 rt5670->pdata.dev_gpio = true; 2955 dev_info(&i2c->dev, "quirk dev_gpio\n"); 2956 } 2957 if (rt5670_quirk & RT5670_GPIO1_IS_EXT_SPK_EN) { 2958 rt5670->pdata.gpio1_is_ext_spk_en = true; 2959 dev_info(&i2c->dev, "quirk GPIO1 is external speaker enable\n"); 2960 } 2961 if (rt5670_quirk & RT5670_IN2_DIFF) { 2962 rt5670->pdata.in2_diff = true; 2963 dev_info(&i2c->dev, "quirk IN2_DIFF\n"); 2964 } 2965 if (rt5670_quirk & RT5670_DMIC_EN) { 2966 rt5670->pdata.dmic_en = true; 2967 dev_info(&i2c->dev, "quirk DMIC enabled\n"); 2968 } 2969 if (rt5670_quirk & RT5670_DMIC1_IN2P) { 2970 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P; 2971 dev_info(&i2c->dev, "quirk DMIC1 on IN2P pin\n"); 2972 } 2973 if (rt5670_quirk & RT5670_DMIC1_GPIO6) { 2974 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_GPIO6; 2975 dev_info(&i2c->dev, "quirk DMIC1 on GPIO6 pin\n"); 2976 } 2977 if (rt5670_quirk & RT5670_DMIC1_GPIO7) { 2978 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_GPIO7; 2979 dev_info(&i2c->dev, "quirk DMIC1 on GPIO7 pin\n"); 2980 } 2981 if (rt5670_quirk & RT5670_DMIC2_INR) { 2982 rt5670->pdata.dmic2_data_pin = RT5670_DMIC_DATA_IN3N; 2983 dev_info(&i2c->dev, "quirk DMIC2 on INR pin\n"); 2984 } 2985 if (rt5670_quirk & RT5670_DMIC2_GPIO8) { 2986 rt5670->pdata.dmic2_data_pin = RT5670_DMIC_DATA_GPIO8; 2987 dev_info(&i2c->dev, "quirk DMIC2 on GPIO8 pin\n"); 2988 } 2989 if (rt5670_quirk & RT5670_DMIC3_GPIO5) { 2990 rt5670->pdata.dmic3_data_pin = RT5670_DMIC_DATA_GPIO5; 2991 dev_info(&i2c->dev, "quirk DMIC3 on GPIO5 pin\n"); 2992 } 2993 2994 if (rt5670_quirk & RT5670_JD_MODE1) { 2995 rt5670->pdata.jd_mode = 1; 2996 dev_info(&i2c->dev, "quirk JD mode 1\n"); 2997 } 2998 if (rt5670_quirk & RT5670_JD_MODE2) { 2999 rt5670->pdata.jd_mode = 2; 3000 dev_info(&i2c->dev, "quirk JD mode 2\n"); 3001 } 3002 if (rt5670_quirk & RT5670_JD_MODE3) { 3003 rt5670->pdata.jd_mode = 3; 3004 dev_info(&i2c->dev, "quirk JD mode 3\n"); 3005 } 3006 3007 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); 3008 if (IS_ERR(rt5670->regmap)) { 3009 ret = PTR_ERR(rt5670->regmap); 3010 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 3011 ret); 3012 return ret; 3013 } 3014 3015 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val); 3016 if (val != RT5670_DEVICE_ID) { 3017 dev_err(&i2c->dev, 3018 "Device with ID register %#x is not rt5670/72\n", val); 3019 return -ENODEV; 3020 } 3021 3022 regmap_write(rt5670->regmap, RT5670_RESET, 0); 3023 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 3024 RT5670_PWR_HP_L | RT5670_PWR_HP_R | 3025 RT5670_PWR_VREF2, RT5670_PWR_VREF2); 3026 msleep(100); 3027 3028 regmap_write(rt5670->regmap, RT5670_RESET, 0); 3029 3030 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val); 3031 if (val >= 4) 3032 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980); 3033 else 3034 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00); 3035 3036 ret = regmap_register_patch(rt5670->regmap, init_list, 3037 ARRAY_SIZE(init_list)); 3038 if (ret != 0) 3039 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 3040 3041 regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC, 3042 RT5670_MCLK_DET, RT5670_MCLK_DET); 3043 3044 if (rt5670->pdata.in2_diff) 3045 regmap_update_bits(rt5670->regmap, RT5670_IN2, 3046 RT5670_IN_DF2, RT5670_IN_DF2); 3047 3048 if (rt5670->pdata.dev_gpio) { 3049 /* for push button */ 3050 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000); 3051 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010); 3052 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014); 3053 /* for irq */ 3054 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3055 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 3056 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 3057 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); 3058 } 3059 3060 if (rt5670->pdata.gpio1_is_ext_spk_en) { 3061 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3062 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_GPIO1); 3063 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 3064 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); 3065 } 3066 3067 if (rt5670->pdata.jd_mode) { 3068 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK, 3069 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK); 3070 rt5670->sysclk = 0; 3071 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK; 3072 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 3073 RT5670_PWR_MB, RT5670_PWR_MB); 3074 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2, 3075 RT5670_PWR_JD1, RT5670_PWR_JD1); 3076 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1, 3077 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN); 3078 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3, 3079 RT5670_JD_TRI_CBJ_SEL_MASK | 3080 RT5670_JD_TRI_HPO_SEL_MASK, 3081 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1); 3082 switch (rt5670->pdata.jd_mode) { 3083 case 1: 3084 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3085 RT5670_JD1_MODE_MASK, 3086 RT5670_JD1_MODE_0); 3087 break; 3088 case 2: 3089 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3090 RT5670_JD1_MODE_MASK, 3091 RT5670_JD1_MODE_1); 3092 break; 3093 case 3: 3094 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3095 RT5670_JD1_MODE_MASK, 3096 RT5670_JD1_MODE_2); 3097 break; 3098 default: 3099 break; 3100 } 3101 } 3102 3103 if (rt5670->pdata.dmic_en) { 3104 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3105 RT5670_GP2_PIN_MASK, 3106 RT5670_GP2_PIN_DMIC1_SCL); 3107 3108 switch (rt5670->pdata.dmic1_data_pin) { 3109 case RT5670_DMIC_DATA_IN2P: 3110 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3111 RT5670_DMIC_1_DP_MASK, 3112 RT5670_DMIC_1_DP_IN2P); 3113 break; 3114 3115 case RT5670_DMIC_DATA_GPIO6: 3116 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3117 RT5670_DMIC_1_DP_MASK, 3118 RT5670_DMIC_1_DP_GPIO6); 3119 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3120 RT5670_GP6_PIN_MASK, 3121 RT5670_GP6_PIN_DMIC1_SDA); 3122 break; 3123 3124 case RT5670_DMIC_DATA_GPIO7: 3125 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3126 RT5670_DMIC_1_DP_MASK, 3127 RT5670_DMIC_1_DP_GPIO7); 3128 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3129 RT5670_GP7_PIN_MASK, 3130 RT5670_GP7_PIN_DMIC1_SDA); 3131 break; 3132 3133 default: 3134 break; 3135 } 3136 3137 switch (rt5670->pdata.dmic2_data_pin) { 3138 case RT5670_DMIC_DATA_IN3N: 3139 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3140 RT5670_DMIC_2_DP_MASK, 3141 RT5670_DMIC_2_DP_IN3N); 3142 break; 3143 3144 case RT5670_DMIC_DATA_GPIO8: 3145 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3146 RT5670_DMIC_2_DP_MASK, 3147 RT5670_DMIC_2_DP_GPIO8); 3148 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3149 RT5670_GP8_PIN_MASK, 3150 RT5670_GP8_PIN_DMIC2_SDA); 3151 break; 3152 3153 default: 3154 break; 3155 } 3156 3157 switch (rt5670->pdata.dmic3_data_pin) { 3158 case RT5670_DMIC_DATA_GPIO5: 3159 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2, 3160 RT5670_DMIC_3_DP_MASK, 3161 RT5670_DMIC_3_DP_GPIO5); 3162 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3163 RT5670_GP5_PIN_MASK, 3164 RT5670_GP5_PIN_DMIC3_SDA); 3165 break; 3166 3167 case RT5670_DMIC_DATA_GPIO9: 3168 case RT5670_DMIC_DATA_GPIO10: 3169 dev_err(&i2c->dev, 3170 "Always use GPIO5 as DMIC3 data pin\n"); 3171 break; 3172 3173 default: 3174 break; 3175 } 3176 3177 } 3178 3179 pm_runtime_enable(&i2c->dev); 3180 pm_request_idle(&i2c->dev); 3181 3182 ret = devm_snd_soc_register_component(&i2c->dev, 3183 &soc_component_dev_rt5670, 3184 rt5670_dai, ARRAY_SIZE(rt5670_dai)); 3185 if (ret < 0) 3186 goto err; 3187 3188 pm_runtime_put(&i2c->dev); 3189 3190 return 0; 3191 err: 3192 pm_runtime_disable(&i2c->dev); 3193 3194 return ret; 3195 } 3196 3197 static int rt5670_i2c_remove(struct i2c_client *i2c) 3198 { 3199 pm_runtime_disable(&i2c->dev); 3200 3201 return 0; 3202 } 3203 3204 static struct i2c_driver rt5670_i2c_driver = { 3205 .driver = { 3206 .name = "rt5670", 3207 .acpi_match_table = ACPI_PTR(rt5670_acpi_match), 3208 }, 3209 .probe = rt5670_i2c_probe, 3210 .remove = rt5670_i2c_remove, 3211 .id_table = rt5670_i2c_id, 3212 }; 3213 3214 module_i2c_driver(rt5670_i2c_driver); 3215 3216 MODULE_DESCRIPTION("ASoC RT5670 driver"); 3217 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 3218 MODULE_LICENSE("GPL v2"); 3219