1 /* 2 * rt5670.c -- RT5670 ALSA SoC audio codec driver 3 * 4 * Copyright 2014 Realtek Semiconductor Corp. 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/pm.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/i2c.h> 19 #include <linux/platform_device.h> 20 #include <linux/acpi.h> 21 #include <linux/spi/spi.h> 22 #include <linux/dmi.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/jack.h> 27 #include <sound/soc.h> 28 #include <sound/soc-dapm.h> 29 #include <sound/initval.h> 30 #include <sound/tlv.h> 31 #include <sound/rt5670.h> 32 33 #include "rl6231.h" 34 #include "rt5670.h" 35 #include "rt5670-dsp.h" 36 37 #define RT5670_DEV_GPIO BIT(0) 38 #define RT5670_IN2_DIFF BIT(1) 39 #define RT5670_DMIC_EN BIT(2) 40 #define RT5670_DMIC1_IN2P BIT(3) 41 #define RT5670_DMIC1_GPIO6 BIT(4) 42 #define RT5670_DMIC1_GPIO7 BIT(5) 43 #define RT5670_DMIC2_INR BIT(6) 44 #define RT5670_DMIC2_GPIO8 BIT(7) 45 #define RT5670_DMIC3_GPIO5 BIT(8) 46 #define RT5670_JD_MODE1 BIT(9) 47 #define RT5670_JD_MODE2 BIT(10) 48 #define RT5670_JD_MODE3 BIT(11) 49 50 static unsigned long rt5670_quirk; 51 static unsigned int quirk_override; 52 module_param_named(quirk, quirk_override, uint, 0444); 53 MODULE_PARM_DESC(quirk, "Board-specific quirk override"); 54 55 #define RT5670_DEVICE_ID 0x6271 56 57 #define RT5670_PR_RANGE_BASE (0xff + 1) 58 #define RT5670_PR_SPACING 0x100 59 60 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING)) 61 62 static const struct regmap_range_cfg rt5670_ranges[] = { 63 { .name = "PR", .range_min = RT5670_PR_BASE, 64 .range_max = RT5670_PR_BASE + 0xf8, 65 .selector_reg = RT5670_PRIV_INDEX, 66 .selector_mask = 0xff, 67 .selector_shift = 0x0, 68 .window_start = RT5670_PRIV_DATA, 69 .window_len = 0x1, }, 70 }; 71 72 static const struct reg_sequence init_list[] = { 73 { RT5670_PR_BASE + 0x14, 0x9a8a }, 74 { RT5670_PR_BASE + 0x38, 0x1fe1 }, 75 { RT5670_PR_BASE + 0x3d, 0x3640 }, 76 { 0x8a, 0x0123 }, 77 }; 78 79 static const struct reg_default rt5670_reg[] = { 80 { 0x00, 0x0000 }, 81 { 0x02, 0x8888 }, 82 { 0x03, 0x8888 }, 83 { 0x0a, 0x0001 }, 84 { 0x0b, 0x0827 }, 85 { 0x0c, 0x0000 }, 86 { 0x0d, 0x0008 }, 87 { 0x0e, 0x0000 }, 88 { 0x0f, 0x0808 }, 89 { 0x19, 0xafaf }, 90 { 0x1a, 0xafaf }, 91 { 0x1b, 0x0011 }, 92 { 0x1c, 0x2f2f }, 93 { 0x1d, 0x2f2f }, 94 { 0x1e, 0x0000 }, 95 { 0x1f, 0x2f2f }, 96 { 0x20, 0x0000 }, 97 { 0x26, 0x7860 }, 98 { 0x27, 0x7860 }, 99 { 0x28, 0x7871 }, 100 { 0x29, 0x8080 }, 101 { 0x2a, 0x5656 }, 102 { 0x2b, 0x5454 }, 103 { 0x2c, 0xaaa0 }, 104 { 0x2d, 0x0000 }, 105 { 0x2e, 0x2f2f }, 106 { 0x2f, 0x1002 }, 107 { 0x30, 0x0000 }, 108 { 0x31, 0x5f00 }, 109 { 0x32, 0x0000 }, 110 { 0x33, 0x0000 }, 111 { 0x34, 0x0000 }, 112 { 0x35, 0x0000 }, 113 { 0x36, 0x0000 }, 114 { 0x37, 0x0000 }, 115 { 0x38, 0x0000 }, 116 { 0x3b, 0x0000 }, 117 { 0x3c, 0x007f }, 118 { 0x3d, 0x0000 }, 119 { 0x3e, 0x007f }, 120 { 0x45, 0xe00f }, 121 { 0x4c, 0x5380 }, 122 { 0x4f, 0x0073 }, 123 { 0x52, 0x00d3 }, 124 { 0x53, 0xf000 }, 125 { 0x61, 0x0000 }, 126 { 0x62, 0x0001 }, 127 { 0x63, 0x00c3 }, 128 { 0x64, 0x0000 }, 129 { 0x65, 0x0001 }, 130 { 0x66, 0x0000 }, 131 { 0x6f, 0x8000 }, 132 { 0x70, 0x8000 }, 133 { 0x71, 0x8000 }, 134 { 0x72, 0x8000 }, 135 { 0x73, 0x7770 }, 136 { 0x74, 0x0e00 }, 137 { 0x75, 0x1505 }, 138 { 0x76, 0x0015 }, 139 { 0x77, 0x0c00 }, 140 { 0x78, 0x4000 }, 141 { 0x79, 0x0123 }, 142 { 0x7f, 0x1100 }, 143 { 0x80, 0x0000 }, 144 { 0x81, 0x0000 }, 145 { 0x82, 0x0000 }, 146 { 0x83, 0x0000 }, 147 { 0x84, 0x0000 }, 148 { 0x85, 0x0000 }, 149 { 0x86, 0x0004 }, 150 { 0x87, 0x0000 }, 151 { 0x88, 0x0000 }, 152 { 0x89, 0x0000 }, 153 { 0x8a, 0x0123 }, 154 { 0x8b, 0x0000 }, 155 { 0x8c, 0x0003 }, 156 { 0x8d, 0x0000 }, 157 { 0x8e, 0x0004 }, 158 { 0x8f, 0x1100 }, 159 { 0x90, 0x0646 }, 160 { 0x91, 0x0c06 }, 161 { 0x93, 0x0000 }, 162 { 0x94, 0x1270 }, 163 { 0x95, 0x1000 }, 164 { 0x97, 0x0000 }, 165 { 0x98, 0x0000 }, 166 { 0x99, 0x0000 }, 167 { 0x9a, 0x2184 }, 168 { 0x9b, 0x010a }, 169 { 0x9c, 0x0aea }, 170 { 0x9d, 0x000c }, 171 { 0x9e, 0x0400 }, 172 { 0xae, 0x7000 }, 173 { 0xaf, 0x0000 }, 174 { 0xb0, 0x7000 }, 175 { 0xb1, 0x0000 }, 176 { 0xb2, 0x0000 }, 177 { 0xb3, 0x001f }, 178 { 0xb4, 0x220c }, 179 { 0xb5, 0x1f00 }, 180 { 0xb6, 0x0000 }, 181 { 0xb7, 0x0000 }, 182 { 0xbb, 0x0000 }, 183 { 0xbc, 0x0000 }, 184 { 0xbd, 0x0000 }, 185 { 0xbe, 0x0000 }, 186 { 0xbf, 0x0000 }, 187 { 0xc0, 0x0000 }, 188 { 0xc1, 0x0000 }, 189 { 0xc2, 0x0000 }, 190 { 0xcd, 0x0000 }, 191 { 0xce, 0x0000 }, 192 { 0xcf, 0x1813 }, 193 { 0xd0, 0x0690 }, 194 { 0xd1, 0x1c17 }, 195 { 0xd3, 0xa220 }, 196 { 0xd4, 0x0000 }, 197 { 0xd6, 0x0400 }, 198 { 0xd9, 0x0809 }, 199 { 0xda, 0x0000 }, 200 { 0xdb, 0x0001 }, 201 { 0xdc, 0x0049 }, 202 { 0xdd, 0x0024 }, 203 { 0xe6, 0x8000 }, 204 { 0xe7, 0x0000 }, 205 { 0xec, 0xa200 }, 206 { 0xed, 0x0000 }, 207 { 0xee, 0xa200 }, 208 { 0xef, 0x0000 }, 209 { 0xf8, 0x0000 }, 210 { 0xf9, 0x0000 }, 211 { 0xfa, 0x8010 }, 212 { 0xfb, 0x0033 }, 213 { 0xfc, 0x0100 }, 214 }; 215 216 static bool rt5670_volatile_register(struct device *dev, unsigned int reg) 217 { 218 int i; 219 220 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 221 if ((reg >= rt5670_ranges[i].window_start && 222 reg <= rt5670_ranges[i].window_start + 223 rt5670_ranges[i].window_len) || 224 (reg >= rt5670_ranges[i].range_min && 225 reg <= rt5670_ranges[i].range_max)) { 226 return true; 227 } 228 } 229 230 switch (reg) { 231 case RT5670_RESET: 232 case RT5670_PDM_DATA_CTRL1: 233 case RT5670_PDM1_DATA_CTRL4: 234 case RT5670_PDM2_DATA_CTRL4: 235 case RT5670_PRIV_DATA: 236 case RT5670_ASRC_5: 237 case RT5670_CJ_CTRL1: 238 case RT5670_CJ_CTRL2: 239 case RT5670_CJ_CTRL3: 240 case RT5670_A_JD_CTRL1: 241 case RT5670_A_JD_CTRL2: 242 case RT5670_VAD_CTRL5: 243 case RT5670_ADC_EQ_CTRL1: 244 case RT5670_EQ_CTRL1: 245 case RT5670_ALC_CTRL_1: 246 case RT5670_IRQ_CTRL2: 247 case RT5670_INT_IRQ_ST: 248 case RT5670_IL_CMD: 249 case RT5670_DSP_CTRL1: 250 case RT5670_DSP_CTRL2: 251 case RT5670_DSP_CTRL3: 252 case RT5670_DSP_CTRL4: 253 case RT5670_DSP_CTRL5: 254 case RT5670_VENDOR_ID: 255 case RT5670_VENDOR_ID1: 256 case RT5670_VENDOR_ID2: 257 return true; 258 default: 259 return false; 260 } 261 } 262 263 static bool rt5670_readable_register(struct device *dev, unsigned int reg) 264 { 265 int i; 266 267 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 268 if ((reg >= rt5670_ranges[i].window_start && 269 reg <= rt5670_ranges[i].window_start + 270 rt5670_ranges[i].window_len) || 271 (reg >= rt5670_ranges[i].range_min && 272 reg <= rt5670_ranges[i].range_max)) { 273 return true; 274 } 275 } 276 277 switch (reg) { 278 case RT5670_RESET: 279 case RT5670_HP_VOL: 280 case RT5670_LOUT1: 281 case RT5670_CJ_CTRL1: 282 case RT5670_CJ_CTRL2: 283 case RT5670_CJ_CTRL3: 284 case RT5670_IN2: 285 case RT5670_INL1_INR1_VOL: 286 case RT5670_DAC1_DIG_VOL: 287 case RT5670_DAC2_DIG_VOL: 288 case RT5670_DAC_CTRL: 289 case RT5670_STO1_ADC_DIG_VOL: 290 case RT5670_MONO_ADC_DIG_VOL: 291 case RT5670_STO2_ADC_DIG_VOL: 292 case RT5670_ADC_BST_VOL1: 293 case RT5670_ADC_BST_VOL2: 294 case RT5670_STO2_ADC_MIXER: 295 case RT5670_STO1_ADC_MIXER: 296 case RT5670_MONO_ADC_MIXER: 297 case RT5670_AD_DA_MIXER: 298 case RT5670_STO_DAC_MIXER: 299 case RT5670_DD_MIXER: 300 case RT5670_DIG_MIXER: 301 case RT5670_DSP_PATH1: 302 case RT5670_DSP_PATH2: 303 case RT5670_DIG_INF1_DATA: 304 case RT5670_DIG_INF2_DATA: 305 case RT5670_PDM_OUT_CTRL: 306 case RT5670_PDM_DATA_CTRL1: 307 case RT5670_PDM1_DATA_CTRL2: 308 case RT5670_PDM1_DATA_CTRL3: 309 case RT5670_PDM1_DATA_CTRL4: 310 case RT5670_PDM2_DATA_CTRL2: 311 case RT5670_PDM2_DATA_CTRL3: 312 case RT5670_PDM2_DATA_CTRL4: 313 case RT5670_REC_L1_MIXER: 314 case RT5670_REC_L2_MIXER: 315 case RT5670_REC_R1_MIXER: 316 case RT5670_REC_R2_MIXER: 317 case RT5670_HPO_MIXER: 318 case RT5670_MONO_MIXER: 319 case RT5670_OUT_L1_MIXER: 320 case RT5670_OUT_R1_MIXER: 321 case RT5670_LOUT_MIXER: 322 case RT5670_PWR_DIG1: 323 case RT5670_PWR_DIG2: 324 case RT5670_PWR_ANLG1: 325 case RT5670_PWR_ANLG2: 326 case RT5670_PWR_MIXER: 327 case RT5670_PWR_VOL: 328 case RT5670_PRIV_INDEX: 329 case RT5670_PRIV_DATA: 330 case RT5670_I2S4_SDP: 331 case RT5670_I2S1_SDP: 332 case RT5670_I2S2_SDP: 333 case RT5670_I2S3_SDP: 334 case RT5670_ADDA_CLK1: 335 case RT5670_ADDA_CLK2: 336 case RT5670_DMIC_CTRL1: 337 case RT5670_DMIC_CTRL2: 338 case RT5670_TDM_CTRL_1: 339 case RT5670_TDM_CTRL_2: 340 case RT5670_TDM_CTRL_3: 341 case RT5670_DSP_CLK: 342 case RT5670_GLB_CLK: 343 case RT5670_PLL_CTRL1: 344 case RT5670_PLL_CTRL2: 345 case RT5670_ASRC_1: 346 case RT5670_ASRC_2: 347 case RT5670_ASRC_3: 348 case RT5670_ASRC_4: 349 case RT5670_ASRC_5: 350 case RT5670_ASRC_7: 351 case RT5670_ASRC_8: 352 case RT5670_ASRC_9: 353 case RT5670_ASRC_10: 354 case RT5670_ASRC_11: 355 case RT5670_ASRC_12: 356 case RT5670_ASRC_13: 357 case RT5670_ASRC_14: 358 case RT5670_DEPOP_M1: 359 case RT5670_DEPOP_M2: 360 case RT5670_DEPOP_M3: 361 case RT5670_CHARGE_PUMP: 362 case RT5670_MICBIAS: 363 case RT5670_A_JD_CTRL1: 364 case RT5670_A_JD_CTRL2: 365 case RT5670_VAD_CTRL1: 366 case RT5670_VAD_CTRL2: 367 case RT5670_VAD_CTRL3: 368 case RT5670_VAD_CTRL4: 369 case RT5670_VAD_CTRL5: 370 case RT5670_ADC_EQ_CTRL1: 371 case RT5670_ADC_EQ_CTRL2: 372 case RT5670_EQ_CTRL1: 373 case RT5670_EQ_CTRL2: 374 case RT5670_ALC_DRC_CTRL1: 375 case RT5670_ALC_DRC_CTRL2: 376 case RT5670_ALC_CTRL_1: 377 case RT5670_ALC_CTRL_2: 378 case RT5670_ALC_CTRL_3: 379 case RT5670_JD_CTRL: 380 case RT5670_IRQ_CTRL1: 381 case RT5670_IRQ_CTRL2: 382 case RT5670_INT_IRQ_ST: 383 case RT5670_GPIO_CTRL1: 384 case RT5670_GPIO_CTRL2: 385 case RT5670_GPIO_CTRL3: 386 case RT5670_SCRABBLE_FUN: 387 case RT5670_SCRABBLE_CTRL: 388 case RT5670_BASE_BACK: 389 case RT5670_MP3_PLUS1: 390 case RT5670_MP3_PLUS2: 391 case RT5670_ADJ_HPF1: 392 case RT5670_ADJ_HPF2: 393 case RT5670_HP_CALIB_AMP_DET: 394 case RT5670_SV_ZCD1: 395 case RT5670_SV_ZCD2: 396 case RT5670_IL_CMD: 397 case RT5670_IL_CMD2: 398 case RT5670_IL_CMD3: 399 case RT5670_DRC_HL_CTRL1: 400 case RT5670_DRC_HL_CTRL2: 401 case RT5670_ADC_MONO_HP_CTRL1: 402 case RT5670_ADC_MONO_HP_CTRL2: 403 case RT5670_ADC_STO2_HP_CTRL1: 404 case RT5670_ADC_STO2_HP_CTRL2: 405 case RT5670_JD_CTRL3: 406 case RT5670_JD_CTRL4: 407 case RT5670_DIG_MISC: 408 case RT5670_DSP_CTRL1: 409 case RT5670_DSP_CTRL2: 410 case RT5670_DSP_CTRL3: 411 case RT5670_DSP_CTRL4: 412 case RT5670_DSP_CTRL5: 413 case RT5670_GEN_CTRL2: 414 case RT5670_GEN_CTRL3: 415 case RT5670_VENDOR_ID: 416 case RT5670_VENDOR_ID1: 417 case RT5670_VENDOR_ID2: 418 return true; 419 default: 420 return false; 421 } 422 } 423 424 /** 425 * rt5670_headset_detect - Detect headset. 426 * @component: SoC audio component device. 427 * @jack_insert: Jack insert or not. 428 * 429 * Detect whether is headset or not when jack inserted. 430 * 431 * Returns detect status. 432 */ 433 434 static int rt5670_headset_detect(struct snd_soc_component *component, int jack_insert) 435 { 436 int val; 437 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 438 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 439 440 if (jack_insert) { 441 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); 442 snd_soc_dapm_sync(dapm); 443 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x0); 444 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 445 RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD, 446 RT5670_CBJ_MN_JD); 447 snd_soc_component_write(component, RT5670_GPIO_CTRL2, 0x0004); 448 snd_soc_component_update_bits(component, RT5670_GPIO_CTRL1, 449 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 450 snd_soc_component_update_bits(component, RT5670_CJ_CTRL1, 451 RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN); 452 snd_soc_component_write(component, RT5670_JD_CTRL3, 0x00f0); 453 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 454 RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD); 455 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2, 456 RT5670_CBJ_MN_JD, 0); 457 msleep(300); 458 val = snd_soc_component_read32(component, RT5670_CJ_CTRL3) & 0x7; 459 if (val == 0x1 || val == 0x2) { 460 rt5670->jack_type = SND_JACK_HEADSET; 461 /* for push button */ 462 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x8); 463 snd_soc_component_update_bits(component, RT5670_IL_CMD, 0x40, 0x40); 464 snd_soc_component_read32(component, RT5670_IL_CMD); 465 } else { 466 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4); 467 rt5670->jack_type = SND_JACK_HEADPHONE; 468 snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); 469 snd_soc_dapm_sync(dapm); 470 } 471 } else { 472 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x0); 473 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4); 474 rt5670->jack_type = 0; 475 snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); 476 snd_soc_dapm_sync(dapm); 477 } 478 479 return rt5670->jack_type; 480 } 481 482 void rt5670_jack_suspend(struct snd_soc_component *component) 483 { 484 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 485 486 rt5670->jack_type_saved = rt5670->jack_type; 487 rt5670_headset_detect(component, 0); 488 } 489 EXPORT_SYMBOL_GPL(rt5670_jack_suspend); 490 491 void rt5670_jack_resume(struct snd_soc_component *component) 492 { 493 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 494 495 if (rt5670->jack_type_saved) 496 rt5670_headset_detect(component, 1); 497 } 498 EXPORT_SYMBOL_GPL(rt5670_jack_resume); 499 500 static int rt5670_button_detect(struct snd_soc_component *component) 501 { 502 int btn_type, val; 503 504 val = snd_soc_component_read32(component, RT5670_IL_CMD); 505 btn_type = val & 0xff80; 506 snd_soc_component_write(component, RT5670_IL_CMD, val); 507 if (btn_type != 0) { 508 msleep(20); 509 val = snd_soc_component_read32(component, RT5670_IL_CMD); 510 snd_soc_component_write(component, RT5670_IL_CMD, val); 511 } 512 513 return btn_type; 514 } 515 516 static int rt5670_irq_detection(void *data) 517 { 518 struct rt5670_priv *rt5670 = (struct rt5670_priv *)data; 519 struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio; 520 struct snd_soc_jack *jack = rt5670->jack; 521 int val, btn_type, report = jack->status; 522 523 if (rt5670->pdata.jd_mode == 1) /* 2 port */ 524 val = snd_soc_component_read32(rt5670->component, RT5670_A_JD_CTRL1) & 0x0070; 525 else 526 val = snd_soc_component_read32(rt5670->component, RT5670_A_JD_CTRL1) & 0x0020; 527 528 switch (val) { 529 /* jack in */ 530 case 0x30: /* 2 port */ 531 case 0x0: /* 1 port or 2 port */ 532 if (rt5670->jack_type == 0) { 533 report = rt5670_headset_detect(rt5670->component, 1); 534 /* for push button and jack out */ 535 gpio->debounce_time = 25; 536 break; 537 } 538 btn_type = 0; 539 if (snd_soc_component_read32(rt5670->component, RT5670_INT_IRQ_ST) & 0x4) { 540 /* button pressed */ 541 report = SND_JACK_HEADSET; 542 btn_type = rt5670_button_detect(rt5670->component); 543 switch (btn_type) { 544 case 0x2000: /* up */ 545 report |= SND_JACK_BTN_1; 546 break; 547 case 0x0400: /* center */ 548 report |= SND_JACK_BTN_0; 549 break; 550 case 0x0080: /* down */ 551 report |= SND_JACK_BTN_2; 552 break; 553 default: 554 dev_err(rt5670->component->dev, 555 "Unexpected button code 0x%04x\n", 556 btn_type); 557 break; 558 } 559 } 560 if (btn_type == 0)/* button release */ 561 report = rt5670->jack_type; 562 563 break; 564 /* jack out */ 565 case 0x70: /* 2 port */ 566 case 0x10: /* 2 port */ 567 case 0x20: /* 1 port */ 568 report = 0; 569 snd_soc_component_update_bits(rt5670->component, RT5670_INT_IRQ_ST, 0x1, 0x0); 570 rt5670_headset_detect(rt5670->component, 0); 571 gpio->debounce_time = 150; /* for jack in */ 572 break; 573 default: 574 break; 575 } 576 577 return report; 578 } 579 580 int rt5670_set_jack_detect(struct snd_soc_component *component, 581 struct snd_soc_jack *jack) 582 { 583 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 584 int ret; 585 586 rt5670->jack = jack; 587 rt5670->hp_gpio.gpiod_dev = component->dev; 588 rt5670->hp_gpio.name = "headset"; 589 rt5670->hp_gpio.report = SND_JACK_HEADSET | 590 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2; 591 rt5670->hp_gpio.debounce_time = 150; 592 rt5670->hp_gpio.wake = true; 593 rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670; 594 rt5670->hp_gpio.jack_status_check = rt5670_irq_detection; 595 596 ret = snd_soc_jack_add_gpios(rt5670->jack, 1, 597 &rt5670->hp_gpio); 598 if (ret) { 599 dev_err(component->dev, "Adding jack GPIO failed\n"); 600 return ret; 601 } 602 603 return 0; 604 } 605 EXPORT_SYMBOL_GPL(rt5670_set_jack_detect); 606 607 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 608 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); 609 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 610 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); 611 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 612 613 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 614 static const DECLARE_TLV_DB_RANGE(bst_tlv, 615 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 616 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 617 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 618 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 619 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 620 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 621 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) 622 ); 623 624 /* Interface data select */ 625 static const char * const rt5670_data_select[] = { 626 "Normal", "Swap", "left copy to right", "right copy to left" 627 }; 628 629 static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA, 630 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select); 631 632 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA, 633 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select); 634 635 static const struct snd_kcontrol_new rt5670_snd_controls[] = { 636 /* Headphone Output Volume */ 637 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL, 638 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 639 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL, 640 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 641 39, 1, out_vol_tlv), 642 /* OUTPUT Control */ 643 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1, 644 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1), 645 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1, 646 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv), 647 /* DAC Digital Volume */ 648 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL, 649 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1), 650 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL, 651 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 652 175, 0, dac_vol_tlv), 653 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL, 654 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 655 175, 0, dac_vol_tlv), 656 /* IN1/IN2 Control */ 657 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1, 658 RT5670_BST_SFT1, 8, 0, bst_tlv), 659 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2, 660 RT5670_BST_SFT1, 8, 0, bst_tlv), 661 /* INL/INR Volume Control */ 662 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL, 663 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT, 664 31, 1, in_vol_tlv), 665 /* ADC Digital Volume Control */ 666 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL, 667 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 668 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL, 669 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 670 127, 0, adc_vol_tlv), 671 672 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL, 673 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 674 127, 0, adc_vol_tlv), 675 676 /* ADC Boost Volume Control */ 677 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 678 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT, 679 3, 0, adc_bst_tlv), 680 681 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 682 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT, 683 3, 0, adc_bst_tlv), 684 685 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum), 686 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum), 687 }; 688 689 /** 690 * set_dmic_clk - Set parameter of dmic. 691 * 692 * @w: DAPM widget. 693 * @kcontrol: The kcontrol of this widget. 694 * @event: Event id. 695 * 696 * Choose dmic clock between 1MHz and 3MHz. 697 * It is better for clock to approximate 3MHz. 698 */ 699 static int set_dmic_clk(struct snd_soc_dapm_widget *w, 700 struct snd_kcontrol *kcontrol, int event) 701 { 702 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 703 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 704 int idx, rate; 705 706 rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap, 707 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT); 708 idx = rl6231_calc_dmic_clk(rate); 709 if (idx < 0) 710 dev_err(component->dev, "Failed to set DMIC clock\n"); 711 else 712 snd_soc_component_update_bits(component, RT5670_DMIC_CTRL1, 713 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT); 714 return idx; 715 } 716 717 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, 718 struct snd_soc_dapm_widget *sink) 719 { 720 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 721 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 722 723 if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1) 724 return 1; 725 else 726 return 0; 727 } 728 729 static int is_using_asrc(struct snd_soc_dapm_widget *source, 730 struct snd_soc_dapm_widget *sink) 731 { 732 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 733 unsigned int reg, shift, val; 734 735 switch (source->shift) { 736 case 0: 737 reg = RT5670_ASRC_3; 738 shift = 0; 739 break; 740 case 1: 741 reg = RT5670_ASRC_3; 742 shift = 4; 743 break; 744 case 2: 745 reg = RT5670_ASRC_5; 746 shift = 12; 747 break; 748 case 3: 749 reg = RT5670_ASRC_2; 750 shift = 0; 751 break; 752 case 8: 753 reg = RT5670_ASRC_2; 754 shift = 4; 755 break; 756 case 9: 757 reg = RT5670_ASRC_2; 758 shift = 8; 759 break; 760 case 10: 761 reg = RT5670_ASRC_2; 762 shift = 12; 763 break; 764 default: 765 return 0; 766 } 767 768 val = (snd_soc_component_read32(component, reg) >> shift) & 0xf; 769 switch (val) { 770 case 1: 771 case 2: 772 case 3: 773 case 4: 774 return 1; 775 default: 776 return 0; 777 } 778 779 } 780 781 static int can_use_asrc(struct snd_soc_dapm_widget *source, 782 struct snd_soc_dapm_widget *sink) 783 { 784 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); 785 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 786 787 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384) 788 return 1; 789 790 return 0; 791 } 792 793 794 /** 795 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters 796 * @component: SoC audio component device. 797 * @filter_mask: mask of filters. 798 * @clk_src: clock source 799 * 800 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can 801 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to 802 * support special i2s clock format such as Intel's 100fs(100 * sampling rate). 803 * ASRC function will track i2s clock and generate a corresponding system clock 804 * for codec. This function provides an API to select the clock source for a 805 * set of filters specified by the mask. And the codec driver will turn on ASRC 806 * for these filters if ASRC is selected as their clock source. 807 */ 808 int rt5670_sel_asrc_clk_src(struct snd_soc_component *component, 809 unsigned int filter_mask, unsigned int clk_src) 810 { 811 unsigned int asrc2_mask = 0, asrc2_value = 0; 812 unsigned int asrc3_mask = 0, asrc3_value = 0; 813 814 if (clk_src > RT5670_CLK_SEL_SYS3) 815 return -EINVAL; 816 817 if (filter_mask & RT5670_DA_STEREO_FILTER) { 818 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK; 819 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK) 820 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT); 821 } 822 823 if (filter_mask & RT5670_DA_MONO_L_FILTER) { 824 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK; 825 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK) 826 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT); 827 } 828 829 if (filter_mask & RT5670_DA_MONO_R_FILTER) { 830 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK; 831 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK) 832 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT); 833 } 834 835 if (filter_mask & RT5670_AD_STEREO_FILTER) { 836 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK; 837 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK) 838 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT); 839 } 840 841 if (filter_mask & RT5670_AD_MONO_L_FILTER) { 842 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK; 843 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK) 844 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT); 845 } 846 847 if (filter_mask & RT5670_AD_MONO_R_FILTER) { 848 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK; 849 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK) 850 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT); 851 } 852 853 if (filter_mask & RT5670_UP_RATE_FILTER) { 854 asrc3_mask |= RT5670_UP_CLK_SEL_MASK; 855 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK) 856 | (clk_src << RT5670_UP_CLK_SEL_SFT); 857 } 858 859 if (filter_mask & RT5670_DOWN_RATE_FILTER) { 860 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK; 861 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK) 862 | (clk_src << RT5670_DOWN_CLK_SEL_SFT); 863 } 864 865 if (asrc2_mask) 866 snd_soc_component_update_bits(component, RT5670_ASRC_2, 867 asrc2_mask, asrc2_value); 868 869 if (asrc3_mask) 870 snd_soc_component_update_bits(component, RT5670_ASRC_3, 871 asrc3_mask, asrc3_value); 872 return 0; 873 } 874 EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src); 875 876 /* Digital Mixer */ 877 static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = { 878 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 879 RT5670_M_ADC_L1_SFT, 1, 1), 880 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 881 RT5670_M_ADC_L2_SFT, 1, 1), 882 }; 883 884 static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = { 885 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 886 RT5670_M_ADC_R1_SFT, 1, 1), 887 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 888 RT5670_M_ADC_R2_SFT, 1, 1), 889 }; 890 891 static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = { 892 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 893 RT5670_M_ADC_L1_SFT, 1, 1), 894 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 895 RT5670_M_ADC_L2_SFT, 1, 1), 896 }; 897 898 static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = { 899 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 900 RT5670_M_ADC_R1_SFT, 1, 1), 901 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 902 RT5670_M_ADC_R2_SFT, 1, 1), 903 }; 904 905 static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = { 906 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 907 RT5670_M_MONO_ADC_L1_SFT, 1, 1), 908 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 909 RT5670_M_MONO_ADC_L2_SFT, 1, 1), 910 }; 911 912 static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = { 913 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 914 RT5670_M_MONO_ADC_R1_SFT, 1, 1), 915 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 916 RT5670_M_MONO_ADC_R2_SFT, 1, 1), 917 }; 918 919 static const struct snd_kcontrol_new rt5670_dac_l_mix[] = { 920 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 921 RT5670_M_ADCMIX_L_SFT, 1, 1), 922 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, 923 RT5670_M_DAC1_L_SFT, 1, 1), 924 }; 925 926 static const struct snd_kcontrol_new rt5670_dac_r_mix[] = { 927 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 928 RT5670_M_ADCMIX_R_SFT, 1, 1), 929 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, 930 RT5670_M_DAC1_R_SFT, 1, 1), 931 }; 932 933 static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = { 934 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 935 RT5670_M_DAC_L1_SFT, 1, 1), 936 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER, 937 RT5670_M_DAC_L2_SFT, 1, 1), 938 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 939 RT5670_M_DAC_R1_STO_L_SFT, 1, 1), 940 }; 941 942 static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = { 943 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 944 RT5670_M_DAC_R1_SFT, 1, 1), 945 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER, 946 RT5670_M_DAC_R2_SFT, 1, 1), 947 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 948 RT5670_M_DAC_L1_STO_R_SFT, 1, 1), 949 }; 950 951 static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = { 952 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER, 953 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1), 954 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 955 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1), 956 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 957 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1), 958 }; 959 960 static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = { 961 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER, 962 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1), 963 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 964 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1), 965 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 966 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1), 967 }; 968 969 static const struct snd_kcontrol_new rt5670_dig_l_mix[] = { 970 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER, 971 RT5670_M_STO_L_DAC_L_SFT, 1, 1), 972 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 973 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1), 974 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 975 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1), 976 }; 977 978 static const struct snd_kcontrol_new rt5670_dig_r_mix[] = { 979 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER, 980 RT5670_M_STO_R_DAC_R_SFT, 1, 1), 981 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 982 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1), 983 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 984 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1), 985 }; 986 987 /* Analog Input Mixer */ 988 static const struct snd_kcontrol_new rt5670_rec_l_mix[] = { 989 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER, 990 RT5670_M_IN_L_RM_L_SFT, 1, 1), 991 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER, 992 RT5670_M_BST2_RM_L_SFT, 1, 1), 993 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER, 994 RT5670_M_BST1_RM_L_SFT, 1, 1), 995 }; 996 997 static const struct snd_kcontrol_new rt5670_rec_r_mix[] = { 998 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER, 999 RT5670_M_IN_R_RM_R_SFT, 1, 1), 1000 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER, 1001 RT5670_M_BST2_RM_R_SFT, 1, 1), 1002 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER, 1003 RT5670_M_BST1_RM_R_SFT, 1, 1), 1004 }; 1005 1006 static const struct snd_kcontrol_new rt5670_out_l_mix[] = { 1007 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER, 1008 RT5670_M_BST1_OM_L_SFT, 1, 1), 1009 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER, 1010 RT5670_M_IN_L_OM_L_SFT, 1, 1), 1011 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER, 1012 RT5670_M_DAC_L2_OM_L_SFT, 1, 1), 1013 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER, 1014 RT5670_M_DAC_L1_OM_L_SFT, 1, 1), 1015 }; 1016 1017 static const struct snd_kcontrol_new rt5670_out_r_mix[] = { 1018 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER, 1019 RT5670_M_BST2_OM_R_SFT, 1, 1), 1020 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER, 1021 RT5670_M_IN_R_OM_R_SFT, 1, 1), 1022 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER, 1023 RT5670_M_DAC_R2_OM_R_SFT, 1, 1), 1024 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER, 1025 RT5670_M_DAC_R1_OM_R_SFT, 1, 1), 1026 }; 1027 1028 static const struct snd_kcontrol_new rt5670_hpo_mix[] = { 1029 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1030 RT5670_M_DAC1_HM_SFT, 1, 1), 1031 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER, 1032 RT5670_M_HPVOL_HM_SFT, 1, 1), 1033 }; 1034 1035 static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = { 1036 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1037 RT5670_M_DACL1_HML_SFT, 1, 1), 1038 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER, 1039 RT5670_M_INL1_HML_SFT, 1, 1), 1040 }; 1041 1042 static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = { 1043 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 1044 RT5670_M_DACR1_HMR_SFT, 1, 1), 1045 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER, 1046 RT5670_M_INR1_HMR_SFT, 1, 1), 1047 }; 1048 1049 static const struct snd_kcontrol_new rt5670_lout_mix[] = { 1050 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER, 1051 RT5670_M_DAC_L1_LM_SFT, 1, 1), 1052 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER, 1053 RT5670_M_DAC_R1_LM_SFT, 1, 1), 1054 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER, 1055 RT5670_M_OV_L_LM_SFT, 1, 1), 1056 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER, 1057 RT5670_M_OV_R_LM_SFT, 1, 1), 1058 }; 1059 1060 static const struct snd_kcontrol_new lout_l_enable_control = 1061 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 1062 RT5670_L_MUTE_SFT, 1, 1); 1063 1064 static const struct snd_kcontrol_new lout_r_enable_control = 1065 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 1066 RT5670_R_MUTE_SFT, 1, 1); 1067 1068 /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */ 1069 static const char * const rt5670_dac1_src[] = { 1070 "IF1 DAC", "IF2 DAC" 1071 }; 1072 1073 static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER, 1074 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src); 1075 1076 static const struct snd_kcontrol_new rt5670_dac1l_mux = 1077 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum); 1078 1079 static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER, 1080 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src); 1081 1082 static const struct snd_kcontrol_new rt5670_dac1r_mux = 1083 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum); 1084 1085 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ 1086 /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */ 1087 static const char * const rt5670_dac12_src[] = { 1088 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", 1089 "Bass", "VAD_ADC", "IF4 DAC" 1090 }; 1091 1092 static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL, 1093 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src); 1094 1095 static const struct snd_kcontrol_new rt5670_dac_l2_mux = 1096 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum); 1097 1098 static const char * const rt5670_dacr2_src[] = { 1099 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC" 1100 }; 1101 1102 static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL, 1103 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src); 1104 1105 static const struct snd_kcontrol_new rt5670_dac_r2_mux = 1106 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum); 1107 1108 /*RxDP source*/ /* MX-2D [15:13] */ 1109 static const char * const rt5670_rxdp_src[] = { 1110 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer", 1111 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1" 1112 }; 1113 1114 static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1, 1115 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src); 1116 1117 static const struct snd_kcontrol_new rt5670_rxdp_mux = 1118 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum); 1119 1120 /* MX-2D [1] [0] */ 1121 static const char * const rt5670_dsp_bypass_src[] = { 1122 "DSP", "Bypass" 1123 }; 1124 1125 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1, 1126 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src); 1127 1128 static const struct snd_kcontrol_new rt5670_dsp_ul_mux = 1129 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum); 1130 1131 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1, 1132 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src); 1133 1134 static const struct snd_kcontrol_new rt5670_dsp_dl_mux = 1135 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum); 1136 1137 /* Stereo2 ADC source */ 1138 /* MX-26 [15] */ 1139 static const char * const rt5670_stereo2_adc_lr_src[] = { 1140 "L", "LR" 1141 }; 1142 1143 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER, 1144 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src); 1145 1146 static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux = 1147 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum); 1148 1149 /* Stereo1 ADC source */ 1150 /* MX-27 MX-26 [12] */ 1151 static const char * const rt5670_stereo_adc1_src[] = { 1152 "DAC MIX", "ADC" 1153 }; 1154 1155 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER, 1156 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 1157 1158 static const struct snd_kcontrol_new rt5670_sto_adc_1_mux = 1159 SOC_DAPM_ENUM("Stereo1 ADC 1 Mux", rt5670_stereo1_adc1_enum); 1160 1161 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER, 1162 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 1163 1164 static const struct snd_kcontrol_new rt5670_sto2_adc_1_mux = 1165 SOC_DAPM_ENUM("Stereo2 ADC 1 Mux", rt5670_stereo2_adc1_enum); 1166 1167 1168 /* MX-27 MX-26 [11] */ 1169 static const char * const rt5670_stereo_adc2_src[] = { 1170 "DAC MIX", "DMIC" 1171 }; 1172 1173 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER, 1174 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1175 1176 static const struct snd_kcontrol_new rt5670_sto_adc_2_mux = 1177 SOC_DAPM_ENUM("Stereo1 ADC 2 Mux", rt5670_stereo1_adc2_enum); 1178 1179 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER, 1180 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1181 1182 static const struct snd_kcontrol_new rt5670_sto2_adc_2_mux = 1183 SOC_DAPM_ENUM("Stereo2 ADC 2 Mux", rt5670_stereo2_adc2_enum); 1184 1185 /* MX-27 MX-26 [9:8] */ 1186 static const char * const rt5670_stereo_dmic_src[] = { 1187 "DMIC1", "DMIC2", "DMIC3" 1188 }; 1189 1190 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER, 1191 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1192 1193 static const struct snd_kcontrol_new rt5670_sto1_dmic_mux = 1194 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum); 1195 1196 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER, 1197 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1198 1199 static const struct snd_kcontrol_new rt5670_sto2_dmic_mux = 1200 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum); 1201 1202 /* Mono ADC source */ 1203 /* MX-28 [12] */ 1204 static const char * const rt5670_mono_adc_l1_src[] = { 1205 "Mono DAC MIXL", "ADC1" 1206 }; 1207 1208 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER, 1209 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src); 1210 1211 static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux = 1212 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum); 1213 /* MX-28 [11] */ 1214 static const char * const rt5670_mono_adc_l2_src[] = { 1215 "Mono DAC MIXL", "DMIC" 1216 }; 1217 1218 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER, 1219 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src); 1220 1221 static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux = 1222 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum); 1223 1224 /* MX-28 [9:8] */ 1225 static const char * const rt5670_mono_dmic_src[] = { 1226 "DMIC1", "DMIC2", "DMIC3" 1227 }; 1228 1229 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER, 1230 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src); 1231 1232 static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux = 1233 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum); 1234 /* MX-28 [1:0] */ 1235 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER, 1236 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src); 1237 1238 static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux = 1239 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum); 1240 /* MX-28 [4] */ 1241 static const char * const rt5670_mono_adc_r1_src[] = { 1242 "Mono DAC MIXR", "ADC2" 1243 }; 1244 1245 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER, 1246 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src); 1247 1248 static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux = 1249 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum); 1250 /* MX-28 [3] */ 1251 static const char * const rt5670_mono_adc_r2_src[] = { 1252 "Mono DAC MIXR", "DMIC" 1253 }; 1254 1255 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER, 1256 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src); 1257 1258 static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux = 1259 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum); 1260 1261 /* MX-2D [3:2] */ 1262 static const char * const rt5670_txdp_slot_src[] = { 1263 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7" 1264 }; 1265 1266 static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1, 1267 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src); 1268 1269 static const struct snd_kcontrol_new rt5670_txdp_slot_mux = 1270 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum); 1271 1272 /* MX-2F [15] */ 1273 static const char * const rt5670_if1_adc2_in_src[] = { 1274 "IF_ADC2", "VAD_ADC" 1275 }; 1276 1277 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA, 1278 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src); 1279 1280 static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux = 1281 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum); 1282 1283 /* MX-2F [14:12] */ 1284 static const char * const rt5670_if2_adc_in_src[] = { 1285 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC" 1286 }; 1287 1288 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA, 1289 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src); 1290 1291 static const struct snd_kcontrol_new rt5670_if2_adc_in_mux = 1292 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum); 1293 1294 /* MX-31 [15] [13] [11] [9] */ 1295 static const char * const rt5670_pdm_src[] = { 1296 "Mono DAC", "Stereo DAC" 1297 }; 1298 1299 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL, 1300 RT5670_PDM1_L_SFT, rt5670_pdm_src); 1301 1302 static const struct snd_kcontrol_new rt5670_pdm1_l_mux = 1303 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum); 1304 1305 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL, 1306 RT5670_PDM1_R_SFT, rt5670_pdm_src); 1307 1308 static const struct snd_kcontrol_new rt5670_pdm1_r_mux = 1309 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum); 1310 1311 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL, 1312 RT5670_PDM2_L_SFT, rt5670_pdm_src); 1313 1314 static const struct snd_kcontrol_new rt5670_pdm2_l_mux = 1315 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum); 1316 1317 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL, 1318 RT5670_PDM2_R_SFT, rt5670_pdm_src); 1319 1320 static const struct snd_kcontrol_new rt5670_pdm2_r_mux = 1321 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum); 1322 1323 /* MX-FA [12] */ 1324 static const char * const rt5670_if1_adc1_in1_src[] = { 1325 "IF_ADC1", "IF1_ADC3" 1326 }; 1327 1328 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC, 1329 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src); 1330 1331 static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux = 1332 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum); 1333 1334 /* MX-FA [11] */ 1335 static const char * const rt5670_if1_adc1_in2_src[] = { 1336 "IF1_ADC1_IN1", "IF1_ADC4" 1337 }; 1338 1339 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC, 1340 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src); 1341 1342 static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux = 1343 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum); 1344 1345 /* MX-FA [10] */ 1346 static const char * const rt5670_if1_adc2_in1_src[] = { 1347 "IF1_ADC2_IN", "IF1_ADC4" 1348 }; 1349 1350 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC, 1351 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src); 1352 1353 static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux = 1354 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum); 1355 1356 /* MX-9D [9:8] */ 1357 static const char * const rt5670_vad_adc_src[] = { 1358 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L" 1359 }; 1360 1361 static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4, 1362 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src); 1363 1364 static const struct snd_kcontrol_new rt5670_vad_adc_mux = 1365 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum); 1366 1367 static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w, 1368 struct snd_kcontrol *kcontrol, int event) 1369 { 1370 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1371 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 1372 1373 switch (event) { 1374 case SND_SOC_DAPM_POST_PMU: 1375 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP, 1376 RT5670_PM_HP_MASK, RT5670_PM_HP_HV); 1377 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1378 0x0400, 0x0400); 1379 /* headphone amp power on */ 1380 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 1381 RT5670_PWR_HA | RT5670_PWR_FV1 | 1382 RT5670_PWR_FV2, RT5670_PWR_HA | 1383 RT5670_PWR_FV1 | RT5670_PWR_FV2); 1384 /* depop parameters */ 1385 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100); 1386 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009); 1387 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1388 RT5670_HP_DCC_INT1, 0x9f00); 1389 mdelay(20); 1390 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1391 break; 1392 case SND_SOC_DAPM_PRE_PMD: 1393 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004); 1394 msleep(30); 1395 break; 1396 default: 1397 return 0; 1398 } 1399 1400 return 0; 1401 } 1402 1403 static int rt5670_hp_event(struct snd_soc_dapm_widget *w, 1404 struct snd_kcontrol *kcontrol, int event) 1405 { 1406 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1407 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 1408 1409 switch (event) { 1410 case SND_SOC_DAPM_POST_PMU: 1411 /* headphone unmute sequence */ 1412 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1413 RT5670_MAMP_INT_REG2, 0xb400); 1414 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1415 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d); 1416 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1417 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1418 0x0300, 0x0300); 1419 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1420 RT5670_L_MUTE | RT5670_R_MUTE, 0); 1421 msleep(80); 1422 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1423 break; 1424 1425 case SND_SOC_DAPM_PRE_PMD: 1426 /* headphone mute sequence */ 1427 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1428 RT5670_MAMP_INT_REG2, 0xb400); 1429 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1430 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d); 1431 mdelay(10); 1432 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1433 mdelay(10); 1434 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1435 RT5670_L_MUTE | RT5670_R_MUTE, 1436 RT5670_L_MUTE | RT5670_R_MUTE); 1437 msleep(20); 1438 regmap_update_bits(rt5670->regmap, 1439 RT5670_GEN_CTRL2, 0x0300, 0x0); 1440 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1441 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707); 1442 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1443 RT5670_MAMP_INT_REG2, 0xfc00); 1444 break; 1445 1446 default: 1447 return 0; 1448 } 1449 1450 return 0; 1451 } 1452 1453 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w, 1454 struct snd_kcontrol *kcontrol, int event) 1455 { 1456 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1457 1458 switch (event) { 1459 case SND_SOC_DAPM_POST_PMU: 1460 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1461 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P); 1462 break; 1463 1464 case SND_SOC_DAPM_PRE_PMD: 1465 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1466 RT5670_PWR_BST1_P, 0); 1467 break; 1468 1469 default: 1470 return 0; 1471 } 1472 1473 return 0; 1474 } 1475 1476 static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, 1477 struct snd_kcontrol *kcontrol, int event) 1478 { 1479 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 1480 1481 switch (event) { 1482 case SND_SOC_DAPM_POST_PMU: 1483 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1484 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P); 1485 break; 1486 1487 case SND_SOC_DAPM_PRE_PMD: 1488 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2, 1489 RT5670_PWR_BST2_P, 0); 1490 break; 1491 1492 default: 1493 return 0; 1494 } 1495 1496 return 0; 1497 } 1498 1499 static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { 1500 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, 1501 RT5670_PWR_PLL_BIT, 0, NULL, 0), 1502 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2, 1503 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0), 1504 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL, 1505 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0), 1506 1507 /* ASRC */ 1508 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1, 1509 11, 0, NULL, 0), 1510 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1, 1511 12, 0, NULL, 0), 1512 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1, 1513 10, 0, NULL, 0), 1514 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1, 1515 9, 0, NULL, 0), 1516 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1, 1517 8, 0, NULL, 0), 1518 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1, 1519 7, 0, NULL, 0), 1520 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1, 1521 6, 0, NULL, 0), 1522 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1, 1523 5, 0, NULL, 0), 1524 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1, 1525 4, 0, NULL, 0), 1526 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1, 1527 3, 0, NULL, 0), 1528 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1, 1529 2, 0, NULL, 0), 1530 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1, 1531 1, 0, NULL, 0), 1532 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1, 1533 0, 0, NULL, 0), 1534 1535 /* Input Side */ 1536 /* micbias */ 1537 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2, 1538 RT5670_PWR_MB1_BIT, 0, NULL, 0), 1539 1540 /* Input Lines */ 1541 SND_SOC_DAPM_INPUT("DMIC L1"), 1542 SND_SOC_DAPM_INPUT("DMIC R1"), 1543 SND_SOC_DAPM_INPUT("DMIC L2"), 1544 SND_SOC_DAPM_INPUT("DMIC R2"), 1545 SND_SOC_DAPM_INPUT("DMIC L3"), 1546 SND_SOC_DAPM_INPUT("DMIC R3"), 1547 1548 SND_SOC_DAPM_INPUT("IN1P"), 1549 SND_SOC_DAPM_INPUT("IN1N"), 1550 SND_SOC_DAPM_INPUT("IN2P"), 1551 SND_SOC_DAPM_INPUT("IN2N"), 1552 1553 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1554 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1555 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1556 1557 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, 1558 set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 1559 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1, 1560 RT5670_DMIC_1_EN_SFT, 0, NULL, 0), 1561 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1, 1562 RT5670_DMIC_2_EN_SFT, 0, NULL, 0), 1563 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1, 1564 RT5670_DMIC_3_EN_SFT, 0, NULL, 0), 1565 /* Boost */ 1566 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT, 1567 0, NULL, 0, rt5670_bst1_event, 1568 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1569 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT, 1570 0, NULL, 0, rt5670_bst2_event, 1571 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1572 /* Input Volume */ 1573 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL, 1574 RT5670_PWR_IN_L_BIT, 0, NULL, 0), 1575 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL, 1576 RT5670_PWR_IN_R_BIT, 0, NULL, 0), 1577 1578 /* REC Mixer */ 1579 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0, 1580 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)), 1581 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0, 1582 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)), 1583 /* ADCs */ 1584 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), 1585 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0), 1586 1587 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0), 1588 1589 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1, 1590 RT5670_PWR_ADC_L_BIT, 0, NULL, 0), 1591 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1, 1592 RT5670_PWR_ADC_R_BIT, 0, NULL, 0), 1593 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE + 1594 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0), 1595 /* ADC Mux */ 1596 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, 1597 &rt5670_sto1_dmic_mux), 1598 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1599 &rt5670_sto_adc_2_mux), 1600 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1601 &rt5670_sto_adc_2_mux), 1602 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1603 &rt5670_sto_adc_1_mux), 1604 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1605 &rt5670_sto_adc_1_mux), 1606 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0, 1607 &rt5670_sto2_dmic_mux), 1608 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1609 &rt5670_sto2_adc_2_mux), 1610 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1611 &rt5670_sto2_adc_2_mux), 1612 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1613 &rt5670_sto2_adc_1_mux), 1614 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1615 &rt5670_sto2_adc_1_mux), 1616 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0, 1617 &rt5670_sto2_adc_lr_mux), 1618 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, 1619 &rt5670_mono_dmic_l_mux), 1620 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, 1621 &rt5670_mono_dmic_r_mux), 1622 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1623 &rt5670_mono_adc_l2_mux), 1624 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1625 &rt5670_mono_adc_l1_mux), 1626 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1627 &rt5670_mono_adc_r1_mux), 1628 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1629 &rt5670_mono_adc_r2_mux), 1630 /* ADC Mixer */ 1631 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2, 1632 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0), 1633 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2, 1634 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0), 1635 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL, 1636 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix, 1637 ARRAY_SIZE(rt5670_sto1_adc_l_mix)), 1638 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL, 1639 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix, 1640 ARRAY_SIZE(rt5670_sto1_adc_r_mix)), 1641 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0, 1642 rt5670_sto2_adc_l_mix, 1643 ARRAY_SIZE(rt5670_sto2_adc_l_mix)), 1644 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0, 1645 rt5670_sto2_adc_r_mix, 1646 ARRAY_SIZE(rt5670_sto2_adc_r_mix)), 1647 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2, 1648 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0), 1649 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL, 1650 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix, 1651 ARRAY_SIZE(rt5670_mono_adc_l_mix)), 1652 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2, 1653 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0), 1654 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL, 1655 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix, 1656 ARRAY_SIZE(rt5670_mono_adc_r_mix)), 1657 1658 /* ADC PGA */ 1659 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1660 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1661 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1662 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1663 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1664 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1665 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1666 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1667 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1668 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1669 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1670 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1671 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1672 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1673 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1674 1675 /* DSP */ 1676 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1677 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0), 1678 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0), 1679 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1680 1681 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0, 1682 &rt5670_txdp_slot_mux), 1683 1684 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0, 1685 &rt5670_dsp_ul_mux), 1686 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0, 1687 &rt5670_dsp_dl_mux), 1688 1689 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0, 1690 &rt5670_rxdp_mux), 1691 1692 /* IF2 Mux */ 1693 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0, 1694 &rt5670_if2_adc_in_mux), 1695 1696 /* Digital Interface */ 1697 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1, 1698 RT5670_PWR_I2S1_BIT, 0, NULL, 0), 1699 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1700 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1701 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1702 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1703 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1704 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1705 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1706 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1707 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1708 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1, 1709 RT5670_PWR_I2S2_BIT, 0, NULL, 0), 1710 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1711 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1712 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1713 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1714 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1715 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1716 1717 /* Digital Interface Select */ 1718 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0, 1719 &rt5670_if1_adc1_in1_mux), 1720 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0, 1721 &rt5670_if1_adc1_in2_mux), 1722 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0, 1723 &rt5670_if1_adc2_in_mux), 1724 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0, 1725 &rt5670_if1_adc2_in1_mux), 1726 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0, 1727 &rt5670_vad_adc_mux), 1728 1729 /* Audio Interface */ 1730 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 1731 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1732 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1733 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, 1734 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1), 1735 1736 /* Audio DSP */ 1737 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), 1738 1739 /* Output Side */ 1740 /* DAC mixer before sound effect */ 1741 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, 1742 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)), 1743 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, 1744 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)), 1745 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1746 1747 /* DAC2 channel Mux */ 1748 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, 1749 &rt5670_dac_l2_mux), 1750 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, 1751 &rt5670_dac_r2_mux), 1752 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1, 1753 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0), 1754 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1, 1755 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0), 1756 1757 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux), 1758 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux), 1759 1760 /* DAC Mixer */ 1761 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2, 1762 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0), 1763 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2, 1764 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0), 1765 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2, 1766 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0), 1767 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 1768 rt5670_sto_dac_l_mix, 1769 ARRAY_SIZE(rt5670_sto_dac_l_mix)), 1770 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 1771 rt5670_sto_dac_r_mix, 1772 ARRAY_SIZE(rt5670_sto_dac_r_mix)), 1773 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, 1774 rt5670_mono_dac_l_mix, 1775 ARRAY_SIZE(rt5670_mono_dac_l_mix)), 1776 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, 1777 rt5670_mono_dac_r_mix, 1778 ARRAY_SIZE(rt5670_mono_dac_r_mix)), 1779 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1780 rt5670_dig_l_mix, 1781 ARRAY_SIZE(rt5670_dig_l_mix)), 1782 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1783 rt5670_dig_r_mix, 1784 ARRAY_SIZE(rt5670_dig_r_mix)), 1785 1786 /* DACs */ 1787 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1, 1788 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0), 1789 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1, 1790 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0), 1791 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), 1792 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), 1793 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1, 1794 RT5670_PWR_DAC_L2_BIT, 0), 1795 1796 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1, 1797 RT5670_PWR_DAC_R2_BIT, 0), 1798 /* OUT Mixer */ 1799 1800 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT, 1801 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)), 1802 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT, 1803 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)), 1804 /* Ouput Volume */ 1805 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL, 1806 RT5670_PWR_HV_L_BIT, 0, 1807 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)), 1808 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL, 1809 RT5670_PWR_HV_R_BIT, 0, 1810 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)), 1811 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), 1812 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), 1813 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), 1814 1815 /* HPO/LOUT/Mono Mixer */ 1816 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, 1817 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)), 1818 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT, 1819 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)), 1820 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0, 1821 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU | 1822 SND_SOC_DAPM_PRE_PMD), 1823 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1, 1824 RT5670_PWR_HP_L_BIT, 0, NULL, 0), 1825 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1, 1826 RT5670_PWR_HP_R_BIT, 0, NULL, 0), 1827 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, 1828 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD | 1829 SND_SOC_DAPM_POST_PMU), 1830 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, 1831 &lout_l_enable_control), 1832 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, 1833 &lout_r_enable_control), 1834 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0), 1835 1836 /* PDM */ 1837 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2, 1838 RT5670_PWR_PDM1_BIT, 0, NULL, 0), 1839 1840 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL, 1841 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux), 1842 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL, 1843 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux), 1844 1845 /* Output Lines */ 1846 SND_SOC_DAPM_OUTPUT("HPOL"), 1847 SND_SOC_DAPM_OUTPUT("HPOR"), 1848 SND_SOC_DAPM_OUTPUT("LOUTL"), 1849 SND_SOC_DAPM_OUTPUT("LOUTR"), 1850 }; 1851 1852 static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = { 1853 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2, 1854 RT5670_PWR_PDM2_BIT, 0, NULL, 0), 1855 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL, 1856 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux), 1857 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL, 1858 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux), 1859 SND_SOC_DAPM_OUTPUT("PDM1L"), 1860 SND_SOC_DAPM_OUTPUT("PDM1R"), 1861 SND_SOC_DAPM_OUTPUT("PDM2L"), 1862 SND_SOC_DAPM_OUTPUT("PDM2R"), 1863 }; 1864 1865 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = { 1866 SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0), 1867 SND_SOC_DAPM_OUTPUT("SPOLP"), 1868 SND_SOC_DAPM_OUTPUT("SPOLN"), 1869 SND_SOC_DAPM_OUTPUT("SPORP"), 1870 SND_SOC_DAPM_OUTPUT("SPORN"), 1871 }; 1872 1873 static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { 1874 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, 1875 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, 1876 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc }, 1877 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc }, 1878 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc }, 1879 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc }, 1880 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc }, 1881 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc }, 1882 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc }, 1883 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc }, 1884 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc }, 1885 1886 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc}, 1887 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc}, 1888 1889 { "DMIC1", NULL, "DMIC L1" }, 1890 { "DMIC1", NULL, "DMIC R1" }, 1891 { "DMIC2", NULL, "DMIC L2" }, 1892 { "DMIC2", NULL, "DMIC R2" }, 1893 { "DMIC3", NULL, "DMIC L3" }, 1894 { "DMIC3", NULL, "DMIC R3" }, 1895 1896 { "BST1", NULL, "IN1P" }, 1897 { "BST1", NULL, "IN1N" }, 1898 { "BST1", NULL, "Mic Det Power" }, 1899 { "BST2", NULL, "IN2P" }, 1900 { "BST2", NULL, "IN2N" }, 1901 1902 { "INL VOL", NULL, "IN2P" }, 1903 { "INR VOL", NULL, "IN2N" }, 1904 1905 { "RECMIXL", "INL Switch", "INL VOL" }, 1906 { "RECMIXL", "BST2 Switch", "BST2" }, 1907 { "RECMIXL", "BST1 Switch", "BST1" }, 1908 1909 { "RECMIXR", "INR Switch", "INR VOL" }, 1910 { "RECMIXR", "BST2 Switch", "BST2" }, 1911 { "RECMIXR", "BST1 Switch", "BST1" }, 1912 1913 { "ADC 1", NULL, "RECMIXL" }, 1914 { "ADC 1", NULL, "ADC 1 power" }, 1915 { "ADC 1", NULL, "ADC clock" }, 1916 { "ADC 2", NULL, "RECMIXR" }, 1917 { "ADC 2", NULL, "ADC 2 power" }, 1918 { "ADC 2", NULL, "ADC clock" }, 1919 1920 { "DMIC L1", NULL, "DMIC CLK" }, 1921 { "DMIC L1", NULL, "DMIC1 Power" }, 1922 { "DMIC R1", NULL, "DMIC CLK" }, 1923 { "DMIC R1", NULL, "DMIC1 Power" }, 1924 { "DMIC L2", NULL, "DMIC CLK" }, 1925 { "DMIC L2", NULL, "DMIC2 Power" }, 1926 { "DMIC R2", NULL, "DMIC CLK" }, 1927 { "DMIC R2", NULL, "DMIC2 Power" }, 1928 { "DMIC L3", NULL, "DMIC CLK" }, 1929 { "DMIC L3", NULL, "DMIC3 Power" }, 1930 { "DMIC R3", NULL, "DMIC CLK" }, 1931 { "DMIC R3", NULL, "DMIC3 Power" }, 1932 1933 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, 1934 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, 1935 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" }, 1936 1937 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" }, 1938 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" }, 1939 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" }, 1940 1941 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, 1942 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, 1943 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" }, 1944 1945 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, 1946 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, 1947 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" }, 1948 1949 { "ADC 1_2", NULL, "ADC 1" }, 1950 { "ADC 1_2", NULL, "ADC 2" }, 1951 1952 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1953 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 1954 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" }, 1955 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 1956 1957 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" }, 1958 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 1959 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1960 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 1961 1962 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, 1963 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 1964 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 1965 { "Mono ADC L1 Mux", "ADC1", "ADC 1" }, 1966 1967 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 1968 { "Mono ADC R1 Mux", "ADC2", "ADC 2" }, 1969 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, 1970 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 1971 1972 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, 1973 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, 1974 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, 1975 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, 1976 1977 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, 1978 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" }, 1979 1980 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, 1981 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" }, 1982 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1983 1984 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, 1985 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, 1986 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" }, 1987 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1988 1989 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, 1990 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, 1991 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" }, 1992 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1993 1994 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 1995 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 1996 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" }, 1997 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 1998 1999 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" }, 2000 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 2001 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 2002 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 2003 2004 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" }, 2005 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" }, 2006 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" }, 2007 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" }, 2008 2009 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" }, 2010 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" }, 2011 2012 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" }, 2013 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" }, 2014 2015 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" }, 2016 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" }, 2017 2018 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" }, 2019 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" }, 2020 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2021 2022 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, 2023 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, 2024 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, 2025 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" }, 2026 2027 { "VAD_ADC", NULL, "VAD ADC Mux" }, 2028 2029 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, 2030 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, 2031 { "IF_ADC2", NULL, "Mono ADC MIXL" }, 2032 { "IF_ADC2", NULL, "Mono ADC MIXR" }, 2033 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" }, 2034 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" }, 2035 2036 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" }, 2037 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" }, 2038 2039 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" }, 2040 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" }, 2041 2042 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" }, 2043 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" }, 2044 2045 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" }, 2046 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" }, 2047 2048 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" }, 2049 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" }, 2050 2051 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" }, 2052 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" }, 2053 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" }, 2054 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" }, 2055 { "Mono ADC MIX", NULL, "Mono ADC MIXL" }, 2056 { "Mono ADC MIX", NULL, "Mono ADC MIXR" }, 2057 2058 { "RxDP Mux", "IF2 DAC", "IF2 DAC" }, 2059 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" }, 2060 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" }, 2061 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" }, 2062 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" }, 2063 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" }, 2064 { "RxDP Mux", "DAC1", "DAC MIX" }, 2065 2066 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" }, 2067 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" }, 2068 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" }, 2069 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" }, 2070 2071 { "DSP UL Mux", "Bypass", "TDM Data Mux" }, 2072 { "DSP UL Mux", NULL, "I2S DSP" }, 2073 { "DSP DL Mux", "Bypass", "RxDP Mux" }, 2074 { "DSP DL Mux", NULL, "I2S DSP" }, 2075 2076 { "TxDP_ADC_L", NULL, "DSP UL Mux" }, 2077 { "TxDP_ADC_R", NULL, "DSP UL Mux" }, 2078 { "TxDC_DAC", NULL, "DSP DL Mux" }, 2079 2080 { "TxDP_ADC", NULL, "TxDP_ADC_L" }, 2081 { "TxDP_ADC", NULL, "TxDP_ADC_R" }, 2082 2083 { "IF1 ADC", NULL, "I2S1" }, 2084 { "IF1 ADC", NULL, "IF1_ADC1" }, 2085 { "IF1 ADC", NULL, "IF1_ADC2" }, 2086 { "IF1 ADC", NULL, "IF_ADC3" }, 2087 { "IF1 ADC", NULL, "TxDP_ADC" }, 2088 2089 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, 2090 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, 2091 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" }, 2092 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" }, 2093 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" }, 2094 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, 2095 2096 { "IF2 ADC L", NULL, "IF2 ADC Mux" }, 2097 { "IF2 ADC R", NULL, "IF2 ADC Mux" }, 2098 2099 { "IF2 ADC", NULL, "I2S2" }, 2100 { "IF2 ADC", NULL, "IF2 ADC L" }, 2101 { "IF2 ADC", NULL, "IF2 ADC R" }, 2102 2103 { "AIF1TX", NULL, "IF1 ADC" }, 2104 { "AIF2TX", NULL, "IF2 ADC" }, 2105 2106 { "IF1 DAC1", NULL, "AIF1RX" }, 2107 { "IF1 DAC2", NULL, "AIF1RX" }, 2108 { "IF2 DAC", NULL, "AIF2RX" }, 2109 2110 { "IF1 DAC1", NULL, "I2S1" }, 2111 { "IF1 DAC2", NULL, "I2S1" }, 2112 { "IF2 DAC", NULL, "I2S2" }, 2113 2114 { "IF1 DAC2 L", NULL, "IF1 DAC2" }, 2115 { "IF1 DAC2 R", NULL, "IF1 DAC2" }, 2116 { "IF1 DAC1 L", NULL, "IF1 DAC1" }, 2117 { "IF1 DAC1 R", NULL, "IF1 DAC1" }, 2118 { "IF2 DAC L", NULL, "IF2 DAC" }, 2119 { "IF2 DAC R", NULL, "IF2 DAC" }, 2120 2121 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" }, 2122 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, 2123 2124 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" }, 2125 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, 2126 2127 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, 2128 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, 2129 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" }, 2130 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, 2131 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, 2132 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" }, 2133 2134 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2135 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2136 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2137 2138 { "DAC MIX", NULL, "DAC1 MIXL" }, 2139 { "DAC MIX", NULL, "DAC1 MIXR" }, 2140 2141 { "Audio DSP", NULL, "DAC1 MIXL" }, 2142 { "Audio DSP", NULL, "DAC1 MIXR" }, 2143 2144 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" }, 2145 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, 2146 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" }, 2147 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, 2148 { "DAC L2 Volume", NULL, "DAC L2 Mux" }, 2149 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" }, 2150 2151 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" }, 2152 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, 2153 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" }, 2154 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" }, 2155 { "DAC R2 Volume", NULL, "DAC R2 Mux" }, 2156 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" }, 2157 2158 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2159 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, 2160 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2161 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" }, 2162 { "Stereo DAC MIXL", NULL, "DAC L1 Power" }, 2163 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2164 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, 2165 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2166 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" }, 2167 { "Stereo DAC MIXR", NULL, "DAC R1 Power" }, 2168 2169 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2170 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2171 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2172 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" }, 2173 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2174 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2175 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2176 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" }, 2177 2178 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, 2179 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2180 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2181 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, 2182 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2183 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2184 2185 { "DAC L1", NULL, "DAC L1 Power" }, 2186 { "DAC L1", NULL, "Stereo DAC MIXL" }, 2187 { "DAC R1", NULL, "DAC R1 Power" }, 2188 { "DAC R1", NULL, "Stereo DAC MIXR" }, 2189 { "DAC L2", NULL, "Mono DAC MIXL" }, 2190 { "DAC R2", NULL, "Mono DAC MIXR" }, 2191 2192 { "OUT MIXL", "BST1 Switch", "BST1" }, 2193 { "OUT MIXL", "INL Switch", "INL VOL" }, 2194 { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, 2195 { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, 2196 2197 { "OUT MIXR", "BST2 Switch", "BST2" }, 2198 { "OUT MIXR", "INR Switch", "INR VOL" }, 2199 { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, 2200 { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, 2201 2202 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, 2203 { "HPOVOL MIXL", "INL Switch", "INL VOL" }, 2204 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, 2205 { "HPOVOL MIXR", "INR Switch", "INR VOL" }, 2206 2207 { "DAC 2", NULL, "DAC L2" }, 2208 { "DAC 2", NULL, "DAC R2" }, 2209 { "DAC 1", NULL, "DAC L1" }, 2210 { "DAC 1", NULL, "DAC R1" }, 2211 { "HPOVOL", NULL, "HPOVOL MIXL" }, 2212 { "HPOVOL", NULL, "HPOVOL MIXR" }, 2213 { "HPO MIX", "DAC1 Switch", "DAC 1" }, 2214 { "HPO MIX", "HPVOL Switch", "HPOVOL" }, 2215 2216 { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, 2217 { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, 2218 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, 2219 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, 2220 2221 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2222 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2223 { "PDM1 L Mux", NULL, "PDM1 Power" }, 2224 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2225 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2226 { "PDM1 R Mux", NULL, "PDM1 Power" }, 2227 2228 { "HP Amp", NULL, "HPO MIX" }, 2229 { "HP Amp", NULL, "Mic Det Power" }, 2230 { "HPOL", NULL, "HP Amp" }, 2231 { "HPOL", NULL, "HP L Amp" }, 2232 { "HPOL", NULL, "Improve HP Amp Drv" }, 2233 { "HPOR", NULL, "HP Amp" }, 2234 { "HPOR", NULL, "HP R Amp" }, 2235 { "HPOR", NULL, "Improve HP Amp Drv" }, 2236 2237 { "LOUT Amp", NULL, "LOUT MIX" }, 2238 { "LOUT L Playback", "Switch", "LOUT Amp" }, 2239 { "LOUT R Playback", "Switch", "LOUT Amp" }, 2240 { "LOUTL", NULL, "LOUT L Playback" }, 2241 { "LOUTR", NULL, "LOUT R Playback" }, 2242 { "LOUTL", NULL, "Improve HP Amp Drv" }, 2243 { "LOUTR", NULL, "Improve HP Amp Drv" }, 2244 }; 2245 2246 static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = { 2247 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2248 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2249 { "PDM2 L Mux", NULL, "PDM2 Power" }, 2250 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2251 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2252 { "PDM2 R Mux", NULL, "PDM2 Power" }, 2253 { "PDM1L", NULL, "PDM1 L Mux" }, 2254 { "PDM1R", NULL, "PDM1 R Mux" }, 2255 { "PDM2L", NULL, "PDM2 L Mux" }, 2256 { "PDM2R", NULL, "PDM2 R Mux" }, 2257 }; 2258 2259 static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = { 2260 { "SPO Amp", NULL, "PDM1 L Mux" }, 2261 { "SPO Amp", NULL, "PDM1 R Mux" }, 2262 { "SPOLP", NULL, "SPO Amp" }, 2263 { "SPOLN", NULL, "SPO Amp" }, 2264 { "SPORP", NULL, "SPO Amp" }, 2265 { "SPORN", NULL, "SPO Amp" }, 2266 }; 2267 2268 static int rt5670_hw_params(struct snd_pcm_substream *substream, 2269 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 2270 { 2271 struct snd_soc_component *component = dai->component; 2272 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2273 unsigned int val_len = 0, val_clk, mask_clk; 2274 int pre_div, bclk_ms, frame_size; 2275 2276 rt5670->lrck[dai->id] = params_rate(params); 2277 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]); 2278 if (pre_div < 0) { 2279 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n", 2280 rt5670->lrck[dai->id], dai->id); 2281 return -EINVAL; 2282 } 2283 frame_size = snd_soc_params_to_frame_size(params); 2284 if (frame_size < 0) { 2285 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size); 2286 return -EINVAL; 2287 } 2288 bclk_ms = frame_size > 32; 2289 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms); 2290 2291 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 2292 rt5670->bclk[dai->id], rt5670->lrck[dai->id]); 2293 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 2294 bclk_ms, pre_div, dai->id); 2295 2296 switch (params_width(params)) { 2297 case 16: 2298 break; 2299 case 20: 2300 val_len |= RT5670_I2S_DL_20; 2301 break; 2302 case 24: 2303 val_len |= RT5670_I2S_DL_24; 2304 break; 2305 case 8: 2306 val_len |= RT5670_I2S_DL_8; 2307 break; 2308 default: 2309 return -EINVAL; 2310 } 2311 2312 switch (dai->id) { 2313 case RT5670_AIF1: 2314 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK; 2315 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT | 2316 pre_div << RT5670_I2S_PD1_SFT; 2317 snd_soc_component_update_bits(component, RT5670_I2S1_SDP, 2318 RT5670_I2S_DL_MASK, val_len); 2319 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk); 2320 break; 2321 case RT5670_AIF2: 2322 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK; 2323 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT | 2324 pre_div << RT5670_I2S_PD2_SFT; 2325 snd_soc_component_update_bits(component, RT5670_I2S2_SDP, 2326 RT5670_I2S_DL_MASK, val_len); 2327 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk); 2328 break; 2329 default: 2330 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2331 return -EINVAL; 2332 } 2333 2334 return 0; 2335 } 2336 2337 static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 2338 { 2339 struct snd_soc_component *component = dai->component; 2340 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2341 unsigned int reg_val = 0; 2342 2343 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2344 case SND_SOC_DAIFMT_CBM_CFM: 2345 rt5670->master[dai->id] = 1; 2346 break; 2347 case SND_SOC_DAIFMT_CBS_CFS: 2348 reg_val |= RT5670_I2S_MS_S; 2349 rt5670->master[dai->id] = 0; 2350 break; 2351 default: 2352 return -EINVAL; 2353 } 2354 2355 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2356 case SND_SOC_DAIFMT_NB_NF: 2357 break; 2358 case SND_SOC_DAIFMT_IB_NF: 2359 reg_val |= RT5670_I2S_BP_INV; 2360 break; 2361 default: 2362 return -EINVAL; 2363 } 2364 2365 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 2366 case SND_SOC_DAIFMT_I2S: 2367 break; 2368 case SND_SOC_DAIFMT_LEFT_J: 2369 reg_val |= RT5670_I2S_DF_LEFT; 2370 break; 2371 case SND_SOC_DAIFMT_DSP_A: 2372 reg_val |= RT5670_I2S_DF_PCM_A; 2373 break; 2374 case SND_SOC_DAIFMT_DSP_B: 2375 reg_val |= RT5670_I2S_DF_PCM_B; 2376 break; 2377 default: 2378 return -EINVAL; 2379 } 2380 2381 switch (dai->id) { 2382 case RT5670_AIF1: 2383 snd_soc_component_update_bits(component, RT5670_I2S1_SDP, 2384 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2385 RT5670_I2S_DF_MASK, reg_val); 2386 break; 2387 case RT5670_AIF2: 2388 snd_soc_component_update_bits(component, RT5670_I2S2_SDP, 2389 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2390 RT5670_I2S_DF_MASK, reg_val); 2391 break; 2392 default: 2393 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2394 return -EINVAL; 2395 } 2396 return 0; 2397 } 2398 2399 static int rt5670_set_codec_sysclk(struct snd_soc_component *component, int clk_id, 2400 int source, unsigned int freq, int dir) 2401 { 2402 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2403 unsigned int reg_val = 0; 2404 2405 switch (clk_id) { 2406 case RT5670_SCLK_S_MCLK: 2407 reg_val |= RT5670_SCLK_SRC_MCLK; 2408 break; 2409 case RT5670_SCLK_S_PLL1: 2410 reg_val |= RT5670_SCLK_SRC_PLL1; 2411 break; 2412 case RT5670_SCLK_S_RCCLK: 2413 reg_val |= RT5670_SCLK_SRC_RCCLK; 2414 break; 2415 default: 2416 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); 2417 return -EINVAL; 2418 } 2419 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2420 RT5670_SCLK_SRC_MASK, reg_val); 2421 rt5670->sysclk = freq; 2422 if (clk_id != RT5670_SCLK_S_RCCLK) 2423 rt5670->sysclk_src = clk_id; 2424 2425 dev_dbg(component->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id); 2426 2427 return 0; 2428 } 2429 2430 static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 2431 unsigned int freq_in, unsigned int freq_out) 2432 { 2433 struct snd_soc_component *component = dai->component; 2434 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2435 struct rl6231_pll_code pll_code; 2436 int ret; 2437 2438 if (source == rt5670->pll_src && freq_in == rt5670->pll_in && 2439 freq_out == rt5670->pll_out) 2440 return 0; 2441 2442 if (!freq_in || !freq_out) { 2443 dev_dbg(component->dev, "PLL disabled\n"); 2444 2445 rt5670->pll_in = 0; 2446 rt5670->pll_out = 0; 2447 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2448 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK); 2449 return 0; 2450 } 2451 2452 switch (source) { 2453 case RT5670_PLL1_S_MCLK: 2454 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2455 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK); 2456 break; 2457 case RT5670_PLL1_S_BCLK1: 2458 case RT5670_PLL1_S_BCLK2: 2459 case RT5670_PLL1_S_BCLK3: 2460 case RT5670_PLL1_S_BCLK4: 2461 switch (dai->id) { 2462 case RT5670_AIF1: 2463 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2464 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1); 2465 break; 2466 case RT5670_AIF2: 2467 snd_soc_component_update_bits(component, RT5670_GLB_CLK, 2468 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2); 2469 break; 2470 default: 2471 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id); 2472 return -EINVAL; 2473 } 2474 break; 2475 default: 2476 dev_err(component->dev, "Unknown PLL source %d\n", source); 2477 return -EINVAL; 2478 } 2479 2480 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 2481 if (ret < 0) { 2482 dev_err(component->dev, "Unsupport input clock %d\n", freq_in); 2483 return ret; 2484 } 2485 2486 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n", 2487 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 2488 pll_code.n_code, pll_code.k_code); 2489 2490 snd_soc_component_write(component, RT5670_PLL_CTRL1, 2491 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code); 2492 snd_soc_component_write(component, RT5670_PLL_CTRL2, 2493 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT | 2494 pll_code.m_bp << RT5670_PLL_M_BP_SFT); 2495 2496 rt5670->pll_in = freq_in; 2497 rt5670->pll_out = freq_out; 2498 rt5670->pll_src = source; 2499 2500 return 0; 2501 } 2502 2503 static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 2504 unsigned int rx_mask, int slots, int slot_width) 2505 { 2506 struct snd_soc_component *component = dai->component; 2507 unsigned int val = 0; 2508 2509 if (rx_mask || tx_mask) 2510 val |= (1 << 14); 2511 2512 switch (slots) { 2513 case 4: 2514 val |= (1 << 12); 2515 break; 2516 case 6: 2517 val |= (2 << 12); 2518 break; 2519 case 8: 2520 val |= (3 << 12); 2521 break; 2522 case 2: 2523 break; 2524 default: 2525 return -EINVAL; 2526 } 2527 2528 switch (slot_width) { 2529 case 20: 2530 val |= (1 << 10); 2531 break; 2532 case 24: 2533 val |= (2 << 10); 2534 break; 2535 case 32: 2536 val |= (3 << 10); 2537 break; 2538 case 16: 2539 break; 2540 default: 2541 return -EINVAL; 2542 } 2543 2544 snd_soc_component_update_bits(component, RT5670_TDM_CTRL_1, 0x7c00, val); 2545 2546 return 0; 2547 } 2548 2549 static int rt5670_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) 2550 { 2551 struct snd_soc_component *component = dai->component; 2552 2553 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio); 2554 if (dai->id != RT5670_AIF1) 2555 return 0; 2556 2557 if ((ratio % 50) == 0) 2558 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 2559 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_50FS); 2560 else 2561 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 2562 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_NOR); 2563 2564 return 0; 2565 } 2566 2567 static int rt5670_set_bias_level(struct snd_soc_component *component, 2568 enum snd_soc_bias_level level) 2569 { 2570 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2571 2572 switch (level) { 2573 case SND_SOC_BIAS_PREPARE: 2574 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) { 2575 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2576 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2577 RT5670_PWR_BG | RT5670_PWR_VREF2, 2578 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2579 RT5670_PWR_BG | RT5670_PWR_VREF2); 2580 mdelay(10); 2581 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2582 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2583 RT5670_PWR_FV1 | RT5670_PWR_FV2); 2584 snd_soc_component_update_bits(component, RT5670_CHARGE_PUMP, 2585 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK, 2586 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS); 2587 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x1); 2588 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2589 RT5670_LDO_SEL_MASK, 0x5); 2590 } 2591 break; 2592 case SND_SOC_BIAS_STANDBY: 2593 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2594 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 | 2595 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2596 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2597 RT5670_LDO_SEL_MASK, 0x3); 2598 break; 2599 case SND_SOC_BIAS_OFF: 2600 if (rt5670->pdata.jd_mode) 2601 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2602 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2603 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2604 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2605 RT5670_PWR_MB | RT5670_PWR_BG); 2606 else 2607 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1, 2608 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2609 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2610 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2611 2612 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x0); 2613 break; 2614 2615 default: 2616 break; 2617 } 2618 2619 return 0; 2620 } 2621 2622 static int rt5670_probe(struct snd_soc_component *component) 2623 { 2624 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 2625 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2626 2627 switch (snd_soc_component_read32(component, RT5670_RESET) & RT5670_ID_MASK) { 2628 case RT5670_ID_5670: 2629 case RT5670_ID_5671: 2630 snd_soc_dapm_new_controls(dapm, 2631 rt5670_specific_dapm_widgets, 2632 ARRAY_SIZE(rt5670_specific_dapm_widgets)); 2633 snd_soc_dapm_add_routes(dapm, 2634 rt5670_specific_dapm_routes, 2635 ARRAY_SIZE(rt5670_specific_dapm_routes)); 2636 break; 2637 case RT5670_ID_5672: 2638 snd_soc_dapm_new_controls(dapm, 2639 rt5672_specific_dapm_widgets, 2640 ARRAY_SIZE(rt5672_specific_dapm_widgets)); 2641 snd_soc_dapm_add_routes(dapm, 2642 rt5672_specific_dapm_routes, 2643 ARRAY_SIZE(rt5672_specific_dapm_routes)); 2644 break; 2645 default: 2646 dev_err(component->dev, 2647 "The driver is for RT5670 RT5671 or RT5672 only\n"); 2648 return -ENODEV; 2649 } 2650 rt5670->component = component; 2651 2652 return 0; 2653 } 2654 2655 static void rt5670_remove(struct snd_soc_component *component) 2656 { 2657 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2658 2659 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2660 snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio); 2661 } 2662 2663 #ifdef CONFIG_PM 2664 static int rt5670_suspend(struct snd_soc_component *component) 2665 { 2666 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2667 2668 regcache_cache_only(rt5670->regmap, true); 2669 regcache_mark_dirty(rt5670->regmap); 2670 return 0; 2671 } 2672 2673 static int rt5670_resume(struct snd_soc_component *component) 2674 { 2675 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component); 2676 2677 regcache_cache_only(rt5670->regmap, false); 2678 regcache_sync(rt5670->regmap); 2679 2680 return 0; 2681 } 2682 #else 2683 #define rt5670_suspend NULL 2684 #define rt5670_resume NULL 2685 #endif 2686 2687 #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000 2688 #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 2689 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 2690 2691 static const struct snd_soc_dai_ops rt5670_aif_dai_ops = { 2692 .hw_params = rt5670_hw_params, 2693 .set_fmt = rt5670_set_dai_fmt, 2694 .set_tdm_slot = rt5670_set_tdm_slot, 2695 .set_pll = rt5670_set_dai_pll, 2696 .set_bclk_ratio = rt5670_set_bclk_ratio, 2697 }; 2698 2699 static struct snd_soc_dai_driver rt5670_dai[] = { 2700 { 2701 .name = "rt5670-aif1", 2702 .id = RT5670_AIF1, 2703 .playback = { 2704 .stream_name = "AIF1 Playback", 2705 .channels_min = 1, 2706 .channels_max = 2, 2707 .rates = RT5670_STEREO_RATES, 2708 .formats = RT5670_FORMATS, 2709 }, 2710 .capture = { 2711 .stream_name = "AIF1 Capture", 2712 .channels_min = 1, 2713 .channels_max = 2, 2714 .rates = RT5670_STEREO_RATES, 2715 .formats = RT5670_FORMATS, 2716 }, 2717 .ops = &rt5670_aif_dai_ops, 2718 .symmetric_rates = 1, 2719 }, 2720 { 2721 .name = "rt5670-aif2", 2722 .id = RT5670_AIF2, 2723 .playback = { 2724 .stream_name = "AIF2 Playback", 2725 .channels_min = 1, 2726 .channels_max = 2, 2727 .rates = RT5670_STEREO_RATES, 2728 .formats = RT5670_FORMATS, 2729 }, 2730 .capture = { 2731 .stream_name = "AIF2 Capture", 2732 .channels_min = 1, 2733 .channels_max = 2, 2734 .rates = RT5670_STEREO_RATES, 2735 .formats = RT5670_FORMATS, 2736 }, 2737 .ops = &rt5670_aif_dai_ops, 2738 .symmetric_rates = 1, 2739 }, 2740 }; 2741 2742 static const struct snd_soc_component_driver soc_component_dev_rt5670 = { 2743 .probe = rt5670_probe, 2744 .remove = rt5670_remove, 2745 .suspend = rt5670_suspend, 2746 .resume = rt5670_resume, 2747 .set_bias_level = rt5670_set_bias_level, 2748 .set_sysclk = rt5670_set_codec_sysclk, 2749 .controls = rt5670_snd_controls, 2750 .num_controls = ARRAY_SIZE(rt5670_snd_controls), 2751 .dapm_widgets = rt5670_dapm_widgets, 2752 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets), 2753 .dapm_routes = rt5670_dapm_routes, 2754 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes), 2755 .use_pmdown_time = 1, 2756 .endianness = 1, 2757 .non_legacy_dai_naming = 1, 2758 }; 2759 2760 static const struct regmap_config rt5670_regmap = { 2761 .reg_bits = 8, 2762 .val_bits = 16, 2763 .use_single_read = true, 2764 .use_single_write = true, 2765 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) * 2766 RT5670_PR_SPACING), 2767 .volatile_reg = rt5670_volatile_register, 2768 .readable_reg = rt5670_readable_register, 2769 .cache_type = REGCACHE_RBTREE, 2770 .reg_defaults = rt5670_reg, 2771 .num_reg_defaults = ARRAY_SIZE(rt5670_reg), 2772 .ranges = rt5670_ranges, 2773 .num_ranges = ARRAY_SIZE(rt5670_ranges), 2774 }; 2775 2776 static const struct i2c_device_id rt5670_i2c_id[] = { 2777 { "rt5670", 0 }, 2778 { "rt5671", 0 }, 2779 { "rt5672", 0 }, 2780 { } 2781 }; 2782 MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); 2783 2784 #ifdef CONFIG_ACPI 2785 static const struct acpi_device_id rt5670_acpi_match[] = { 2786 { "10EC5670", 0}, 2787 { "10EC5672", 0}, 2788 { "10EC5640", 0}, /* quirk */ 2789 { }, 2790 }; 2791 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match); 2792 #endif 2793 2794 static int rt5670_quirk_cb(const struct dmi_system_id *id) 2795 { 2796 rt5670_quirk = (unsigned long)id->driver_data; 2797 return 1; 2798 } 2799 2800 static const struct dmi_system_id dmi_platform_intel_quirks[] = { 2801 { 2802 .callback = rt5670_quirk_cb, 2803 .ident = "Intel Braswell", 2804 .matches = { 2805 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), 2806 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"), 2807 }, 2808 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2809 RT5670_DMIC1_IN2P | 2810 RT5670_DEV_GPIO | 2811 RT5670_JD_MODE1), 2812 }, 2813 { 2814 .callback = rt5670_quirk_cb, 2815 .ident = "Dell Wyse 3040", 2816 .matches = { 2817 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 2818 DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"), 2819 }, 2820 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2821 RT5670_DMIC1_IN2P | 2822 RT5670_DEV_GPIO | 2823 RT5670_JD_MODE1), 2824 }, 2825 { 2826 .callback = rt5670_quirk_cb, 2827 .ident = "Lenovo Thinkpad Tablet 8", 2828 .matches = { 2829 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2830 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 8"), 2831 }, 2832 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2833 RT5670_DMIC2_INR | 2834 RT5670_DEV_GPIO | 2835 RT5670_JD_MODE1), 2836 }, 2837 { 2838 .callback = rt5670_quirk_cb, 2839 .ident = "Lenovo Thinkpad Tablet 10", 2840 .matches = { 2841 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2842 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"), 2843 }, 2844 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2845 RT5670_DMIC1_IN2P | 2846 RT5670_DEV_GPIO | 2847 RT5670_JD_MODE1), 2848 }, 2849 { 2850 .callback = rt5670_quirk_cb, 2851 .ident = "Lenovo Thinkpad Tablet 10", 2852 .matches = { 2853 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2854 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"), 2855 }, 2856 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2857 RT5670_DMIC1_IN2P | 2858 RT5670_DEV_GPIO | 2859 RT5670_JD_MODE1), 2860 }, 2861 { 2862 .callback = rt5670_quirk_cb, 2863 .ident = "Lenovo Thinkpad Tablet 10", 2864 .matches = { 2865 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 2866 DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"), 2867 }, 2868 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2869 RT5670_DMIC1_IN2P | 2870 RT5670_DEV_GPIO | 2871 RT5670_JD_MODE2), 2872 }, 2873 { 2874 .callback = rt5670_quirk_cb, 2875 .ident = "Dell Venue 8 Pro 5855", 2876 .matches = { 2877 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 2878 DMI_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5855"), 2879 }, 2880 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2881 RT5670_DMIC2_INR | 2882 RT5670_DEV_GPIO | 2883 RT5670_JD_MODE3), 2884 }, 2885 { 2886 .callback = rt5670_quirk_cb, 2887 .ident = "Aegex 10 tablet (RU2)", 2888 .matches = { 2889 DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"), 2890 DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"), 2891 }, 2892 .driver_data = (unsigned long *)(RT5670_DMIC_EN | 2893 RT5670_DMIC2_INR | 2894 RT5670_DEV_GPIO | 2895 RT5670_JD_MODE3), 2896 }, 2897 {} 2898 }; 2899 2900 static int rt5670_i2c_probe(struct i2c_client *i2c, 2901 const struct i2c_device_id *id) 2902 { 2903 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev); 2904 struct rt5670_priv *rt5670; 2905 int ret; 2906 unsigned int val; 2907 2908 rt5670 = devm_kzalloc(&i2c->dev, 2909 sizeof(struct rt5670_priv), 2910 GFP_KERNEL); 2911 if (NULL == rt5670) 2912 return -ENOMEM; 2913 2914 i2c_set_clientdata(i2c, rt5670); 2915 2916 if (pdata) 2917 rt5670->pdata = *pdata; 2918 2919 dmi_check_system(dmi_platform_intel_quirks); 2920 if (quirk_override) { 2921 dev_info(&i2c->dev, "Overriding quirk 0x%x => 0x%x\n", 2922 (unsigned int)rt5670_quirk, quirk_override); 2923 rt5670_quirk = quirk_override; 2924 } 2925 2926 if (rt5670_quirk & RT5670_DEV_GPIO) { 2927 rt5670->pdata.dev_gpio = true; 2928 dev_info(&i2c->dev, "quirk dev_gpio\n"); 2929 } 2930 if (rt5670_quirk & RT5670_IN2_DIFF) { 2931 rt5670->pdata.in2_diff = true; 2932 dev_info(&i2c->dev, "quirk IN2_DIFF\n"); 2933 } 2934 if (rt5670_quirk & RT5670_DMIC_EN) { 2935 rt5670->pdata.dmic_en = true; 2936 dev_info(&i2c->dev, "quirk DMIC enabled\n"); 2937 } 2938 if (rt5670_quirk & RT5670_DMIC1_IN2P) { 2939 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P; 2940 dev_info(&i2c->dev, "quirk DMIC1 on IN2P pin\n"); 2941 } 2942 if (rt5670_quirk & RT5670_DMIC1_GPIO6) { 2943 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_GPIO6; 2944 dev_info(&i2c->dev, "quirk DMIC1 on GPIO6 pin\n"); 2945 } 2946 if (rt5670_quirk & RT5670_DMIC1_GPIO7) { 2947 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_GPIO7; 2948 dev_info(&i2c->dev, "quirk DMIC1 on GPIO7 pin\n"); 2949 } 2950 if (rt5670_quirk & RT5670_DMIC2_INR) { 2951 rt5670->pdata.dmic2_data_pin = RT5670_DMIC_DATA_IN3N; 2952 dev_info(&i2c->dev, "quirk DMIC2 on INR pin\n"); 2953 } 2954 if (rt5670_quirk & RT5670_DMIC2_GPIO8) { 2955 rt5670->pdata.dmic2_data_pin = RT5670_DMIC_DATA_GPIO8; 2956 dev_info(&i2c->dev, "quirk DMIC2 on GPIO8 pin\n"); 2957 } 2958 if (rt5670_quirk & RT5670_DMIC3_GPIO5) { 2959 rt5670->pdata.dmic3_data_pin = RT5670_DMIC_DATA_GPIO5; 2960 dev_info(&i2c->dev, "quirk DMIC3 on GPIO5 pin\n"); 2961 } 2962 2963 if (rt5670_quirk & RT5670_JD_MODE1) { 2964 rt5670->pdata.jd_mode = 1; 2965 dev_info(&i2c->dev, "quirk JD mode 1\n"); 2966 } 2967 if (rt5670_quirk & RT5670_JD_MODE2) { 2968 rt5670->pdata.jd_mode = 2; 2969 dev_info(&i2c->dev, "quirk JD mode 2\n"); 2970 } 2971 if (rt5670_quirk & RT5670_JD_MODE3) { 2972 rt5670->pdata.jd_mode = 3; 2973 dev_info(&i2c->dev, "quirk JD mode 3\n"); 2974 } 2975 2976 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); 2977 if (IS_ERR(rt5670->regmap)) { 2978 ret = PTR_ERR(rt5670->regmap); 2979 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 2980 ret); 2981 return ret; 2982 } 2983 2984 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val); 2985 if (val != RT5670_DEVICE_ID) { 2986 dev_err(&i2c->dev, 2987 "Device with ID register %#x is not rt5670/72\n", val); 2988 return -ENODEV; 2989 } 2990 2991 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2992 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 2993 RT5670_PWR_HP_L | RT5670_PWR_HP_R | 2994 RT5670_PWR_VREF2, RT5670_PWR_VREF2); 2995 msleep(100); 2996 2997 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2998 2999 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val); 3000 if (val >= 4) 3001 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980); 3002 else 3003 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00); 3004 3005 ret = regmap_register_patch(rt5670->regmap, init_list, 3006 ARRAY_SIZE(init_list)); 3007 if (ret != 0) 3008 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 3009 3010 regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC, 3011 RT5670_MCLK_DET, RT5670_MCLK_DET); 3012 3013 if (rt5670->pdata.in2_diff) 3014 regmap_update_bits(rt5670->regmap, RT5670_IN2, 3015 RT5670_IN_DF2, RT5670_IN_DF2); 3016 3017 if (rt5670->pdata.dev_gpio) { 3018 /* for push button */ 3019 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000); 3020 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010); 3021 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014); 3022 /* for irq */ 3023 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3024 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 3025 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 3026 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); 3027 } 3028 3029 if (rt5670->pdata.jd_mode) { 3030 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK, 3031 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK); 3032 rt5670->sysclk = 0; 3033 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK; 3034 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 3035 RT5670_PWR_MB, RT5670_PWR_MB); 3036 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2, 3037 RT5670_PWR_JD1, RT5670_PWR_JD1); 3038 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1, 3039 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN); 3040 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3, 3041 RT5670_JD_TRI_CBJ_SEL_MASK | 3042 RT5670_JD_TRI_HPO_SEL_MASK, 3043 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1); 3044 switch (rt5670->pdata.jd_mode) { 3045 case 1: 3046 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3047 RT5670_JD1_MODE_MASK, 3048 RT5670_JD1_MODE_0); 3049 break; 3050 case 2: 3051 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3052 RT5670_JD1_MODE_MASK, 3053 RT5670_JD1_MODE_1); 3054 break; 3055 case 3: 3056 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 3057 RT5670_JD1_MODE_MASK, 3058 RT5670_JD1_MODE_2); 3059 break; 3060 default: 3061 break; 3062 } 3063 } 3064 3065 if (rt5670->pdata.dmic_en) { 3066 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3067 RT5670_GP2_PIN_MASK, 3068 RT5670_GP2_PIN_DMIC1_SCL); 3069 3070 switch (rt5670->pdata.dmic1_data_pin) { 3071 case RT5670_DMIC_DATA_IN2P: 3072 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3073 RT5670_DMIC_1_DP_MASK, 3074 RT5670_DMIC_1_DP_IN2P); 3075 break; 3076 3077 case RT5670_DMIC_DATA_GPIO6: 3078 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3079 RT5670_DMIC_1_DP_MASK, 3080 RT5670_DMIC_1_DP_GPIO6); 3081 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3082 RT5670_GP6_PIN_MASK, 3083 RT5670_GP6_PIN_DMIC1_SDA); 3084 break; 3085 3086 case RT5670_DMIC_DATA_GPIO7: 3087 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3088 RT5670_DMIC_1_DP_MASK, 3089 RT5670_DMIC_1_DP_GPIO7); 3090 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3091 RT5670_GP7_PIN_MASK, 3092 RT5670_GP7_PIN_DMIC1_SDA); 3093 break; 3094 3095 default: 3096 break; 3097 } 3098 3099 switch (rt5670->pdata.dmic2_data_pin) { 3100 case RT5670_DMIC_DATA_IN3N: 3101 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3102 RT5670_DMIC_2_DP_MASK, 3103 RT5670_DMIC_2_DP_IN3N); 3104 break; 3105 3106 case RT5670_DMIC_DATA_GPIO8: 3107 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 3108 RT5670_DMIC_2_DP_MASK, 3109 RT5670_DMIC_2_DP_GPIO8); 3110 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3111 RT5670_GP8_PIN_MASK, 3112 RT5670_GP8_PIN_DMIC2_SDA); 3113 break; 3114 3115 default: 3116 break; 3117 } 3118 3119 switch (rt5670->pdata.dmic3_data_pin) { 3120 case RT5670_DMIC_DATA_GPIO5: 3121 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2, 3122 RT5670_DMIC_3_DP_MASK, 3123 RT5670_DMIC_3_DP_GPIO5); 3124 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 3125 RT5670_GP5_PIN_MASK, 3126 RT5670_GP5_PIN_DMIC3_SDA); 3127 break; 3128 3129 case RT5670_DMIC_DATA_GPIO9: 3130 case RT5670_DMIC_DATA_GPIO10: 3131 dev_err(&i2c->dev, 3132 "Always use GPIO5 as DMIC3 data pin\n"); 3133 break; 3134 3135 default: 3136 break; 3137 } 3138 3139 } 3140 3141 pm_runtime_enable(&i2c->dev); 3142 pm_request_idle(&i2c->dev); 3143 3144 ret = devm_snd_soc_register_component(&i2c->dev, 3145 &soc_component_dev_rt5670, 3146 rt5670_dai, ARRAY_SIZE(rt5670_dai)); 3147 if (ret < 0) 3148 goto err; 3149 3150 pm_runtime_put(&i2c->dev); 3151 3152 return 0; 3153 err: 3154 pm_runtime_disable(&i2c->dev); 3155 3156 return ret; 3157 } 3158 3159 static int rt5670_i2c_remove(struct i2c_client *i2c) 3160 { 3161 pm_runtime_disable(&i2c->dev); 3162 3163 return 0; 3164 } 3165 3166 static struct i2c_driver rt5670_i2c_driver = { 3167 .driver = { 3168 .name = "rt5670", 3169 .acpi_match_table = ACPI_PTR(rt5670_acpi_match), 3170 }, 3171 .probe = rt5670_i2c_probe, 3172 .remove = rt5670_i2c_remove, 3173 .id_table = rt5670_i2c_id, 3174 }; 3175 3176 module_i2c_driver(rt5670_i2c_driver); 3177 3178 MODULE_DESCRIPTION("ASoC RT5670 driver"); 3179 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 3180 MODULE_LICENSE("GPL v2"); 3181