1 /* 2 * rt5670.c -- RT5670 ALSA SoC audio codec driver 3 * 4 * Copyright 2014 Realtek Semiconductor Corp. 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/pm.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/i2c.h> 19 #include <linux/platform_device.h> 20 #include <linux/acpi.h> 21 #include <linux/spi/spi.h> 22 #include <linux/dmi.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/jack.h> 27 #include <sound/soc.h> 28 #include <sound/soc-dapm.h> 29 #include <sound/initval.h> 30 #include <sound/tlv.h> 31 #include <sound/rt5670.h> 32 33 #include "rl6231.h" 34 #include "rt5670.h" 35 #include "rt5670-dsp.h" 36 37 #define RT5670_DEVICE_ID 0x6271 38 39 #define RT5670_PR_RANGE_BASE (0xff + 1) 40 #define RT5670_PR_SPACING 0x100 41 42 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING)) 43 44 static const struct regmap_range_cfg rt5670_ranges[] = { 45 { .name = "PR", .range_min = RT5670_PR_BASE, 46 .range_max = RT5670_PR_BASE + 0xf8, 47 .selector_reg = RT5670_PRIV_INDEX, 48 .selector_mask = 0xff, 49 .selector_shift = 0x0, 50 .window_start = RT5670_PRIV_DATA, 51 .window_len = 0x1, }, 52 }; 53 54 static struct reg_default init_list[] = { 55 { RT5670_PR_BASE + 0x14, 0x9a8a }, 56 { RT5670_PR_BASE + 0x38, 0x3ba1 }, 57 { RT5670_PR_BASE + 0x3d, 0x3640 }, 58 }; 59 #define RT5670_INIT_REG_LEN ARRAY_SIZE(init_list) 60 61 static const struct reg_default rt5670_reg[] = { 62 { 0x00, 0x0000 }, 63 { 0x02, 0x8888 }, 64 { 0x03, 0x8888 }, 65 { 0x0a, 0x0001 }, 66 { 0x0b, 0x0827 }, 67 { 0x0c, 0x0000 }, 68 { 0x0d, 0x0008 }, 69 { 0x0e, 0x0000 }, 70 { 0x0f, 0x0808 }, 71 { 0x19, 0xafaf }, 72 { 0x1a, 0xafaf }, 73 { 0x1b, 0x0011 }, 74 { 0x1c, 0x2f2f }, 75 { 0x1d, 0x2f2f }, 76 { 0x1e, 0x0000 }, 77 { 0x1f, 0x2f2f }, 78 { 0x20, 0x0000 }, 79 { 0x26, 0x7860 }, 80 { 0x27, 0x7860 }, 81 { 0x28, 0x7871 }, 82 { 0x29, 0x8080 }, 83 { 0x2a, 0x5656 }, 84 { 0x2b, 0x5454 }, 85 { 0x2c, 0xaaa0 }, 86 { 0x2d, 0x0000 }, 87 { 0x2e, 0x2f2f }, 88 { 0x2f, 0x1002 }, 89 { 0x30, 0x0000 }, 90 { 0x31, 0x5f00 }, 91 { 0x32, 0x0000 }, 92 { 0x33, 0x0000 }, 93 { 0x34, 0x0000 }, 94 { 0x35, 0x0000 }, 95 { 0x36, 0x0000 }, 96 { 0x37, 0x0000 }, 97 { 0x38, 0x0000 }, 98 { 0x3b, 0x0000 }, 99 { 0x3c, 0x007f }, 100 { 0x3d, 0x0000 }, 101 { 0x3e, 0x007f }, 102 { 0x45, 0xe00f }, 103 { 0x4c, 0x5380 }, 104 { 0x4f, 0x0073 }, 105 { 0x52, 0x00d3 }, 106 { 0x53, 0xf000 }, 107 { 0x61, 0x0000 }, 108 { 0x62, 0x0001 }, 109 { 0x63, 0x00c3 }, 110 { 0x64, 0x0000 }, 111 { 0x65, 0x0001 }, 112 { 0x66, 0x0000 }, 113 { 0x6f, 0x8000 }, 114 { 0x70, 0x8000 }, 115 { 0x71, 0x8000 }, 116 { 0x72, 0x8000 }, 117 { 0x73, 0x7770 }, 118 { 0x74, 0x0e00 }, 119 { 0x75, 0x1505 }, 120 { 0x76, 0x0015 }, 121 { 0x77, 0x0c00 }, 122 { 0x78, 0x4000 }, 123 { 0x79, 0x0123 }, 124 { 0x7f, 0x1100 }, 125 { 0x80, 0x0000 }, 126 { 0x81, 0x0000 }, 127 { 0x82, 0x0000 }, 128 { 0x83, 0x0000 }, 129 { 0x84, 0x0000 }, 130 { 0x85, 0x0000 }, 131 { 0x86, 0x0004 }, 132 { 0x87, 0x0000 }, 133 { 0x88, 0x0000 }, 134 { 0x89, 0x0000 }, 135 { 0x8a, 0x0000 }, 136 { 0x8b, 0x0000 }, 137 { 0x8c, 0x0003 }, 138 { 0x8d, 0x0000 }, 139 { 0x8e, 0x0004 }, 140 { 0x8f, 0x1100 }, 141 { 0x90, 0x0646 }, 142 { 0x91, 0x0c06 }, 143 { 0x93, 0x0000 }, 144 { 0x94, 0x1270 }, 145 { 0x95, 0x1000 }, 146 { 0x97, 0x0000 }, 147 { 0x98, 0x0000 }, 148 { 0x99, 0x0000 }, 149 { 0x9a, 0x2184 }, 150 { 0x9b, 0x010a }, 151 { 0x9c, 0x0aea }, 152 { 0x9d, 0x000c }, 153 { 0x9e, 0x0400 }, 154 { 0xae, 0x7000 }, 155 { 0xaf, 0x0000 }, 156 { 0xb0, 0x7000 }, 157 { 0xb1, 0x0000 }, 158 { 0xb2, 0x0000 }, 159 { 0xb3, 0x001f }, 160 { 0xb4, 0x220c }, 161 { 0xb5, 0x1f00 }, 162 { 0xb6, 0x0000 }, 163 { 0xb7, 0x0000 }, 164 { 0xbb, 0x0000 }, 165 { 0xbc, 0x0000 }, 166 { 0xbd, 0x0000 }, 167 { 0xbe, 0x0000 }, 168 { 0xbf, 0x0000 }, 169 { 0xc0, 0x0000 }, 170 { 0xc1, 0x0000 }, 171 { 0xc2, 0x0000 }, 172 { 0xcd, 0x0000 }, 173 { 0xce, 0x0000 }, 174 { 0xcf, 0x1813 }, 175 { 0xd0, 0x0690 }, 176 { 0xd1, 0x1c17 }, 177 { 0xd3, 0xa220 }, 178 { 0xd4, 0x0000 }, 179 { 0xd6, 0x0400 }, 180 { 0xd9, 0x0809 }, 181 { 0xda, 0x0000 }, 182 { 0xdb, 0x0001 }, 183 { 0xdc, 0x0049 }, 184 { 0xdd, 0x0024 }, 185 { 0xe6, 0x8000 }, 186 { 0xe7, 0x0000 }, 187 { 0xec, 0xa200 }, 188 { 0xed, 0x0000 }, 189 { 0xee, 0xa200 }, 190 { 0xef, 0x0000 }, 191 { 0xf8, 0x0000 }, 192 { 0xf9, 0x0000 }, 193 { 0xfa, 0x8010 }, 194 { 0xfb, 0x0033 }, 195 { 0xfc, 0x0100 }, 196 }; 197 198 static bool rt5670_volatile_register(struct device *dev, unsigned int reg) 199 { 200 int i; 201 202 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 203 if ((reg >= rt5670_ranges[i].window_start && 204 reg <= rt5670_ranges[i].window_start + 205 rt5670_ranges[i].window_len) || 206 (reg >= rt5670_ranges[i].range_min && 207 reg <= rt5670_ranges[i].range_max)) { 208 return true; 209 } 210 } 211 212 switch (reg) { 213 case RT5670_RESET: 214 case RT5670_PDM_DATA_CTRL1: 215 case RT5670_PDM1_DATA_CTRL4: 216 case RT5670_PDM2_DATA_CTRL4: 217 case RT5670_PRIV_DATA: 218 case RT5670_ASRC_5: 219 case RT5670_CJ_CTRL1: 220 case RT5670_CJ_CTRL2: 221 case RT5670_CJ_CTRL3: 222 case RT5670_A_JD_CTRL1: 223 case RT5670_A_JD_CTRL2: 224 case RT5670_VAD_CTRL5: 225 case RT5670_ADC_EQ_CTRL1: 226 case RT5670_EQ_CTRL1: 227 case RT5670_ALC_CTRL_1: 228 case RT5670_IRQ_CTRL1: 229 case RT5670_IRQ_CTRL2: 230 case RT5670_INT_IRQ_ST: 231 case RT5670_IL_CMD: 232 case RT5670_DSP_CTRL1: 233 case RT5670_DSP_CTRL2: 234 case RT5670_DSP_CTRL3: 235 case RT5670_DSP_CTRL4: 236 case RT5670_DSP_CTRL5: 237 case RT5670_VENDOR_ID: 238 case RT5670_VENDOR_ID1: 239 case RT5670_VENDOR_ID2: 240 return true; 241 default: 242 return false; 243 } 244 } 245 246 static bool rt5670_readable_register(struct device *dev, unsigned int reg) 247 { 248 int i; 249 250 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { 251 if ((reg >= rt5670_ranges[i].window_start && 252 reg <= rt5670_ranges[i].window_start + 253 rt5670_ranges[i].window_len) || 254 (reg >= rt5670_ranges[i].range_min && 255 reg <= rt5670_ranges[i].range_max)) { 256 return true; 257 } 258 } 259 260 switch (reg) { 261 case RT5670_RESET: 262 case RT5670_HP_VOL: 263 case RT5670_LOUT1: 264 case RT5670_CJ_CTRL1: 265 case RT5670_CJ_CTRL2: 266 case RT5670_CJ_CTRL3: 267 case RT5670_IN2: 268 case RT5670_INL1_INR1_VOL: 269 case RT5670_DAC1_DIG_VOL: 270 case RT5670_DAC2_DIG_VOL: 271 case RT5670_DAC_CTRL: 272 case RT5670_STO1_ADC_DIG_VOL: 273 case RT5670_MONO_ADC_DIG_VOL: 274 case RT5670_STO2_ADC_DIG_VOL: 275 case RT5670_ADC_BST_VOL1: 276 case RT5670_ADC_BST_VOL2: 277 case RT5670_STO2_ADC_MIXER: 278 case RT5670_STO1_ADC_MIXER: 279 case RT5670_MONO_ADC_MIXER: 280 case RT5670_AD_DA_MIXER: 281 case RT5670_STO_DAC_MIXER: 282 case RT5670_DD_MIXER: 283 case RT5670_DIG_MIXER: 284 case RT5670_DSP_PATH1: 285 case RT5670_DSP_PATH2: 286 case RT5670_DIG_INF1_DATA: 287 case RT5670_DIG_INF2_DATA: 288 case RT5670_PDM_OUT_CTRL: 289 case RT5670_PDM_DATA_CTRL1: 290 case RT5670_PDM1_DATA_CTRL2: 291 case RT5670_PDM1_DATA_CTRL3: 292 case RT5670_PDM1_DATA_CTRL4: 293 case RT5670_PDM2_DATA_CTRL2: 294 case RT5670_PDM2_DATA_CTRL3: 295 case RT5670_PDM2_DATA_CTRL4: 296 case RT5670_REC_L1_MIXER: 297 case RT5670_REC_L2_MIXER: 298 case RT5670_REC_R1_MIXER: 299 case RT5670_REC_R2_MIXER: 300 case RT5670_HPO_MIXER: 301 case RT5670_MONO_MIXER: 302 case RT5670_OUT_L1_MIXER: 303 case RT5670_OUT_R1_MIXER: 304 case RT5670_LOUT_MIXER: 305 case RT5670_PWR_DIG1: 306 case RT5670_PWR_DIG2: 307 case RT5670_PWR_ANLG1: 308 case RT5670_PWR_ANLG2: 309 case RT5670_PWR_MIXER: 310 case RT5670_PWR_VOL: 311 case RT5670_PRIV_INDEX: 312 case RT5670_PRIV_DATA: 313 case RT5670_I2S4_SDP: 314 case RT5670_I2S1_SDP: 315 case RT5670_I2S2_SDP: 316 case RT5670_I2S3_SDP: 317 case RT5670_ADDA_CLK1: 318 case RT5670_ADDA_CLK2: 319 case RT5670_DMIC_CTRL1: 320 case RT5670_DMIC_CTRL2: 321 case RT5670_TDM_CTRL_1: 322 case RT5670_TDM_CTRL_2: 323 case RT5670_TDM_CTRL_3: 324 case RT5670_DSP_CLK: 325 case RT5670_GLB_CLK: 326 case RT5670_PLL_CTRL1: 327 case RT5670_PLL_CTRL2: 328 case RT5670_ASRC_1: 329 case RT5670_ASRC_2: 330 case RT5670_ASRC_3: 331 case RT5670_ASRC_4: 332 case RT5670_ASRC_5: 333 case RT5670_ASRC_7: 334 case RT5670_ASRC_8: 335 case RT5670_ASRC_9: 336 case RT5670_ASRC_10: 337 case RT5670_ASRC_11: 338 case RT5670_ASRC_12: 339 case RT5670_ASRC_13: 340 case RT5670_ASRC_14: 341 case RT5670_DEPOP_M1: 342 case RT5670_DEPOP_M2: 343 case RT5670_DEPOP_M3: 344 case RT5670_CHARGE_PUMP: 345 case RT5670_MICBIAS: 346 case RT5670_A_JD_CTRL1: 347 case RT5670_A_JD_CTRL2: 348 case RT5670_VAD_CTRL1: 349 case RT5670_VAD_CTRL2: 350 case RT5670_VAD_CTRL3: 351 case RT5670_VAD_CTRL4: 352 case RT5670_VAD_CTRL5: 353 case RT5670_ADC_EQ_CTRL1: 354 case RT5670_ADC_EQ_CTRL2: 355 case RT5670_EQ_CTRL1: 356 case RT5670_EQ_CTRL2: 357 case RT5670_ALC_DRC_CTRL1: 358 case RT5670_ALC_DRC_CTRL2: 359 case RT5670_ALC_CTRL_1: 360 case RT5670_ALC_CTRL_2: 361 case RT5670_ALC_CTRL_3: 362 case RT5670_JD_CTRL: 363 case RT5670_IRQ_CTRL1: 364 case RT5670_IRQ_CTRL2: 365 case RT5670_INT_IRQ_ST: 366 case RT5670_GPIO_CTRL1: 367 case RT5670_GPIO_CTRL2: 368 case RT5670_GPIO_CTRL3: 369 case RT5670_SCRABBLE_FUN: 370 case RT5670_SCRABBLE_CTRL: 371 case RT5670_BASE_BACK: 372 case RT5670_MP3_PLUS1: 373 case RT5670_MP3_PLUS2: 374 case RT5670_ADJ_HPF1: 375 case RT5670_ADJ_HPF2: 376 case RT5670_HP_CALIB_AMP_DET: 377 case RT5670_SV_ZCD1: 378 case RT5670_SV_ZCD2: 379 case RT5670_IL_CMD: 380 case RT5670_IL_CMD2: 381 case RT5670_IL_CMD3: 382 case RT5670_DRC_HL_CTRL1: 383 case RT5670_DRC_HL_CTRL2: 384 case RT5670_ADC_MONO_HP_CTRL1: 385 case RT5670_ADC_MONO_HP_CTRL2: 386 case RT5670_ADC_STO2_HP_CTRL1: 387 case RT5670_ADC_STO2_HP_CTRL2: 388 case RT5670_JD_CTRL3: 389 case RT5670_JD_CTRL4: 390 case RT5670_DIG_MISC: 391 case RT5670_DSP_CTRL1: 392 case RT5670_DSP_CTRL2: 393 case RT5670_DSP_CTRL3: 394 case RT5670_DSP_CTRL4: 395 case RT5670_DSP_CTRL5: 396 case RT5670_GEN_CTRL2: 397 case RT5670_GEN_CTRL3: 398 case RT5670_VENDOR_ID: 399 case RT5670_VENDOR_ID1: 400 case RT5670_VENDOR_ID2: 401 return true; 402 default: 403 return false; 404 } 405 } 406 407 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 408 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); 409 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 410 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); 411 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 412 413 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 414 static unsigned int bst_tlv[] = { 415 TLV_DB_RANGE_HEAD(7), 416 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 417 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 418 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 419 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 420 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 421 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 422 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0), 423 }; 424 425 /* Interface data select */ 426 static const char * const rt5670_data_select[] = { 427 "Normal", "Swap", "left copy to right", "right copy to left" 428 }; 429 430 static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA, 431 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select); 432 433 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA, 434 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select); 435 436 static const struct snd_kcontrol_new rt5670_snd_controls[] = { 437 /* Headphone Output Volume */ 438 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL, 439 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 440 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL, 441 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 442 39, 0, out_vol_tlv), 443 /* OUTPUT Control */ 444 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1, 445 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1), 446 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1, 447 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv), 448 /* DAC Digital Volume */ 449 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL, 450 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1), 451 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL, 452 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 453 175, 0, dac_vol_tlv), 454 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL, 455 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 456 175, 0, dac_vol_tlv), 457 /* IN1/IN2 Control */ 458 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1, 459 RT5670_BST_SFT1, 8, 0, bst_tlv), 460 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2, 461 RT5670_BST_SFT1, 8, 0, bst_tlv), 462 /* INL/INR Volume Control */ 463 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL, 464 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT, 465 31, 1, in_vol_tlv), 466 /* ADC Digital Volume Control */ 467 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL, 468 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), 469 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL, 470 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 471 127, 0, adc_vol_tlv), 472 473 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL, 474 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 475 127, 0, adc_vol_tlv), 476 477 /* ADC Boost Volume Control */ 478 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 479 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT, 480 3, 0, adc_bst_tlv), 481 482 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, 483 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT, 484 3, 0, adc_bst_tlv), 485 486 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum), 487 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum), 488 }; 489 490 /** 491 * set_dmic_clk - Set parameter of dmic. 492 * 493 * @w: DAPM widget. 494 * @kcontrol: The kcontrol of this widget. 495 * @event: Event id. 496 * 497 * Choose dmic clock between 1MHz and 3MHz. 498 * It is better for clock to approximate 3MHz. 499 */ 500 static int set_dmic_clk(struct snd_soc_dapm_widget *w, 501 struct snd_kcontrol *kcontrol, int event) 502 { 503 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 504 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 505 int idx = -EINVAL; 506 507 idx = rl6231_calc_dmic_clk(rt5670->sysclk); 508 509 if (idx < 0) 510 dev_err(codec->dev, "Failed to set DMIC clock\n"); 511 else 512 snd_soc_update_bits(codec, RT5670_DMIC_CTRL1, 513 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT); 514 return idx; 515 } 516 517 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, 518 struct snd_soc_dapm_widget *sink) 519 { 520 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); 521 unsigned int val; 522 523 val = snd_soc_read(codec, RT5670_GLB_CLK); 524 val &= RT5670_SCLK_SRC_MASK; 525 if (val == RT5670_SCLK_SRC_PLL1) 526 return 1; 527 else 528 return 0; 529 } 530 531 static int is_using_asrc(struct snd_soc_dapm_widget *source, 532 struct snd_soc_dapm_widget *sink) 533 { 534 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); 535 unsigned int reg, shift, val; 536 537 switch (source->shift) { 538 case 0: 539 reg = RT5670_ASRC_3; 540 shift = 0; 541 break; 542 case 1: 543 reg = RT5670_ASRC_3; 544 shift = 4; 545 break; 546 case 2: 547 reg = RT5670_ASRC_5; 548 shift = 12; 549 break; 550 case 3: 551 reg = RT5670_ASRC_2; 552 shift = 0; 553 break; 554 case 8: 555 reg = RT5670_ASRC_2; 556 shift = 4; 557 break; 558 case 9: 559 reg = RT5670_ASRC_2; 560 shift = 8; 561 break; 562 case 10: 563 reg = RT5670_ASRC_2; 564 shift = 12; 565 break; 566 default: 567 return 0; 568 } 569 570 val = (snd_soc_read(codec, reg) >> shift) & 0xf; 571 switch (val) { 572 case 1: 573 case 2: 574 case 3: 575 case 4: 576 return 1; 577 default: 578 return 0; 579 } 580 581 } 582 583 static int can_use_asrc(struct snd_soc_dapm_widget *source, 584 struct snd_soc_dapm_widget *sink) 585 { 586 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); 587 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 588 589 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384) 590 return 1; 591 592 return 0; 593 } 594 595 596 /** 597 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters 598 * @codec: SoC audio codec device. 599 * @filter_mask: mask of filters. 600 * @clk_src: clock source 601 * 602 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can 603 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to 604 * support special i2s clock format such as Intel's 100fs(100 * sampling rate). 605 * ASRC function will track i2s clock and generate a corresponding system clock 606 * for codec. This function provides an API to select the clock source for a 607 * set of filters specified by the mask. And the codec driver will turn on ASRC 608 * for these filters if ASRC is selected as their clock source. 609 */ 610 int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec, 611 unsigned int filter_mask, unsigned int clk_src) 612 { 613 unsigned int asrc2_mask = 0, asrc2_value = 0; 614 unsigned int asrc3_mask = 0, asrc3_value = 0; 615 616 if (clk_src > RT5670_CLK_SEL_SYS3) 617 return -EINVAL; 618 619 if (filter_mask & RT5670_DA_STEREO_FILTER) { 620 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK; 621 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK) 622 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT); 623 } 624 625 if (filter_mask & RT5670_DA_MONO_L_FILTER) { 626 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK; 627 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK) 628 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT); 629 } 630 631 if (filter_mask & RT5670_DA_MONO_R_FILTER) { 632 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK; 633 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK) 634 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT); 635 } 636 637 if (filter_mask & RT5670_AD_STEREO_FILTER) { 638 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK; 639 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK) 640 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT); 641 } 642 643 if (filter_mask & RT5670_AD_MONO_L_FILTER) { 644 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK; 645 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK) 646 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT); 647 } 648 649 if (filter_mask & RT5670_AD_MONO_R_FILTER) { 650 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK; 651 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK) 652 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT); 653 } 654 655 if (filter_mask & RT5670_UP_RATE_FILTER) { 656 asrc3_mask |= RT5670_UP_CLK_SEL_MASK; 657 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK) 658 | (clk_src << RT5670_UP_CLK_SEL_SFT); 659 } 660 661 if (filter_mask & RT5670_DOWN_RATE_FILTER) { 662 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK; 663 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK) 664 | (clk_src << RT5670_DOWN_CLK_SEL_SFT); 665 } 666 667 if (asrc2_mask) 668 snd_soc_update_bits(codec, RT5670_ASRC_2, 669 asrc2_mask, asrc2_value); 670 671 if (asrc3_mask) 672 snd_soc_update_bits(codec, RT5670_ASRC_3, 673 asrc3_mask, asrc3_value); 674 return 0; 675 } 676 EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src); 677 678 /* Digital Mixer */ 679 static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = { 680 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 681 RT5670_M_ADC_L1_SFT, 1, 1), 682 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 683 RT5670_M_ADC_L2_SFT, 1, 1), 684 }; 685 686 static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = { 687 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, 688 RT5670_M_ADC_R1_SFT, 1, 1), 689 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, 690 RT5670_M_ADC_R2_SFT, 1, 1), 691 }; 692 693 static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = { 694 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 695 RT5670_M_ADC_L1_SFT, 1, 1), 696 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 697 RT5670_M_ADC_L2_SFT, 1, 1), 698 }; 699 700 static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = { 701 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, 702 RT5670_M_ADC_R1_SFT, 1, 1), 703 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, 704 RT5670_M_ADC_R2_SFT, 1, 1), 705 }; 706 707 static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = { 708 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 709 RT5670_M_MONO_ADC_L1_SFT, 1, 1), 710 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 711 RT5670_M_MONO_ADC_L2_SFT, 1, 1), 712 }; 713 714 static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = { 715 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, 716 RT5670_M_MONO_ADC_R1_SFT, 1, 1), 717 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, 718 RT5670_M_MONO_ADC_R2_SFT, 1, 1), 719 }; 720 721 static const struct snd_kcontrol_new rt5670_dac_l_mix[] = { 722 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 723 RT5670_M_ADCMIX_L_SFT, 1, 1), 724 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, 725 RT5670_M_DAC1_L_SFT, 1, 1), 726 }; 727 728 static const struct snd_kcontrol_new rt5670_dac_r_mix[] = { 729 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, 730 RT5670_M_ADCMIX_R_SFT, 1, 1), 731 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, 732 RT5670_M_DAC1_R_SFT, 1, 1), 733 }; 734 735 static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = { 736 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 737 RT5670_M_DAC_L1_SFT, 1, 1), 738 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER, 739 RT5670_M_DAC_L2_SFT, 1, 1), 740 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 741 RT5670_M_DAC_R1_STO_L_SFT, 1, 1), 742 }; 743 744 static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = { 745 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, 746 RT5670_M_DAC_R1_SFT, 1, 1), 747 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER, 748 RT5670_M_DAC_R2_SFT, 1, 1), 749 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, 750 RT5670_M_DAC_L1_STO_R_SFT, 1, 1), 751 }; 752 753 static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = { 754 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER, 755 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1), 756 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 757 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1), 758 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 759 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1), 760 }; 761 762 static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = { 763 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER, 764 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1), 765 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, 766 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1), 767 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, 768 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1), 769 }; 770 771 static const struct snd_kcontrol_new rt5670_dig_l_mix[] = { 772 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER, 773 RT5670_M_STO_L_DAC_L_SFT, 1, 1), 774 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 775 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1), 776 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 777 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1), 778 }; 779 780 static const struct snd_kcontrol_new rt5670_dig_r_mix[] = { 781 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER, 782 RT5670_M_STO_R_DAC_R_SFT, 1, 1), 783 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, 784 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1), 785 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, 786 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1), 787 }; 788 789 /* Analog Input Mixer */ 790 static const struct snd_kcontrol_new rt5670_rec_l_mix[] = { 791 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER, 792 RT5670_M_IN_L_RM_L_SFT, 1, 1), 793 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER, 794 RT5670_M_BST2_RM_L_SFT, 1, 1), 795 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER, 796 RT5670_M_BST1_RM_L_SFT, 1, 1), 797 }; 798 799 static const struct snd_kcontrol_new rt5670_rec_r_mix[] = { 800 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER, 801 RT5670_M_IN_R_RM_R_SFT, 1, 1), 802 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER, 803 RT5670_M_BST2_RM_R_SFT, 1, 1), 804 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER, 805 RT5670_M_BST1_RM_R_SFT, 1, 1), 806 }; 807 808 static const struct snd_kcontrol_new rt5670_out_l_mix[] = { 809 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER, 810 RT5670_M_BST1_OM_L_SFT, 1, 1), 811 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER, 812 RT5670_M_IN_L_OM_L_SFT, 1, 1), 813 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER, 814 RT5670_M_DAC_L2_OM_L_SFT, 1, 1), 815 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER, 816 RT5670_M_DAC_L1_OM_L_SFT, 1, 1), 817 }; 818 819 static const struct snd_kcontrol_new rt5670_out_r_mix[] = { 820 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER, 821 RT5670_M_BST2_OM_R_SFT, 1, 1), 822 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER, 823 RT5670_M_IN_R_OM_R_SFT, 1, 1), 824 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER, 825 RT5670_M_DAC_R2_OM_R_SFT, 1, 1), 826 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER, 827 RT5670_M_DAC_R1_OM_R_SFT, 1, 1), 828 }; 829 830 static const struct snd_kcontrol_new rt5670_hpo_mix[] = { 831 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 832 RT5670_M_DAC1_HM_SFT, 1, 1), 833 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER, 834 RT5670_M_HPVOL_HM_SFT, 1, 1), 835 }; 836 837 static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = { 838 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 839 RT5670_M_DACL1_HML_SFT, 1, 1), 840 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER, 841 RT5670_M_INL1_HML_SFT, 1, 1), 842 }; 843 844 static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = { 845 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, 846 RT5670_M_DACR1_HMR_SFT, 1, 1), 847 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER, 848 RT5670_M_INR1_HMR_SFT, 1, 1), 849 }; 850 851 static const struct snd_kcontrol_new rt5670_lout_mix[] = { 852 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER, 853 RT5670_M_DAC_L1_LM_SFT, 1, 1), 854 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER, 855 RT5670_M_DAC_R1_LM_SFT, 1, 1), 856 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER, 857 RT5670_M_OV_L_LM_SFT, 1, 1), 858 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER, 859 RT5670_M_OV_R_LM_SFT, 1, 1), 860 }; 861 862 static const struct snd_kcontrol_new rt5670_hpl_mix[] = { 863 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER, 864 RT5670_M_DACL1_HML_SFT, 1, 1), 865 SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER, 866 RT5670_M_INL1_HML_SFT, 1, 1), 867 }; 868 869 static const struct snd_kcontrol_new rt5670_hpr_mix[] = { 870 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER, 871 RT5670_M_DACR1_HMR_SFT, 1, 1), 872 SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER, 873 RT5670_M_INR1_HMR_SFT, 1, 1), 874 }; 875 876 static const struct snd_kcontrol_new lout_l_enable_control = 877 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 878 RT5670_L_MUTE_SFT, 1, 1); 879 880 static const struct snd_kcontrol_new lout_r_enable_control = 881 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, 882 RT5670_R_MUTE_SFT, 1, 1); 883 884 /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */ 885 static const char * const rt5670_dac1_src[] = { 886 "IF1 DAC", "IF2 DAC" 887 }; 888 889 static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER, 890 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src); 891 892 static const struct snd_kcontrol_new rt5670_dac1l_mux = 893 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum); 894 895 static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER, 896 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src); 897 898 static const struct snd_kcontrol_new rt5670_dac1r_mux = 899 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum); 900 901 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ 902 /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */ 903 static const char * const rt5670_dac12_src[] = { 904 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", 905 "Bass", "VAD_ADC", "IF4 DAC" 906 }; 907 908 static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL, 909 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src); 910 911 static const struct snd_kcontrol_new rt5670_dac_l2_mux = 912 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum); 913 914 static const char * const rt5670_dacr2_src[] = { 915 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC" 916 }; 917 918 static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL, 919 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src); 920 921 static const struct snd_kcontrol_new rt5670_dac_r2_mux = 922 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum); 923 924 /*RxDP source*/ /* MX-2D [15:13] */ 925 static const char * const rt5670_rxdp_src[] = { 926 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer", 927 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1" 928 }; 929 930 static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1, 931 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src); 932 933 static const struct snd_kcontrol_new rt5670_rxdp_mux = 934 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum); 935 936 /* MX-2D [1] [0] */ 937 static const char * const rt5670_dsp_bypass_src[] = { 938 "DSP", "Bypass" 939 }; 940 941 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1, 942 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src); 943 944 static const struct snd_kcontrol_new rt5670_dsp_ul_mux = 945 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum); 946 947 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1, 948 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src); 949 950 static const struct snd_kcontrol_new rt5670_dsp_dl_mux = 951 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum); 952 953 /* Stereo2 ADC source */ 954 /* MX-26 [15] */ 955 static const char * const rt5670_stereo2_adc_lr_src[] = { 956 "L", "LR" 957 }; 958 959 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER, 960 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src); 961 962 static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux = 963 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum); 964 965 /* Stereo1 ADC source */ 966 /* MX-27 MX-26 [12] */ 967 static const char * const rt5670_stereo_adc1_src[] = { 968 "DAC MIX", "ADC" 969 }; 970 971 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER, 972 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 973 974 static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux = 975 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum); 976 977 static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux = 978 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum); 979 980 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER, 981 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); 982 983 static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux = 984 SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum); 985 986 static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux = 987 SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum); 988 989 /* MX-27 MX-26 [11] */ 990 static const char * const rt5670_stereo_adc2_src[] = { 991 "DAC MIX", "DMIC" 992 }; 993 994 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER, 995 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 996 997 static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux = 998 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum); 999 1000 static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux = 1001 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum); 1002 1003 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER, 1004 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); 1005 1006 static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux = 1007 SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum); 1008 1009 static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux = 1010 SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum); 1011 1012 /* MX-27 MX26 [10] */ 1013 static const char * const rt5670_stereo_adc_src[] = { 1014 "ADC1L ADC2R", "ADC3" 1015 }; 1016 1017 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER, 1018 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src); 1019 1020 static const struct snd_kcontrol_new rt5670_sto_adc_mux = 1021 SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum); 1022 1023 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER, 1024 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src); 1025 1026 static const struct snd_kcontrol_new rt5670_sto2_adc_mux = 1027 SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum); 1028 1029 /* MX-27 MX-26 [9:8] */ 1030 static const char * const rt5670_stereo_dmic_src[] = { 1031 "DMIC1", "DMIC2", "DMIC3" 1032 }; 1033 1034 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER, 1035 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1036 1037 static const struct snd_kcontrol_new rt5670_sto1_dmic_mux = 1038 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum); 1039 1040 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER, 1041 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); 1042 1043 static const struct snd_kcontrol_new rt5670_sto2_dmic_mux = 1044 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum); 1045 1046 /* MX-27 [0] */ 1047 static const char * const rt5670_stereo_dmic3_src[] = { 1048 "DMIC3", "PDM ADC" 1049 }; 1050 1051 static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER, 1052 RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src); 1053 1054 static const struct snd_kcontrol_new rt5670_sto_dmic3_mux = 1055 SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum); 1056 1057 /* Mono ADC source */ 1058 /* MX-28 [12] */ 1059 static const char * const rt5670_mono_adc_l1_src[] = { 1060 "Mono DAC MIXL", "ADC1" 1061 }; 1062 1063 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER, 1064 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src); 1065 1066 static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux = 1067 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum); 1068 /* MX-28 [11] */ 1069 static const char * const rt5670_mono_adc_l2_src[] = { 1070 "Mono DAC MIXL", "DMIC" 1071 }; 1072 1073 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER, 1074 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src); 1075 1076 static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux = 1077 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum); 1078 1079 /* MX-28 [9:8] */ 1080 static const char * const rt5670_mono_dmic_src[] = { 1081 "DMIC1", "DMIC2", "DMIC3" 1082 }; 1083 1084 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER, 1085 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src); 1086 1087 static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux = 1088 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum); 1089 /* MX-28 [1:0] */ 1090 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER, 1091 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src); 1092 1093 static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux = 1094 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum); 1095 /* MX-28 [4] */ 1096 static const char * const rt5670_mono_adc_r1_src[] = { 1097 "Mono DAC MIXR", "ADC2" 1098 }; 1099 1100 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER, 1101 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src); 1102 1103 static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux = 1104 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum); 1105 /* MX-28 [3] */ 1106 static const char * const rt5670_mono_adc_r2_src[] = { 1107 "Mono DAC MIXR", "DMIC" 1108 }; 1109 1110 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER, 1111 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src); 1112 1113 static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux = 1114 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum); 1115 1116 /* MX-2D [3:2] */ 1117 static const char * const rt5670_txdp_slot_src[] = { 1118 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7" 1119 }; 1120 1121 static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1, 1122 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src); 1123 1124 static const struct snd_kcontrol_new rt5670_txdp_slot_mux = 1125 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum); 1126 1127 /* MX-2F [15] */ 1128 static const char * const rt5670_if1_adc2_in_src[] = { 1129 "IF_ADC2", "VAD_ADC" 1130 }; 1131 1132 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA, 1133 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src); 1134 1135 static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux = 1136 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum); 1137 1138 /* MX-2F [14:12] */ 1139 static const char * const rt5670_if2_adc_in_src[] = { 1140 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC" 1141 }; 1142 1143 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA, 1144 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src); 1145 1146 static const struct snd_kcontrol_new rt5670_if2_adc_in_mux = 1147 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum); 1148 1149 /* MX-30 [5:4] */ 1150 static const char * const rt5670_if4_adc_in_src[] = { 1151 "IF_ADC1", "IF_ADC2", "IF_ADC3" 1152 }; 1153 1154 static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA, 1155 RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src); 1156 1157 static const struct snd_kcontrol_new rt5670_if4_adc_in_mux = 1158 SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum); 1159 1160 /* MX-31 [15] [13] [11] [9] */ 1161 static const char * const rt5670_pdm_src[] = { 1162 "Mono DAC", "Stereo DAC" 1163 }; 1164 1165 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL, 1166 RT5670_PDM1_L_SFT, rt5670_pdm_src); 1167 1168 static const struct snd_kcontrol_new rt5670_pdm1_l_mux = 1169 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum); 1170 1171 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL, 1172 RT5670_PDM1_R_SFT, rt5670_pdm_src); 1173 1174 static const struct snd_kcontrol_new rt5670_pdm1_r_mux = 1175 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum); 1176 1177 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL, 1178 RT5670_PDM2_L_SFT, rt5670_pdm_src); 1179 1180 static const struct snd_kcontrol_new rt5670_pdm2_l_mux = 1181 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum); 1182 1183 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL, 1184 RT5670_PDM2_R_SFT, rt5670_pdm_src); 1185 1186 static const struct snd_kcontrol_new rt5670_pdm2_r_mux = 1187 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum); 1188 1189 /* MX-FA [12] */ 1190 static const char * const rt5670_if1_adc1_in1_src[] = { 1191 "IF_ADC1", "IF1_ADC3" 1192 }; 1193 1194 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC, 1195 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src); 1196 1197 static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux = 1198 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum); 1199 1200 /* MX-FA [11] */ 1201 static const char * const rt5670_if1_adc1_in2_src[] = { 1202 "IF1_ADC1_IN1", "IF1_ADC4" 1203 }; 1204 1205 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC, 1206 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src); 1207 1208 static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux = 1209 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum); 1210 1211 /* MX-FA [10] */ 1212 static const char * const rt5670_if1_adc2_in1_src[] = { 1213 "IF1_ADC2_IN", "IF1_ADC4" 1214 }; 1215 1216 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC, 1217 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src); 1218 1219 static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux = 1220 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum); 1221 1222 /* MX-9D [9:8] */ 1223 static const char * const rt5670_vad_adc_src[] = { 1224 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L" 1225 }; 1226 1227 static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4, 1228 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src); 1229 1230 static const struct snd_kcontrol_new rt5670_vad_adc_mux = 1231 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum); 1232 1233 static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w, 1234 struct snd_kcontrol *kcontrol, int event) 1235 { 1236 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 1237 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 1238 1239 switch (event) { 1240 case SND_SOC_DAPM_POST_PMU: 1241 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP, 1242 RT5670_PM_HP_MASK, RT5670_PM_HP_HV); 1243 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1244 0x0400, 0x0400); 1245 /* headphone amp power on */ 1246 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 1247 RT5670_PWR_HA | RT5670_PWR_FV1 | 1248 RT5670_PWR_FV2, RT5670_PWR_HA | 1249 RT5670_PWR_FV1 | RT5670_PWR_FV2); 1250 /* depop parameters */ 1251 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100); 1252 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009); 1253 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1254 RT5670_HP_DCC_INT1, 0x9f00); 1255 mdelay(20); 1256 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1257 break; 1258 case SND_SOC_DAPM_PRE_PMD: 1259 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004); 1260 msleep(30); 1261 break; 1262 default: 1263 return 0; 1264 } 1265 1266 return 0; 1267 } 1268 1269 static int rt5670_hp_event(struct snd_soc_dapm_widget *w, 1270 struct snd_kcontrol *kcontrol, int event) 1271 { 1272 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 1273 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 1274 1275 switch (event) { 1276 case SND_SOC_DAPM_POST_PMU: 1277 /* headphone unmute sequence */ 1278 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1279 RT5670_MAMP_INT_REG2, 0xb400); 1280 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1281 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d); 1282 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1283 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, 1284 0x0300, 0x0300); 1285 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1286 RT5670_L_MUTE | RT5670_R_MUTE, 0); 1287 msleep(80); 1288 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1289 break; 1290 1291 case SND_SOC_DAPM_PRE_PMD: 1292 /* headphone mute sequence */ 1293 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1294 RT5670_MAMP_INT_REG2, 0xb400); 1295 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); 1296 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d); 1297 mdelay(10); 1298 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); 1299 mdelay(10); 1300 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, 1301 RT5670_L_MUTE | RT5670_R_MUTE, 1302 RT5670_L_MUTE | RT5670_R_MUTE); 1303 msleep(20); 1304 regmap_update_bits(rt5670->regmap, 1305 RT5670_GEN_CTRL2, 0x0300, 0x0); 1306 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); 1307 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707); 1308 regmap_write(rt5670->regmap, RT5670_PR_BASE + 1309 RT5670_MAMP_INT_REG2, 0xfc00); 1310 break; 1311 1312 default: 1313 return 0; 1314 } 1315 1316 return 0; 1317 } 1318 1319 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w, 1320 struct snd_kcontrol *kcontrol, int event) 1321 { 1322 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 1323 1324 switch (event) { 1325 case SND_SOC_DAPM_POST_PMU: 1326 snd_soc_update_bits(codec, RT5670_PWR_ANLG2, 1327 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P); 1328 break; 1329 1330 case SND_SOC_DAPM_PRE_PMD: 1331 snd_soc_update_bits(codec, RT5670_PWR_ANLG2, 1332 RT5670_PWR_BST1_P, 0); 1333 break; 1334 1335 default: 1336 return 0; 1337 } 1338 1339 return 0; 1340 } 1341 1342 static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, 1343 struct snd_kcontrol *kcontrol, int event) 1344 { 1345 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 1346 1347 switch (event) { 1348 case SND_SOC_DAPM_POST_PMU: 1349 snd_soc_update_bits(codec, RT5670_PWR_ANLG2, 1350 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P); 1351 break; 1352 1353 case SND_SOC_DAPM_PRE_PMD: 1354 snd_soc_update_bits(codec, RT5670_PWR_ANLG2, 1355 RT5670_PWR_BST2_P, 0); 1356 break; 1357 1358 default: 1359 return 0; 1360 } 1361 1362 return 0; 1363 } 1364 1365 static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { 1366 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, 1367 RT5670_PWR_PLL_BIT, 0, NULL, 0), 1368 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2, 1369 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0), 1370 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL, 1371 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0), 1372 1373 /* ASRC */ 1374 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1, 1375 11, 0, NULL, 0), 1376 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1, 1377 12, 0, NULL, 0), 1378 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1, 1379 10, 0, NULL, 0), 1380 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1, 1381 9, 0, NULL, 0), 1382 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1, 1383 8, 0, NULL, 0), 1384 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1, 1385 7, 0, NULL, 0), 1386 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1, 1387 6, 0, NULL, 0), 1388 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1, 1389 5, 0, NULL, 0), 1390 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1, 1391 4, 0, NULL, 0), 1392 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1, 1393 3, 0, NULL, 0), 1394 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1, 1395 2, 0, NULL, 0), 1396 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1, 1397 1, 0, NULL, 0), 1398 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1, 1399 0, 0, NULL, 0), 1400 1401 /* Input Side */ 1402 /* micbias */ 1403 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2, 1404 RT5670_PWR_MB1_BIT, 0, NULL, 0), 1405 1406 /* Input Lines */ 1407 SND_SOC_DAPM_INPUT("DMIC L1"), 1408 SND_SOC_DAPM_INPUT("DMIC R1"), 1409 SND_SOC_DAPM_INPUT("DMIC L2"), 1410 SND_SOC_DAPM_INPUT("DMIC R2"), 1411 SND_SOC_DAPM_INPUT("DMIC L3"), 1412 SND_SOC_DAPM_INPUT("DMIC R3"), 1413 1414 SND_SOC_DAPM_INPUT("IN1P"), 1415 SND_SOC_DAPM_INPUT("IN1N"), 1416 SND_SOC_DAPM_INPUT("IN2P"), 1417 SND_SOC_DAPM_INPUT("IN2N"), 1418 1419 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1420 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1421 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1422 1423 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, 1424 set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 1425 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1, 1426 RT5670_DMIC_1_EN_SFT, 0, NULL, 0), 1427 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1, 1428 RT5670_DMIC_2_EN_SFT, 0, NULL, 0), 1429 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1, 1430 RT5670_DMIC_3_EN_SFT, 0, NULL, 0), 1431 /* Boost */ 1432 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT, 1433 0, NULL, 0, rt5670_bst1_event, 1434 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1435 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT, 1436 0, NULL, 0, rt5670_bst2_event, 1437 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1438 /* Input Volume */ 1439 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL, 1440 RT5670_PWR_IN_L_BIT, 0, NULL, 0), 1441 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL, 1442 RT5670_PWR_IN_R_BIT, 0, NULL, 0), 1443 1444 /* REC Mixer */ 1445 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0, 1446 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)), 1447 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0, 1448 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)), 1449 /* ADCs */ 1450 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), 1451 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0), 1452 1453 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0), 1454 1455 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1, 1456 RT5670_PWR_ADC_L_BIT, 0, NULL, 0), 1457 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1, 1458 RT5670_PWR_ADC_R_BIT, 0, NULL, 0), 1459 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE + 1460 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0), 1461 /* ADC Mux */ 1462 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, 1463 &rt5670_sto1_dmic_mux), 1464 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1465 &rt5670_sto_adc_l2_mux), 1466 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1467 &rt5670_sto_adc_r2_mux), 1468 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1469 &rt5670_sto_adc_l1_mux), 1470 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1471 &rt5670_sto_adc_r1_mux), 1472 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0, 1473 &rt5670_sto2_dmic_mux), 1474 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1475 &rt5670_sto2_adc_l2_mux), 1476 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1477 &rt5670_sto2_adc_r2_mux), 1478 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1479 &rt5670_sto2_adc_l1_mux), 1480 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1481 &rt5670_sto2_adc_r1_mux), 1482 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0, 1483 &rt5670_sto2_adc_lr_mux), 1484 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, 1485 &rt5670_mono_dmic_l_mux), 1486 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, 1487 &rt5670_mono_dmic_r_mux), 1488 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1489 &rt5670_mono_adc_l2_mux), 1490 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1491 &rt5670_mono_adc_l1_mux), 1492 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1493 &rt5670_mono_adc_r1_mux), 1494 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1495 &rt5670_mono_adc_r2_mux), 1496 /* ADC Mixer */ 1497 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2, 1498 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0), 1499 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2, 1500 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0), 1501 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL, 1502 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix, 1503 ARRAY_SIZE(rt5670_sto1_adc_l_mix)), 1504 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL, 1505 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix, 1506 ARRAY_SIZE(rt5670_sto1_adc_r_mix)), 1507 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0, 1508 rt5670_sto2_adc_l_mix, 1509 ARRAY_SIZE(rt5670_sto2_adc_l_mix)), 1510 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0, 1511 rt5670_sto2_adc_r_mix, 1512 ARRAY_SIZE(rt5670_sto2_adc_r_mix)), 1513 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2, 1514 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0), 1515 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL, 1516 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix, 1517 ARRAY_SIZE(rt5670_mono_adc_l_mix)), 1518 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2, 1519 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0), 1520 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL, 1521 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix, 1522 ARRAY_SIZE(rt5670_mono_adc_r_mix)), 1523 1524 /* ADC PGA */ 1525 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1526 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1527 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1528 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1529 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1530 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1531 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1532 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1533 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1534 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1535 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1536 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1537 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1538 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1539 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1540 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0), 1541 1542 /* DSP */ 1543 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1544 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0), 1545 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0), 1546 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1547 1548 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0, 1549 &rt5670_txdp_slot_mux), 1550 1551 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0, 1552 &rt5670_dsp_ul_mux), 1553 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0, 1554 &rt5670_dsp_dl_mux), 1555 1556 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0, 1557 &rt5670_rxdp_mux), 1558 1559 /* IF2 Mux */ 1560 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0, 1561 &rt5670_if2_adc_in_mux), 1562 1563 /* Digital Interface */ 1564 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1, 1565 RT5670_PWR_I2S1_BIT, 0, NULL, 0), 1566 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1567 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1568 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1569 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1570 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1571 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1572 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1573 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1574 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1575 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1, 1576 RT5670_PWR_I2S2_BIT, 0, NULL, 0), 1577 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1578 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1579 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1580 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1581 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1582 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1583 1584 /* Digital Interface Select */ 1585 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0, 1586 &rt5670_if1_adc1_in1_mux), 1587 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0, 1588 &rt5670_if1_adc1_in2_mux), 1589 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0, 1590 &rt5670_if1_adc2_in_mux), 1591 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0, 1592 &rt5670_if1_adc2_in1_mux), 1593 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0, 1594 &rt5670_vad_adc_mux), 1595 1596 /* Audio Interface */ 1597 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 1598 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1599 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1600 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, 1601 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1), 1602 1603 /* Audio DSP */ 1604 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), 1605 1606 /* Output Side */ 1607 /* DAC mixer before sound effect */ 1608 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, 1609 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)), 1610 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, 1611 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)), 1612 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1613 1614 /* DAC2 channel Mux */ 1615 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, 1616 &rt5670_dac_l2_mux), 1617 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, 1618 &rt5670_dac_r2_mux), 1619 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1, 1620 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0), 1621 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1, 1622 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0), 1623 1624 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux), 1625 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux), 1626 1627 /* DAC Mixer */ 1628 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2, 1629 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0), 1630 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2, 1631 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0), 1632 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2, 1633 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0), 1634 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 1635 rt5670_sto_dac_l_mix, 1636 ARRAY_SIZE(rt5670_sto_dac_l_mix)), 1637 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 1638 rt5670_sto_dac_r_mix, 1639 ARRAY_SIZE(rt5670_sto_dac_r_mix)), 1640 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, 1641 rt5670_mono_dac_l_mix, 1642 ARRAY_SIZE(rt5670_mono_dac_l_mix)), 1643 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, 1644 rt5670_mono_dac_r_mix, 1645 ARRAY_SIZE(rt5670_mono_dac_r_mix)), 1646 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1647 rt5670_dig_l_mix, 1648 ARRAY_SIZE(rt5670_dig_l_mix)), 1649 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1650 rt5670_dig_r_mix, 1651 ARRAY_SIZE(rt5670_dig_r_mix)), 1652 1653 /* DACs */ 1654 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1, 1655 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0), 1656 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1, 1657 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0), 1658 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), 1659 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), 1660 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1, 1661 RT5670_PWR_DAC_L2_BIT, 0), 1662 1663 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1, 1664 RT5670_PWR_DAC_R2_BIT, 0), 1665 /* OUT Mixer */ 1666 1667 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT, 1668 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)), 1669 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT, 1670 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)), 1671 /* Ouput Volume */ 1672 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL, 1673 RT5670_PWR_HV_L_BIT, 0, 1674 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)), 1675 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL, 1676 RT5670_PWR_HV_R_BIT, 0, 1677 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)), 1678 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), 1679 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), 1680 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), 1681 1682 /* HPO/LOUT/Mono Mixer */ 1683 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, 1684 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)), 1685 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT, 1686 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)), 1687 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0, 1688 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU | 1689 SND_SOC_DAPM_PRE_PMD), 1690 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1, 1691 RT5670_PWR_HP_L_BIT, 0, NULL, 0), 1692 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1, 1693 RT5670_PWR_HP_R_BIT, 0, NULL, 0), 1694 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, 1695 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD | 1696 SND_SOC_DAPM_POST_PMU), 1697 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, 1698 &lout_l_enable_control), 1699 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, 1700 &lout_r_enable_control), 1701 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0), 1702 1703 /* PDM */ 1704 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2, 1705 RT5670_PWR_PDM1_BIT, 0, NULL, 0), 1706 1707 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL, 1708 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux), 1709 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL, 1710 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux), 1711 1712 /* Output Lines */ 1713 SND_SOC_DAPM_OUTPUT("HPOL"), 1714 SND_SOC_DAPM_OUTPUT("HPOR"), 1715 SND_SOC_DAPM_OUTPUT("LOUTL"), 1716 SND_SOC_DAPM_OUTPUT("LOUTR"), 1717 }; 1718 1719 static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = { 1720 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2, 1721 RT5670_PWR_PDM2_BIT, 0, NULL, 0), 1722 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL, 1723 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux), 1724 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL, 1725 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux), 1726 SND_SOC_DAPM_OUTPUT("PDM1L"), 1727 SND_SOC_DAPM_OUTPUT("PDM1R"), 1728 SND_SOC_DAPM_OUTPUT("PDM2L"), 1729 SND_SOC_DAPM_OUTPUT("PDM2R"), 1730 }; 1731 1732 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = { 1733 SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0), 1734 SND_SOC_DAPM_OUTPUT("SPOLP"), 1735 SND_SOC_DAPM_OUTPUT("SPOLN"), 1736 SND_SOC_DAPM_OUTPUT("SPORP"), 1737 SND_SOC_DAPM_OUTPUT("SPORN"), 1738 }; 1739 1740 static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { 1741 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, 1742 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, 1743 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc }, 1744 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc }, 1745 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc }, 1746 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc }, 1747 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc }, 1748 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc }, 1749 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc }, 1750 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc }, 1751 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc }, 1752 1753 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc}, 1754 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc}, 1755 1756 { "DMIC1", NULL, "DMIC L1" }, 1757 { "DMIC1", NULL, "DMIC R1" }, 1758 { "DMIC2", NULL, "DMIC L2" }, 1759 { "DMIC2", NULL, "DMIC R2" }, 1760 { "DMIC3", NULL, "DMIC L3" }, 1761 { "DMIC3", NULL, "DMIC R3" }, 1762 1763 { "BST1", NULL, "IN1P" }, 1764 { "BST1", NULL, "IN1N" }, 1765 { "BST1", NULL, "Mic Det Power" }, 1766 { "BST2", NULL, "IN2P" }, 1767 { "BST2", NULL, "IN2N" }, 1768 1769 { "INL VOL", NULL, "IN2P" }, 1770 { "INR VOL", NULL, "IN2N" }, 1771 1772 { "RECMIXL", "INL Switch", "INL VOL" }, 1773 { "RECMIXL", "BST2 Switch", "BST2" }, 1774 { "RECMIXL", "BST1 Switch", "BST1" }, 1775 1776 { "RECMIXR", "INR Switch", "INR VOL" }, 1777 { "RECMIXR", "BST2 Switch", "BST2" }, 1778 { "RECMIXR", "BST1 Switch", "BST1" }, 1779 1780 { "ADC 1", NULL, "RECMIXL" }, 1781 { "ADC 1", NULL, "ADC 1 power" }, 1782 { "ADC 1", NULL, "ADC clock" }, 1783 { "ADC 2", NULL, "RECMIXR" }, 1784 { "ADC 2", NULL, "ADC 2 power" }, 1785 { "ADC 2", NULL, "ADC clock" }, 1786 1787 { "DMIC L1", NULL, "DMIC CLK" }, 1788 { "DMIC L1", NULL, "DMIC1 Power" }, 1789 { "DMIC R1", NULL, "DMIC CLK" }, 1790 { "DMIC R1", NULL, "DMIC1 Power" }, 1791 { "DMIC L2", NULL, "DMIC CLK" }, 1792 { "DMIC L2", NULL, "DMIC2 Power" }, 1793 { "DMIC R2", NULL, "DMIC CLK" }, 1794 { "DMIC R2", NULL, "DMIC2 Power" }, 1795 { "DMIC L3", NULL, "DMIC CLK" }, 1796 { "DMIC L3", NULL, "DMIC3 Power" }, 1797 { "DMIC R3", NULL, "DMIC CLK" }, 1798 { "DMIC R3", NULL, "DMIC3 Power" }, 1799 1800 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, 1801 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, 1802 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" }, 1803 1804 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" }, 1805 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" }, 1806 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" }, 1807 1808 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, 1809 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, 1810 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" }, 1811 1812 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, 1813 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, 1814 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" }, 1815 1816 { "ADC 1_2", NULL, "ADC 1" }, 1817 { "ADC 1_2", NULL, "ADC 2" }, 1818 1819 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1820 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 1821 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" }, 1822 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 1823 1824 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" }, 1825 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 1826 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1827 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 1828 1829 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, 1830 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 1831 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 1832 { "Mono ADC L1 Mux", "ADC1", "ADC 1" }, 1833 1834 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 1835 { "Mono ADC R1 Mux", "ADC2", "ADC 2" }, 1836 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, 1837 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 1838 1839 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, 1840 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, 1841 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, 1842 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, 1843 1844 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, 1845 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" }, 1846 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1847 1848 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, 1849 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" }, 1850 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1851 1852 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, 1853 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, 1854 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" }, 1855 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1856 1857 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, 1858 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, 1859 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" }, 1860 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1861 1862 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 1863 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 1864 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" }, 1865 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 1866 1867 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" }, 1868 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 1869 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" }, 1870 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 1871 1872 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" }, 1873 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" }, 1874 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" }, 1875 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" }, 1876 1877 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" }, 1878 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" }, 1879 1880 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" }, 1881 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" }, 1882 1883 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" }, 1884 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" }, 1885 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1886 1887 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" }, 1888 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" }, 1889 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 1890 1891 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, 1892 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, 1893 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, 1894 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" }, 1895 1896 { "VAD_ADC", NULL, "VAD ADC Mux" }, 1897 1898 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, 1899 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, 1900 { "IF_ADC2", NULL, "Mono ADC MIXL" }, 1901 { "IF_ADC2", NULL, "Mono ADC MIXR" }, 1902 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" }, 1903 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" }, 1904 1905 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" }, 1906 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" }, 1907 1908 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" }, 1909 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" }, 1910 1911 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" }, 1912 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" }, 1913 1914 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" }, 1915 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" }, 1916 1917 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" }, 1918 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" }, 1919 1920 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" }, 1921 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" }, 1922 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" }, 1923 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" }, 1924 { "Mono ADC MIX", NULL, "Mono ADC MIXL" }, 1925 { "Mono ADC MIX", NULL, "Mono ADC MIXR" }, 1926 1927 { "RxDP Mux", "IF2 DAC", "IF2 DAC" }, 1928 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" }, 1929 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" }, 1930 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" }, 1931 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" }, 1932 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" }, 1933 { "RxDP Mux", "DAC1", "DAC MIX" }, 1934 1935 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" }, 1936 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" }, 1937 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" }, 1938 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" }, 1939 1940 { "DSP UL Mux", "Bypass", "TDM Data Mux" }, 1941 { "DSP UL Mux", NULL, "I2S DSP" }, 1942 { "DSP DL Mux", "Bypass", "RxDP Mux" }, 1943 { "DSP DL Mux", NULL, "I2S DSP" }, 1944 1945 { "TxDP_ADC_L", NULL, "DSP UL Mux" }, 1946 { "TxDP_ADC_R", NULL, "DSP UL Mux" }, 1947 { "TxDC_DAC", NULL, "DSP DL Mux" }, 1948 1949 { "TxDP_ADC", NULL, "TxDP_ADC_L" }, 1950 { "TxDP_ADC", NULL, "TxDP_ADC_R" }, 1951 1952 { "IF1 ADC", NULL, "I2S1" }, 1953 { "IF1 ADC", NULL, "IF1_ADC1" }, 1954 { "IF1 ADC", NULL, "IF1_ADC2" }, 1955 { "IF1 ADC", NULL, "IF_ADC3" }, 1956 { "IF1 ADC", NULL, "TxDP_ADC" }, 1957 1958 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, 1959 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, 1960 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" }, 1961 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" }, 1962 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" }, 1963 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, 1964 1965 { "IF2 ADC L", NULL, "IF2 ADC Mux" }, 1966 { "IF2 ADC R", NULL, "IF2 ADC Mux" }, 1967 1968 { "IF2 ADC", NULL, "I2S2" }, 1969 { "IF2 ADC", NULL, "IF2 ADC L" }, 1970 { "IF2 ADC", NULL, "IF2 ADC R" }, 1971 1972 { "AIF1TX", NULL, "IF1 ADC" }, 1973 { "AIF2TX", NULL, "IF2 ADC" }, 1974 1975 { "IF1 DAC1", NULL, "AIF1RX" }, 1976 { "IF1 DAC2", NULL, "AIF1RX" }, 1977 { "IF2 DAC", NULL, "AIF2RX" }, 1978 1979 { "IF1 DAC1", NULL, "I2S1" }, 1980 { "IF1 DAC2", NULL, "I2S1" }, 1981 { "IF2 DAC", NULL, "I2S2" }, 1982 1983 { "IF1 DAC2 L", NULL, "IF1 DAC2" }, 1984 { "IF1 DAC2 R", NULL, "IF1 DAC2" }, 1985 { "IF1 DAC1 L", NULL, "IF1 DAC1" }, 1986 { "IF1 DAC1 R", NULL, "IF1 DAC1" }, 1987 { "IF2 DAC L", NULL, "IF2 DAC" }, 1988 { "IF2 DAC R", NULL, "IF2 DAC" }, 1989 1990 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" }, 1991 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, 1992 1993 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" }, 1994 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, 1995 1996 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, 1997 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, 1998 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" }, 1999 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, 2000 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, 2001 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" }, 2002 2003 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2004 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2005 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, 2006 2007 { "DAC MIX", NULL, "DAC1 MIXL" }, 2008 { "DAC MIX", NULL, "DAC1 MIXR" }, 2009 2010 { "Audio DSP", NULL, "DAC1 MIXL" }, 2011 { "Audio DSP", NULL, "DAC1 MIXR" }, 2012 2013 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" }, 2014 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, 2015 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" }, 2016 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, 2017 { "DAC L2 Volume", NULL, "DAC L2 Mux" }, 2018 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" }, 2019 2020 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" }, 2021 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, 2022 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" }, 2023 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" }, 2024 { "DAC R2 Volume", NULL, "DAC R2 Mux" }, 2025 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" }, 2026 2027 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2028 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, 2029 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2030 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" }, 2031 { "Stereo DAC MIXL", NULL, "DAC L1 Power" }, 2032 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2033 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, 2034 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2035 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" }, 2036 { "Stereo DAC MIXR", NULL, "DAC R1 Power" }, 2037 2038 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 2039 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2040 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2041 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" }, 2042 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 2043 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2044 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2045 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" }, 2046 2047 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, 2048 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 2049 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 2050 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, 2051 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 2052 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 2053 2054 { "DAC L1", NULL, "DAC L1 Power" }, 2055 { "DAC L1", NULL, "Stereo DAC MIXL" }, 2056 { "DAC R1", NULL, "DAC R1 Power" }, 2057 { "DAC R1", NULL, "Stereo DAC MIXR" }, 2058 { "DAC L2", NULL, "Mono DAC MIXL" }, 2059 { "DAC R2", NULL, "Mono DAC MIXR" }, 2060 2061 { "OUT MIXL", "BST1 Switch", "BST1" }, 2062 { "OUT MIXL", "INL Switch", "INL VOL" }, 2063 { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, 2064 { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, 2065 2066 { "OUT MIXR", "BST2 Switch", "BST2" }, 2067 { "OUT MIXR", "INR Switch", "INR VOL" }, 2068 { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, 2069 { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, 2070 2071 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, 2072 { "HPOVOL MIXL", "INL Switch", "INL VOL" }, 2073 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, 2074 { "HPOVOL MIXR", "INR Switch", "INR VOL" }, 2075 2076 { "DAC 2", NULL, "DAC L2" }, 2077 { "DAC 2", NULL, "DAC R2" }, 2078 { "DAC 1", NULL, "DAC L1" }, 2079 { "DAC 1", NULL, "DAC R1" }, 2080 { "HPOVOL", NULL, "HPOVOL MIXL" }, 2081 { "HPOVOL", NULL, "HPOVOL MIXR" }, 2082 { "HPO MIX", "DAC1 Switch", "DAC 1" }, 2083 { "HPO MIX", "HPVOL Switch", "HPOVOL" }, 2084 2085 { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, 2086 { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, 2087 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, 2088 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, 2089 2090 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2091 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2092 { "PDM1 L Mux", NULL, "PDM1 Power" }, 2093 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2094 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2095 { "PDM1 R Mux", NULL, "PDM1 Power" }, 2096 2097 { "HP Amp", NULL, "HPO MIX" }, 2098 { "HP Amp", NULL, "Mic Det Power" }, 2099 { "HPOL", NULL, "HP Amp" }, 2100 { "HPOL", NULL, "HP L Amp" }, 2101 { "HPOL", NULL, "Improve HP Amp Drv" }, 2102 { "HPOR", NULL, "HP Amp" }, 2103 { "HPOR", NULL, "HP R Amp" }, 2104 { "HPOR", NULL, "Improve HP Amp Drv" }, 2105 2106 { "LOUT Amp", NULL, "LOUT MIX" }, 2107 { "LOUT L Playback", "Switch", "LOUT Amp" }, 2108 { "LOUT R Playback", "Switch", "LOUT Amp" }, 2109 { "LOUTL", NULL, "LOUT L Playback" }, 2110 { "LOUTR", NULL, "LOUT R Playback" }, 2111 { "LOUTL", NULL, "Improve HP Amp Drv" }, 2112 { "LOUTR", NULL, "Improve HP Amp Drv" }, 2113 }; 2114 2115 static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = { 2116 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 2117 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" }, 2118 { "PDM2 L Mux", NULL, "PDM2 Power" }, 2119 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 2120 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" }, 2121 { "PDM2 R Mux", NULL, "PDM2 Power" }, 2122 { "PDM1L", NULL, "PDM1 L Mux" }, 2123 { "PDM1R", NULL, "PDM1 R Mux" }, 2124 { "PDM2L", NULL, "PDM2 L Mux" }, 2125 { "PDM2R", NULL, "PDM2 R Mux" }, 2126 }; 2127 2128 static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = { 2129 { "SPO Amp", NULL, "PDM1 L Mux" }, 2130 { "SPO Amp", NULL, "PDM1 R Mux" }, 2131 { "SPOLP", NULL, "SPO Amp" }, 2132 { "SPOLN", NULL, "SPO Amp" }, 2133 { "SPORP", NULL, "SPO Amp" }, 2134 { "SPORN", NULL, "SPO Amp" }, 2135 }; 2136 2137 static int rt5670_hw_params(struct snd_pcm_substream *substream, 2138 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 2139 { 2140 struct snd_soc_codec *codec = dai->codec; 2141 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2142 unsigned int val_len = 0, val_clk, mask_clk; 2143 int pre_div, bclk_ms, frame_size; 2144 2145 rt5670->lrck[dai->id] = params_rate(params); 2146 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]); 2147 if (pre_div < 0) { 2148 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n", 2149 rt5670->lrck[dai->id], dai->id); 2150 return -EINVAL; 2151 } 2152 frame_size = snd_soc_params_to_frame_size(params); 2153 if (frame_size < 0) { 2154 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); 2155 return -EINVAL; 2156 } 2157 bclk_ms = frame_size > 32; 2158 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms); 2159 2160 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 2161 rt5670->bclk[dai->id], rt5670->lrck[dai->id]); 2162 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 2163 bclk_ms, pre_div, dai->id); 2164 2165 switch (params_width(params)) { 2166 case 16: 2167 break; 2168 case 20: 2169 val_len |= RT5670_I2S_DL_20; 2170 break; 2171 case 24: 2172 val_len |= RT5670_I2S_DL_24; 2173 break; 2174 case 8: 2175 val_len |= RT5670_I2S_DL_8; 2176 break; 2177 default: 2178 return -EINVAL; 2179 } 2180 2181 switch (dai->id) { 2182 case RT5670_AIF1: 2183 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK; 2184 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT | 2185 pre_div << RT5670_I2S_PD1_SFT; 2186 snd_soc_update_bits(codec, RT5670_I2S1_SDP, 2187 RT5670_I2S_DL_MASK, val_len); 2188 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk); 2189 break; 2190 case RT5670_AIF2: 2191 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK; 2192 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT | 2193 pre_div << RT5670_I2S_PD2_SFT; 2194 snd_soc_update_bits(codec, RT5670_I2S2_SDP, 2195 RT5670_I2S_DL_MASK, val_len); 2196 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk); 2197 break; 2198 default: 2199 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 2200 return -EINVAL; 2201 } 2202 2203 return 0; 2204 } 2205 2206 static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 2207 { 2208 struct snd_soc_codec *codec = dai->codec; 2209 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2210 unsigned int reg_val = 0; 2211 2212 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2213 case SND_SOC_DAIFMT_CBM_CFM: 2214 rt5670->master[dai->id] = 1; 2215 break; 2216 case SND_SOC_DAIFMT_CBS_CFS: 2217 reg_val |= RT5670_I2S_MS_S; 2218 rt5670->master[dai->id] = 0; 2219 break; 2220 default: 2221 return -EINVAL; 2222 } 2223 2224 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2225 case SND_SOC_DAIFMT_NB_NF: 2226 break; 2227 case SND_SOC_DAIFMT_IB_NF: 2228 reg_val |= RT5670_I2S_BP_INV; 2229 break; 2230 default: 2231 return -EINVAL; 2232 } 2233 2234 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 2235 case SND_SOC_DAIFMT_I2S: 2236 break; 2237 case SND_SOC_DAIFMT_LEFT_J: 2238 reg_val |= RT5670_I2S_DF_LEFT; 2239 break; 2240 case SND_SOC_DAIFMT_DSP_A: 2241 reg_val |= RT5670_I2S_DF_PCM_A; 2242 break; 2243 case SND_SOC_DAIFMT_DSP_B: 2244 reg_val |= RT5670_I2S_DF_PCM_B; 2245 break; 2246 default: 2247 return -EINVAL; 2248 } 2249 2250 switch (dai->id) { 2251 case RT5670_AIF1: 2252 snd_soc_update_bits(codec, RT5670_I2S1_SDP, 2253 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2254 RT5670_I2S_DF_MASK, reg_val); 2255 break; 2256 case RT5670_AIF2: 2257 snd_soc_update_bits(codec, RT5670_I2S2_SDP, 2258 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | 2259 RT5670_I2S_DF_MASK, reg_val); 2260 break; 2261 default: 2262 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 2263 return -EINVAL; 2264 } 2265 return 0; 2266 } 2267 2268 static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai, 2269 int clk_id, unsigned int freq, int dir) 2270 { 2271 struct snd_soc_codec *codec = dai->codec; 2272 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2273 unsigned int reg_val = 0; 2274 2275 if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src) 2276 return 0; 2277 2278 if (rt5670->pdata.jd_mode) { 2279 if (clk_id == RT5670_SCLK_S_PLL1) 2280 snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL1"); 2281 else 2282 snd_soc_dapm_disable_pin(&codec->dapm, "PLL1"); 2283 snd_soc_dapm_sync(&codec->dapm); 2284 } 2285 switch (clk_id) { 2286 case RT5670_SCLK_S_MCLK: 2287 reg_val |= RT5670_SCLK_SRC_MCLK; 2288 break; 2289 case RT5670_SCLK_S_PLL1: 2290 reg_val |= RT5670_SCLK_SRC_PLL1; 2291 break; 2292 case RT5670_SCLK_S_RCCLK: 2293 reg_val |= RT5670_SCLK_SRC_RCCLK; 2294 break; 2295 default: 2296 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); 2297 return -EINVAL; 2298 } 2299 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2300 RT5670_SCLK_SRC_MASK, reg_val); 2301 rt5670->sysclk = freq; 2302 rt5670->sysclk_src = clk_id; 2303 2304 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); 2305 2306 return 0; 2307 } 2308 2309 static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 2310 unsigned int freq_in, unsigned int freq_out) 2311 { 2312 struct snd_soc_codec *codec = dai->codec; 2313 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2314 struct rl6231_pll_code pll_code; 2315 int ret; 2316 2317 if (source == rt5670->pll_src && freq_in == rt5670->pll_in && 2318 freq_out == rt5670->pll_out) 2319 return 0; 2320 2321 if (!freq_in || !freq_out) { 2322 dev_dbg(codec->dev, "PLL disabled\n"); 2323 2324 rt5670->pll_in = 0; 2325 rt5670->pll_out = 0; 2326 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2327 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK); 2328 return 0; 2329 } 2330 2331 switch (source) { 2332 case RT5670_PLL1_S_MCLK: 2333 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2334 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK); 2335 break; 2336 case RT5670_PLL1_S_BCLK1: 2337 case RT5670_PLL1_S_BCLK2: 2338 case RT5670_PLL1_S_BCLK3: 2339 case RT5670_PLL1_S_BCLK4: 2340 switch (dai->id) { 2341 case RT5670_AIF1: 2342 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2343 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1); 2344 break; 2345 case RT5670_AIF2: 2346 snd_soc_update_bits(codec, RT5670_GLB_CLK, 2347 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2); 2348 break; 2349 default: 2350 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 2351 return -EINVAL; 2352 } 2353 break; 2354 default: 2355 dev_err(codec->dev, "Unknown PLL source %d\n", source); 2356 return -EINVAL; 2357 } 2358 2359 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 2360 if (ret < 0) { 2361 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); 2362 return ret; 2363 } 2364 2365 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", 2366 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 2367 pll_code.n_code, pll_code.k_code); 2368 2369 snd_soc_write(codec, RT5670_PLL_CTRL1, 2370 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code); 2371 snd_soc_write(codec, RT5670_PLL_CTRL2, 2372 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT | 2373 pll_code.m_bp << RT5670_PLL_M_BP_SFT); 2374 2375 rt5670->pll_in = freq_in; 2376 rt5670->pll_out = freq_out; 2377 rt5670->pll_src = source; 2378 2379 return 0; 2380 } 2381 2382 static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 2383 unsigned int rx_mask, int slots, int slot_width) 2384 { 2385 struct snd_soc_codec *codec = dai->codec; 2386 unsigned int val = 0; 2387 2388 if (rx_mask || tx_mask) 2389 val |= (1 << 14); 2390 2391 switch (slots) { 2392 case 4: 2393 val |= (1 << 12); 2394 break; 2395 case 6: 2396 val |= (2 << 12); 2397 break; 2398 case 8: 2399 val |= (3 << 12); 2400 break; 2401 case 2: 2402 break; 2403 default: 2404 return -EINVAL; 2405 } 2406 2407 switch (slot_width) { 2408 case 20: 2409 val |= (1 << 10); 2410 break; 2411 case 24: 2412 val |= (2 << 10); 2413 break; 2414 case 32: 2415 val |= (3 << 10); 2416 break; 2417 case 16: 2418 break; 2419 default: 2420 return -EINVAL; 2421 } 2422 2423 snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val); 2424 2425 return 0; 2426 } 2427 2428 static int rt5670_set_bias_level(struct snd_soc_codec *codec, 2429 enum snd_soc_bias_level level) 2430 { 2431 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2432 2433 switch (level) { 2434 case SND_SOC_BIAS_PREPARE: 2435 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) { 2436 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2437 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2438 RT5670_PWR_BG | RT5670_PWR_VREF2, 2439 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2440 RT5670_PWR_BG | RT5670_PWR_VREF2); 2441 mdelay(10); 2442 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2443 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2444 RT5670_PWR_FV1 | RT5670_PWR_FV2); 2445 snd_soc_update_bits(codec, RT5670_CHARGE_PUMP, 2446 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK, 2447 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS); 2448 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1); 2449 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2450 RT5670_LDO_SEL_MASK, 0x3); 2451 } 2452 break; 2453 case SND_SOC_BIAS_STANDBY: 2454 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2455 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 | 2456 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2457 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2458 RT5670_LDO_SEL_MASK, 0x1); 2459 break; 2460 case SND_SOC_BIAS_OFF: 2461 if (rt5670->pdata.jd_mode) 2462 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2463 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2464 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2465 RT5670_PWR_FV1 | RT5670_PWR_FV2, 2466 RT5670_PWR_MB | RT5670_PWR_BG); 2467 else 2468 snd_soc_update_bits(codec, RT5670_PWR_ANLG1, 2469 RT5670_PWR_VREF1 | RT5670_PWR_MB | 2470 RT5670_PWR_BG | RT5670_PWR_VREF2 | 2471 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); 2472 2473 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0); 2474 break; 2475 2476 default: 2477 break; 2478 } 2479 codec->dapm.bias_level = level; 2480 2481 return 0; 2482 } 2483 2484 static int rt5670_probe(struct snd_soc_codec *codec) 2485 { 2486 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2487 2488 switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) { 2489 case RT5670_ID_5670: 2490 case RT5670_ID_5671: 2491 snd_soc_dapm_new_controls(&codec->dapm, 2492 rt5670_specific_dapm_widgets, 2493 ARRAY_SIZE(rt5670_specific_dapm_widgets)); 2494 snd_soc_dapm_add_routes(&codec->dapm, 2495 rt5670_specific_dapm_routes, 2496 ARRAY_SIZE(rt5670_specific_dapm_routes)); 2497 break; 2498 case RT5670_ID_5672: 2499 snd_soc_dapm_new_controls(&codec->dapm, 2500 rt5672_specific_dapm_widgets, 2501 ARRAY_SIZE(rt5672_specific_dapm_widgets)); 2502 snd_soc_dapm_add_routes(&codec->dapm, 2503 rt5672_specific_dapm_routes, 2504 ARRAY_SIZE(rt5672_specific_dapm_routes)); 2505 break; 2506 default: 2507 dev_err(codec->dev, 2508 "The driver is for RT5670 RT5671 or RT5672 only\n"); 2509 return -ENODEV; 2510 } 2511 rt5670->codec = codec; 2512 2513 return 0; 2514 } 2515 2516 static int rt5670_remove(struct snd_soc_codec *codec) 2517 { 2518 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2519 2520 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2521 return 0; 2522 } 2523 2524 #ifdef CONFIG_PM 2525 static int rt5670_suspend(struct snd_soc_codec *codec) 2526 { 2527 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2528 2529 regcache_cache_only(rt5670->regmap, true); 2530 regcache_mark_dirty(rt5670->regmap); 2531 return 0; 2532 } 2533 2534 static int rt5670_resume(struct snd_soc_codec *codec) 2535 { 2536 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); 2537 2538 regcache_cache_only(rt5670->regmap, false); 2539 regcache_sync(rt5670->regmap); 2540 2541 return 0; 2542 } 2543 #else 2544 #define rt5670_suspend NULL 2545 #define rt5670_resume NULL 2546 #endif 2547 2548 #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000 2549 #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 2550 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 2551 2552 static struct snd_soc_dai_ops rt5670_aif_dai_ops = { 2553 .hw_params = rt5670_hw_params, 2554 .set_fmt = rt5670_set_dai_fmt, 2555 .set_sysclk = rt5670_set_dai_sysclk, 2556 .set_tdm_slot = rt5670_set_tdm_slot, 2557 .set_pll = rt5670_set_dai_pll, 2558 }; 2559 2560 static struct snd_soc_dai_driver rt5670_dai[] = { 2561 { 2562 .name = "rt5670-aif1", 2563 .id = RT5670_AIF1, 2564 .playback = { 2565 .stream_name = "AIF1 Playback", 2566 .channels_min = 1, 2567 .channels_max = 2, 2568 .rates = RT5670_STEREO_RATES, 2569 .formats = RT5670_FORMATS, 2570 }, 2571 .capture = { 2572 .stream_name = "AIF1 Capture", 2573 .channels_min = 1, 2574 .channels_max = 2, 2575 .rates = RT5670_STEREO_RATES, 2576 .formats = RT5670_FORMATS, 2577 }, 2578 .ops = &rt5670_aif_dai_ops, 2579 }, 2580 { 2581 .name = "rt5670-aif2", 2582 .id = RT5670_AIF2, 2583 .playback = { 2584 .stream_name = "AIF2 Playback", 2585 .channels_min = 1, 2586 .channels_max = 2, 2587 .rates = RT5670_STEREO_RATES, 2588 .formats = RT5670_FORMATS, 2589 }, 2590 .capture = { 2591 .stream_name = "AIF2 Capture", 2592 .channels_min = 1, 2593 .channels_max = 2, 2594 .rates = RT5670_STEREO_RATES, 2595 .formats = RT5670_FORMATS, 2596 }, 2597 .ops = &rt5670_aif_dai_ops, 2598 }, 2599 }; 2600 2601 static struct snd_soc_codec_driver soc_codec_dev_rt5670 = { 2602 .probe = rt5670_probe, 2603 .remove = rt5670_remove, 2604 .suspend = rt5670_suspend, 2605 .resume = rt5670_resume, 2606 .set_bias_level = rt5670_set_bias_level, 2607 .idle_bias_off = true, 2608 .controls = rt5670_snd_controls, 2609 .num_controls = ARRAY_SIZE(rt5670_snd_controls), 2610 .dapm_widgets = rt5670_dapm_widgets, 2611 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets), 2612 .dapm_routes = rt5670_dapm_routes, 2613 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes), 2614 }; 2615 2616 static const struct regmap_config rt5670_regmap = { 2617 .reg_bits = 8, 2618 .val_bits = 16, 2619 .use_single_rw = true, 2620 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) * 2621 RT5670_PR_SPACING), 2622 .volatile_reg = rt5670_volatile_register, 2623 .readable_reg = rt5670_readable_register, 2624 .cache_type = REGCACHE_RBTREE, 2625 .reg_defaults = rt5670_reg, 2626 .num_reg_defaults = ARRAY_SIZE(rt5670_reg), 2627 .ranges = rt5670_ranges, 2628 .num_ranges = ARRAY_SIZE(rt5670_ranges), 2629 }; 2630 2631 static const struct i2c_device_id rt5670_i2c_id[] = { 2632 { "rt5670", 0 }, 2633 { "rt5671", 0 }, 2634 { "rt5672", 0 }, 2635 { } 2636 }; 2637 MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); 2638 2639 #ifdef CONFIG_ACPI 2640 static struct acpi_device_id rt5670_acpi_match[] = { 2641 { "10EC5670", 0}, 2642 { }, 2643 }; 2644 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match); 2645 #endif 2646 2647 static const struct dmi_system_id dmi_platform_intel_braswell[] = { 2648 { 2649 .ident = "Intel Braswell", 2650 .matches = { 2651 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), 2652 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"), 2653 }, 2654 }, 2655 {} 2656 }; 2657 2658 static int rt5670_i2c_probe(struct i2c_client *i2c, 2659 const struct i2c_device_id *id) 2660 { 2661 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev); 2662 struct rt5670_priv *rt5670; 2663 int ret; 2664 unsigned int val; 2665 2666 rt5670 = devm_kzalloc(&i2c->dev, 2667 sizeof(struct rt5670_priv), 2668 GFP_KERNEL); 2669 if (NULL == rt5670) 2670 return -ENOMEM; 2671 2672 i2c_set_clientdata(i2c, rt5670); 2673 2674 if (pdata) 2675 rt5670->pdata = *pdata; 2676 2677 if (dmi_check_system(dmi_platform_intel_braswell)) { 2678 rt5670->pdata.dmic_en = true; 2679 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P; 2680 rt5670->pdata.jd_mode = 1; 2681 } 2682 2683 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); 2684 if (IS_ERR(rt5670->regmap)) { 2685 ret = PTR_ERR(rt5670->regmap); 2686 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 2687 ret); 2688 return ret; 2689 } 2690 2691 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val); 2692 if (val != RT5670_DEVICE_ID) { 2693 dev_err(&i2c->dev, 2694 "Device with ID register %x is not rt5670/72\n", val); 2695 return -ENODEV; 2696 } 2697 2698 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2699 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 2700 RT5670_PWR_HP_L | RT5670_PWR_HP_R | 2701 RT5670_PWR_VREF2, RT5670_PWR_VREF2); 2702 msleep(100); 2703 2704 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2705 2706 ret = regmap_register_patch(rt5670->regmap, init_list, 2707 ARRAY_SIZE(init_list)); 2708 if (ret != 0) 2709 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 2710 2711 if (rt5670->pdata.in2_diff) 2712 regmap_update_bits(rt5670->regmap, RT5670_IN2, 2713 RT5670_IN_DF2, RT5670_IN_DF2); 2714 2715 if (i2c->irq) { 2716 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2717 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); 2718 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, 2719 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); 2720 2721 } 2722 2723 if (rt5670->pdata.jd_mode) { 2724 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK, 2725 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK); 2726 rt5670->sysclk = 0; 2727 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK; 2728 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, 2729 RT5670_PWR_MB, RT5670_PWR_MB); 2730 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2, 2731 RT5670_PWR_JD1, RT5670_PWR_JD1); 2732 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1, 2733 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN); 2734 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3, 2735 RT5670_JD_TRI_CBJ_SEL_MASK | 2736 RT5670_JD_TRI_HPO_SEL_MASK, 2737 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1); 2738 switch (rt5670->pdata.jd_mode) { 2739 case 1: 2740 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 2741 RT5670_JD1_MODE_MASK, 2742 RT5670_JD1_MODE_0); 2743 break; 2744 case 2: 2745 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 2746 RT5670_JD1_MODE_MASK, 2747 RT5670_JD1_MODE_1); 2748 break; 2749 case 3: 2750 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, 2751 RT5670_JD1_MODE_MASK, 2752 RT5670_JD1_MODE_2); 2753 break; 2754 default: 2755 break; 2756 } 2757 } 2758 2759 if (rt5670->pdata.dmic_en) { 2760 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2761 RT5670_GP2_PIN_MASK, 2762 RT5670_GP2_PIN_DMIC1_SCL); 2763 2764 switch (rt5670->pdata.dmic1_data_pin) { 2765 case RT5670_DMIC_DATA_IN2P: 2766 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 2767 RT5670_DMIC_1_DP_MASK, 2768 RT5670_DMIC_1_DP_IN2P); 2769 break; 2770 2771 case RT5670_DMIC_DATA_GPIO6: 2772 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 2773 RT5670_DMIC_1_DP_MASK, 2774 RT5670_DMIC_1_DP_GPIO6); 2775 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2776 RT5670_GP6_PIN_MASK, 2777 RT5670_GP6_PIN_DMIC1_SDA); 2778 break; 2779 2780 case RT5670_DMIC_DATA_GPIO7: 2781 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 2782 RT5670_DMIC_1_DP_MASK, 2783 RT5670_DMIC_1_DP_GPIO7); 2784 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2785 RT5670_GP7_PIN_MASK, 2786 RT5670_GP7_PIN_DMIC1_SDA); 2787 break; 2788 2789 default: 2790 break; 2791 } 2792 2793 switch (rt5670->pdata.dmic2_data_pin) { 2794 case RT5670_DMIC_DATA_IN3N: 2795 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 2796 RT5670_DMIC_2_DP_MASK, 2797 RT5670_DMIC_2_DP_IN3N); 2798 break; 2799 2800 case RT5670_DMIC_DATA_GPIO8: 2801 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, 2802 RT5670_DMIC_2_DP_MASK, 2803 RT5670_DMIC_2_DP_GPIO8); 2804 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2805 RT5670_GP8_PIN_MASK, 2806 RT5670_GP8_PIN_DMIC2_SDA); 2807 break; 2808 2809 default: 2810 break; 2811 } 2812 2813 switch (rt5670->pdata.dmic3_data_pin) { 2814 case RT5670_DMIC_DATA_GPIO5: 2815 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2, 2816 RT5670_DMIC_3_DP_MASK, 2817 RT5670_DMIC_3_DP_GPIO5); 2818 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, 2819 RT5670_GP5_PIN_MASK, 2820 RT5670_GP5_PIN_DMIC3_SDA); 2821 break; 2822 2823 case RT5670_DMIC_DATA_GPIO9: 2824 case RT5670_DMIC_DATA_GPIO10: 2825 dev_err(&i2c->dev, 2826 "Always use GPIO5 as DMIC3 data pin\n"); 2827 break; 2828 2829 default: 2830 break; 2831 } 2832 2833 } 2834 2835 pm_runtime_enable(&i2c->dev); 2836 pm_request_idle(&i2c->dev); 2837 2838 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670, 2839 rt5670_dai, ARRAY_SIZE(rt5670_dai)); 2840 if (ret < 0) 2841 goto err; 2842 2843 pm_runtime_put(&i2c->dev); 2844 2845 return 0; 2846 err: 2847 pm_runtime_disable(&i2c->dev); 2848 2849 return ret; 2850 } 2851 2852 static int rt5670_i2c_remove(struct i2c_client *i2c) 2853 { 2854 pm_runtime_disable(&i2c->dev); 2855 snd_soc_unregister_codec(&i2c->dev); 2856 2857 return 0; 2858 } 2859 2860 static struct i2c_driver rt5670_i2c_driver = { 2861 .driver = { 2862 .name = "rt5670", 2863 .owner = THIS_MODULE, 2864 .acpi_match_table = ACPI_PTR(rt5670_acpi_match), 2865 }, 2866 .probe = rt5670_i2c_probe, 2867 .remove = rt5670_i2c_remove, 2868 .id_table = rt5670_i2c_id, 2869 }; 2870 2871 module_i2c_driver(rt5670_i2c_driver); 2872 2873 MODULE_DESCRIPTION("ASoC RT5670 driver"); 2874 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 2875 MODULE_LICENSE("GPL v2"); 2876