15e8351deSBard Liao /* 25e8351deSBard Liao * rt5670-dsp.h -- RT5670 ALSA SoC DSP driver 35e8351deSBard Liao * 45e8351deSBard Liao * Copyright 2014 Realtek Microelectronics 55e8351deSBard Liao * Author: Bard Liao <bardliao@realtek.com> 65e8351deSBard Liao * 75e8351deSBard Liao * This program is free software; you can redistribute it and/or modify 85e8351deSBard Liao * it under the terms of the GNU General Public License version 2 as 95e8351deSBard Liao * published by the Free Software Foundation. 105e8351deSBard Liao */ 115e8351deSBard Liao 125e8351deSBard Liao #ifndef __RT5670_DSP_H__ 135e8351deSBard Liao #define __RT5670_DSP_H__ 145e8351deSBard Liao 155e8351deSBard Liao #define RT5670_DSP_CTRL1 0xe0 165e8351deSBard Liao #define RT5670_DSP_CTRL2 0xe1 175e8351deSBard Liao #define RT5670_DSP_CTRL3 0xe2 185e8351deSBard Liao #define RT5670_DSP_CTRL4 0xe3 195e8351deSBard Liao #define RT5670_DSP_CTRL5 0xe4 205e8351deSBard Liao 215e8351deSBard Liao /* DSP Control 1 (0xe0) */ 225e8351deSBard Liao #define RT5670_DSP_CMD_MASK (0xff << 8) 235e8351deSBard Liao #define RT5670_DSP_CMD_PE (0x0d << 8) /* Patch Entry */ 245e8351deSBard Liao #define RT5670_DSP_CMD_MW (0x3b << 8) /* Memory Write */ 255e8351deSBard Liao #define RT5670_DSP_CMD_MR (0x37 << 8) /* Memory Read */ 265e8351deSBard Liao #define RT5670_DSP_CMD_RR (0x60 << 8) /* Register Read */ 275e8351deSBard Liao #define RT5670_DSP_CMD_RW (0x68 << 8) /* Register Write */ 285e8351deSBard Liao #define RT5670_DSP_REG_DATHI (0x26 << 8) /* High Data Addr */ 295e8351deSBard Liao #define RT5670_DSP_REG_DATLO (0x25 << 8) /* Low Data Addr */ 305e8351deSBard Liao #define RT5670_DSP_CLK_MASK (0x3 << 6) 315e8351deSBard Liao #define RT5670_DSP_CLK_SFT 6 325e8351deSBard Liao #define RT5670_DSP_CLK_768K (0x0 << 6) 335e8351deSBard Liao #define RT5670_DSP_CLK_384K (0x1 << 6) 345e8351deSBard Liao #define RT5670_DSP_CLK_192K (0x2 << 6) 355e8351deSBard Liao #define RT5670_DSP_CLK_96K (0x3 << 6) 365e8351deSBard Liao #define RT5670_DSP_BUSY_MASK (0x1 << 5) 375e8351deSBard Liao #define RT5670_DSP_RW_MASK (0x1 << 4) 385e8351deSBard Liao #define RT5670_DSP_DL_MASK (0x3 << 2) 395e8351deSBard Liao #define RT5670_DSP_DL_0 (0x0 << 2) 405e8351deSBard Liao #define RT5670_DSP_DL_1 (0x1 << 2) 415e8351deSBard Liao #define RT5670_DSP_DL_2 (0x2 << 2) 425e8351deSBard Liao #define RT5670_DSP_DL_3 (0x3 << 2) 435e8351deSBard Liao #define RT5670_DSP_I2C_AL_16 (0x1 << 1) 445e8351deSBard Liao #define RT5670_DSP_CMD_EN (0x1) 455e8351deSBard Liao 465e8351deSBard Liao struct rt5670_dsp_param { 475e8351deSBard Liao u16 cmd_fmt; 485e8351deSBard Liao u16 addr; 495e8351deSBard Liao u16 data; 505e8351deSBard Liao u8 cmd; 515e8351deSBard Liao }; 525e8351deSBard Liao 535e8351deSBard Liao #endif /* __RT5670_DSP_H__ */ 545e8351deSBard Liao 55