1 /* 2 * rt5651.c -- RT5651 ALSA SoC audio codec driver 3 * 4 * Copyright 2014 Realtek Semiconductor Corp. 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/pm.h> 17 #include <linux/i2c.h> 18 #include <linux/regmap.h> 19 #include <linux/platform_device.h> 20 #include <linux/spi/spi.h> 21 #include <linux/acpi.h> 22 #include <sound/core.h> 23 #include <sound/pcm.h> 24 #include <sound/pcm_params.h> 25 #include <sound/soc.h> 26 #include <sound/soc-dapm.h> 27 #include <sound/initval.h> 28 #include <sound/tlv.h> 29 30 #include "rl6231.h" 31 #include "rt5651.h" 32 33 #define RT5651_DEVICE_ID_VALUE 0x6281 34 35 #define RT5651_PR_RANGE_BASE (0xff + 1) 36 #define RT5651_PR_SPACING 0x100 37 38 #define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING)) 39 40 static const struct regmap_range_cfg rt5651_ranges[] = { 41 { .name = "PR", .range_min = RT5651_PR_BASE, 42 .range_max = RT5651_PR_BASE + 0xb4, 43 .selector_reg = RT5651_PRIV_INDEX, 44 .selector_mask = 0xff, 45 .selector_shift = 0x0, 46 .window_start = RT5651_PRIV_DATA, 47 .window_len = 0x1, }, 48 }; 49 50 static const struct reg_sequence init_list[] = { 51 {RT5651_PR_BASE + 0x3d, 0x3e00}, 52 }; 53 54 static const struct reg_default rt5651_reg[] = { 55 { 0x00, 0x0000 }, 56 { 0x02, 0xc8c8 }, 57 { 0x03, 0xc8c8 }, 58 { 0x05, 0x0000 }, 59 { 0x0d, 0x0000 }, 60 { 0x0e, 0x0000 }, 61 { 0x0f, 0x0808 }, 62 { 0x10, 0x0808 }, 63 { 0x19, 0xafaf }, 64 { 0x1a, 0xafaf }, 65 { 0x1b, 0x0c00 }, 66 { 0x1c, 0x2f2f }, 67 { 0x1d, 0x2f2f }, 68 { 0x1e, 0x0000 }, 69 { 0x27, 0x7860 }, 70 { 0x28, 0x7070 }, 71 { 0x29, 0x8080 }, 72 { 0x2a, 0x5252 }, 73 { 0x2b, 0x5454 }, 74 { 0x2f, 0x0000 }, 75 { 0x30, 0x5000 }, 76 { 0x3b, 0x0000 }, 77 { 0x3c, 0x006f }, 78 { 0x3d, 0x0000 }, 79 { 0x3e, 0x006f }, 80 { 0x45, 0x6000 }, 81 { 0x4d, 0x0000 }, 82 { 0x4e, 0x0000 }, 83 { 0x4f, 0x0279 }, 84 { 0x50, 0x0000 }, 85 { 0x51, 0x0000 }, 86 { 0x52, 0x0279 }, 87 { 0x53, 0xf000 }, 88 { 0x61, 0x0000 }, 89 { 0x62, 0x0000 }, 90 { 0x63, 0x00c0 }, 91 { 0x64, 0x0000 }, 92 { 0x65, 0x0000 }, 93 { 0x66, 0x0000 }, 94 { 0x70, 0x8000 }, 95 { 0x71, 0x8000 }, 96 { 0x73, 0x1104 }, 97 { 0x74, 0x0c00 }, 98 { 0x75, 0x1400 }, 99 { 0x77, 0x0c00 }, 100 { 0x78, 0x4000 }, 101 { 0x79, 0x0123 }, 102 { 0x80, 0x0000 }, 103 { 0x81, 0x0000 }, 104 { 0x82, 0x0000 }, 105 { 0x83, 0x0800 }, 106 { 0x84, 0x0000 }, 107 { 0x85, 0x0008 }, 108 { 0x89, 0x0000 }, 109 { 0x8e, 0x0004 }, 110 { 0x8f, 0x1100 }, 111 { 0x90, 0x0000 }, 112 { 0x93, 0x2000 }, 113 { 0x94, 0x0200 }, 114 { 0xb0, 0x2080 }, 115 { 0xb1, 0x0000 }, 116 { 0xb4, 0x2206 }, 117 { 0xb5, 0x1f00 }, 118 { 0xb6, 0x0000 }, 119 { 0xbb, 0x0000 }, 120 { 0xbc, 0x0000 }, 121 { 0xbd, 0x0000 }, 122 { 0xbe, 0x0000 }, 123 { 0xbf, 0x0000 }, 124 { 0xc0, 0x0400 }, 125 { 0xc1, 0x0000 }, 126 { 0xc2, 0x0000 }, 127 { 0xcf, 0x0013 }, 128 { 0xd0, 0x0680 }, 129 { 0xd1, 0x1c17 }, 130 { 0xd3, 0xb320 }, 131 { 0xd9, 0x0809 }, 132 { 0xfa, 0x0010 }, 133 { 0xfe, 0x10ec }, 134 { 0xff, 0x6281 }, 135 }; 136 137 static bool rt5651_volatile_register(struct device *dev, unsigned int reg) 138 { 139 int i; 140 141 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) { 142 if ((reg >= rt5651_ranges[i].window_start && 143 reg <= rt5651_ranges[i].window_start + 144 rt5651_ranges[i].window_len) || 145 (reg >= rt5651_ranges[i].range_min && 146 reg <= rt5651_ranges[i].range_max)) { 147 return true; 148 } 149 } 150 151 switch (reg) { 152 case RT5651_RESET: 153 case RT5651_PRIV_DATA: 154 case RT5651_EQ_CTRL1: 155 case RT5651_ALC_1: 156 case RT5651_IRQ_CTRL2: 157 case RT5651_INT_IRQ_ST: 158 case RT5651_PGM_REG_ARR1: 159 case RT5651_PGM_REG_ARR3: 160 case RT5651_VENDOR_ID: 161 case RT5651_DEVICE_ID: 162 return true; 163 default: 164 return false; 165 } 166 } 167 168 static bool rt5651_readable_register(struct device *dev, unsigned int reg) 169 { 170 int i; 171 172 for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) { 173 if ((reg >= rt5651_ranges[i].window_start && 174 reg <= rt5651_ranges[i].window_start + 175 rt5651_ranges[i].window_len) || 176 (reg >= rt5651_ranges[i].range_min && 177 reg <= rt5651_ranges[i].range_max)) { 178 return true; 179 } 180 } 181 182 switch (reg) { 183 case RT5651_RESET: 184 case RT5651_VERSION_ID: 185 case RT5651_VENDOR_ID: 186 case RT5651_DEVICE_ID: 187 case RT5651_HP_VOL: 188 case RT5651_LOUT_CTRL1: 189 case RT5651_LOUT_CTRL2: 190 case RT5651_IN1_IN2: 191 case RT5651_IN3: 192 case RT5651_INL1_INR1_VOL: 193 case RT5651_INL2_INR2_VOL: 194 case RT5651_DAC1_DIG_VOL: 195 case RT5651_DAC2_DIG_VOL: 196 case RT5651_DAC2_CTRL: 197 case RT5651_ADC_DIG_VOL: 198 case RT5651_ADC_DATA: 199 case RT5651_ADC_BST_VOL: 200 case RT5651_STO1_ADC_MIXER: 201 case RT5651_STO2_ADC_MIXER: 202 case RT5651_AD_DA_MIXER: 203 case RT5651_STO_DAC_MIXER: 204 case RT5651_DD_MIXER: 205 case RT5651_DIG_INF_DATA: 206 case RT5651_PDM_CTL: 207 case RT5651_REC_L1_MIXER: 208 case RT5651_REC_L2_MIXER: 209 case RT5651_REC_R1_MIXER: 210 case RT5651_REC_R2_MIXER: 211 case RT5651_HPO_MIXER: 212 case RT5651_OUT_L1_MIXER: 213 case RT5651_OUT_L2_MIXER: 214 case RT5651_OUT_L3_MIXER: 215 case RT5651_OUT_R1_MIXER: 216 case RT5651_OUT_R2_MIXER: 217 case RT5651_OUT_R3_MIXER: 218 case RT5651_LOUT_MIXER: 219 case RT5651_PWR_DIG1: 220 case RT5651_PWR_DIG2: 221 case RT5651_PWR_ANLG1: 222 case RT5651_PWR_ANLG2: 223 case RT5651_PWR_MIXER: 224 case RT5651_PWR_VOL: 225 case RT5651_PRIV_INDEX: 226 case RT5651_PRIV_DATA: 227 case RT5651_I2S1_SDP: 228 case RT5651_I2S2_SDP: 229 case RT5651_ADDA_CLK1: 230 case RT5651_ADDA_CLK2: 231 case RT5651_DMIC: 232 case RT5651_TDM_CTL_1: 233 case RT5651_TDM_CTL_2: 234 case RT5651_TDM_CTL_3: 235 case RT5651_GLB_CLK: 236 case RT5651_PLL_CTRL1: 237 case RT5651_PLL_CTRL2: 238 case RT5651_PLL_MODE_1: 239 case RT5651_PLL_MODE_2: 240 case RT5651_PLL_MODE_3: 241 case RT5651_PLL_MODE_4: 242 case RT5651_PLL_MODE_5: 243 case RT5651_PLL_MODE_6: 244 case RT5651_PLL_MODE_7: 245 case RT5651_DEPOP_M1: 246 case RT5651_DEPOP_M2: 247 case RT5651_DEPOP_M3: 248 case RT5651_CHARGE_PUMP: 249 case RT5651_MICBIAS: 250 case RT5651_A_JD_CTL1: 251 case RT5651_EQ_CTRL1: 252 case RT5651_EQ_CTRL2: 253 case RT5651_ALC_1: 254 case RT5651_ALC_2: 255 case RT5651_ALC_3: 256 case RT5651_JD_CTRL1: 257 case RT5651_JD_CTRL2: 258 case RT5651_IRQ_CTRL1: 259 case RT5651_IRQ_CTRL2: 260 case RT5651_INT_IRQ_ST: 261 case RT5651_GPIO_CTRL1: 262 case RT5651_GPIO_CTRL2: 263 case RT5651_GPIO_CTRL3: 264 case RT5651_PGM_REG_ARR1: 265 case RT5651_PGM_REG_ARR2: 266 case RT5651_PGM_REG_ARR3: 267 case RT5651_PGM_REG_ARR4: 268 case RT5651_PGM_REG_ARR5: 269 case RT5651_SCB_FUNC: 270 case RT5651_SCB_CTRL: 271 case RT5651_BASE_BACK: 272 case RT5651_MP3_PLUS1: 273 case RT5651_MP3_PLUS2: 274 case RT5651_ADJ_HPF_CTRL1: 275 case RT5651_ADJ_HPF_CTRL2: 276 case RT5651_HP_CALIB_AMP_DET: 277 case RT5651_HP_CALIB2: 278 case RT5651_SV_ZCD1: 279 case RT5651_SV_ZCD2: 280 case RT5651_D_MISC: 281 case RT5651_DUMMY2: 282 case RT5651_DUMMY3: 283 return true; 284 default: 285 return false; 286 } 287 } 288 289 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 290 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); 291 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 292 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); 293 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 294 295 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 296 static const DECLARE_TLV_DB_RANGE(bst_tlv, 297 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 298 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 299 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 300 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 301 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 302 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 303 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) 304 ); 305 306 /* Interface data select */ 307 static const char * const rt5651_data_select[] = { 308 "Normal", "Swap", "left copy to right", "right copy to left"}; 309 310 static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA, 311 RT5651_IF2_DAC_SEL_SFT, rt5651_data_select); 312 313 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA, 314 RT5651_IF2_ADC_SEL_SFT, rt5651_data_select); 315 316 static const struct snd_kcontrol_new rt5651_snd_controls[] = { 317 /* Headphone Output Volume */ 318 SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL, 319 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv), 320 /* OUTPUT Control */ 321 SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1, 322 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv), 323 324 /* DAC Digital Volume */ 325 SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL, 326 RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1), 327 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL, 328 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 329 175, 0, dac_vol_tlv), 330 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL, 331 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 332 175, 0, dac_vol_tlv), 333 /* IN1/IN2 Control */ 334 SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2, 335 RT5651_BST_SFT1, 8, 0, bst_tlv), 336 SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2, 337 RT5651_BST_SFT2, 8, 0, bst_tlv), 338 /* INL/INR Volume Control */ 339 SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL, 340 RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT, 341 31, 1, in_vol_tlv), 342 /* ADC Digital Volume Control */ 343 SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL, 344 RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1), 345 SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL, 346 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 347 127, 0, adc_vol_tlv), 348 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA, 349 RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 350 127, 0, adc_vol_tlv), 351 /* ADC Boost Volume Control */ 352 SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL, 353 RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT, 354 3, 0, adc_bst_tlv), 355 356 /* ASRC */ 357 SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1, 358 RT5651_STO1_T_SFT, 1, 0), 359 SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1, 360 RT5651_STO2_T_SFT, 1, 0), 361 SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1, 362 RT5651_DMIC_1_M_SFT, 1, 0), 363 364 SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum), 365 SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum), 366 }; 367 368 /** 369 * set_dmic_clk - Set parameter of dmic. 370 * 371 * @w: DAPM widget. 372 * @kcontrol: The kcontrol of this widget. 373 * @event: Event id. 374 * 375 */ 376 static int set_dmic_clk(struct snd_soc_dapm_widget *w, 377 struct snd_kcontrol *kcontrol, int event) 378 { 379 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 380 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 381 int idx, rate; 382 383 rate = rt5651->sysclk / rl6231_get_pre_div(rt5651->regmap, 384 RT5651_ADDA_CLK1, RT5651_I2S_PD1_SFT); 385 idx = rl6231_calc_dmic_clk(rate); 386 if (idx < 0) 387 dev_err(codec->dev, "Failed to set DMIC clock\n"); 388 else 389 snd_soc_update_bits(codec, RT5651_DMIC, RT5651_DMIC_CLK_MASK, 390 idx << RT5651_DMIC_CLK_SFT); 391 392 return idx; 393 } 394 395 static int is_sysclk_from_pll(struct snd_soc_dapm_widget *source, 396 struct snd_soc_dapm_widget *sink) 397 { 398 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); 399 unsigned int val; 400 401 val = snd_soc_read(codec, RT5651_GLB_CLK); 402 val &= RT5651_SCLK_SRC_MASK; 403 if (val == RT5651_SCLK_SRC_PLL1) 404 return 1; 405 else 406 return 0; 407 } 408 409 /* Digital Mixer */ 410 static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = { 411 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, 412 RT5651_M_STO1_ADC_L1_SFT, 1, 1), 413 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER, 414 RT5651_M_STO1_ADC_L2_SFT, 1, 1), 415 }; 416 417 static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = { 418 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, 419 RT5651_M_STO1_ADC_R1_SFT, 1, 1), 420 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER, 421 RT5651_M_STO1_ADC_R2_SFT, 1, 1), 422 }; 423 424 static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = { 425 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER, 426 RT5651_M_STO2_ADC_L1_SFT, 1, 1), 427 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER, 428 RT5651_M_STO2_ADC_L2_SFT, 1, 1), 429 }; 430 431 static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = { 432 SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER, 433 RT5651_M_STO2_ADC_R1_SFT, 1, 1), 434 SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER, 435 RT5651_M_STO2_ADC_R2_SFT, 1, 1), 436 }; 437 438 static const struct snd_kcontrol_new rt5651_dac_l_mix[] = { 439 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER, 440 RT5651_M_ADCMIX_L_SFT, 1, 1), 441 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER, 442 RT5651_M_IF1_DAC_L_SFT, 1, 1), 443 }; 444 445 static const struct snd_kcontrol_new rt5651_dac_r_mix[] = { 446 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER, 447 RT5651_M_ADCMIX_R_SFT, 1, 1), 448 SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER, 449 RT5651_M_IF1_DAC_R_SFT, 1, 1), 450 }; 451 452 static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = { 453 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER, 454 RT5651_M_DAC_L1_MIXL_SFT, 1, 1), 455 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER, 456 RT5651_M_DAC_L2_MIXL_SFT, 1, 1), 457 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER, 458 RT5651_M_DAC_R1_MIXL_SFT, 1, 1), 459 }; 460 461 static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = { 462 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER, 463 RT5651_M_DAC_R1_MIXR_SFT, 1, 1), 464 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER, 465 RT5651_M_DAC_R2_MIXR_SFT, 1, 1), 466 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER, 467 RT5651_M_DAC_L1_MIXR_SFT, 1, 1), 468 }; 469 470 static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = { 471 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER, 472 RT5651_M_STO_DD_L1_SFT, 1, 1), 473 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER, 474 RT5651_M_STO_DD_L2_SFT, 1, 1), 475 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER, 476 RT5651_M_STO_DD_R2_L_SFT, 1, 1), 477 }; 478 479 static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = { 480 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER, 481 RT5651_M_STO_DD_R1_SFT, 1, 1), 482 SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER, 483 RT5651_M_STO_DD_R2_SFT, 1, 1), 484 SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER, 485 RT5651_M_STO_DD_L2_R_SFT, 1, 1), 486 }; 487 488 /* Analog Input Mixer */ 489 static const struct snd_kcontrol_new rt5651_rec_l_mix[] = { 490 SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER, 491 RT5651_M_IN1_L_RM_L_SFT, 1, 1), 492 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER, 493 RT5651_M_BST3_RM_L_SFT, 1, 1), 494 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER, 495 RT5651_M_BST2_RM_L_SFT, 1, 1), 496 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER, 497 RT5651_M_BST1_RM_L_SFT, 1, 1), 498 }; 499 500 static const struct snd_kcontrol_new rt5651_rec_r_mix[] = { 501 SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER, 502 RT5651_M_IN1_R_RM_R_SFT, 1, 1), 503 SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER, 504 RT5651_M_BST3_RM_R_SFT, 1, 1), 505 SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER, 506 RT5651_M_BST2_RM_R_SFT, 1, 1), 507 SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER, 508 RT5651_M_BST1_RM_R_SFT, 1, 1), 509 }; 510 511 /* Analog Output Mixer */ 512 513 static const struct snd_kcontrol_new rt5651_out_l_mix[] = { 514 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER, 515 RT5651_M_BST1_OM_L_SFT, 1, 1), 516 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER, 517 RT5651_M_BST2_OM_L_SFT, 1, 1), 518 SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER, 519 RT5651_M_IN1_L_OM_L_SFT, 1, 1), 520 SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER, 521 RT5651_M_RM_L_OM_L_SFT, 1, 1), 522 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER, 523 RT5651_M_DAC_L1_OM_L_SFT, 1, 1), 524 }; 525 526 static const struct snd_kcontrol_new rt5651_out_r_mix[] = { 527 SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER, 528 RT5651_M_BST2_OM_R_SFT, 1, 1), 529 SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER, 530 RT5651_M_BST1_OM_R_SFT, 1, 1), 531 SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER, 532 RT5651_M_IN1_R_OM_R_SFT, 1, 1), 533 SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER, 534 RT5651_M_RM_R_OM_R_SFT, 1, 1), 535 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER, 536 RT5651_M_DAC_R1_OM_R_SFT, 1, 1), 537 }; 538 539 static const struct snd_kcontrol_new rt5651_hpo_mix[] = { 540 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER, 541 RT5651_M_DAC1_HM_SFT, 1, 1), 542 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER, 543 RT5651_M_HPVOL_HM_SFT, 1, 1), 544 }; 545 546 static const struct snd_kcontrol_new rt5651_lout_mix[] = { 547 SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER, 548 RT5651_M_DAC_L1_LM_SFT, 1, 1), 549 SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER, 550 RT5651_M_DAC_R1_LM_SFT, 1, 1), 551 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER, 552 RT5651_M_OV_L_LM_SFT, 1, 1), 553 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER, 554 RT5651_M_OV_R_LM_SFT, 1, 1), 555 }; 556 557 static const struct snd_kcontrol_new outvol_l_control = 558 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1, 559 RT5651_VOL_L_SFT, 1, 1); 560 561 static const struct snd_kcontrol_new outvol_r_control = 562 SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1, 563 RT5651_VOL_R_SFT, 1, 1); 564 565 static const struct snd_kcontrol_new lout_l_mute_control = 566 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1, 567 RT5651_L_MUTE_SFT, 1, 1); 568 569 static const struct snd_kcontrol_new lout_r_mute_control = 570 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1, 571 RT5651_R_MUTE_SFT, 1, 1); 572 573 static const struct snd_kcontrol_new hpovol_l_control = 574 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL, 575 RT5651_VOL_L_SFT, 1, 1); 576 577 static const struct snd_kcontrol_new hpovol_r_control = 578 SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL, 579 RT5651_VOL_R_SFT, 1, 1); 580 581 static const struct snd_kcontrol_new hpo_l_mute_control = 582 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL, 583 RT5651_L_MUTE_SFT, 1, 1); 584 585 static const struct snd_kcontrol_new hpo_r_mute_control = 586 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL, 587 RT5651_R_MUTE_SFT, 1, 1); 588 589 /* INL/R source */ 590 static const char * const rt5651_inl_src[] = {"IN2P", "HPOVOLLP"}; 591 592 static SOC_ENUM_SINGLE_DECL( 593 rt5651_inl_enum, RT5651_INL1_INR1_VOL, 594 RT5651_INL_SEL_SFT, rt5651_inl_src); 595 596 static const struct snd_kcontrol_new rt5651_inl1_mux = 597 SOC_DAPM_ENUM("INL1 source", rt5651_inl_enum); 598 599 static const char * const rt5651_inr1_src[] = {"IN2N", "HPOVOLRP"}; 600 601 static SOC_ENUM_SINGLE_DECL( 602 rt5651_inr1_enum, RT5651_INL1_INR1_VOL, 603 RT5651_INR_SEL_SFT, rt5651_inr1_src); 604 605 static const struct snd_kcontrol_new rt5651_inr1_mux = 606 SOC_DAPM_ENUM("INR1 source", rt5651_inr1_enum); 607 608 static const char * const rt5651_inl2_src[] = {"IN3P", "OUTVOLLP"}; 609 610 static SOC_ENUM_SINGLE_DECL( 611 rt5651_inl2_enum, RT5651_INL2_INR2_VOL, 612 RT5651_INL_SEL_SFT, rt5651_inl2_src); 613 614 static const struct snd_kcontrol_new rt5651_inl2_mux = 615 SOC_DAPM_ENUM("INL2 source", rt5651_inl2_enum); 616 617 static const char * const rt5651_inr2_src[] = {"IN3N", "OUTVOLRP"}; 618 619 static SOC_ENUM_SINGLE_DECL( 620 rt5651_inr2_enum, RT5651_INL2_INR2_VOL, 621 RT5651_INR_SEL_SFT, rt5651_inr2_src); 622 623 static const struct snd_kcontrol_new rt5651_inr2_mux = 624 SOC_DAPM_ENUM("INR2 source", rt5651_inr2_enum); 625 626 627 /* Stereo ADC source */ 628 static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"}; 629 630 static SOC_ENUM_SINGLE_DECL( 631 rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER, 632 RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src); 633 634 static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux = 635 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum); 636 637 static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux = 638 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum); 639 640 static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"}; 641 642 static SOC_ENUM_SINGLE_DECL( 643 rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER, 644 RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src); 645 646 static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux = 647 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum); 648 649 static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux = 650 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum); 651 652 /* Mono ADC source */ 653 static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"}; 654 655 static SOC_ENUM_SINGLE_DECL( 656 rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER, 657 RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src); 658 659 static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux = 660 SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum); 661 662 static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"}; 663 664 static SOC_ENUM_SINGLE_DECL( 665 rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER, 666 RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src); 667 668 static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux = 669 SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum); 670 671 static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"}; 672 673 static SOC_ENUM_SINGLE_DECL( 674 rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER, 675 RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src); 676 677 static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux = 678 SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum); 679 680 static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"}; 681 682 static SOC_ENUM_SINGLE_DECL( 683 rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER, 684 RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src); 685 686 static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux = 687 SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum); 688 689 /* DAC2 channel source */ 690 691 static const char * const rt5651_dac_src[] = {"IF1", "IF2"}; 692 693 static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL, 694 RT5651_SEL_DAC_L2_SFT, rt5651_dac_src); 695 696 static const struct snd_kcontrol_new rt5651_dac_l2_mux = 697 SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum); 698 699 static SOC_ENUM_SINGLE_DECL( 700 rt5651_dac_r2_enum, RT5651_DAC2_CTRL, 701 RT5651_SEL_DAC_R2_SFT, rt5651_dac_src); 702 703 static const struct snd_kcontrol_new rt5651_dac_r2_mux = 704 SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum); 705 706 /* IF2_ADC channel source */ 707 708 static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"}; 709 710 static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA, 711 RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src); 712 713 static const struct snd_kcontrol_new rt5651_if2_adc_src_mux = 714 SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum); 715 716 /* PDM select */ 717 static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"}; 718 719 static SOC_ENUM_SINGLE_DECL( 720 rt5651_pdm_l_sel_enum, RT5651_PDM_CTL, 721 RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel); 722 723 static SOC_ENUM_SINGLE_DECL( 724 rt5651_pdm_r_sel_enum, RT5651_PDM_CTL, 725 RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel); 726 727 static const struct snd_kcontrol_new rt5651_pdm_l_mux = 728 SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum); 729 730 static const struct snd_kcontrol_new rt5651_pdm_r_mux = 731 SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum); 732 733 static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w, 734 struct snd_kcontrol *kcontrol, int event) 735 { 736 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 737 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 738 739 switch (event) { 740 case SND_SOC_DAPM_POST_PMU: 741 /* depop parameters */ 742 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE + 743 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200); 744 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2, 745 RT5651_DEPOP_MASK, RT5651_DEPOP_MAN); 746 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1, 747 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK | 748 RT5651_HP_CB_MASK, RT5651_HP_CP_PU | 749 RT5651_HP_SG_DIS | RT5651_HP_CB_PU); 750 regmap_write(rt5651->regmap, RT5651_PR_BASE + 751 RT5651_HP_DCC_INT1, 0x9f00); 752 /* headphone amp power on */ 753 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 754 RT5651_PWR_FV1 | RT5651_PWR_FV2, 0); 755 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 756 RT5651_PWR_HA, 757 RT5651_PWR_HA); 758 usleep_range(10000, 15000); 759 regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, 760 RT5651_PWR_FV1 | RT5651_PWR_FV2 , 761 RT5651_PWR_FV1 | RT5651_PWR_FV2); 762 break; 763 764 default: 765 return 0; 766 } 767 768 return 0; 769 } 770 771 static int rt5651_hp_event(struct snd_soc_dapm_widget *w, 772 struct snd_kcontrol *kcontrol, int event) 773 { 774 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 775 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 776 777 switch (event) { 778 case SND_SOC_DAPM_POST_PMU: 779 /* headphone unmute sequence */ 780 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2, 781 RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK, 782 RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN); 783 regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP, 784 RT5651_PM_HP_MASK, RT5651_PM_HP_HV); 785 786 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3, 787 RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK | 788 RT5651_CP_FQ3_MASK, 789 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) | 790 (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) | 791 (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT)); 792 793 regmap_write(rt5651->regmap, RT5651_PR_BASE + 794 RT5651_MAMP_INT_REG2, 0x1c00); 795 regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1, 796 RT5651_HP_CP_MASK | RT5651_HP_SG_MASK, 797 RT5651_HP_CP_PD | RT5651_HP_SG_EN); 798 regmap_update_bits(rt5651->regmap, RT5651_PR_BASE + 799 RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400); 800 rt5651->hp_mute = 0; 801 break; 802 803 case SND_SOC_DAPM_PRE_PMD: 804 rt5651->hp_mute = 1; 805 usleep_range(70000, 75000); 806 break; 807 808 default: 809 return 0; 810 } 811 812 return 0; 813 } 814 815 static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w, 816 struct snd_kcontrol *kcontrol, int event) 817 { 818 819 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 820 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 821 822 switch (event) { 823 case SND_SOC_DAPM_POST_PMU: 824 if (!rt5651->hp_mute) 825 usleep_range(80000, 85000); 826 827 break; 828 829 default: 830 return 0; 831 } 832 833 return 0; 834 } 835 836 static int rt5651_bst1_event(struct snd_soc_dapm_widget *w, 837 struct snd_kcontrol *kcontrol, int event) 838 { 839 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 840 841 switch (event) { 842 case SND_SOC_DAPM_POST_PMU: 843 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 844 RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2); 845 break; 846 847 case SND_SOC_DAPM_PRE_PMD: 848 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 849 RT5651_PWR_BST1_OP2, 0); 850 break; 851 852 default: 853 return 0; 854 } 855 856 return 0; 857 } 858 859 static int rt5651_bst2_event(struct snd_soc_dapm_widget *w, 860 struct snd_kcontrol *kcontrol, int event) 861 { 862 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 863 864 switch (event) { 865 case SND_SOC_DAPM_POST_PMU: 866 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 867 RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2); 868 break; 869 870 case SND_SOC_DAPM_PRE_PMD: 871 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 872 RT5651_PWR_BST2_OP2, 0); 873 break; 874 875 default: 876 return 0; 877 } 878 879 return 0; 880 } 881 882 static int rt5651_bst3_event(struct snd_soc_dapm_widget *w, 883 struct snd_kcontrol *kcontrol, int event) 884 { 885 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 886 887 switch (event) { 888 case SND_SOC_DAPM_POST_PMU: 889 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 890 RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2); 891 break; 892 893 case SND_SOC_DAPM_PRE_PMD: 894 snd_soc_update_bits(codec, RT5651_PWR_ANLG2, 895 RT5651_PWR_BST3_OP2, 0); 896 break; 897 898 default: 899 return 0; 900 } 901 902 return 0; 903 } 904 905 static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = { 906 /* ASRC */ 907 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2, 908 15, 0, NULL, 0), 909 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2, 910 14, 0, NULL, 0), 911 SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2, 912 13, 0, NULL, 0), 913 SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2, 914 12, 0, NULL, 0), 915 SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2, 916 11, 0, NULL, 0), 917 918 SND_SOC_DAPM_SUPPLY("PLL1", RT5651_PWR_ANLG2, 919 RT5651_PWR_PLL_BIT, 0, NULL, 0), 920 /* Input Side */ 921 /* micbias */ 922 SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1, 923 RT5651_PWR_LDO_BIT, 0, NULL, 0), 924 SND_SOC_DAPM_MICBIAS("micbias1", RT5651_PWR_ANLG2, 925 RT5651_PWR_MB1_BIT, 0), 926 /* Input Lines */ 927 SND_SOC_DAPM_INPUT("MIC1"), 928 SND_SOC_DAPM_INPUT("MIC2"), 929 SND_SOC_DAPM_INPUT("MIC3"), 930 931 SND_SOC_DAPM_INPUT("IN1P"), 932 SND_SOC_DAPM_INPUT("IN2P"), 933 SND_SOC_DAPM_INPUT("IN2N"), 934 SND_SOC_DAPM_INPUT("IN3P"), 935 SND_SOC_DAPM_INPUT("DMIC L1"), 936 SND_SOC_DAPM_INPUT("DMIC R1"), 937 SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT, 938 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 939 /* Boost */ 940 SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2, 941 RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event, 942 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 943 SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2, 944 RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event, 945 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 946 SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2, 947 RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event, 948 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 949 /* Input Volume */ 950 SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL, 951 RT5651_PWR_IN1_L_BIT, 0, NULL, 0), 952 SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL, 953 RT5651_PWR_IN1_R_BIT, 0, NULL, 0), 954 SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL, 955 RT5651_PWR_IN2_L_BIT, 0, NULL, 0), 956 SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL, 957 RT5651_PWR_IN2_R_BIT, 0, NULL, 0), 958 /* IN Mux */ 959 SND_SOC_DAPM_MUX("INL1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl1_mux), 960 SND_SOC_DAPM_MUX("INR1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr1_mux), 961 SND_SOC_DAPM_MUX("INL2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl2_mux), 962 SND_SOC_DAPM_MUX("INR2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr2_mux), 963 /* REC Mixer */ 964 SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0, 965 rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)), 966 SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0, 967 rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)), 968 /* ADCs */ 969 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 970 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 971 SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1, 972 RT5651_PWR_ADC_L_BIT, 0, NULL, 0), 973 SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1, 974 RT5651_PWR_ADC_R_BIT, 0, NULL, 0), 975 /* ADC Mux */ 976 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 977 &rt5651_sto1_adc_l2_mux), 978 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 979 &rt5651_sto1_adc_r2_mux), 980 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 981 &rt5651_sto1_adc_l1_mux), 982 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 983 &rt5651_sto1_adc_r1_mux), 984 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 985 &rt5651_sto2_adc_l2_mux), 986 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 987 &rt5651_sto2_adc_l1_mux), 988 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 989 &rt5651_sto2_adc_r1_mux), 990 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 991 &rt5651_sto2_adc_r2_mux), 992 /* ADC Mixer */ 993 SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2, 994 RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0), 995 SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2, 996 RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0), 997 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, 998 rt5651_sto1_adc_l_mix, 999 ARRAY_SIZE(rt5651_sto1_adc_l_mix)), 1000 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, 1001 rt5651_sto1_adc_r_mix, 1002 ARRAY_SIZE(rt5651_sto1_adc_r_mix)), 1003 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, 1004 rt5651_sto2_adc_l_mix, 1005 ARRAY_SIZE(rt5651_sto2_adc_l_mix)), 1006 SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, 1007 rt5651_sto2_adc_r_mix, 1008 ARRAY_SIZE(rt5651_sto2_adc_r_mix)), 1009 1010 /* Digital Interface */ 1011 SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1, 1012 RT5651_PWR_I2S1_BIT, 0, NULL, 0), 1013 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1014 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1015 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1016 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1017 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1018 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1019 SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1020 SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1, 1021 RT5651_PWR_I2S2_BIT, 0, NULL, 0), 1022 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1023 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1024 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1025 SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0, 1026 &rt5651_if2_adc_src_mux), 1027 1028 /* Digital Interface Select */ 1029 1030 SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL, 1031 RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux), 1032 SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL, 1033 RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux), 1034 /* Audio Interface */ 1035 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 1036 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1037 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1038 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), 1039 1040 /* Audio DSP */ 1041 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), 1042 1043 /* Output Side */ 1044 /* DAC mixer before sound effect */ 1045 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1046 rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)), 1047 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1048 rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)), 1049 1050 /* DAC2 channel Mux */ 1051 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux), 1052 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux), 1053 SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0), 1054 SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0), 1055 1056 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2, 1057 RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0), 1058 SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2, 1059 RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0), 1060 /* DAC Mixer */ 1061 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 1062 rt5651_sto_dac_l_mix, 1063 ARRAY_SIZE(rt5651_sto_dac_l_mix)), 1064 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 1065 rt5651_sto_dac_r_mix, 1066 ARRAY_SIZE(rt5651_sto_dac_r_mix)), 1067 SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0, 1068 rt5651_dd_dac_l_mix, 1069 ARRAY_SIZE(rt5651_dd_dac_l_mix)), 1070 SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0, 1071 rt5651_dd_dac_r_mix, 1072 ARRAY_SIZE(rt5651_dd_dac_r_mix)), 1073 1074 /* DACs */ 1075 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), 1076 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), 1077 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1, 1078 RT5651_PWR_DAC_L1_BIT, 0, NULL, 0), 1079 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1, 1080 RT5651_PWR_DAC_R1_BIT, 0, NULL, 0), 1081 /* OUT Mixer */ 1082 SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT, 1083 0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)), 1084 SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT, 1085 0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)), 1086 /* Ouput Volume */ 1087 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL, 1088 RT5651_PWR_OV_L_BIT, 0, &outvol_l_control), 1089 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL, 1090 RT5651_PWR_OV_R_BIT, 0, &outvol_r_control), 1091 SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL, 1092 RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control), 1093 SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL, 1094 RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control), 1095 SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL, 1096 RT5651_PWR_IN1_L_BIT, 0, NULL, 0), 1097 SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL, 1098 RT5651_PWR_IN1_R_BIT, 0, NULL, 0), 1099 SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL, 1100 RT5651_PWR_IN2_L_BIT, 0, NULL, 0), 1101 SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL, 1102 RT5651_PWR_IN2_R_BIT, 0, NULL, 0), 1103 /* HPO/LOUT/Mono Mixer */ 1104 SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0, 1105 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)), 1106 SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0, 1107 rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)), 1108 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1, 1109 RT5651_PWR_HP_L_BIT, 0, NULL, 0), 1110 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1, 1111 RT5651_PWR_HP_R_BIT, 0, NULL, 0), 1112 SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0, 1113 rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)), 1114 1115 SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1, 1116 RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event, 1117 SND_SOC_DAPM_POST_PMU), 1118 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event, 1119 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1120 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0, 1121 &hpo_l_mute_control), 1122 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0, 1123 &hpo_r_mute_control), 1124 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, 1125 &lout_l_mute_control), 1126 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, 1127 &lout_r_mute_control), 1128 SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event), 1129 1130 /* Output Lines */ 1131 SND_SOC_DAPM_OUTPUT("HPOL"), 1132 SND_SOC_DAPM_OUTPUT("HPOR"), 1133 SND_SOC_DAPM_OUTPUT("LOUTL"), 1134 SND_SOC_DAPM_OUTPUT("LOUTR"), 1135 SND_SOC_DAPM_OUTPUT("PDML"), 1136 SND_SOC_DAPM_OUTPUT("PDMR"), 1137 }; 1138 1139 static const struct snd_soc_dapm_route rt5651_dapm_routes[] = { 1140 {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"}, 1141 {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"}, 1142 {"I2S1", NULL, "I2S1 ASRC"}, 1143 {"I2S2", NULL, "I2S2 ASRC"}, 1144 1145 {"IN1P", NULL, "LDO"}, 1146 {"IN2P", NULL, "LDO"}, 1147 {"IN3P", NULL, "LDO"}, 1148 1149 {"IN1P", NULL, "MIC1"}, 1150 {"IN2P", NULL, "MIC2"}, 1151 {"IN2N", NULL, "MIC2"}, 1152 {"IN3P", NULL, "MIC3"}, 1153 1154 {"BST1", NULL, "IN1P"}, 1155 {"BST2", NULL, "IN2P"}, 1156 {"BST2", NULL, "IN2N"}, 1157 {"BST3", NULL, "IN3P"}, 1158 1159 {"INL1 VOL", NULL, "IN2P"}, 1160 {"INR1 VOL", NULL, "IN2N"}, 1161 1162 {"RECMIXL", "INL1 Switch", "INL1 VOL"}, 1163 {"RECMIXL", "BST3 Switch", "BST3"}, 1164 {"RECMIXL", "BST2 Switch", "BST2"}, 1165 {"RECMIXL", "BST1 Switch", "BST1"}, 1166 1167 {"RECMIXR", "INR1 Switch", "INR1 VOL"}, 1168 {"RECMIXR", "BST3 Switch", "BST3"}, 1169 {"RECMIXR", "BST2 Switch", "BST2"}, 1170 {"RECMIXR", "BST1 Switch", "BST1"}, 1171 1172 {"ADC L", NULL, "RECMIXL"}, 1173 {"ADC L", NULL, "ADC L Power"}, 1174 {"ADC R", NULL, "RECMIXR"}, 1175 {"ADC R", NULL, "ADC R Power"}, 1176 1177 {"DMIC L1", NULL, "DMIC CLK"}, 1178 {"DMIC R1", NULL, "DMIC CLK"}, 1179 1180 {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"}, 1181 {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"}, 1182 {"Stereo1 ADC L1 Mux", "ADC", "ADC L"}, 1183 {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"}, 1184 1185 {"Stereo1 ADC R1 Mux", "ADC", "ADC R"}, 1186 {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"}, 1187 {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"}, 1188 {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"}, 1189 1190 {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"}, 1191 {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"}, 1192 {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"}, 1193 {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"}, 1194 1195 {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"}, 1196 {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"}, 1197 {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"}, 1198 {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"}, 1199 1200 {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"}, 1201 {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"}, 1202 {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"}, 1203 {"Stereo1 Filter", NULL, "PLL1", is_sysclk_from_pll}, 1204 {"Stereo1 Filter", NULL, "ADC ASRC"}, 1205 1206 {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"}, 1207 {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"}, 1208 {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"}, 1209 1210 {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"}, 1211 {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"}, 1212 {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"}, 1213 {"Stereo2 Filter", NULL, "PLL1", is_sysclk_from_pll}, 1214 {"Stereo2 Filter", NULL, "ADC ASRC"}, 1215 1216 {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"}, 1217 {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"}, 1218 {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"}, 1219 1220 {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"}, 1221 {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"}, 1222 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"}, 1223 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"}, 1224 1225 {"IF1 ADC1", NULL, "I2S1"}, 1226 1227 {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"}, 1228 {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"}, 1229 {"IF2 ADC", NULL, "I2S2"}, 1230 1231 {"AIF1TX", NULL, "IF1 ADC1"}, 1232 {"AIF1TX", NULL, "IF1 ADC2"}, 1233 {"AIF2TX", NULL, "IF2 ADC"}, 1234 1235 {"IF1 DAC", NULL, "AIF1RX"}, 1236 {"IF1 DAC", NULL, "I2S1"}, 1237 {"IF2 DAC", NULL, "AIF2RX"}, 1238 {"IF2 DAC", NULL, "I2S2"}, 1239 1240 {"IF1 DAC1 L", NULL, "IF1 DAC"}, 1241 {"IF1 DAC1 R", NULL, "IF1 DAC"}, 1242 {"IF1 DAC2 L", NULL, "IF1 DAC"}, 1243 {"IF1 DAC2 R", NULL, "IF1 DAC"}, 1244 {"IF2 DAC L", NULL, "IF2 DAC"}, 1245 {"IF2 DAC R", NULL, "IF2 DAC"}, 1246 1247 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"}, 1248 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"}, 1249 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"}, 1250 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"}, 1251 1252 {"Audio DSP", NULL, "DAC MIXL"}, 1253 {"Audio DSP", NULL, "DAC MIXR"}, 1254 1255 {"DAC L2 Mux", "IF1", "IF1 DAC2 L"}, 1256 {"DAC L2 Mux", "IF2", "IF2 DAC L"}, 1257 {"DAC L2 Volume", NULL, "DAC L2 Mux"}, 1258 1259 {"DAC R2 Mux", "IF1", "IF1 DAC2 R"}, 1260 {"DAC R2 Mux", "IF2", "IF2 DAC R"}, 1261 {"DAC R2 Volume", NULL, "DAC R2 Mux"}, 1262 1263 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"}, 1264 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"}, 1265 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"}, 1266 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"}, 1267 {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"}, 1268 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"}, 1269 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"}, 1270 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"}, 1271 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"}, 1272 {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"}, 1273 1274 {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"}, 1275 {"PDM L Mux", "DD MIX", "DAC MIXL"}, 1276 {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"}, 1277 {"PDM R Mux", "DD MIX", "DAC MIXR"}, 1278 1279 {"DAC L1", NULL, "Stereo DAC MIXL"}, 1280 {"DAC L1", NULL, "PLL1", is_sysclk_from_pll}, 1281 {"DAC L1", NULL, "DAC L1 Power"}, 1282 {"DAC R1", NULL, "Stereo DAC MIXR"}, 1283 {"DAC R1", NULL, "PLL1", is_sysclk_from_pll}, 1284 {"DAC R1", NULL, "DAC R1 Power"}, 1285 1286 {"DD MIXL", "DAC L1 Switch", "DAC MIXL"}, 1287 {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"}, 1288 {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"}, 1289 {"DD MIXL", NULL, "Stero2 DAC Power"}, 1290 1291 {"DD MIXR", "DAC R1 Switch", "DAC MIXR"}, 1292 {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"}, 1293 {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"}, 1294 {"DD MIXR", NULL, "Stero2 DAC Power"}, 1295 1296 {"OUT MIXL", "BST1 Switch", "BST1"}, 1297 {"OUT MIXL", "BST2 Switch", "BST2"}, 1298 {"OUT MIXL", "INL1 Switch", "INL1 VOL"}, 1299 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"}, 1300 {"OUT MIXL", "DAC L1 Switch", "DAC L1"}, 1301 1302 {"OUT MIXR", "BST2 Switch", "BST2"}, 1303 {"OUT MIXR", "BST1 Switch", "BST1"}, 1304 {"OUT MIXR", "INR1 Switch", "INR1 VOL"}, 1305 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"}, 1306 {"OUT MIXR", "DAC R1 Switch", "DAC R1"}, 1307 1308 {"HPOVOL L", "Switch", "OUT MIXL"}, 1309 {"HPOVOL R", "Switch", "OUT MIXR"}, 1310 {"OUTVOL L", "Switch", "OUT MIXL"}, 1311 {"OUTVOL R", "Switch", "OUT MIXR"}, 1312 1313 {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"}, 1314 {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"}, 1315 {"HPOL MIX", NULL, "HP L Amp"}, 1316 {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"}, 1317 {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"}, 1318 {"HPOR MIX", NULL, "HP R Amp"}, 1319 1320 {"LOUT MIX", "DAC L1 Switch", "DAC L1"}, 1321 {"LOUT MIX", "DAC R1 Switch", "DAC R1"}, 1322 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"}, 1323 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"}, 1324 1325 {"HP Amp", NULL, "HPOL MIX"}, 1326 {"HP Amp", NULL, "HPOR MIX"}, 1327 {"HP Amp", NULL, "Amp Power"}, 1328 {"HPO L Playback", "Switch", "HP Amp"}, 1329 {"HPO R Playback", "Switch", "HP Amp"}, 1330 {"HPOL", NULL, "HPO L Playback"}, 1331 {"HPOR", NULL, "HPO R Playback"}, 1332 1333 {"LOUT L Playback", "Switch", "LOUT MIX"}, 1334 {"LOUT R Playback", "Switch", "LOUT MIX"}, 1335 {"LOUTL", NULL, "LOUT L Playback"}, 1336 {"LOUTL", NULL, "Amp Power"}, 1337 {"LOUTR", NULL, "LOUT R Playback"}, 1338 {"LOUTR", NULL, "Amp Power"}, 1339 1340 {"PDML", NULL, "PDM L Mux"}, 1341 {"PDMR", NULL, "PDM R Mux"}, 1342 }; 1343 1344 static int rt5651_hw_params(struct snd_pcm_substream *substream, 1345 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 1346 { 1347 struct snd_soc_codec *codec = dai->codec; 1348 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1349 unsigned int val_len = 0, val_clk, mask_clk; 1350 int pre_div, bclk_ms, frame_size; 1351 1352 rt5651->lrck[dai->id] = params_rate(params); 1353 pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]); 1354 1355 if (pre_div < 0) { 1356 dev_err(codec->dev, "Unsupported clock setting\n"); 1357 return -EINVAL; 1358 } 1359 frame_size = snd_soc_params_to_frame_size(params); 1360 if (frame_size < 0) { 1361 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); 1362 return -EINVAL; 1363 } 1364 bclk_ms = frame_size > 32 ? 1 : 0; 1365 rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms); 1366 1367 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 1368 rt5651->bclk[dai->id], rt5651->lrck[dai->id]); 1369 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 1370 bclk_ms, pre_div, dai->id); 1371 1372 switch (params_width(params)) { 1373 case 16: 1374 break; 1375 case 20: 1376 val_len |= RT5651_I2S_DL_20; 1377 break; 1378 case 24: 1379 val_len |= RT5651_I2S_DL_24; 1380 break; 1381 case 8: 1382 val_len |= RT5651_I2S_DL_8; 1383 break; 1384 default: 1385 return -EINVAL; 1386 } 1387 1388 switch (dai->id) { 1389 case RT5651_AIF1: 1390 mask_clk = RT5651_I2S_PD1_MASK; 1391 val_clk = pre_div << RT5651_I2S_PD1_SFT; 1392 snd_soc_update_bits(codec, RT5651_I2S1_SDP, 1393 RT5651_I2S_DL_MASK, val_len); 1394 snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk); 1395 break; 1396 case RT5651_AIF2: 1397 mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK; 1398 val_clk = pre_div << RT5651_I2S_PD2_SFT; 1399 snd_soc_update_bits(codec, RT5651_I2S2_SDP, 1400 RT5651_I2S_DL_MASK, val_len); 1401 snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk); 1402 break; 1403 default: 1404 dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id); 1405 return -EINVAL; 1406 } 1407 1408 return 0; 1409 } 1410 1411 static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1412 { 1413 struct snd_soc_codec *codec = dai->codec; 1414 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1415 unsigned int reg_val = 0; 1416 1417 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1418 case SND_SOC_DAIFMT_CBM_CFM: 1419 rt5651->master[dai->id] = 1; 1420 break; 1421 case SND_SOC_DAIFMT_CBS_CFS: 1422 reg_val |= RT5651_I2S_MS_S; 1423 rt5651->master[dai->id] = 0; 1424 break; 1425 default: 1426 return -EINVAL; 1427 } 1428 1429 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1430 case SND_SOC_DAIFMT_NB_NF: 1431 break; 1432 case SND_SOC_DAIFMT_IB_NF: 1433 reg_val |= RT5651_I2S_BP_INV; 1434 break; 1435 default: 1436 return -EINVAL; 1437 } 1438 1439 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1440 case SND_SOC_DAIFMT_I2S: 1441 break; 1442 case SND_SOC_DAIFMT_LEFT_J: 1443 reg_val |= RT5651_I2S_DF_LEFT; 1444 break; 1445 case SND_SOC_DAIFMT_DSP_A: 1446 reg_val |= RT5651_I2S_DF_PCM_A; 1447 break; 1448 case SND_SOC_DAIFMT_DSP_B: 1449 reg_val |= RT5651_I2S_DF_PCM_B; 1450 break; 1451 default: 1452 return -EINVAL; 1453 } 1454 1455 switch (dai->id) { 1456 case RT5651_AIF1: 1457 snd_soc_update_bits(codec, RT5651_I2S1_SDP, 1458 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK | 1459 RT5651_I2S_DF_MASK, reg_val); 1460 break; 1461 case RT5651_AIF2: 1462 snd_soc_update_bits(codec, RT5651_I2S2_SDP, 1463 RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK | 1464 RT5651_I2S_DF_MASK, reg_val); 1465 break; 1466 default: 1467 dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id); 1468 return -EINVAL; 1469 } 1470 return 0; 1471 } 1472 1473 static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai, 1474 int clk_id, unsigned int freq, int dir) 1475 { 1476 struct snd_soc_codec *codec = dai->codec; 1477 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1478 unsigned int reg_val = 0; 1479 1480 if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src) 1481 return 0; 1482 1483 switch (clk_id) { 1484 case RT5651_SCLK_S_MCLK: 1485 reg_val |= RT5651_SCLK_SRC_MCLK; 1486 break; 1487 case RT5651_SCLK_S_PLL1: 1488 reg_val |= RT5651_SCLK_SRC_PLL1; 1489 break; 1490 case RT5651_SCLK_S_RCCLK: 1491 reg_val |= RT5651_SCLK_SRC_RCCLK; 1492 break; 1493 default: 1494 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); 1495 return -EINVAL; 1496 } 1497 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1498 RT5651_SCLK_SRC_MASK, reg_val); 1499 rt5651->sysclk = freq; 1500 rt5651->sysclk_src = clk_id; 1501 1502 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); 1503 1504 return 0; 1505 } 1506 1507 static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 1508 unsigned int freq_in, unsigned int freq_out) 1509 { 1510 struct snd_soc_codec *codec = dai->codec; 1511 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1512 struct rl6231_pll_code pll_code; 1513 int ret; 1514 1515 if (source == rt5651->pll_src && freq_in == rt5651->pll_in && 1516 freq_out == rt5651->pll_out) 1517 return 0; 1518 1519 if (!freq_in || !freq_out) { 1520 dev_dbg(codec->dev, "PLL disabled\n"); 1521 1522 rt5651->pll_in = 0; 1523 rt5651->pll_out = 0; 1524 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1525 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK); 1526 return 0; 1527 } 1528 1529 switch (source) { 1530 case RT5651_PLL1_S_MCLK: 1531 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1532 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK); 1533 break; 1534 case RT5651_PLL1_S_BCLK1: 1535 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1536 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1); 1537 break; 1538 case RT5651_PLL1_S_BCLK2: 1539 snd_soc_update_bits(codec, RT5651_GLB_CLK, 1540 RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2); 1541 break; 1542 default: 1543 dev_err(codec->dev, "Unknown PLL source %d\n", source); 1544 return -EINVAL; 1545 } 1546 1547 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 1548 if (ret < 0) { 1549 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); 1550 return ret; 1551 } 1552 1553 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", 1554 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 1555 pll_code.n_code, pll_code.k_code); 1556 1557 snd_soc_write(codec, RT5651_PLL_CTRL1, 1558 pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code); 1559 snd_soc_write(codec, RT5651_PLL_CTRL2, 1560 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT | 1561 pll_code.m_bp << RT5651_PLL_M_BP_SFT); 1562 1563 rt5651->pll_in = freq_in; 1564 rt5651->pll_out = freq_out; 1565 rt5651->pll_src = source; 1566 1567 return 0; 1568 } 1569 1570 static int rt5651_set_bias_level(struct snd_soc_codec *codec, 1571 enum snd_soc_bias_level level) 1572 { 1573 switch (level) { 1574 case SND_SOC_BIAS_PREPARE: 1575 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) { 1576 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1577 RT5651_PWR_VREF1 | RT5651_PWR_MB | 1578 RT5651_PWR_BG | RT5651_PWR_VREF2, 1579 RT5651_PWR_VREF1 | RT5651_PWR_MB | 1580 RT5651_PWR_BG | RT5651_PWR_VREF2); 1581 usleep_range(10000, 15000); 1582 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1583 RT5651_PWR_FV1 | RT5651_PWR_FV2, 1584 RT5651_PWR_FV1 | RT5651_PWR_FV2); 1585 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1586 RT5651_PWR_LDO_DVO_MASK, 1587 RT5651_PWR_LDO_DVO_1_2V); 1588 snd_soc_update_bits(codec, RT5651_D_MISC, 0x1, 0x1); 1589 if (snd_soc_read(codec, RT5651_PLL_MODE_1) & 0x9200) 1590 snd_soc_update_bits(codec, RT5651_D_MISC, 1591 0xc00, 0xc00); 1592 } 1593 break; 1594 1595 case SND_SOC_BIAS_STANDBY: 1596 snd_soc_write(codec, RT5651_D_MISC, 0x0010); 1597 snd_soc_write(codec, RT5651_PWR_DIG1, 0x0000); 1598 snd_soc_write(codec, RT5651_PWR_DIG2, 0x0000); 1599 snd_soc_write(codec, RT5651_PWR_VOL, 0x0000); 1600 snd_soc_write(codec, RT5651_PWR_MIXER, 0x0000); 1601 snd_soc_write(codec, RT5651_PWR_ANLG1, 0x0000); 1602 snd_soc_write(codec, RT5651_PWR_ANLG2, 0x0000); 1603 break; 1604 1605 default: 1606 break; 1607 } 1608 1609 return 0; 1610 } 1611 1612 static int rt5651_probe(struct snd_soc_codec *codec) 1613 { 1614 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1615 1616 rt5651->codec = codec; 1617 1618 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1619 RT5651_PWR_VREF1 | RT5651_PWR_MB | 1620 RT5651_PWR_BG | RT5651_PWR_VREF2, 1621 RT5651_PWR_VREF1 | RT5651_PWR_MB | 1622 RT5651_PWR_BG | RT5651_PWR_VREF2); 1623 usleep_range(10000, 15000); 1624 snd_soc_update_bits(codec, RT5651_PWR_ANLG1, 1625 RT5651_PWR_FV1 | RT5651_PWR_FV2, 1626 RT5651_PWR_FV1 | RT5651_PWR_FV2); 1627 1628 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); 1629 1630 return 0; 1631 } 1632 1633 #ifdef CONFIG_PM 1634 static int rt5651_suspend(struct snd_soc_codec *codec) 1635 { 1636 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1637 1638 regcache_cache_only(rt5651->regmap, true); 1639 regcache_mark_dirty(rt5651->regmap); 1640 return 0; 1641 } 1642 1643 static int rt5651_resume(struct snd_soc_codec *codec) 1644 { 1645 struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); 1646 1647 regcache_cache_only(rt5651->regmap, false); 1648 snd_soc_cache_sync(codec); 1649 1650 return 0; 1651 } 1652 #else 1653 #define rt5651_suspend NULL 1654 #define rt5651_resume NULL 1655 #endif 1656 1657 #define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000 1658 #define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1659 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 1660 1661 static const struct snd_soc_dai_ops rt5651_aif_dai_ops = { 1662 .hw_params = rt5651_hw_params, 1663 .set_fmt = rt5651_set_dai_fmt, 1664 .set_sysclk = rt5651_set_dai_sysclk, 1665 .set_pll = rt5651_set_dai_pll, 1666 }; 1667 1668 static struct snd_soc_dai_driver rt5651_dai[] = { 1669 { 1670 .name = "rt5651-aif1", 1671 .id = RT5651_AIF1, 1672 .playback = { 1673 .stream_name = "AIF1 Playback", 1674 .channels_min = 1, 1675 .channels_max = 2, 1676 .rates = RT5651_STEREO_RATES, 1677 .formats = RT5651_FORMATS, 1678 }, 1679 .capture = { 1680 .stream_name = "AIF1 Capture", 1681 .channels_min = 1, 1682 .channels_max = 2, 1683 .rates = RT5651_STEREO_RATES, 1684 .formats = RT5651_FORMATS, 1685 }, 1686 .ops = &rt5651_aif_dai_ops, 1687 }, 1688 { 1689 .name = "rt5651-aif2", 1690 .id = RT5651_AIF2, 1691 .playback = { 1692 .stream_name = "AIF2 Playback", 1693 .channels_min = 1, 1694 .channels_max = 2, 1695 .rates = RT5651_STEREO_RATES, 1696 .formats = RT5651_FORMATS, 1697 }, 1698 .capture = { 1699 .stream_name = "AIF2 Capture", 1700 .channels_min = 1, 1701 .channels_max = 2, 1702 .rates = RT5651_STEREO_RATES, 1703 .formats = RT5651_FORMATS, 1704 }, 1705 .ops = &rt5651_aif_dai_ops, 1706 }, 1707 }; 1708 1709 static struct snd_soc_codec_driver soc_codec_dev_rt5651 = { 1710 .probe = rt5651_probe, 1711 .suspend = rt5651_suspend, 1712 .resume = rt5651_resume, 1713 .set_bias_level = rt5651_set_bias_level, 1714 .idle_bias_off = true, 1715 .controls = rt5651_snd_controls, 1716 .num_controls = ARRAY_SIZE(rt5651_snd_controls), 1717 .dapm_widgets = rt5651_dapm_widgets, 1718 .num_dapm_widgets = ARRAY_SIZE(rt5651_dapm_widgets), 1719 .dapm_routes = rt5651_dapm_routes, 1720 .num_dapm_routes = ARRAY_SIZE(rt5651_dapm_routes), 1721 }; 1722 1723 static const struct regmap_config rt5651_regmap = { 1724 .reg_bits = 8, 1725 .val_bits = 16, 1726 1727 .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) * 1728 RT5651_PR_SPACING), 1729 .volatile_reg = rt5651_volatile_register, 1730 .readable_reg = rt5651_readable_register, 1731 1732 .cache_type = REGCACHE_RBTREE, 1733 .reg_defaults = rt5651_reg, 1734 .num_reg_defaults = ARRAY_SIZE(rt5651_reg), 1735 .ranges = rt5651_ranges, 1736 .num_ranges = ARRAY_SIZE(rt5651_ranges), 1737 }; 1738 1739 #if defined(CONFIG_OF) 1740 static const struct of_device_id rt5651_of_match[] = { 1741 { .compatible = "realtek,rt5651", }, 1742 {}, 1743 }; 1744 MODULE_DEVICE_TABLE(of, rt5651_of_match); 1745 #endif 1746 1747 #ifdef CONFIG_ACPI 1748 static const struct acpi_device_id rt5651_acpi_match[] = { 1749 { "10EC5651", 0 }, 1750 { }, 1751 }; 1752 MODULE_DEVICE_TABLE(acpi, rt5651_acpi_match); 1753 #endif 1754 1755 static const struct i2c_device_id rt5651_i2c_id[] = { 1756 { "rt5651", 0 }, 1757 { } 1758 }; 1759 MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id); 1760 1761 static int rt5651_parse_dt(struct rt5651_priv *rt5651, struct device_node *np) 1762 { 1763 rt5651->pdata.in2_diff = of_property_read_bool(np, 1764 "realtek,in2-differential"); 1765 rt5651->pdata.dmic_en = of_property_read_bool(np, 1766 "realtek,dmic-en"); 1767 1768 return 0; 1769 } 1770 1771 static int rt5651_i2c_probe(struct i2c_client *i2c, 1772 const struct i2c_device_id *id) 1773 { 1774 struct rt5651_platform_data *pdata = dev_get_platdata(&i2c->dev); 1775 struct rt5651_priv *rt5651; 1776 int ret; 1777 1778 rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651), 1779 GFP_KERNEL); 1780 if (NULL == rt5651) 1781 return -ENOMEM; 1782 1783 i2c_set_clientdata(i2c, rt5651); 1784 1785 if (pdata) 1786 rt5651->pdata = *pdata; 1787 else if (i2c->dev.of_node) 1788 rt5651_parse_dt(rt5651, i2c->dev.of_node); 1789 1790 rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap); 1791 if (IS_ERR(rt5651->regmap)) { 1792 ret = PTR_ERR(rt5651->regmap); 1793 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 1794 ret); 1795 return ret; 1796 } 1797 1798 regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret); 1799 if (ret != RT5651_DEVICE_ID_VALUE) { 1800 dev_err(&i2c->dev, 1801 "Device with ID register %#x is not rt5651\n", ret); 1802 return -ENODEV; 1803 } 1804 1805 regmap_write(rt5651->regmap, RT5651_RESET, 0); 1806 1807 ret = regmap_register_patch(rt5651->regmap, init_list, 1808 ARRAY_SIZE(init_list)); 1809 if (ret != 0) 1810 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 1811 1812 if (rt5651->pdata.in2_diff) 1813 regmap_update_bits(rt5651->regmap, RT5651_IN1_IN2, 1814 RT5651_IN_DF2, RT5651_IN_DF2); 1815 1816 if (rt5651->pdata.dmic_en) 1817 regmap_update_bits(rt5651->regmap, RT5651_GPIO_CTRL1, 1818 RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL); 1819 1820 rt5651->hp_mute = 1; 1821 1822 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5651, 1823 rt5651_dai, ARRAY_SIZE(rt5651_dai)); 1824 1825 return ret; 1826 } 1827 1828 static int rt5651_i2c_remove(struct i2c_client *i2c) 1829 { 1830 snd_soc_unregister_codec(&i2c->dev); 1831 1832 return 0; 1833 } 1834 1835 static struct i2c_driver rt5651_i2c_driver = { 1836 .driver = { 1837 .name = "rt5651", 1838 .acpi_match_table = ACPI_PTR(rt5651_acpi_match), 1839 .of_match_table = of_match_ptr(rt5651_of_match), 1840 }, 1841 .probe = rt5651_i2c_probe, 1842 .remove = rt5651_i2c_remove, 1843 .id_table = rt5651_i2c_id, 1844 }; 1845 module_i2c_driver(rt5651_i2c_driver); 1846 1847 MODULE_DESCRIPTION("ASoC RT5651 driver"); 1848 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 1849 MODULE_LICENSE("GPL v2"); 1850