xref: /openbmc/linux/sound/soc/codecs/rt5645.c (revision a2cce7a9)
1 /*
2  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
3  *
4  * Copyright 2013 Realtek Semiconductor Corp.
5  * Author: Bard Liao <bardliao@realtek.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/acpi.h>
23 #include <linux/dmi.h>
24 #include <linux/regulator/consumer.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/jack.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
33 
34 #include "rl6231.h"
35 #include "rt5645.h"
36 
37 #define RT5645_DEVICE_ID 0x6308
38 #define RT5650_DEVICE_ID 0x6419
39 
40 #define RT5645_PR_RANGE_BASE (0xff + 1)
41 #define RT5645_PR_SPACING 0x100
42 
43 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
44 
45 static const struct regmap_range_cfg rt5645_ranges[] = {
46 	{
47 		.name = "PR",
48 		.range_min = RT5645_PR_BASE,
49 		.range_max = RT5645_PR_BASE + 0xf8,
50 		.selector_reg = RT5645_PRIV_INDEX,
51 		.selector_mask = 0xff,
52 		.selector_shift = 0x0,
53 		.window_start = RT5645_PRIV_DATA,
54 		.window_len = 0x1,
55 	},
56 };
57 
58 static const struct reg_sequence init_list[] = {
59 	{RT5645_PR_BASE + 0x3d,	0x3600},
60 	{RT5645_PR_BASE + 0x1c,	0xfd20},
61 	{RT5645_PR_BASE + 0x20,	0x611f},
62 	{RT5645_PR_BASE + 0x21,	0x4040},
63 	{RT5645_PR_BASE + 0x23,	0x0004},
64 };
65 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
66 
67 static const struct reg_sequence rt5650_init_list[] = {
68 	{0xf6,	0x0100},
69 };
70 
71 static const struct reg_default rt5645_reg[] = {
72 	{ 0x00, 0x0000 },
73 	{ 0x01, 0xc8c8 },
74 	{ 0x02, 0xc8c8 },
75 	{ 0x03, 0xc8c8 },
76 	{ 0x0a, 0x0002 },
77 	{ 0x0b, 0x2827 },
78 	{ 0x0c, 0xe000 },
79 	{ 0x0d, 0x0000 },
80 	{ 0x0e, 0x0000 },
81 	{ 0x0f, 0x0808 },
82 	{ 0x14, 0x3333 },
83 	{ 0x16, 0x4b00 },
84 	{ 0x18, 0x018b },
85 	{ 0x19, 0xafaf },
86 	{ 0x1a, 0xafaf },
87 	{ 0x1b, 0x0001 },
88 	{ 0x1c, 0x2f2f },
89 	{ 0x1d, 0x2f2f },
90 	{ 0x1e, 0x0000 },
91 	{ 0x20, 0x0000 },
92 	{ 0x27, 0x7060 },
93 	{ 0x28, 0x7070 },
94 	{ 0x29, 0x8080 },
95 	{ 0x2a, 0x5656 },
96 	{ 0x2b, 0x5454 },
97 	{ 0x2c, 0xaaa0 },
98 	{ 0x2d, 0x0000 },
99 	{ 0x2f, 0x1002 },
100 	{ 0x31, 0x5000 },
101 	{ 0x32, 0x0000 },
102 	{ 0x33, 0x0000 },
103 	{ 0x34, 0x0000 },
104 	{ 0x35, 0x0000 },
105 	{ 0x3b, 0x0000 },
106 	{ 0x3c, 0x007f },
107 	{ 0x3d, 0x0000 },
108 	{ 0x3e, 0x007f },
109 	{ 0x3f, 0x0000 },
110 	{ 0x40, 0x001f },
111 	{ 0x41, 0x0000 },
112 	{ 0x42, 0x001f },
113 	{ 0x45, 0x6000 },
114 	{ 0x46, 0x003e },
115 	{ 0x47, 0x003e },
116 	{ 0x48, 0xf807 },
117 	{ 0x4a, 0x0004 },
118 	{ 0x4d, 0x0000 },
119 	{ 0x4e, 0x0000 },
120 	{ 0x4f, 0x01ff },
121 	{ 0x50, 0x0000 },
122 	{ 0x51, 0x0000 },
123 	{ 0x52, 0x01ff },
124 	{ 0x53, 0xf000 },
125 	{ 0x56, 0x0111 },
126 	{ 0x57, 0x0064 },
127 	{ 0x58, 0xef0e },
128 	{ 0x59, 0xf0f0 },
129 	{ 0x5a, 0xef0e },
130 	{ 0x5b, 0xf0f0 },
131 	{ 0x5c, 0xef0e },
132 	{ 0x5d, 0xf0f0 },
133 	{ 0x5e, 0xf000 },
134 	{ 0x5f, 0x0000 },
135 	{ 0x61, 0x0300 },
136 	{ 0x62, 0x0000 },
137 	{ 0x63, 0x00c2 },
138 	{ 0x64, 0x0000 },
139 	{ 0x65, 0x0000 },
140 	{ 0x66, 0x0000 },
141 	{ 0x6a, 0x0000 },
142 	{ 0x6c, 0x0aaa },
143 	{ 0x70, 0x8000 },
144 	{ 0x71, 0x8000 },
145 	{ 0x72, 0x8000 },
146 	{ 0x73, 0x7770 },
147 	{ 0x74, 0x3e00 },
148 	{ 0x75, 0x2409 },
149 	{ 0x76, 0x000a },
150 	{ 0x77, 0x0c00 },
151 	{ 0x78, 0x0000 },
152 	{ 0x79, 0x0123 },
153 	{ 0x80, 0x0000 },
154 	{ 0x81, 0x0000 },
155 	{ 0x82, 0x0000 },
156 	{ 0x83, 0x0000 },
157 	{ 0x84, 0x0000 },
158 	{ 0x85, 0x0000 },
159 	{ 0x8a, 0x0000 },
160 	{ 0x8e, 0x0004 },
161 	{ 0x8f, 0x1100 },
162 	{ 0x90, 0x0646 },
163 	{ 0x91, 0x0c06 },
164 	{ 0x93, 0x0000 },
165 	{ 0x94, 0x0200 },
166 	{ 0x95, 0x0000 },
167 	{ 0x9a, 0x2184 },
168 	{ 0x9b, 0x010a },
169 	{ 0x9c, 0x0aea },
170 	{ 0x9d, 0x000c },
171 	{ 0x9e, 0x0400 },
172 	{ 0xa0, 0xa0a8 },
173 	{ 0xa1, 0x0059 },
174 	{ 0xa2, 0x0001 },
175 	{ 0xae, 0x6000 },
176 	{ 0xaf, 0x0000 },
177 	{ 0xb0, 0x6000 },
178 	{ 0xb1, 0x0000 },
179 	{ 0xb2, 0x0000 },
180 	{ 0xb3, 0x001f },
181 	{ 0xb4, 0x020c },
182 	{ 0xb5, 0x1f00 },
183 	{ 0xb6, 0x0000 },
184 	{ 0xbb, 0x0000 },
185 	{ 0xbc, 0x0000 },
186 	{ 0xbd, 0x0000 },
187 	{ 0xbe, 0x0000 },
188 	{ 0xbf, 0x3100 },
189 	{ 0xc0, 0x0000 },
190 	{ 0xc1, 0x0000 },
191 	{ 0xc2, 0x0000 },
192 	{ 0xc3, 0x2000 },
193 	{ 0xcd, 0x0000 },
194 	{ 0xce, 0x0000 },
195 	{ 0xcf, 0x1813 },
196 	{ 0xd0, 0x0690 },
197 	{ 0xd1, 0x1c17 },
198 	{ 0xd3, 0xb320 },
199 	{ 0xd4, 0x0000 },
200 	{ 0xd6, 0x0400 },
201 	{ 0xd9, 0x0809 },
202 	{ 0xda, 0x0000 },
203 	{ 0xdb, 0x0003 },
204 	{ 0xdc, 0x0049 },
205 	{ 0xdd, 0x001b },
206 	{ 0xdf, 0x0008 },
207 	{ 0xe0, 0x4000 },
208 	{ 0xe6, 0x8000 },
209 	{ 0xe7, 0x0200 },
210 	{ 0xec, 0xb300 },
211 	{ 0xed, 0x0000 },
212 	{ 0xf0, 0x001f },
213 	{ 0xf1, 0x020c },
214 	{ 0xf2, 0x1f00 },
215 	{ 0xf3, 0x0000 },
216 	{ 0xf4, 0x4000 },
217 	{ 0xf8, 0x0000 },
218 	{ 0xf9, 0x0000 },
219 	{ 0xfa, 0x2060 },
220 	{ 0xfb, 0x4040 },
221 	{ 0xfc, 0x0000 },
222 	{ 0xfd, 0x0002 },
223 	{ 0xfe, 0x10ec },
224 	{ 0xff, 0x6308 },
225 };
226 
227 static const char *const rt5645_supply_names[] = {
228 	"avdd",
229 	"cpvdd",
230 };
231 
232 struct rt5645_priv {
233 	struct snd_soc_codec *codec;
234 	struct rt5645_platform_data pdata;
235 	struct regmap *regmap;
236 	struct i2c_client *i2c;
237 	struct gpio_desc *gpiod_hp_det;
238 	struct snd_soc_jack *hp_jack;
239 	struct snd_soc_jack *mic_jack;
240 	struct snd_soc_jack *btn_jack;
241 	struct delayed_work jack_detect_work;
242 	struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
243 
244 	int codec_type;
245 	int sysclk;
246 	int sysclk_src;
247 	int lrck[RT5645_AIFS];
248 	int bclk[RT5645_AIFS];
249 	int master[RT5645_AIFS];
250 
251 	int pll_src;
252 	int pll_in;
253 	int pll_out;
254 
255 	int jack_type;
256 	bool en_button_func;
257 	bool hp_on;
258 };
259 
260 static int rt5645_reset(struct snd_soc_codec *codec)
261 {
262 	return snd_soc_write(codec, RT5645_RESET, 0);
263 }
264 
265 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
266 {
267 	int i;
268 
269 	for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
270 		if (reg >= rt5645_ranges[i].range_min &&
271 			reg <= rt5645_ranges[i].range_max) {
272 			return true;
273 		}
274 	}
275 
276 	switch (reg) {
277 	case RT5645_RESET:
278 	case RT5645_PRIV_DATA:
279 	case RT5645_IN1_CTRL1:
280 	case RT5645_IN1_CTRL2:
281 	case RT5645_IN1_CTRL3:
282 	case RT5645_A_JD_CTRL1:
283 	case RT5645_ADC_EQ_CTRL1:
284 	case RT5645_EQ_CTRL1:
285 	case RT5645_ALC_CTRL_1:
286 	case RT5645_IRQ_CTRL2:
287 	case RT5645_IRQ_CTRL3:
288 	case RT5645_INT_IRQ_ST:
289 	case RT5645_IL_CMD:
290 	case RT5650_4BTN_IL_CMD1:
291 	case RT5645_VENDOR_ID:
292 	case RT5645_VENDOR_ID1:
293 	case RT5645_VENDOR_ID2:
294 		return true;
295 	default:
296 		return false;
297 	}
298 }
299 
300 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
301 {
302 	int i;
303 
304 	for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
305 		if (reg >= rt5645_ranges[i].range_min &&
306 			reg <= rt5645_ranges[i].range_max) {
307 			return true;
308 		}
309 	}
310 
311 	switch (reg) {
312 	case RT5645_RESET:
313 	case RT5645_SPK_VOL:
314 	case RT5645_HP_VOL:
315 	case RT5645_LOUT1:
316 	case RT5645_IN1_CTRL1:
317 	case RT5645_IN1_CTRL2:
318 	case RT5645_IN1_CTRL3:
319 	case RT5645_IN2_CTRL:
320 	case RT5645_INL1_INR1_VOL:
321 	case RT5645_SPK_FUNC_LIM:
322 	case RT5645_ADJ_HPF_CTRL:
323 	case RT5645_DAC1_DIG_VOL:
324 	case RT5645_DAC2_DIG_VOL:
325 	case RT5645_DAC_CTRL:
326 	case RT5645_STO1_ADC_DIG_VOL:
327 	case RT5645_MONO_ADC_DIG_VOL:
328 	case RT5645_ADC_BST_VOL1:
329 	case RT5645_ADC_BST_VOL2:
330 	case RT5645_STO1_ADC_MIXER:
331 	case RT5645_MONO_ADC_MIXER:
332 	case RT5645_AD_DA_MIXER:
333 	case RT5645_STO_DAC_MIXER:
334 	case RT5645_MONO_DAC_MIXER:
335 	case RT5645_DIG_MIXER:
336 	case RT5650_A_DAC_SOUR:
337 	case RT5645_DIG_INF1_DATA:
338 	case RT5645_PDM_OUT_CTRL:
339 	case RT5645_REC_L1_MIXER:
340 	case RT5645_REC_L2_MIXER:
341 	case RT5645_REC_R1_MIXER:
342 	case RT5645_REC_R2_MIXER:
343 	case RT5645_HPMIXL_CTRL:
344 	case RT5645_HPOMIXL_CTRL:
345 	case RT5645_HPMIXR_CTRL:
346 	case RT5645_HPOMIXR_CTRL:
347 	case RT5645_HPO_MIXER:
348 	case RT5645_SPK_L_MIXER:
349 	case RT5645_SPK_R_MIXER:
350 	case RT5645_SPO_MIXER:
351 	case RT5645_SPO_CLSD_RATIO:
352 	case RT5645_OUT_L1_MIXER:
353 	case RT5645_OUT_R1_MIXER:
354 	case RT5645_OUT_L_GAIN1:
355 	case RT5645_OUT_L_GAIN2:
356 	case RT5645_OUT_R_GAIN1:
357 	case RT5645_OUT_R_GAIN2:
358 	case RT5645_LOUT_MIXER:
359 	case RT5645_HAPTIC_CTRL1:
360 	case RT5645_HAPTIC_CTRL2:
361 	case RT5645_HAPTIC_CTRL3:
362 	case RT5645_HAPTIC_CTRL4:
363 	case RT5645_HAPTIC_CTRL5:
364 	case RT5645_HAPTIC_CTRL6:
365 	case RT5645_HAPTIC_CTRL7:
366 	case RT5645_HAPTIC_CTRL8:
367 	case RT5645_HAPTIC_CTRL9:
368 	case RT5645_HAPTIC_CTRL10:
369 	case RT5645_PWR_DIG1:
370 	case RT5645_PWR_DIG2:
371 	case RT5645_PWR_ANLG1:
372 	case RT5645_PWR_ANLG2:
373 	case RT5645_PWR_MIXER:
374 	case RT5645_PWR_VOL:
375 	case RT5645_PRIV_INDEX:
376 	case RT5645_PRIV_DATA:
377 	case RT5645_I2S1_SDP:
378 	case RT5645_I2S2_SDP:
379 	case RT5645_ADDA_CLK1:
380 	case RT5645_ADDA_CLK2:
381 	case RT5645_DMIC_CTRL1:
382 	case RT5645_DMIC_CTRL2:
383 	case RT5645_TDM_CTRL_1:
384 	case RT5645_TDM_CTRL_2:
385 	case RT5645_TDM_CTRL_3:
386 	case RT5650_TDM_CTRL_4:
387 	case RT5645_GLB_CLK:
388 	case RT5645_PLL_CTRL1:
389 	case RT5645_PLL_CTRL2:
390 	case RT5645_ASRC_1:
391 	case RT5645_ASRC_2:
392 	case RT5645_ASRC_3:
393 	case RT5645_ASRC_4:
394 	case RT5645_DEPOP_M1:
395 	case RT5645_DEPOP_M2:
396 	case RT5645_DEPOP_M3:
397 	case RT5645_CHARGE_PUMP:
398 	case RT5645_MICBIAS:
399 	case RT5645_A_JD_CTRL1:
400 	case RT5645_VAD_CTRL4:
401 	case RT5645_CLSD_OUT_CTRL:
402 	case RT5645_ADC_EQ_CTRL1:
403 	case RT5645_ADC_EQ_CTRL2:
404 	case RT5645_EQ_CTRL1:
405 	case RT5645_EQ_CTRL2:
406 	case RT5645_ALC_CTRL_1:
407 	case RT5645_ALC_CTRL_2:
408 	case RT5645_ALC_CTRL_3:
409 	case RT5645_ALC_CTRL_4:
410 	case RT5645_ALC_CTRL_5:
411 	case RT5645_JD_CTRL:
412 	case RT5645_IRQ_CTRL1:
413 	case RT5645_IRQ_CTRL2:
414 	case RT5645_IRQ_CTRL3:
415 	case RT5645_INT_IRQ_ST:
416 	case RT5645_GPIO_CTRL1:
417 	case RT5645_GPIO_CTRL2:
418 	case RT5645_GPIO_CTRL3:
419 	case RT5645_BASS_BACK:
420 	case RT5645_MP3_PLUS1:
421 	case RT5645_MP3_PLUS2:
422 	case RT5645_ADJ_HPF1:
423 	case RT5645_ADJ_HPF2:
424 	case RT5645_HP_CALIB_AMP_DET:
425 	case RT5645_SV_ZCD1:
426 	case RT5645_SV_ZCD2:
427 	case RT5645_IL_CMD:
428 	case RT5645_IL_CMD2:
429 	case RT5645_IL_CMD3:
430 	case RT5650_4BTN_IL_CMD1:
431 	case RT5650_4BTN_IL_CMD2:
432 	case RT5645_DRC1_HL_CTRL1:
433 	case RT5645_DRC2_HL_CTRL1:
434 	case RT5645_ADC_MONO_HP_CTRL1:
435 	case RT5645_ADC_MONO_HP_CTRL2:
436 	case RT5645_DRC2_CTRL1:
437 	case RT5645_DRC2_CTRL2:
438 	case RT5645_DRC2_CTRL3:
439 	case RT5645_DRC2_CTRL4:
440 	case RT5645_DRC2_CTRL5:
441 	case RT5645_JD_CTRL3:
442 	case RT5645_JD_CTRL4:
443 	case RT5645_GEN_CTRL1:
444 	case RT5645_GEN_CTRL2:
445 	case RT5645_GEN_CTRL3:
446 	case RT5645_VENDOR_ID:
447 	case RT5645_VENDOR_ID1:
448 	case RT5645_VENDOR_ID2:
449 		return true;
450 	default:
451 		return false;
452 	}
453 }
454 
455 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
456 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
457 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
458 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
459 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
460 
461 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
462 static const DECLARE_TLV_DB_RANGE(bst_tlv,
463 	0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
464 	1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
465 	2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
466 	3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
467 	6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
468 	7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
469 	8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
470 );
471 
472 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
473 	/* Speaker Output Volume */
474 	SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
475 		RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
476 	SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
477 		RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
478 
479 	/* Headphone Output Volume */
480 	SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
481 		RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
482 	SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
483 		RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
484 
485 	/* OUTPUT Control */
486 	SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
487 		RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
488 	SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
489 		RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
490 	SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
491 		RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
492 
493 	/* DAC Digital Volume */
494 	SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
495 		RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
496 	SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
497 		RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
498 	SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
499 		RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
500 
501 	/* IN1/IN2 Control */
502 	SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
503 		RT5645_BST_SFT1, 8, 0, bst_tlv),
504 	SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
505 		RT5645_BST_SFT2, 8, 0, bst_tlv),
506 
507 	/* INL/INR Volume Control */
508 	SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
509 		RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
510 
511 	/* ADC Digital Volume Control */
512 	SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
513 		RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
514 	SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
515 		RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
516 	SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
517 		RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
518 	SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
519 		RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
520 
521 	/* ADC Boost Volume Control */
522 	SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
523 		RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
524 		adc_bst_tlv),
525 	SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
526 		RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
527 		adc_bst_tlv),
528 
529 	/* I2S2 function select */
530 	SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
531 		1, 1),
532 };
533 
534 /**
535  * set_dmic_clk - Set parameter of dmic.
536  *
537  * @w: DAPM widget.
538  * @kcontrol: The kcontrol of this widget.
539  * @event: Event id.
540  *
541  */
542 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
543 	struct snd_kcontrol *kcontrol, int event)
544 {
545 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
546 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
547 	int idx, rate;
548 
549 	rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
550 		RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
551 	idx = rl6231_calc_dmic_clk(rate);
552 	if (idx < 0)
553 		dev_err(codec->dev, "Failed to set DMIC clock\n");
554 	else
555 		snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
556 			RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
557 	return idx;
558 }
559 
560 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
561 			 struct snd_soc_dapm_widget *sink)
562 {
563 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
564 	unsigned int val;
565 
566 	val = snd_soc_read(codec, RT5645_GLB_CLK);
567 	val &= RT5645_SCLK_SRC_MASK;
568 	if (val == RT5645_SCLK_SRC_PLL1)
569 		return 1;
570 	else
571 		return 0;
572 }
573 
574 static int is_using_asrc(struct snd_soc_dapm_widget *source,
575 			 struct snd_soc_dapm_widget *sink)
576 {
577 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
578 	unsigned int reg, shift, val;
579 
580 	switch (source->shift) {
581 	case 0:
582 		reg = RT5645_ASRC_3;
583 		shift = 0;
584 		break;
585 	case 1:
586 		reg = RT5645_ASRC_3;
587 		shift = 4;
588 		break;
589 	case 3:
590 		reg = RT5645_ASRC_2;
591 		shift = 0;
592 		break;
593 	case 8:
594 		reg = RT5645_ASRC_2;
595 		shift = 4;
596 		break;
597 	case 9:
598 		reg = RT5645_ASRC_2;
599 		shift = 8;
600 		break;
601 	case 10:
602 		reg = RT5645_ASRC_2;
603 		shift = 12;
604 		break;
605 	default:
606 		return 0;
607 	}
608 
609 	val = (snd_soc_read(codec, reg) >> shift) & 0xf;
610 	switch (val) {
611 	case 1:
612 	case 2:
613 	case 3:
614 	case 4:
615 		return 1;
616 	default:
617 		return 0;
618 	}
619 
620 }
621 
622 /**
623  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
624  * @codec: SoC audio codec device.
625  * @filter_mask: mask of filters.
626  * @clk_src: clock source
627  *
628  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
629  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
630  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
631  * ASRC function will track i2s clock and generate a corresponding system clock
632  * for codec. This function provides an API to select the clock source for a
633  * set of filters specified by the mask. And the codec driver will turn on ASRC
634  * for these filters if ASRC is selected as their clock source.
635  */
636 int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec,
637 		unsigned int filter_mask, unsigned int clk_src)
638 {
639 	unsigned int asrc2_mask = 0;
640 	unsigned int asrc2_value = 0;
641 	unsigned int asrc3_mask = 0;
642 	unsigned int asrc3_value = 0;
643 
644 	switch (clk_src) {
645 	case RT5645_CLK_SEL_SYS:
646 	case RT5645_CLK_SEL_I2S1_ASRC:
647 	case RT5645_CLK_SEL_I2S2_ASRC:
648 	case RT5645_CLK_SEL_SYS2:
649 		break;
650 
651 	default:
652 		return -EINVAL;
653 	}
654 
655 	if (filter_mask & RT5645_DA_STEREO_FILTER) {
656 		asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
657 		asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
658 			| (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
659 	}
660 
661 	if (filter_mask & RT5645_DA_MONO_L_FILTER) {
662 		asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
663 		asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
664 			| (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
665 	}
666 
667 	if (filter_mask & RT5645_DA_MONO_R_FILTER) {
668 		asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
669 		asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
670 			| (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
671 	}
672 
673 	if (filter_mask & RT5645_AD_STEREO_FILTER) {
674 		asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
675 		asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
676 			| (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
677 	}
678 
679 	if (filter_mask & RT5645_AD_MONO_L_FILTER) {
680 		asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
681 		asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
682 			| (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
683 	}
684 
685 	if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
686 		asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
687 		asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
688 			| (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
689 	}
690 
691 	if (asrc2_mask)
692 		snd_soc_update_bits(codec, RT5645_ASRC_2,
693 			asrc2_mask, asrc2_value);
694 
695 	if (asrc3_mask)
696 		snd_soc_update_bits(codec, RT5645_ASRC_3,
697 			asrc3_mask, asrc3_value);
698 
699 	return 0;
700 }
701 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
702 
703 /* Digital Mixer */
704 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
705 	SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
706 			RT5645_M_ADC_L1_SFT, 1, 1),
707 	SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
708 			RT5645_M_ADC_L2_SFT, 1, 1),
709 };
710 
711 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
712 	SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
713 			RT5645_M_ADC_R1_SFT, 1, 1),
714 	SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
715 			RT5645_M_ADC_R2_SFT, 1, 1),
716 };
717 
718 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
719 	SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
720 			RT5645_M_MONO_ADC_L1_SFT, 1, 1),
721 	SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
722 			RT5645_M_MONO_ADC_L2_SFT, 1, 1),
723 };
724 
725 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
726 	SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
727 			RT5645_M_MONO_ADC_R1_SFT, 1, 1),
728 	SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
729 			RT5645_M_MONO_ADC_R2_SFT, 1, 1),
730 };
731 
732 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
733 	SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
734 			RT5645_M_ADCMIX_L_SFT, 1, 1),
735 	SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
736 			RT5645_M_DAC1_L_SFT, 1, 1),
737 };
738 
739 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
740 	SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
741 			RT5645_M_ADCMIX_R_SFT, 1, 1),
742 	SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
743 			RT5645_M_DAC1_R_SFT, 1, 1),
744 };
745 
746 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
747 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
748 			RT5645_M_DAC_L1_SFT, 1, 1),
749 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
750 			RT5645_M_DAC_L2_SFT, 1, 1),
751 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
752 			RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
753 };
754 
755 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
756 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
757 			RT5645_M_DAC_R1_SFT, 1, 1),
758 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
759 			RT5645_M_DAC_R2_SFT, 1, 1),
760 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
761 			RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
762 };
763 
764 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
765 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
766 			RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
767 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
768 			RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
769 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
770 			RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
771 };
772 
773 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
774 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
775 			RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
776 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
777 			RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
778 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
779 			RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
780 };
781 
782 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
783 	SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
784 			RT5645_M_STO_L_DAC_L_SFT, 1, 1),
785 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
786 			RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
787 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
788 			RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
789 };
790 
791 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
792 	SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
793 			RT5645_M_STO_R_DAC_R_SFT, 1, 1),
794 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
795 			RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
796 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
797 			RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
798 };
799 
800 /* Analog Input Mixer */
801 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
802 	SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
803 			RT5645_M_HP_L_RM_L_SFT, 1, 1),
804 	SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
805 			RT5645_M_IN_L_RM_L_SFT, 1, 1),
806 	SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
807 			RT5645_M_BST2_RM_L_SFT, 1, 1),
808 	SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
809 			RT5645_M_BST1_RM_L_SFT, 1, 1),
810 	SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
811 			RT5645_M_OM_L_RM_L_SFT, 1, 1),
812 };
813 
814 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
815 	SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
816 			RT5645_M_HP_R_RM_R_SFT, 1, 1),
817 	SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
818 			RT5645_M_IN_R_RM_R_SFT, 1, 1),
819 	SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
820 			RT5645_M_BST2_RM_R_SFT, 1, 1),
821 	SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
822 			RT5645_M_BST1_RM_R_SFT, 1, 1),
823 	SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
824 			RT5645_M_OM_R_RM_R_SFT, 1, 1),
825 };
826 
827 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
828 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
829 			RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
830 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
831 			RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
832 	SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
833 			RT5645_M_IN_L_SM_L_SFT, 1, 1),
834 	SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
835 			RT5645_M_BST1_L_SM_L_SFT, 1, 1),
836 };
837 
838 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
839 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
840 			RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
841 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
842 			RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
843 	SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
844 			RT5645_M_IN_R_SM_R_SFT, 1, 1),
845 	SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
846 			RT5645_M_BST2_R_SM_R_SFT, 1, 1),
847 };
848 
849 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
850 	SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
851 			RT5645_M_BST1_OM_L_SFT, 1, 1),
852 	SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
853 			RT5645_M_IN_L_OM_L_SFT, 1, 1),
854 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
855 			RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
856 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
857 			RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
858 };
859 
860 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
861 	SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
862 			RT5645_M_BST2_OM_R_SFT, 1, 1),
863 	SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
864 			RT5645_M_IN_R_OM_R_SFT, 1, 1),
865 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
866 			RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
867 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
868 			RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
869 };
870 
871 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
872 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
873 			RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
874 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
875 			RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
876 	SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
877 			RT5645_M_SV_R_SPM_L_SFT, 1, 1),
878 	SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
879 			RT5645_M_SV_L_SPM_L_SFT, 1, 1),
880 };
881 
882 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
883 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
884 			RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
885 	SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
886 			RT5645_M_SV_R_SPM_R_SFT, 1, 1),
887 };
888 
889 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
890 	SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
891 			RT5645_M_DAC1_HM_SFT, 1, 1),
892 	SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
893 			RT5645_M_HPVOL_HM_SFT, 1, 1),
894 };
895 
896 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
897 	SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
898 			RT5645_M_DAC1_HV_SFT, 1, 1),
899 	SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
900 			RT5645_M_DAC2_HV_SFT, 1, 1),
901 	SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
902 			RT5645_M_IN_HV_SFT, 1, 1),
903 	SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
904 			RT5645_M_BST1_HV_SFT, 1, 1),
905 };
906 
907 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
908 	SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
909 			RT5645_M_DAC1_HV_SFT, 1, 1),
910 	SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
911 			RT5645_M_DAC2_HV_SFT, 1, 1),
912 	SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
913 			RT5645_M_IN_HV_SFT, 1, 1),
914 	SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
915 			RT5645_M_BST2_HV_SFT, 1, 1),
916 };
917 
918 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
919 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
920 			RT5645_M_DAC_L1_LM_SFT, 1, 1),
921 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
922 			RT5645_M_DAC_R1_LM_SFT, 1, 1),
923 	SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
924 			RT5645_M_OV_L_LM_SFT, 1, 1),
925 	SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
926 			RT5645_M_OV_R_LM_SFT, 1, 1),
927 };
928 
929 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
930 static const char * const rt5645_dac1_src[] = {
931 	"IF1 DAC", "IF2 DAC", "IF3 DAC"
932 };
933 
934 static SOC_ENUM_SINGLE_DECL(
935 	rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
936 	RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
937 
938 static const struct snd_kcontrol_new rt5645_dac1l_mux =
939 	SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
940 
941 static SOC_ENUM_SINGLE_DECL(
942 	rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
943 	RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
944 
945 static const struct snd_kcontrol_new rt5645_dac1r_mux =
946 	SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
947 
948 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
949 static const char * const rt5645_dac12_src[] = {
950 	"IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
951 };
952 
953 static SOC_ENUM_SINGLE_DECL(
954 	rt5645_dac2l_enum, RT5645_DAC_CTRL,
955 	RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
956 
957 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
958 	SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
959 
960 static const char * const rt5645_dacr2_src[] = {
961 	"IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
962 };
963 
964 static SOC_ENUM_SINGLE_DECL(
965 	rt5645_dac2r_enum, RT5645_DAC_CTRL,
966 	RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
967 
968 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
969 	SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
970 
971 
972 /* INL/R source */
973 static const char * const rt5645_inl_src[] = {
974 	"IN2P", "MonoP"
975 };
976 
977 static SOC_ENUM_SINGLE_DECL(
978 	rt5645_inl_enum, RT5645_INL1_INR1_VOL,
979 	RT5645_INL_SEL_SFT, rt5645_inl_src);
980 
981 static const struct snd_kcontrol_new rt5645_inl_mux =
982 	SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
983 
984 static const char * const rt5645_inr_src[] = {
985 	"IN2N", "MonoN"
986 };
987 
988 static SOC_ENUM_SINGLE_DECL(
989 	rt5645_inr_enum, RT5645_INL1_INR1_VOL,
990 	RT5645_INR_SEL_SFT, rt5645_inr_src);
991 
992 static const struct snd_kcontrol_new rt5645_inr_mux =
993 	SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
994 
995 /* Stereo1 ADC source */
996 /* MX-27 [12] */
997 static const char * const rt5645_stereo_adc1_src[] = {
998 	"DAC MIX", "ADC"
999 };
1000 
1001 static SOC_ENUM_SINGLE_DECL(
1002 	rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1003 	RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1004 
1005 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1006 	SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1007 
1008 /* MX-27 [11] */
1009 static const char * const rt5645_stereo_adc2_src[] = {
1010 	"DAC MIX", "DMIC"
1011 };
1012 
1013 static SOC_ENUM_SINGLE_DECL(
1014 	rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1015 	RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1016 
1017 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1018 	SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1019 
1020 /* MX-27 [8] */
1021 static const char * const rt5645_stereo_dmic_src[] = {
1022 	"DMIC1", "DMIC2"
1023 };
1024 
1025 static SOC_ENUM_SINGLE_DECL(
1026 	rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1027 	RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1028 
1029 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1030 	SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1031 
1032 /* Mono ADC source */
1033 /* MX-28 [12] */
1034 static const char * const rt5645_mono_adc_l1_src[] = {
1035 	"Mono DAC MIXL", "ADC"
1036 };
1037 
1038 static SOC_ENUM_SINGLE_DECL(
1039 	rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1040 	RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1041 
1042 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1043 	SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1044 /* MX-28 [11] */
1045 static const char * const rt5645_mono_adc_l2_src[] = {
1046 	"Mono DAC MIXL", "DMIC"
1047 };
1048 
1049 static SOC_ENUM_SINGLE_DECL(
1050 	rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1051 	RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1052 
1053 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1054 	SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1055 
1056 /* MX-28 [8] */
1057 static const char * const rt5645_mono_dmic_src[] = {
1058 	"DMIC1", "DMIC2"
1059 };
1060 
1061 static SOC_ENUM_SINGLE_DECL(
1062 	rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1063 	RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1064 
1065 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1066 	SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1067 /* MX-28 [1:0] */
1068 static SOC_ENUM_SINGLE_DECL(
1069 	rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1070 	RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1071 
1072 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1073 	SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1074 /* MX-28 [4] */
1075 static const char * const rt5645_mono_adc_r1_src[] = {
1076 	"Mono DAC MIXR", "ADC"
1077 };
1078 
1079 static SOC_ENUM_SINGLE_DECL(
1080 	rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1081 	RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1082 
1083 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1084 	SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1085 /* MX-28 [3] */
1086 static const char * const rt5645_mono_adc_r2_src[] = {
1087 	"Mono DAC MIXR", "DMIC"
1088 };
1089 
1090 static SOC_ENUM_SINGLE_DECL(
1091 	rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1092 	RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1093 
1094 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1095 	SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1096 
1097 /* MX-77 [9:8] */
1098 static const char * const rt5645_if1_adc_in_src[] = {
1099 	"IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1100 	"VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1101 };
1102 
1103 static SOC_ENUM_SINGLE_DECL(
1104 	rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1105 	RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1106 
1107 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1108 	SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1109 
1110 /* MX-78 [4:0] */
1111 static const char * const rt5650_if1_adc_in_src[] = {
1112 	"IF_ADC1/IF_ADC2/DAC_REF/Null",
1113 	"IF_ADC1/IF_ADC2/Null/DAC_REF",
1114 	"IF_ADC1/DAC_REF/IF_ADC2/Null",
1115 	"IF_ADC1/DAC_REF/Null/IF_ADC2",
1116 	"IF_ADC1/Null/DAC_REF/IF_ADC2",
1117 	"IF_ADC1/Null/IF_ADC2/DAC_REF",
1118 
1119 	"IF_ADC2/IF_ADC1/DAC_REF/Null",
1120 	"IF_ADC2/IF_ADC1/Null/DAC_REF",
1121 	"IF_ADC2/DAC_REF/IF_ADC1/Null",
1122 	"IF_ADC2/DAC_REF/Null/IF_ADC1",
1123 	"IF_ADC2/Null/DAC_REF/IF_ADC1",
1124 	"IF_ADC2/Null/IF_ADC1/DAC_REF",
1125 
1126 	"DAC_REF/IF_ADC1/IF_ADC2/Null",
1127 	"DAC_REF/IF_ADC1/Null/IF_ADC2",
1128 	"DAC_REF/IF_ADC2/IF_ADC1/Null",
1129 	"DAC_REF/IF_ADC2/Null/IF_ADC1",
1130 	"DAC_REF/Null/IF_ADC1/IF_ADC2",
1131 	"DAC_REF/Null/IF_ADC2/IF_ADC1",
1132 
1133 	"Null/IF_ADC1/IF_ADC2/DAC_REF",
1134 	"Null/IF_ADC1/DAC_REF/IF_ADC2",
1135 	"Null/IF_ADC2/IF_ADC1/DAC_REF",
1136 	"Null/IF_ADC2/DAC_REF/IF_ADC1",
1137 	"Null/DAC_REF/IF_ADC1/IF_ADC2",
1138 	"Null/DAC_REF/IF_ADC2/IF_ADC1",
1139 };
1140 
1141 static SOC_ENUM_SINGLE_DECL(
1142 	rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1143 	0, rt5650_if1_adc_in_src);
1144 
1145 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1146 	SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1147 
1148 /* MX-78 [15:14][13:12][11:10] */
1149 static const char * const rt5645_tdm_adc_swap_select[] = {
1150 	"L/R", "R/L", "L/L", "R/R"
1151 };
1152 
1153 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1154 	RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1155 
1156 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1157 	SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1158 
1159 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1160 	RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1161 
1162 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1163 	SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1164 
1165 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1166 	RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1167 
1168 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1169 	SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1170 
1171 /* MX-77 [7:6][5:4][3:2] */
1172 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1173 	RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1174 
1175 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1176 	SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1177 
1178 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1179 	RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1180 
1181 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1182 	SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1183 
1184 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1185 	RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1186 
1187 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1188 	SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1189 
1190 /* MX-79 [14:12][10:8][6:4][2:0] */
1191 static const char * const rt5645_tdm_dac_swap_select[] = {
1192 	"Slot0", "Slot1", "Slot2", "Slot3"
1193 };
1194 
1195 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1196 	RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1197 
1198 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1199 	SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1200 
1201 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1202 	RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1203 
1204 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1205 	SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1206 
1207 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1208 	RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1209 
1210 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1211 	SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1212 
1213 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1214 	RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1215 
1216 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1217 	SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1218 
1219 /* MX-7a [14:12][10:8][6:4][2:0] */
1220 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1221 	RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1222 
1223 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1224 	SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1225 
1226 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1227 	RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1228 
1229 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1230 	SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1231 
1232 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1233 	RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1234 
1235 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1236 	SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1237 
1238 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1239 	RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1240 
1241 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1242 	SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1243 
1244 /* MX-2d [3] [2] */
1245 static const char * const rt5650_a_dac1_src[] = {
1246 	"DAC1", "Stereo DAC Mixer"
1247 };
1248 
1249 static SOC_ENUM_SINGLE_DECL(
1250 	rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1251 	RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1252 
1253 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1254 	SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1255 
1256 static SOC_ENUM_SINGLE_DECL(
1257 	rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1258 	RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1259 
1260 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1261 	SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1262 
1263 /* MX-2d [1] [0] */
1264 static const char * const rt5650_a_dac2_src[] = {
1265 	"Stereo DAC Mixer", "Mono DAC Mixer"
1266 };
1267 
1268 static SOC_ENUM_SINGLE_DECL(
1269 	rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1270 	RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1271 
1272 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1273 	SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1274 
1275 static SOC_ENUM_SINGLE_DECL(
1276 	rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1277 	RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1278 
1279 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1280 	SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1281 
1282 /* MX-2F [13:12] */
1283 static const char * const rt5645_if2_adc_in_src[] = {
1284 	"IF_ADC1", "IF_ADC2", "VAD_ADC"
1285 };
1286 
1287 static SOC_ENUM_SINGLE_DECL(
1288 	rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1289 	RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1290 
1291 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1292 	SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1293 
1294 /* MX-2F [1:0] */
1295 static const char * const rt5645_if3_adc_in_src[] = {
1296 	"IF_ADC1", "IF_ADC2", "VAD_ADC"
1297 };
1298 
1299 static SOC_ENUM_SINGLE_DECL(
1300 	rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1301 	RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1302 
1303 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1304 	SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1305 
1306 /* MX-31 [15] [13] [11] [9] */
1307 static const char * const rt5645_pdm_src[] = {
1308 	"Mono DAC", "Stereo DAC"
1309 };
1310 
1311 static SOC_ENUM_SINGLE_DECL(
1312 	rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1313 	RT5645_PDM1_L_SFT, rt5645_pdm_src);
1314 
1315 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1316 	SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1317 
1318 static SOC_ENUM_SINGLE_DECL(
1319 	rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1320 	RT5645_PDM1_R_SFT, rt5645_pdm_src);
1321 
1322 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1323 	SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1324 
1325 /* MX-9D [9:8] */
1326 static const char * const rt5645_vad_adc_src[] = {
1327 	"Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1328 };
1329 
1330 static SOC_ENUM_SINGLE_DECL(
1331 	rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1332 	RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1333 
1334 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1335 	SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1336 
1337 static const struct snd_kcontrol_new spk_l_vol_control =
1338 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1339 		RT5645_L_MUTE_SFT, 1, 1);
1340 
1341 static const struct snd_kcontrol_new spk_r_vol_control =
1342 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1343 		RT5645_R_MUTE_SFT, 1, 1);
1344 
1345 static const struct snd_kcontrol_new hp_l_vol_control =
1346 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1347 		RT5645_L_MUTE_SFT, 1, 1);
1348 
1349 static const struct snd_kcontrol_new hp_r_vol_control =
1350 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1351 		RT5645_R_MUTE_SFT, 1, 1);
1352 
1353 static const struct snd_kcontrol_new pdm1_l_vol_control =
1354 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1355 		RT5645_M_PDM1_L, 1, 1);
1356 
1357 static const struct snd_kcontrol_new pdm1_r_vol_control =
1358 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1359 		RT5645_M_PDM1_R, 1, 1);
1360 
1361 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1362 {
1363 	static int hp_amp_power_count;
1364 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1365 
1366 	if (on) {
1367 		if (hp_amp_power_count <= 0) {
1368 			if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1369 				snd_soc_write(codec, RT5645_DEPOP_M2, 0x3100);
1370 				snd_soc_write(codec, RT5645_CHARGE_PUMP,
1371 					0x0e06);
1372 				snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1373 				regmap_write(rt5645->regmap, RT5645_PR_BASE +
1374 					RT5645_HP_DCC_INT1, 0x9f01);
1375 				msleep(20);
1376 				snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1377 					RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1378 				regmap_write(rt5645->regmap, RT5645_PR_BASE +
1379 					0x3e, 0x7400);
1380 				snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1381 				regmap_write(rt5645->regmap, RT5645_PR_BASE +
1382 					RT5645_MAMP_INT_REG2, 0xfc00);
1383 				snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140);
1384 				msleep(40);
1385 				rt5645->hp_on = true;
1386 			} else {
1387 				/* depop parameters */
1388 				snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1389 					RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1390 				snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1391 				regmap_write(rt5645->regmap, RT5645_PR_BASE +
1392 					RT5645_HP_DCC_INT1, 0x9f01);
1393 				mdelay(150);
1394 				/* headphone amp power on */
1395 				snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1396 					RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1397 				snd_soc_update_bits(codec, RT5645_PWR_VOL,
1398 					RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1399 					RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1400 				snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1401 					RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1402 					RT5645_PWR_HA,
1403 					RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1404 					RT5645_PWR_HA);
1405 				mdelay(5);
1406 				snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1407 					RT5645_PWR_FV1 | RT5645_PWR_FV2,
1408 					RT5645_PWR_FV1 | RT5645_PWR_FV2);
1409 
1410 				snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1411 					RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1412 					RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1413 				regmap_write(rt5645->regmap, RT5645_PR_BASE +
1414 					0x14, 0x1aaa);
1415 				regmap_write(rt5645->regmap, RT5645_PR_BASE +
1416 					0x24, 0x0430);
1417 			}
1418 		}
1419 		hp_amp_power_count++;
1420 	} else {
1421 		hp_amp_power_count--;
1422 		if (hp_amp_power_count <= 0) {
1423 			if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1424 				regmap_write(rt5645->regmap, RT5645_PR_BASE +
1425 					0x3e, 0x7400);
1426 				snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1427 				regmap_write(rt5645->regmap, RT5645_PR_BASE +
1428 					RT5645_MAMP_INT_REG2, 0xfc00);
1429 				snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140);
1430 				msleep(100);
1431 				snd_soc_write(codec, RT5645_DEPOP_M1, 0x0001);
1432 
1433 			} else {
1434 				snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1435 					RT5645_HP_SG_MASK |
1436 					RT5645_HP_L_SMT_MASK |
1437 					RT5645_HP_R_SMT_MASK,
1438 					RT5645_HP_SG_DIS |
1439 					RT5645_HP_L_SMT_DIS |
1440 					RT5645_HP_R_SMT_DIS);
1441 				/* headphone amp power down */
1442 				snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1443 				snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1444 					RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1445 					RT5645_PWR_HA, 0);
1446 				snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1447 					RT5645_DEPOP_MASK, 0);
1448 			}
1449 		}
1450 	}
1451 }
1452 
1453 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1454 	struct snd_kcontrol *kcontrol, int event)
1455 {
1456 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1457 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1458 
1459 	switch (event) {
1460 	case SND_SOC_DAPM_POST_PMU:
1461 		hp_amp_power(codec, 1);
1462 		/* headphone unmute sequence */
1463 		if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1464 			snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1465 				RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1466 				RT5645_CP_FQ3_MASK,
1467 				(RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1468 				(RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1469 				(RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1470 			regmap_write(rt5645->regmap, RT5645_PR_BASE +
1471 				RT5645_MAMP_INT_REG2, 0xfc00);
1472 			snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1473 				RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1474 			snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1475 				RT5645_RSTN_MASK, RT5645_RSTN_EN);
1476 			snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1477 				RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1478 				RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1479 				RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1480 			msleep(40);
1481 			snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1482 				RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1483 				RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1484 				RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1485 		}
1486 		break;
1487 
1488 	case SND_SOC_DAPM_PRE_PMD:
1489 		/* headphone mute sequence */
1490 		if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1491 			snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1492 				RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1493 				RT5645_CP_FQ3_MASK,
1494 				(RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1495 				(RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1496 				(RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1497 			regmap_write(rt5645->regmap, RT5645_PR_BASE +
1498 				RT5645_MAMP_INT_REG2, 0xfc00);
1499 			snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1500 				RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1501 			snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1502 				RT5645_RSTP_MASK, RT5645_RSTP_EN);
1503 			snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1504 				RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1505 				RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1506 				RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1507 			msleep(30);
1508 		}
1509 		hp_amp_power(codec, 0);
1510 		break;
1511 
1512 	default:
1513 		return 0;
1514 	}
1515 
1516 	return 0;
1517 }
1518 
1519 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1520 	struct snd_kcontrol *kcontrol, int event)
1521 {
1522 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1523 
1524 	switch (event) {
1525 	case SND_SOC_DAPM_POST_PMU:
1526 		snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1527 			RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1528 			RT5645_PWR_CLS_D_L,
1529 			RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1530 			RT5645_PWR_CLS_D_L);
1531 		break;
1532 
1533 	case SND_SOC_DAPM_PRE_PMD:
1534 		snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1535 			RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1536 			RT5645_PWR_CLS_D_L, 0);
1537 		break;
1538 
1539 	default:
1540 		return 0;
1541 	}
1542 
1543 	return 0;
1544 }
1545 
1546 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1547 	struct snd_kcontrol *kcontrol, int event)
1548 {
1549 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1550 
1551 	switch (event) {
1552 	case SND_SOC_DAPM_POST_PMU:
1553 		hp_amp_power(codec, 1);
1554 		snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1555 			RT5645_PWR_LM, RT5645_PWR_LM);
1556 		snd_soc_update_bits(codec, RT5645_LOUT1,
1557 			RT5645_L_MUTE | RT5645_R_MUTE, 0);
1558 		break;
1559 
1560 	case SND_SOC_DAPM_PRE_PMD:
1561 		snd_soc_update_bits(codec, RT5645_LOUT1,
1562 			RT5645_L_MUTE | RT5645_R_MUTE,
1563 			RT5645_L_MUTE | RT5645_R_MUTE);
1564 		snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1565 			RT5645_PWR_LM, 0);
1566 		hp_amp_power(codec, 0);
1567 		break;
1568 
1569 	default:
1570 		return 0;
1571 	}
1572 
1573 	return 0;
1574 }
1575 
1576 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1577 	struct snd_kcontrol *kcontrol, int event)
1578 {
1579 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1580 
1581 	switch (event) {
1582 	case SND_SOC_DAPM_POST_PMU:
1583 		snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1584 			RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1585 		break;
1586 
1587 	case SND_SOC_DAPM_PRE_PMD:
1588 		snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1589 			RT5645_PWR_BST2_P, 0);
1590 		break;
1591 
1592 	default:
1593 		return 0;
1594 	}
1595 
1596 	return 0;
1597 }
1598 
1599 static int rt5650_hp_event(struct snd_soc_dapm_widget *w,
1600 		struct snd_kcontrol *k, int  event)
1601 {
1602 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1603 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1604 
1605 	switch (event) {
1606 	case SND_SOC_DAPM_POST_PMU:
1607 		if (rt5645->hp_on) {
1608 			msleep(100);
1609 			rt5645->hp_on = false;
1610 		}
1611 		break;
1612 
1613 	default:
1614 		return 0;
1615 	}
1616 
1617 	return 0;
1618 }
1619 
1620 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1621 	SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1622 		RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1623 	SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1624 		RT5645_PWR_PLL_BIT, 0, NULL, 0),
1625 
1626 	SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1627 		RT5645_PWR_JD1_BIT, 0, NULL, 0),
1628 	SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1629 		RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1630 
1631 	/* ASRC */
1632 	SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1633 			      11, 0, NULL, 0),
1634 	SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1635 			      12, 0, NULL, 0),
1636 	SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1637 			      10, 0, NULL, 0),
1638 	SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1639 			      9, 0, NULL, 0),
1640 	SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1641 			      8, 0, NULL, 0),
1642 	SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1643 			      7, 0, NULL, 0),
1644 	SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1645 			      5, 0, NULL, 0),
1646 	SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1647 			      4, 0, NULL, 0),
1648 	SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1649 			      3, 0, NULL, 0),
1650 	SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1651 			      1, 0, NULL, 0),
1652 	SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1653 			      0, 0, NULL, 0),
1654 
1655 	/* Input Side */
1656 	/* micbias */
1657 	SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1658 			RT5645_PWR_MB1_BIT, 0),
1659 	SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1660 			RT5645_PWR_MB2_BIT, 0),
1661 	/* Input Lines */
1662 	SND_SOC_DAPM_INPUT("DMIC L1"),
1663 	SND_SOC_DAPM_INPUT("DMIC R1"),
1664 	SND_SOC_DAPM_INPUT("DMIC L2"),
1665 	SND_SOC_DAPM_INPUT("DMIC R2"),
1666 
1667 	SND_SOC_DAPM_INPUT("IN1P"),
1668 	SND_SOC_DAPM_INPUT("IN1N"),
1669 	SND_SOC_DAPM_INPUT("IN2P"),
1670 	SND_SOC_DAPM_INPUT("IN2N"),
1671 
1672 	SND_SOC_DAPM_INPUT("Haptic Generator"),
1673 
1674 	SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1675 	SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1676 	SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1677 		set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1678 	SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1679 		RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1680 	SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1681 		RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1682 	/* Boost */
1683 	SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1684 		RT5645_PWR_BST1_BIT, 0, NULL, 0),
1685 	SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1686 		RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1687 		SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1688 	/* Input Volume */
1689 	SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1690 		RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1691 	SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1692 		RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1693 	/* REC Mixer */
1694 	SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1695 			0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1696 	SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1697 			0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1698 	/* ADCs */
1699 	SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1700 	SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1701 
1702 	SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1703 		RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1704 	SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1705 		RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1706 
1707 	/* ADC Mux */
1708 	SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1709 		&rt5645_sto1_dmic_mux),
1710 	SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1711 		&rt5645_sto_adc2_mux),
1712 	SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1713 		&rt5645_sto_adc2_mux),
1714 	SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1715 		&rt5645_sto_adc1_mux),
1716 	SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1717 		&rt5645_sto_adc1_mux),
1718 	SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1719 		&rt5645_mono_dmic_l_mux),
1720 	SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1721 		&rt5645_mono_dmic_r_mux),
1722 	SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1723 		&rt5645_mono_adc_l2_mux),
1724 	SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1725 		&rt5645_mono_adc_l1_mux),
1726 	SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1727 		&rt5645_mono_adc_r1_mux),
1728 	SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1729 		&rt5645_mono_adc_r2_mux),
1730 	/* ADC Mixer */
1731 
1732 	SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1733 		RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1734 	SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1735 		rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1736 		NULL, 0),
1737 	SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1738 		rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1739 		NULL, 0),
1740 	SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1741 		RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1742 	SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1743 		rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1744 		NULL, 0),
1745 	SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1746 		RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1747 	SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1748 		rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1749 		NULL, 0),
1750 
1751 	/* ADC PGA */
1752 	SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1753 	SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1754 	SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1755 	SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1756 	SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1757 	SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1758 	SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1759 	SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1760 	SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1761 	SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1762 
1763 	/* IF1 2 Mux */
1764 	SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1765 		0, 0, &rt5645_if2_adc_in_mux),
1766 
1767 	/* Digital Interface */
1768 	SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1769 		RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1770 	SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
1771 	SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1772 	SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1773 	SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1774 	SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1775 	SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1776 	SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1777 	SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1778 		RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1779 	SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1780 	SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1781 	SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1782 	SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1783 
1784 	/* Digital Interface Select */
1785 	SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1786 		0, 0, &rt5645_vad_adc_mux),
1787 
1788 	/* Audio Interface */
1789 	SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1790 	SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1791 	SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1792 	SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1793 
1794 	/* Output Side */
1795 	/* DAC mixer before sound effect  */
1796 	SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1797 		rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1798 	SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1799 		rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1800 
1801 	/* DAC2 channel Mux */
1802 	SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1803 	SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1804 	SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1805 		RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1806 	SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1807 		RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1808 
1809 	SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1810 	SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1811 
1812 	/* DAC Mixer */
1813 	SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1814 		RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1815 	SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1816 		RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1817 	SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1818 		RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1819 	SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1820 		rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1821 	SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1822 		rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1823 	SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1824 		rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1825 	SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1826 		rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1827 	SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1828 		rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1829 	SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1830 		rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1831 
1832 	/* DACs */
1833 	SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1834 		0),
1835 	SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1836 		0),
1837 	SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1838 		0),
1839 	SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1840 		0),
1841 	/* OUT Mixer */
1842 	SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1843 		0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1844 	SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1845 		0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1846 	SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1847 		0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1848 	SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1849 		0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1850 	/* Ouput Volume */
1851 	SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1852 		&spk_l_vol_control),
1853 	SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1854 		&spk_r_vol_control),
1855 	SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1856 		0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1857 	SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1858 		0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1859 	SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1860 		RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1861 	SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1862 		RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1863 	SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1864 	SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1865 	SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1866 	SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1867 	SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1868 
1869 	/* HPO/LOUT/Mono Mixer */
1870 	SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1871 		ARRAY_SIZE(rt5645_spo_l_mix)),
1872 	SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1873 		ARRAY_SIZE(rt5645_spo_r_mix)),
1874 	SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1875 		ARRAY_SIZE(rt5645_hpo_mix)),
1876 	SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1877 		ARRAY_SIZE(rt5645_lout_mix)),
1878 
1879 	SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1880 		SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1881 	SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1882 		SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1883 	SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1884 		SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1885 
1886 	/* PDM */
1887 	SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1888 		0, NULL, 0),
1889 	SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1890 	SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1891 
1892 	SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1893 	SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1894 
1895 	/* Output Lines */
1896 	SND_SOC_DAPM_OUTPUT("HPOL"),
1897 	SND_SOC_DAPM_OUTPUT("HPOR"),
1898 	SND_SOC_DAPM_OUTPUT("LOUTL"),
1899 	SND_SOC_DAPM_OUTPUT("LOUTR"),
1900 	SND_SOC_DAPM_OUTPUT("PDM1L"),
1901 	SND_SOC_DAPM_OUTPUT("PDM1R"),
1902 	SND_SOC_DAPM_OUTPUT("SPOL"),
1903 	SND_SOC_DAPM_OUTPUT("SPOR"),
1904 	SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event),
1905 };
1906 
1907 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
1908 	SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
1909 		&rt5645_if1_dac0_tdm_sel_mux),
1910 	SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
1911 		&rt5645_if1_dac1_tdm_sel_mux),
1912 	SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
1913 		&rt5645_if1_dac2_tdm_sel_mux),
1914 	SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
1915 		&rt5645_if1_dac3_tdm_sel_mux),
1916 	SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
1917 		0, 0, &rt5645_if1_adc_in_mux),
1918 	SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
1919 		0, 0, &rt5645_if1_adc1_in_mux),
1920 	SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
1921 		0, 0, &rt5645_if1_adc2_in_mux),
1922 	SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
1923 		0, 0, &rt5645_if1_adc3_in_mux),
1924 };
1925 
1926 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
1927 	SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
1928 		0, 0, &rt5650_a_dac1_l_mux),
1929 	SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
1930 		0, 0, &rt5650_a_dac1_r_mux),
1931 	SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
1932 		0, 0, &rt5650_a_dac2_l_mux),
1933 	SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
1934 		0, 0, &rt5650_a_dac2_r_mux),
1935 
1936 	SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
1937 		0, 0, &rt5650_if1_adc1_in_mux),
1938 	SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
1939 		0, 0, &rt5650_if1_adc2_in_mux),
1940 	SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
1941 		0, 0, &rt5650_if1_adc3_in_mux),
1942 	SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
1943 		0, 0, &rt5650_if1_adc_in_mux),
1944 
1945 	SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
1946 		&rt5650_if1_dac0_tdm_sel_mux),
1947 	SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
1948 		&rt5650_if1_dac1_tdm_sel_mux),
1949 	SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
1950 		&rt5650_if1_dac2_tdm_sel_mux),
1951 	SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
1952 		&rt5650_if1_dac3_tdm_sel_mux),
1953 };
1954 
1955 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1956 	{ "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1957 	{ "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1958 	{ "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1959 	{ "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1960 	{ "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1961 	{ "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
1962 
1963 	{ "I2S1", NULL, "I2S1 ASRC" },
1964 	{ "I2S2", NULL, "I2S2 ASRC" },
1965 
1966 	{ "IN1P", NULL, "LDO2" },
1967 	{ "IN2P", NULL, "LDO2" },
1968 
1969 	{ "DMIC1", NULL, "DMIC L1" },
1970 	{ "DMIC1", NULL, "DMIC R1" },
1971 	{ "DMIC2", NULL, "DMIC L2" },
1972 	{ "DMIC2", NULL, "DMIC R2" },
1973 
1974 	{ "BST1", NULL, "IN1P" },
1975 	{ "BST1", NULL, "IN1N" },
1976 	{ "BST1", NULL, "JD Power" },
1977 	{ "BST1", NULL, "Mic Det Power" },
1978 	{ "BST2", NULL, "IN2P" },
1979 	{ "BST2", NULL, "IN2N" },
1980 
1981 	{ "INL VOL", NULL, "IN2P" },
1982 	{ "INR VOL", NULL, "IN2N" },
1983 
1984 	{ "RECMIXL", "HPOL Switch", "HPOL" },
1985 	{ "RECMIXL", "INL Switch", "INL VOL" },
1986 	{ "RECMIXL", "BST2 Switch", "BST2" },
1987 	{ "RECMIXL", "BST1 Switch", "BST1" },
1988 	{ "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1989 
1990 	{ "RECMIXR", "HPOR Switch", "HPOR" },
1991 	{ "RECMIXR", "INR Switch", "INR VOL" },
1992 	{ "RECMIXR", "BST2 Switch", "BST2" },
1993 	{ "RECMIXR", "BST1 Switch", "BST1" },
1994 	{ "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1995 
1996 	{ "ADC L", NULL, "RECMIXL" },
1997 	{ "ADC L", NULL, "ADC L power" },
1998 	{ "ADC R", NULL, "RECMIXR" },
1999 	{ "ADC R", NULL, "ADC R power" },
2000 
2001 	{"DMIC L1", NULL, "DMIC CLK"},
2002 	{"DMIC L1", NULL, "DMIC1 Power"},
2003 	{"DMIC R1", NULL, "DMIC CLK"},
2004 	{"DMIC R1", NULL, "DMIC1 Power"},
2005 	{"DMIC L2", NULL, "DMIC CLK"},
2006 	{"DMIC L2", NULL, "DMIC2 Power"},
2007 	{"DMIC R2", NULL, "DMIC CLK"},
2008 	{"DMIC R2", NULL, "DMIC2 Power"},
2009 
2010 	{ "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2011 	{ "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2012 	{ "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2013 
2014 	{ "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2015 	{ "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2016 	{ "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2017 
2018 	{ "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2019 	{ "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2020 	{ "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2021 
2022 	{ "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2023 	{ "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2024 	{ "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2025 	{ "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2026 
2027 	{ "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2028 	{ "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2029 	{ "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2030 	{ "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2031 
2032 	{ "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2033 	{ "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2034 	{ "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2035 	{ "Mono ADC L1 Mux", "ADC", "ADC L" },
2036 
2037 	{ "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2038 	{ "Mono ADC R1 Mux", "ADC", "ADC R" },
2039 	{ "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2040 	{ "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2041 
2042 	{ "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2043 	{ "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2044 	{ "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2045 	{ "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2046 
2047 	{ "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2048 	{ "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2049 	{ "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2050 
2051 	{ "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2052 	{ "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2053 	{ "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2054 
2055 	{ "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2056 	{ "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2057 	{ "Mono ADC MIXL", NULL, "adc mono left filter" },
2058 	{ "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2059 
2060 	{ "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2061 	{ "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2062 	{ "Mono ADC MIXR", NULL, "adc mono right filter" },
2063 	{ "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2064 
2065 	{ "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2066 	{ "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2067 	{ "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2068 
2069 	{ "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2070 	{ "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2071 	{ "IF_ADC2", NULL, "Mono ADC MIXL" },
2072 	{ "IF_ADC2", NULL, "Mono ADC MIXR" },
2073 	{ "VAD_ADC", NULL, "VAD ADC Mux" },
2074 
2075 	{ "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2076 	{ "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2077 	{ "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2078 
2079 	{ "IF1 ADC", NULL, "I2S1" },
2080 	{ "IF2 ADC", NULL, "I2S2" },
2081 	{ "IF2 ADC", NULL, "IF2 ADC Mux" },
2082 
2083 	{ "AIF2TX", NULL, "IF2 ADC" },
2084 
2085 	{ "IF1 DAC0", NULL, "AIF1RX" },
2086 	{ "IF1 DAC1", NULL, "AIF1RX" },
2087 	{ "IF1 DAC2", NULL, "AIF1RX" },
2088 	{ "IF1 DAC3", NULL, "AIF1RX" },
2089 	{ "IF2 DAC", NULL, "AIF2RX" },
2090 
2091 	{ "IF1 DAC0", NULL, "I2S1" },
2092 	{ "IF1 DAC1", NULL, "I2S1" },
2093 	{ "IF1 DAC2", NULL, "I2S1" },
2094 	{ "IF1 DAC3", NULL, "I2S1" },
2095 	{ "IF2 DAC", NULL, "I2S2" },
2096 
2097 	{ "IF2 DAC L", NULL, "IF2 DAC" },
2098 	{ "IF2 DAC R", NULL, "IF2 DAC" },
2099 
2100 	{ "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2101 	{ "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2102 
2103 	{ "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2104 	{ "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2105 	{ "DAC1 MIXL", NULL, "dac stereo1 filter" },
2106 	{ "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2107 	{ "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2108 	{ "DAC1 MIXR", NULL, "dac stereo1 filter" },
2109 
2110 	{ "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2111 	{ "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2112 	{ "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2113 	{ "DAC L2 Volume", NULL, "DAC L2 Mux" },
2114 	{ "DAC L2 Volume", NULL, "dac mono left filter" },
2115 
2116 	{ "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2117 	{ "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2118 	{ "DAC R2 Mux", "Haptic", "Haptic Generator" },
2119 	{ "DAC R2 Volume", NULL, "DAC R2 Mux" },
2120 	{ "DAC R2 Volume", NULL, "dac mono right filter" },
2121 
2122 	{ "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2123 	{ "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2124 	{ "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2125 	{ "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2126 	{ "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2127 	{ "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2128 	{ "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2129 	{ "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2130 
2131 	{ "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2132 	{ "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2133 	{ "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2134 	{ "Mono DAC MIXL", NULL, "dac mono left filter" },
2135 	{ "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2136 	{ "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2137 	{ "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2138 	{ "Mono DAC MIXR", NULL, "dac mono right filter" },
2139 
2140 	{ "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2141 	{ "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2142 	{ "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2143 	{ "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2144 	{ "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2145 	{ "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2146 
2147 	{ "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2148 	{ "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2149 	{ "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2150 	{ "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2151 
2152 	{ "SPK MIXL", "BST1 Switch", "BST1" },
2153 	{ "SPK MIXL", "INL Switch", "INL VOL" },
2154 	{ "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2155 	{ "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2156 	{ "SPK MIXR", "BST2 Switch", "BST2" },
2157 	{ "SPK MIXR", "INR Switch", "INR VOL" },
2158 	{ "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2159 	{ "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2160 
2161 	{ "OUT MIXL", "BST1 Switch", "BST1" },
2162 	{ "OUT MIXL", "INL Switch", "INL VOL" },
2163 	{ "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2164 	{ "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2165 
2166 	{ "OUT MIXR", "BST2 Switch", "BST2" },
2167 	{ "OUT MIXR", "INR Switch", "INR VOL" },
2168 	{ "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2169 	{ "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2170 
2171 	{ "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2172 	{ "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2173 	{ "HPOVOL MIXL", "INL Switch", "INL VOL" },
2174 	{ "HPOVOL MIXL", "BST1 Switch", "BST1" },
2175 	{ "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2176 	{ "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2177 	{ "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2178 	{ "HPOVOL MIXR", "INR Switch", "INR VOL" },
2179 	{ "HPOVOL MIXR", "BST2 Switch", "BST2" },
2180 	{ "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2181 
2182 	{ "DAC 2", NULL, "DAC L2" },
2183 	{ "DAC 2", NULL, "DAC R2" },
2184 	{ "DAC 1", NULL, "DAC L1" },
2185 	{ "DAC 1", NULL, "DAC R1" },
2186 	{ "HPOVOL L", "Switch", "HPOVOL MIXL" },
2187 	{ "HPOVOL R", "Switch", "HPOVOL MIXR" },
2188 	{ "HPOVOL", NULL, "HPOVOL L" },
2189 	{ "HPOVOL", NULL, "HPOVOL R" },
2190 	{ "HPO MIX", "DAC1 Switch", "DAC 1" },
2191 	{ "HPO MIX", "HPVOL Switch", "HPOVOL" },
2192 
2193 	{ "SPKVOL L", "Switch", "SPK MIXL" },
2194 	{ "SPKVOL R", "Switch", "SPK MIXR" },
2195 
2196 	{ "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2197 	{ "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2198 	{ "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2199 	{ "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2200 	{ "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2201 	{ "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2202 
2203 	{ "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2204 	{ "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2205 	{ "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2206 	{ "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2207 
2208 	{ "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2209 	{ "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2210 	{ "PDM1 L Mux", NULL, "PDM1 Power" },
2211 	{ "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2212 	{ "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2213 	{ "PDM1 R Mux", NULL, "PDM1 Power" },
2214 
2215 	{ "HP amp", NULL, "HPO MIX" },
2216 	{ "HP amp", NULL, "JD Power" },
2217 	{ "HP amp", NULL, "Mic Det Power" },
2218 	{ "HP amp", NULL, "LDO2" },
2219 	{ "HPOL", NULL, "HP amp" },
2220 	{ "HPOR", NULL, "HP amp" },
2221 
2222 	{ "LOUT amp", NULL, "LOUT MIX" },
2223 	{ "LOUTL", NULL, "LOUT amp" },
2224 	{ "LOUTR", NULL, "LOUT amp" },
2225 
2226 	{ "PDM1 L", "Switch", "PDM1 L Mux" },
2227 	{ "PDM1 R", "Switch", "PDM1 R Mux" },
2228 
2229 	{ "PDM1L", NULL, "PDM1 L" },
2230 	{ "PDM1R", NULL, "PDM1 R" },
2231 
2232 	{ "SPK amp", NULL, "SPOL MIX" },
2233 	{ "SPK amp", NULL, "SPOR MIX" },
2234 	{ "SPOL", NULL, "SPK amp" },
2235 	{ "SPOR", NULL, "SPK amp" },
2236 };
2237 
2238 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2239 	{ "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2240 	{ "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2241 	{ "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2242 	{ "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2243 
2244 	{ "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2245 	{ "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2246 	{ "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2247 	{ "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2248 
2249 	{ "DAC L1", NULL, "A DAC1 L Mux" },
2250 	{ "DAC R1", NULL, "A DAC1 R Mux" },
2251 	{ "DAC L2", NULL, "A DAC2 L Mux" },
2252 	{ "DAC R2", NULL, "A DAC2 R Mux" },
2253 
2254 	{ "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2255 	{ "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2256 	{ "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2257 	{ "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2258 
2259 	{ "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2260 	{ "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2261 	{ "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2262 	{ "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2263 
2264 	{ "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2265 	{ "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2266 	{ "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2267 	{ "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2268 
2269 	{ "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2270 	{ "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2271 	{ "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2272 
2273 	{ "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2274 	{ "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2275 	{ "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2276 	{ "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2277 	{ "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2278 	{ "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2279 
2280 	{ "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2281 	{ "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2282 	{ "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2283 	{ "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2284 	{ "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2285 	{ "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2286 
2287 	{ "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2288 	{ "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2289 	{ "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2290 	{ "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2291 	{ "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2292 	{ "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2293 
2294 	{ "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2295 	{ "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2296 	{ "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2297 	{ "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2298 	{ "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2299 	{ "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2300 	{ "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2301 
2302 	{ "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2303 	{ "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2304 	{ "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2305 	{ "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2306 
2307 	{ "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2308 	{ "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2309 	{ "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2310 	{ "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2311 
2312 	{ "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2313 	{ "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2314 	{ "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2315 	{ "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2316 
2317 	{ "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2318 	{ "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2319 	{ "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2320 	{ "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2321 
2322 	{ "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2323 	{ "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2324 
2325 	{ "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2326 	{ "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2327 };
2328 
2329 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2330 	{ "DAC L1", NULL, "Stereo DAC MIXL" },
2331 	{ "DAC R1", NULL, "Stereo DAC MIXR" },
2332 	{ "DAC L2", NULL, "Mono DAC MIXL" },
2333 	{ "DAC R2", NULL, "Mono DAC MIXR" },
2334 
2335 	{ "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2336 	{ "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2337 	{ "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2338 	{ "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2339 
2340 	{ "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2341 	{ "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2342 	{ "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2343 	{ "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2344 
2345 	{ "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2346 	{ "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2347 	{ "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2348 	{ "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2349 
2350 	{ "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2351 	{ "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2352 	{ "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2353 
2354 	{ "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2355 	{ "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2356 	{ "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2357 	{ "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2358 	{ "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2359 
2360 	{ "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2361 	{ "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2362 	{ "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2363 	{ "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2364 
2365 	{ "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2366 	{ "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2367 	{ "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2368 	{ "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2369 
2370 	{ "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2371 	{ "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2372 	{ "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2373 	{ "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2374 
2375 	{ "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2376 	{ "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2377 	{ "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2378 	{ "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2379 
2380 	{ "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2381 	{ "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2382 
2383 	{ "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2384 	{ "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2385 };
2386 
2387 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2388 	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2389 {
2390 	struct snd_soc_codec *codec = dai->codec;
2391 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2392 	unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2393 	int pre_div, bclk_ms, frame_size;
2394 
2395 	rt5645->lrck[dai->id] = params_rate(params);
2396 	pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2397 	if (pre_div < 0) {
2398 		dev_err(codec->dev, "Unsupported clock setting\n");
2399 		return -EINVAL;
2400 	}
2401 	frame_size = snd_soc_params_to_frame_size(params);
2402 	if (frame_size < 0) {
2403 		dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2404 		return -EINVAL;
2405 	}
2406 
2407 	switch (rt5645->codec_type) {
2408 	case CODEC_TYPE_RT5650:
2409 		dl_sft = 4;
2410 		break;
2411 	default:
2412 		dl_sft = 2;
2413 		break;
2414 	}
2415 
2416 	bclk_ms = frame_size > 32;
2417 	rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2418 
2419 	dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2420 		rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2421 	dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2422 				bclk_ms, pre_div, dai->id);
2423 
2424 	switch (params_width(params)) {
2425 	case 16:
2426 		break;
2427 	case 20:
2428 		val_len = 0x1;
2429 		break;
2430 	case 24:
2431 		val_len = 0x2;
2432 		break;
2433 	case 8:
2434 		val_len = 0x3;
2435 		break;
2436 	default:
2437 		return -EINVAL;
2438 	}
2439 
2440 	switch (dai->id) {
2441 	case RT5645_AIF1:
2442 		mask_clk = RT5645_I2S_PD1_MASK;
2443 		val_clk = pre_div << RT5645_I2S_PD1_SFT;
2444 		snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2445 			(0x3 << dl_sft), (val_len << dl_sft));
2446 		snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2447 		break;
2448 	case  RT5645_AIF2:
2449 		mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2450 		val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2451 			pre_div << RT5645_I2S_PD2_SFT;
2452 		snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2453 			(0x3 << dl_sft), (val_len << dl_sft));
2454 		snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2455 		break;
2456 	default:
2457 		dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2458 		return -EINVAL;
2459 	}
2460 
2461 	return 0;
2462 }
2463 
2464 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2465 {
2466 	struct snd_soc_codec *codec = dai->codec;
2467 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2468 	unsigned int reg_val = 0, pol_sft;
2469 
2470 	switch (rt5645->codec_type) {
2471 	case CODEC_TYPE_RT5650:
2472 		pol_sft = 8;
2473 		break;
2474 	default:
2475 		pol_sft = 7;
2476 		break;
2477 	}
2478 
2479 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2480 	case SND_SOC_DAIFMT_CBM_CFM:
2481 		rt5645->master[dai->id] = 1;
2482 		break;
2483 	case SND_SOC_DAIFMT_CBS_CFS:
2484 		reg_val |= RT5645_I2S_MS_S;
2485 		rt5645->master[dai->id] = 0;
2486 		break;
2487 	default:
2488 		return -EINVAL;
2489 	}
2490 
2491 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2492 	case SND_SOC_DAIFMT_NB_NF:
2493 		break;
2494 	case SND_SOC_DAIFMT_IB_NF:
2495 		reg_val |= (1 << pol_sft);
2496 		break;
2497 	default:
2498 		return -EINVAL;
2499 	}
2500 
2501 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2502 	case SND_SOC_DAIFMT_I2S:
2503 		break;
2504 	case SND_SOC_DAIFMT_LEFT_J:
2505 		reg_val |= RT5645_I2S_DF_LEFT;
2506 		break;
2507 	case SND_SOC_DAIFMT_DSP_A:
2508 		reg_val |= RT5645_I2S_DF_PCM_A;
2509 		break;
2510 	case SND_SOC_DAIFMT_DSP_B:
2511 		reg_val |= RT5645_I2S_DF_PCM_B;
2512 		break;
2513 	default:
2514 		return -EINVAL;
2515 	}
2516 	switch (dai->id) {
2517 	case RT5645_AIF1:
2518 		snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2519 			RT5645_I2S_MS_MASK | (1 << pol_sft) |
2520 			RT5645_I2S_DF_MASK, reg_val);
2521 		break;
2522 	case RT5645_AIF2:
2523 		snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2524 			RT5645_I2S_MS_MASK | (1 << pol_sft) |
2525 			RT5645_I2S_DF_MASK, reg_val);
2526 		break;
2527 	default:
2528 		dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2529 		return -EINVAL;
2530 	}
2531 	return 0;
2532 }
2533 
2534 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2535 		int clk_id, unsigned int freq, int dir)
2536 {
2537 	struct snd_soc_codec *codec = dai->codec;
2538 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2539 	unsigned int reg_val = 0;
2540 
2541 	if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2542 		return 0;
2543 
2544 	switch (clk_id) {
2545 	case RT5645_SCLK_S_MCLK:
2546 		reg_val |= RT5645_SCLK_SRC_MCLK;
2547 		break;
2548 	case RT5645_SCLK_S_PLL1:
2549 		reg_val |= RT5645_SCLK_SRC_PLL1;
2550 		break;
2551 	case RT5645_SCLK_S_RCCLK:
2552 		reg_val |= RT5645_SCLK_SRC_RCCLK;
2553 		break;
2554 	default:
2555 		dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2556 		return -EINVAL;
2557 	}
2558 	snd_soc_update_bits(codec, RT5645_GLB_CLK,
2559 		RT5645_SCLK_SRC_MASK, reg_val);
2560 	rt5645->sysclk = freq;
2561 	rt5645->sysclk_src = clk_id;
2562 
2563 	dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2564 
2565 	return 0;
2566 }
2567 
2568 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2569 			unsigned int freq_in, unsigned int freq_out)
2570 {
2571 	struct snd_soc_codec *codec = dai->codec;
2572 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2573 	struct rl6231_pll_code pll_code;
2574 	int ret;
2575 
2576 	if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2577 	    freq_out == rt5645->pll_out)
2578 		return 0;
2579 
2580 	if (!freq_in || !freq_out) {
2581 		dev_dbg(codec->dev, "PLL disabled\n");
2582 
2583 		rt5645->pll_in = 0;
2584 		rt5645->pll_out = 0;
2585 		snd_soc_update_bits(codec, RT5645_GLB_CLK,
2586 			RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2587 		return 0;
2588 	}
2589 
2590 	switch (source) {
2591 	case RT5645_PLL1_S_MCLK:
2592 		snd_soc_update_bits(codec, RT5645_GLB_CLK,
2593 			RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2594 		break;
2595 	case RT5645_PLL1_S_BCLK1:
2596 	case RT5645_PLL1_S_BCLK2:
2597 		switch (dai->id) {
2598 		case RT5645_AIF1:
2599 			snd_soc_update_bits(codec, RT5645_GLB_CLK,
2600 				RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2601 			break;
2602 		case  RT5645_AIF2:
2603 			snd_soc_update_bits(codec, RT5645_GLB_CLK,
2604 				RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2605 			break;
2606 		default:
2607 			dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2608 			return -EINVAL;
2609 		}
2610 		break;
2611 	default:
2612 		dev_err(codec->dev, "Unknown PLL source %d\n", source);
2613 		return -EINVAL;
2614 	}
2615 
2616 	ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2617 	if (ret < 0) {
2618 		dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2619 		return ret;
2620 	}
2621 
2622 	dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2623 		pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2624 		pll_code.n_code, pll_code.k_code);
2625 
2626 	snd_soc_write(codec, RT5645_PLL_CTRL1,
2627 		pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2628 	snd_soc_write(codec, RT5645_PLL_CTRL2,
2629 		(pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2630 		pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2631 
2632 	rt5645->pll_in = freq_in;
2633 	rt5645->pll_out = freq_out;
2634 	rt5645->pll_src = source;
2635 
2636 	return 0;
2637 }
2638 
2639 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2640 			unsigned int rx_mask, int slots, int slot_width)
2641 {
2642 	struct snd_soc_codec *codec = dai->codec;
2643 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2644 	unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2645 	unsigned int mask, val = 0;
2646 
2647 	switch (rt5645->codec_type) {
2648 	case CODEC_TYPE_RT5650:
2649 		en_sft = 15;
2650 		i_slot_sft = 10;
2651 		o_slot_sft = 8;
2652 		i_width_sht = 6;
2653 		o_width_sht = 4;
2654 		mask = 0x8ff0;
2655 		break;
2656 	default:
2657 		en_sft = 14;
2658 		i_slot_sft = o_slot_sft = 12;
2659 		i_width_sht = o_width_sht = 10;
2660 		mask = 0x7c00;
2661 		break;
2662 	}
2663 	if (rx_mask || tx_mask) {
2664 		val |= (1 << en_sft);
2665 		if (rt5645->codec_type == CODEC_TYPE_RT5645)
2666 			snd_soc_update_bits(codec, RT5645_BASS_BACK,
2667 				RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
2668 	}
2669 
2670 	switch (slots) {
2671 	case 4:
2672 		val |= (1 << i_slot_sft) | (1 << o_slot_sft);
2673 		break;
2674 	case 6:
2675 		val |= (2 << i_slot_sft) | (2 << o_slot_sft);
2676 		break;
2677 	case 8:
2678 		val |= (3 << i_slot_sft) | (3 << o_slot_sft);
2679 		break;
2680 	case 2:
2681 	default:
2682 		break;
2683 	}
2684 
2685 	switch (slot_width) {
2686 	case 20:
2687 		val |= (1 << i_width_sht) | (1 << o_width_sht);
2688 		break;
2689 	case 24:
2690 		val |= (2 << i_width_sht) | (2 << o_width_sht);
2691 		break;
2692 	case 32:
2693 		val |= (3 << i_width_sht) | (3 << o_width_sht);
2694 		break;
2695 	case 16:
2696 	default:
2697 		break;
2698 	}
2699 
2700 	snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val);
2701 
2702 	return 0;
2703 }
2704 
2705 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2706 			enum snd_soc_bias_level level)
2707 {
2708 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2709 
2710 	switch (level) {
2711 	case SND_SOC_BIAS_PREPARE:
2712 		if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
2713 			snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2714 				RT5645_PWR_VREF1 | RT5645_PWR_MB |
2715 				RT5645_PWR_BG | RT5645_PWR_VREF2,
2716 				RT5645_PWR_VREF1 | RT5645_PWR_MB |
2717 				RT5645_PWR_BG | RT5645_PWR_VREF2);
2718 			mdelay(10);
2719 			snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2720 				RT5645_PWR_FV1 | RT5645_PWR_FV2,
2721 				RT5645_PWR_FV1 | RT5645_PWR_FV2);
2722 			snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2723 				RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2724 		}
2725 		break;
2726 
2727 	case SND_SOC_BIAS_STANDBY:
2728 		snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2729 			RT5645_PWR_VREF1 | RT5645_PWR_MB |
2730 			RT5645_PWR_BG | RT5645_PWR_VREF2,
2731 			RT5645_PWR_VREF1 | RT5645_PWR_MB |
2732 			RT5645_PWR_BG | RT5645_PWR_VREF2);
2733 		snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2734 			RT5645_PWR_FV1 | RT5645_PWR_FV2,
2735 			RT5645_PWR_FV1 | RT5645_PWR_FV2);
2736 		break;
2737 
2738 	case SND_SOC_BIAS_OFF:
2739 		snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2740 		if (!rt5645->en_button_func)
2741 			snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2742 					RT5645_DIG_GATE_CTRL, 0);
2743 		snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2744 				RT5645_PWR_VREF1 | RT5645_PWR_MB |
2745 				RT5645_PWR_BG | RT5645_PWR_VREF2 |
2746 				RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
2747 		break;
2748 
2749 	default:
2750 		break;
2751 	}
2752 
2753 	return 0;
2754 }
2755 
2756 static void rt5645_enable_push_button_irq(struct snd_soc_codec *codec,
2757 	bool enable)
2758 {
2759 	struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
2760 
2761 	if (enable) {
2762 		snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
2763 		snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
2764 		snd_soc_dapm_sync(dapm);
2765 
2766 		snd_soc_update_bits(codec,
2767 					RT5645_INT_IRQ_ST, 0x8, 0x8);
2768 		snd_soc_update_bits(codec,
2769 					RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
2770 		snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
2771 		pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
2772 			snd_soc_read(codec, RT5650_4BTN_IL_CMD1));
2773 	} else {
2774 		snd_soc_update_bits(codec, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
2775 		snd_soc_update_bits(codec, RT5645_INT_IRQ_ST, 0x8, 0x0);
2776 
2777 		snd_soc_dapm_disable_pin(dapm, "ADC L power");
2778 		snd_soc_dapm_disable_pin(dapm, "ADC R power");
2779 		snd_soc_dapm_sync(dapm);
2780 	}
2781 }
2782 
2783 static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert)
2784 {
2785 	struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
2786 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2787 	unsigned int val;
2788 
2789 	if (jack_insert) {
2790 		regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0006);
2791 
2792 		/* for jack type detect */
2793 		snd_soc_dapm_force_enable_pin(dapm, "LDO2");
2794 		snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
2795 		snd_soc_dapm_sync(dapm);
2796 		if (!dapm->card->instantiated) {
2797 			/* Power up necessary bits for JD if dapm is
2798 			   not ready yet */
2799 			regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
2800 				RT5645_PWR_MB | RT5645_PWR_VREF2,
2801 				RT5645_PWR_MB | RT5645_PWR_VREF2);
2802 			regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
2803 				RT5645_PWR_LDO2, RT5645_PWR_LDO2);
2804 			regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
2805 				RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
2806 		}
2807 
2808 		regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
2809 		regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
2810 			RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2811 		regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
2812 			RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
2813 		msleep(100);
2814 		regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
2815 			RT5645_CBJ_MN_JD, 0);
2816 
2817 		msleep(600);
2818 		regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
2819 		val &= 0x7;
2820 		dev_dbg(codec->dev, "val = %d\n", val);
2821 
2822 		if (val == 1 || val == 2) {
2823 			rt5645->jack_type = SND_JACK_HEADSET;
2824 			if (rt5645->en_button_func) {
2825 				rt5645_enable_push_button_irq(codec, true);
2826 			}
2827 		} else {
2828 			snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
2829 			snd_soc_dapm_sync(dapm);
2830 			rt5645->jack_type = SND_JACK_HEADPHONE;
2831 		}
2832 	} else { /* jack out */
2833 		rt5645->jack_type = 0;
2834 
2835 		regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
2836 			RT5645_L_MUTE | RT5645_R_MUTE,
2837 			RT5645_L_MUTE | RT5645_R_MUTE);
2838 		regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
2839 			RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2840 		regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
2841 			RT5645_CBJ_BST1_EN, 0);
2842 
2843 		if (rt5645->en_button_func)
2844 			rt5645_enable_push_button_irq(codec, false);
2845 
2846 		if (rt5645->pdata.jd_mode == 0)
2847 			snd_soc_dapm_disable_pin(dapm, "LDO2");
2848 		snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
2849 		snd_soc_dapm_sync(dapm);
2850 	}
2851 
2852 	return rt5645->jack_type;
2853 }
2854 
2855 static int rt5645_button_detect(struct snd_soc_codec *codec)
2856 {
2857 	int btn_type, val;
2858 
2859 	val = snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
2860 	pr_debug("val=0x%x\n", val);
2861 	btn_type = val & 0xfff0;
2862 	snd_soc_write(codec, RT5650_4BTN_IL_CMD1, val);
2863 
2864 	return btn_type;
2865 }
2866 
2867 static irqreturn_t rt5645_irq(int irq, void *data);
2868 
2869 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2870 	struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
2871 	struct snd_soc_jack *btn_jack)
2872 {
2873 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2874 
2875 	rt5645->hp_jack = hp_jack;
2876 	rt5645->mic_jack = mic_jack;
2877 	rt5645->btn_jack = btn_jack;
2878 	if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
2879 		rt5645->en_button_func = true;
2880 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2881 				RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
2882 		regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
2883 				RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2884 	}
2885 	rt5645_irq(0, rt5645);
2886 
2887 	return 0;
2888 }
2889 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2890 
2891 static void rt5645_jack_detect_work(struct work_struct *work)
2892 {
2893 	struct rt5645_priv *rt5645 =
2894 		container_of(work, struct rt5645_priv, jack_detect_work.work);
2895 	int val, btn_type, gpio_state = 0, report = 0;
2896 
2897 	if (!rt5645->codec)
2898 		return;
2899 
2900 	switch (rt5645->pdata.jd_mode) {
2901 	case 0: /* Not using rt5645 JD */
2902 		if (rt5645->gpiod_hp_det) {
2903 			gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
2904 			dev_dbg(rt5645->codec->dev, "gpio_state = %d\n",
2905 				gpio_state);
2906 			report = rt5645_jack_detect(rt5645->codec, gpio_state);
2907 		}
2908 		snd_soc_jack_report(rt5645->hp_jack,
2909 				    report, SND_JACK_HEADPHONE);
2910 		snd_soc_jack_report(rt5645->mic_jack,
2911 				    report, SND_JACK_MICROPHONE);
2912 		return;
2913 	case 1: /* 2 port */
2914 		val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0070;
2915 		break;
2916 	default: /* 1 port */
2917 		val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0020;
2918 		break;
2919 
2920 	}
2921 
2922 	switch (val) {
2923 	/* jack in */
2924 	case 0x30: /* 2 port */
2925 	case 0x0: /* 1 port or 2 port */
2926 		if (rt5645->jack_type == 0) {
2927 			report = rt5645_jack_detect(rt5645->codec, 1);
2928 			/* for push button and jack out */
2929 			break;
2930 		}
2931 		btn_type = 0;
2932 		if (snd_soc_read(rt5645->codec, RT5645_INT_IRQ_ST) & 0x4) {
2933 			/* button pressed */
2934 			report = SND_JACK_HEADSET;
2935 			btn_type = rt5645_button_detect(rt5645->codec);
2936 			/* rt5650 can report three kinds of button behavior,
2937 			   one click, double click and hold. However,
2938 			   currently we will report button pressed/released
2939 			   event. So all the three button behaviors are
2940 			   treated as button pressed. */
2941 			switch (btn_type) {
2942 			case 0x8000:
2943 			case 0x4000:
2944 			case 0x2000:
2945 				report |= SND_JACK_BTN_0;
2946 				break;
2947 			case 0x1000:
2948 			case 0x0800:
2949 			case 0x0400:
2950 				report |= SND_JACK_BTN_1;
2951 				break;
2952 			case 0x0200:
2953 			case 0x0100:
2954 			case 0x0080:
2955 				report |= SND_JACK_BTN_2;
2956 				break;
2957 			case 0x0040:
2958 			case 0x0020:
2959 			case 0x0010:
2960 				report |= SND_JACK_BTN_3;
2961 				break;
2962 			case 0x0000: /* unpressed */
2963 				break;
2964 			default:
2965 				dev_err(rt5645->codec->dev,
2966 					"Unexpected button code 0x%04x\n",
2967 					btn_type);
2968 				break;
2969 			}
2970 		}
2971 		if (btn_type == 0)/* button release */
2972 			report =  rt5645->jack_type;
2973 
2974 		break;
2975 	/* jack out */
2976 	case 0x70: /* 2 port */
2977 	case 0x10: /* 2 port */
2978 	case 0x20: /* 1 port */
2979 		report = 0;
2980 		snd_soc_update_bits(rt5645->codec,
2981 				    RT5645_INT_IRQ_ST, 0x1, 0x0);
2982 		rt5645_jack_detect(rt5645->codec, 0);
2983 		break;
2984 	default:
2985 		break;
2986 	}
2987 
2988 	snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
2989 	snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
2990 	if (rt5645->en_button_func)
2991 		snd_soc_jack_report(rt5645->btn_jack,
2992 			report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
2993 				SND_JACK_BTN_2 | SND_JACK_BTN_3);
2994 }
2995 
2996 static irqreturn_t rt5645_irq(int irq, void *data)
2997 {
2998 	struct rt5645_priv *rt5645 = data;
2999 
3000 	queue_delayed_work(system_power_efficient_wq,
3001 			   &rt5645->jack_detect_work, msecs_to_jiffies(250));
3002 
3003 	return IRQ_HANDLED;
3004 }
3005 
3006 static int rt5645_probe(struct snd_soc_codec *codec)
3007 {
3008 	struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3009 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3010 
3011 	rt5645->codec = codec;
3012 
3013 	switch (rt5645->codec_type) {
3014 	case CODEC_TYPE_RT5645:
3015 		snd_soc_dapm_new_controls(dapm,
3016 			rt5645_specific_dapm_widgets,
3017 			ARRAY_SIZE(rt5645_specific_dapm_widgets));
3018 		snd_soc_dapm_add_routes(dapm,
3019 			rt5645_specific_dapm_routes,
3020 			ARRAY_SIZE(rt5645_specific_dapm_routes));
3021 		break;
3022 	case CODEC_TYPE_RT5650:
3023 		snd_soc_dapm_new_controls(dapm,
3024 			rt5650_specific_dapm_widgets,
3025 			ARRAY_SIZE(rt5650_specific_dapm_widgets));
3026 		snd_soc_dapm_add_routes(dapm,
3027 			rt5650_specific_dapm_routes,
3028 			ARRAY_SIZE(rt5650_specific_dapm_routes));
3029 		break;
3030 	}
3031 
3032 	snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
3033 
3034 	/* for JD function */
3035 	if (rt5645->pdata.jd_mode) {
3036 		snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3037 		snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3038 		snd_soc_dapm_sync(dapm);
3039 	}
3040 
3041 	return 0;
3042 }
3043 
3044 static int rt5645_remove(struct snd_soc_codec *codec)
3045 {
3046 	rt5645_reset(codec);
3047 	return 0;
3048 }
3049 
3050 #ifdef CONFIG_PM
3051 static int rt5645_suspend(struct snd_soc_codec *codec)
3052 {
3053 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3054 
3055 	regcache_cache_only(rt5645->regmap, true);
3056 	regcache_mark_dirty(rt5645->regmap);
3057 
3058 	return 0;
3059 }
3060 
3061 static int rt5645_resume(struct snd_soc_codec *codec)
3062 {
3063 	struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
3064 
3065 	regcache_cache_only(rt5645->regmap, false);
3066 	regcache_sync(rt5645->regmap);
3067 
3068 	return 0;
3069 }
3070 #else
3071 #define rt5645_suspend NULL
3072 #define rt5645_resume NULL
3073 #endif
3074 
3075 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3076 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3077 			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3078 
3079 static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3080 	.hw_params = rt5645_hw_params,
3081 	.set_fmt = rt5645_set_dai_fmt,
3082 	.set_sysclk = rt5645_set_dai_sysclk,
3083 	.set_tdm_slot = rt5645_set_tdm_slot,
3084 	.set_pll = rt5645_set_dai_pll,
3085 };
3086 
3087 static struct snd_soc_dai_driver rt5645_dai[] = {
3088 	{
3089 		.name = "rt5645-aif1",
3090 		.id = RT5645_AIF1,
3091 		.playback = {
3092 			.stream_name = "AIF1 Playback",
3093 			.channels_min = 1,
3094 			.channels_max = 2,
3095 			.rates = RT5645_STEREO_RATES,
3096 			.formats = RT5645_FORMATS,
3097 		},
3098 		.capture = {
3099 			.stream_name = "AIF1 Capture",
3100 			.channels_min = 1,
3101 			.channels_max = 2,
3102 			.rates = RT5645_STEREO_RATES,
3103 			.formats = RT5645_FORMATS,
3104 		},
3105 		.ops = &rt5645_aif_dai_ops,
3106 	},
3107 	{
3108 		.name = "rt5645-aif2",
3109 		.id = RT5645_AIF2,
3110 		.playback = {
3111 			.stream_name = "AIF2 Playback",
3112 			.channels_min = 1,
3113 			.channels_max = 2,
3114 			.rates = RT5645_STEREO_RATES,
3115 			.formats = RT5645_FORMATS,
3116 		},
3117 		.capture = {
3118 			.stream_name = "AIF2 Capture",
3119 			.channels_min = 1,
3120 			.channels_max = 2,
3121 			.rates = RT5645_STEREO_RATES,
3122 			.formats = RT5645_FORMATS,
3123 		},
3124 		.ops = &rt5645_aif_dai_ops,
3125 	},
3126 };
3127 
3128 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
3129 	.probe = rt5645_probe,
3130 	.remove = rt5645_remove,
3131 	.suspend = rt5645_suspend,
3132 	.resume = rt5645_resume,
3133 	.set_bias_level = rt5645_set_bias_level,
3134 	.idle_bias_off = true,
3135 	.controls = rt5645_snd_controls,
3136 	.num_controls = ARRAY_SIZE(rt5645_snd_controls),
3137 	.dapm_widgets = rt5645_dapm_widgets,
3138 	.num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
3139 	.dapm_routes = rt5645_dapm_routes,
3140 	.num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
3141 };
3142 
3143 static const struct regmap_config rt5645_regmap = {
3144 	.reg_bits = 8,
3145 	.val_bits = 16,
3146 	.use_single_rw = true,
3147 	.max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3148 					       RT5645_PR_SPACING),
3149 	.volatile_reg = rt5645_volatile_register,
3150 	.readable_reg = rt5645_readable_register,
3151 
3152 	.cache_type = REGCACHE_RBTREE,
3153 	.reg_defaults = rt5645_reg,
3154 	.num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3155 	.ranges = rt5645_ranges,
3156 	.num_ranges = ARRAY_SIZE(rt5645_ranges),
3157 };
3158 
3159 static const struct i2c_device_id rt5645_i2c_id[] = {
3160 	{ "rt5645", 0 },
3161 	{ "rt5650", 0 },
3162 	{ }
3163 };
3164 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3165 
3166 #ifdef CONFIG_ACPI
3167 static struct acpi_device_id rt5645_acpi_match[] = {
3168 	{ "10EC5645", 0 },
3169 	{ "10EC5650", 0 },
3170 	{},
3171 };
3172 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3173 #endif
3174 
3175 static struct rt5645_platform_data *rt5645_pdata;
3176 
3177 static struct rt5645_platform_data strago_platform_data = {
3178 	.dmic1_data_pin = RT5645_DMIC1_DISABLE,
3179 	.dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3180 	.jd_mode = 3,
3181 };
3182 
3183 static int strago_quirk_cb(const struct dmi_system_id *id)
3184 {
3185 	rt5645_pdata = &strago_platform_data;
3186 
3187 	return 1;
3188 }
3189 
3190 static const struct dmi_system_id dmi_platform_intel_braswell[] = {
3191 	{
3192 		.ident = "Intel Strago",
3193 		.callback = strago_quirk_cb,
3194 		.matches = {
3195 			DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3196 		},
3197 	},
3198 	{
3199 		.ident = "Google Celes",
3200 		.callback = strago_quirk_cb,
3201 		.matches = {
3202 			DMI_MATCH(DMI_PRODUCT_NAME, "Celes"),
3203 		},
3204 	},
3205 	{
3206 		.ident = "Google Ultima",
3207 		.callback = strago_quirk_cb,
3208 		.matches = {
3209 			DMI_MATCH(DMI_PRODUCT_NAME, "Ultima"),
3210 		},
3211 	},
3212 	{ }
3213 };
3214 
3215 static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3216 {
3217 	rt5645->pdata.in2_diff = device_property_read_bool(dev,
3218 		"realtek,in2-differential");
3219 	device_property_read_u32(dev,
3220 		"realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3221 	device_property_read_u32(dev,
3222 		"realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3223 	device_property_read_u32(dev,
3224 		"realtek,jd-mode", &rt5645->pdata.jd_mode);
3225 
3226 	return 0;
3227 }
3228 
3229 static int rt5645_i2c_probe(struct i2c_client *i2c,
3230 		    const struct i2c_device_id *id)
3231 {
3232 	struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
3233 	struct rt5645_priv *rt5645;
3234 	int ret, i;
3235 	unsigned int val;
3236 
3237 	rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3238 				GFP_KERNEL);
3239 	if (rt5645 == NULL)
3240 		return -ENOMEM;
3241 
3242 	rt5645->i2c = i2c;
3243 	i2c_set_clientdata(i2c, rt5645);
3244 
3245 	if (pdata)
3246 		rt5645->pdata = *pdata;
3247 	else if (dmi_check_system(dmi_platform_intel_braswell))
3248 		rt5645->pdata = *rt5645_pdata;
3249 	else
3250 		rt5645_parse_dt(rt5645, &i2c->dev);
3251 
3252 	rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3253 						       GPIOD_IN);
3254 
3255 	if (IS_ERR(rt5645->gpiod_hp_det)) {
3256 		dev_err(&i2c->dev, "failed to initialize gpiod\n");
3257 		return PTR_ERR(rt5645->gpiod_hp_det);
3258 	}
3259 
3260 	rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3261 	if (IS_ERR(rt5645->regmap)) {
3262 		ret = PTR_ERR(rt5645->regmap);
3263 		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3264 			ret);
3265 		return ret;
3266 	}
3267 
3268 	for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3269 		rt5645->supplies[i].supply = rt5645_supply_names[i];
3270 
3271 	ret = devm_regulator_bulk_get(&i2c->dev,
3272 				      ARRAY_SIZE(rt5645->supplies),
3273 				      rt5645->supplies);
3274 	if (ret) {
3275 		dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3276 		return ret;
3277 	}
3278 
3279 	ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3280 				    rt5645->supplies);
3281 	if (ret) {
3282 		dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3283 		return ret;
3284 	}
3285 
3286 	regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
3287 
3288 	switch (val) {
3289 	case RT5645_DEVICE_ID:
3290 		rt5645->codec_type = CODEC_TYPE_RT5645;
3291 		break;
3292 	case RT5650_DEVICE_ID:
3293 		rt5645->codec_type = CODEC_TYPE_RT5650;
3294 		break;
3295 	default:
3296 		dev_err(&i2c->dev,
3297 			"Device with ID register %#x is not rt5645 or rt5650\n",
3298 			val);
3299 		ret = -ENODEV;
3300 		goto err_enable;
3301 	}
3302 
3303 	regmap_write(rt5645->regmap, RT5645_RESET, 0);
3304 
3305 	ret = regmap_register_patch(rt5645->regmap, init_list,
3306 				    ARRAY_SIZE(init_list));
3307 	if (ret != 0)
3308 		dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3309 
3310 	if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3311 		ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3312 				    ARRAY_SIZE(rt5650_init_list));
3313 		if (ret != 0)
3314 			dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
3315 					   ret);
3316 	}
3317 
3318 	if (rt5645->pdata.in2_diff)
3319 		regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
3320 					RT5645_IN_DF2, RT5645_IN_DF2);
3321 
3322 	if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
3323 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3324 			RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
3325 	}
3326 	switch (rt5645->pdata.dmic1_data_pin) {
3327 	case RT5645_DMIC_DATA_IN2N:
3328 		regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3329 			RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
3330 		break;
3331 
3332 	case RT5645_DMIC_DATA_GPIO5:
3333 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3334 			RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
3335 		regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3336 			RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3337 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3338 			RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
3339 		break;
3340 
3341 	case RT5645_DMIC_DATA_GPIO11:
3342 		regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3343 			RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
3344 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3345 			RT5645_GP11_PIN_MASK,
3346 			RT5645_GP11_PIN_DMIC1_SDA);
3347 		break;
3348 
3349 	default:
3350 		break;
3351 	}
3352 
3353 	switch (rt5645->pdata.dmic2_data_pin) {
3354 	case RT5645_DMIC_DATA_IN2P:
3355 		regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3356 			RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3357 		break;
3358 
3359 	case RT5645_DMIC_DATA_GPIO6:
3360 		regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3361 			RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3362 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3363 			RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3364 		break;
3365 
3366 	case RT5645_DMIC_DATA_GPIO10:
3367 		regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3368 			RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3369 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3370 			RT5645_GP10_PIN_MASK,
3371 			RT5645_GP10_PIN_DMIC2_SDA);
3372 		break;
3373 
3374 	case RT5645_DMIC_DATA_GPIO12:
3375 		regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3376 			RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
3377 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3378 			RT5645_GP12_PIN_MASK,
3379 			RT5645_GP12_PIN_DMIC2_SDA);
3380 		break;
3381 
3382 	default:
3383 		break;
3384 	}
3385 
3386 	if (rt5645->pdata.jd_mode) {
3387 		regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3388 				   RT5645_IRQ_CLK_GATE_CTRL,
3389 				   RT5645_IRQ_CLK_GATE_CTRL);
3390 		regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3391 				   RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
3392 		regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3393 				   RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
3394 		regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3395 				   RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
3396 		regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
3397 				   RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
3398 		regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3399 				   RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
3400 		regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3401 				   RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3402 		switch (rt5645->pdata.jd_mode) {
3403 		case 1:
3404 			regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3405 					   RT5645_JD1_MODE_MASK,
3406 					   RT5645_JD1_MODE_0);
3407 			break;
3408 		case 2:
3409 			regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3410 					   RT5645_JD1_MODE_MASK,
3411 					   RT5645_JD1_MODE_1);
3412 			break;
3413 		case 3:
3414 			regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3415 					   RT5645_JD1_MODE_MASK,
3416 					   RT5645_JD1_MODE_2);
3417 			break;
3418 		default:
3419 			break;
3420 		}
3421 	}
3422 
3423 	INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
3424 
3425 	if (rt5645->i2c->irq) {
3426 		ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
3427 			IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
3428 			| IRQF_ONESHOT, "rt5645", rt5645);
3429 		if (ret) {
3430 			dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
3431 			goto err_enable;
3432 		}
3433 	}
3434 
3435 	ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
3436 				     rt5645_dai, ARRAY_SIZE(rt5645_dai));
3437 	if (ret)
3438 		goto err_irq;
3439 
3440 	return 0;
3441 
3442 err_irq:
3443 	if (rt5645->i2c->irq)
3444 		free_irq(rt5645->i2c->irq, rt5645);
3445 err_enable:
3446 	regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
3447 	return ret;
3448 }
3449 
3450 static int rt5645_i2c_remove(struct i2c_client *i2c)
3451 {
3452 	struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
3453 
3454 	if (i2c->irq)
3455 		free_irq(i2c->irq, rt5645);
3456 
3457 	cancel_delayed_work_sync(&rt5645->jack_detect_work);
3458 
3459 	snd_soc_unregister_codec(&i2c->dev);
3460 	regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
3461 
3462 	return 0;
3463 }
3464 
3465 static void rt5645_i2c_shutdown(struct i2c_client *i2c)
3466 {
3467 	struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
3468 
3469 	regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3470 		RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
3471 	regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
3472 		RT5645_CBJ_MN_JD);
3473 	regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
3474 		0);
3475 }
3476 
3477 static struct i2c_driver rt5645_i2c_driver = {
3478 	.driver = {
3479 		.name = "rt5645",
3480 		.acpi_match_table = ACPI_PTR(rt5645_acpi_match),
3481 	},
3482 	.probe = rt5645_i2c_probe,
3483 	.remove = rt5645_i2c_remove,
3484 	.shutdown = rt5645_i2c_shutdown,
3485 	.id_table = rt5645_i2c_id,
3486 };
3487 module_i2c_driver(rt5645_i2c_driver);
3488 
3489 MODULE_DESCRIPTION("ASoC RT5645 driver");
3490 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3491 MODULE_LICENSE("GPL v2");
3492