1 /* 2 * rt5645.c -- RT5645 ALSA SoC audio codec driver 3 * 4 * Copyright 2013 Realtek Semiconductor Corp. 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/pm.h> 17 #include <linux/i2c.h> 18 #include <linux/platform_device.h> 19 #include <linux/spi/spi.h> 20 #include <linux/gpio.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/jack.h> 25 #include <sound/soc.h> 26 #include <sound/soc-dapm.h> 27 #include <sound/initval.h> 28 #include <sound/tlv.h> 29 30 #include "rl6231.h" 31 #include "rt5645.h" 32 33 #define RT5645_DEVICE_ID 0x6308 34 35 #define RT5645_PR_RANGE_BASE (0xff + 1) 36 #define RT5645_PR_SPACING 0x100 37 38 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING)) 39 40 static const struct regmap_range_cfg rt5645_ranges[] = { 41 { 42 .name = "PR", 43 .range_min = RT5645_PR_BASE, 44 .range_max = RT5645_PR_BASE + 0xf8, 45 .selector_reg = RT5645_PRIV_INDEX, 46 .selector_mask = 0xff, 47 .selector_shift = 0x0, 48 .window_start = RT5645_PRIV_DATA, 49 .window_len = 0x1, 50 }, 51 }; 52 53 static const struct reg_default init_list[] = { 54 {RT5645_PR_BASE + 0x3d, 0x3600}, 55 {RT5645_PR_BASE + 0x1c, 0xfd20}, 56 {RT5645_PR_BASE + 0x20, 0x611f}, 57 {RT5645_PR_BASE + 0x21, 0x4040}, 58 {RT5645_PR_BASE + 0x23, 0x0004}, 59 }; 60 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list) 61 62 static const struct reg_default rt5645_reg[] = { 63 { 0x00, 0x0000 }, 64 { 0x01, 0xc8c8 }, 65 { 0x02, 0xc8c8 }, 66 { 0x03, 0xc8c8 }, 67 { 0x0a, 0x0002 }, 68 { 0x0b, 0x2827 }, 69 { 0x0c, 0xe000 }, 70 { 0x0d, 0x0000 }, 71 { 0x0e, 0x0000 }, 72 { 0x0f, 0x0808 }, 73 { 0x14, 0x3333 }, 74 { 0x16, 0x4b00 }, 75 { 0x18, 0x018b }, 76 { 0x19, 0xafaf }, 77 { 0x1a, 0xafaf }, 78 { 0x1b, 0x0001 }, 79 { 0x1c, 0x2f2f }, 80 { 0x1d, 0x2f2f }, 81 { 0x1e, 0x0000 }, 82 { 0x20, 0x0000 }, 83 { 0x27, 0x7060 }, 84 { 0x28, 0x7070 }, 85 { 0x29, 0x8080 }, 86 { 0x2a, 0x5656 }, 87 { 0x2b, 0x5454 }, 88 { 0x2c, 0xaaa0 }, 89 { 0x2f, 0x1002 }, 90 { 0x31, 0x5000 }, 91 { 0x32, 0x0000 }, 92 { 0x33, 0x0000 }, 93 { 0x34, 0x0000 }, 94 { 0x35, 0x0000 }, 95 { 0x3b, 0x0000 }, 96 { 0x3c, 0x007f }, 97 { 0x3d, 0x0000 }, 98 { 0x3e, 0x007f }, 99 { 0x3f, 0x0000 }, 100 { 0x40, 0x001f }, 101 { 0x41, 0x0000 }, 102 { 0x42, 0x001f }, 103 { 0x45, 0x6000 }, 104 { 0x46, 0x003e }, 105 { 0x47, 0x003e }, 106 { 0x48, 0xf807 }, 107 { 0x4a, 0x0004 }, 108 { 0x4d, 0x0000 }, 109 { 0x4e, 0x0000 }, 110 { 0x4f, 0x01ff }, 111 { 0x50, 0x0000 }, 112 { 0x51, 0x0000 }, 113 { 0x52, 0x01ff }, 114 { 0x53, 0xf000 }, 115 { 0x56, 0x0111 }, 116 { 0x57, 0x0064 }, 117 { 0x58, 0xef0e }, 118 { 0x59, 0xf0f0 }, 119 { 0x5a, 0xef0e }, 120 { 0x5b, 0xf0f0 }, 121 { 0x5c, 0xef0e }, 122 { 0x5d, 0xf0f0 }, 123 { 0x5e, 0xf000 }, 124 { 0x5f, 0x0000 }, 125 { 0x61, 0x0300 }, 126 { 0x62, 0x0000 }, 127 { 0x63, 0x00c2 }, 128 { 0x64, 0x0000 }, 129 { 0x65, 0x0000 }, 130 { 0x66, 0x0000 }, 131 { 0x6a, 0x0000 }, 132 { 0x6c, 0x0aaa }, 133 { 0x70, 0x8000 }, 134 { 0x71, 0x8000 }, 135 { 0x72, 0x8000 }, 136 { 0x73, 0x7770 }, 137 { 0x74, 0x3e00 }, 138 { 0x75, 0x2409 }, 139 { 0x76, 0x000a }, 140 { 0x77, 0x0c00 }, 141 { 0x78, 0x0000 }, 142 { 0x79, 0x0123 }, 143 { 0x80, 0x0000 }, 144 { 0x81, 0x0000 }, 145 { 0x82, 0x0000 }, 146 { 0x83, 0x0000 }, 147 { 0x84, 0x0000 }, 148 { 0x85, 0x0000 }, 149 { 0x8a, 0x0000 }, 150 { 0x8e, 0x0004 }, 151 { 0x8f, 0x1100 }, 152 { 0x90, 0x0646 }, 153 { 0x91, 0x0c06 }, 154 { 0x93, 0x0000 }, 155 { 0x94, 0x0200 }, 156 { 0x95, 0x0000 }, 157 { 0x9a, 0x2184 }, 158 { 0x9b, 0x010a }, 159 { 0x9c, 0x0aea }, 160 { 0x9d, 0x000c }, 161 { 0x9e, 0x0400 }, 162 { 0xa0, 0xa0a8 }, 163 { 0xa1, 0x0059 }, 164 { 0xa2, 0x0001 }, 165 { 0xae, 0x6000 }, 166 { 0xaf, 0x0000 }, 167 { 0xb0, 0x6000 }, 168 { 0xb1, 0x0000 }, 169 { 0xb2, 0x0000 }, 170 { 0xb3, 0x001f }, 171 { 0xb4, 0x020c }, 172 { 0xb5, 0x1f00 }, 173 { 0xb6, 0x0000 }, 174 { 0xbb, 0x0000 }, 175 { 0xbc, 0x0000 }, 176 { 0xbd, 0x0000 }, 177 { 0xbe, 0x0000 }, 178 { 0xbf, 0x3100 }, 179 { 0xc0, 0x0000 }, 180 { 0xc1, 0x0000 }, 181 { 0xc2, 0x0000 }, 182 { 0xc3, 0x2000 }, 183 { 0xcd, 0x0000 }, 184 { 0xce, 0x0000 }, 185 { 0xcf, 0x1813 }, 186 { 0xd0, 0x0690 }, 187 { 0xd1, 0x1c17 }, 188 { 0xd3, 0xb320 }, 189 { 0xd4, 0x0000 }, 190 { 0xd6, 0x0400 }, 191 { 0xd9, 0x0809 }, 192 { 0xda, 0x0000 }, 193 { 0xdb, 0x0003 }, 194 { 0xdc, 0x0049 }, 195 { 0xdd, 0x001b }, 196 { 0xe6, 0x8000 }, 197 { 0xe7, 0x0200 }, 198 { 0xec, 0xb300 }, 199 { 0xed, 0x0000 }, 200 { 0xf0, 0x001f }, 201 { 0xf1, 0x020c }, 202 { 0xf2, 0x1f00 }, 203 { 0xf3, 0x0000 }, 204 { 0xf4, 0x4000 }, 205 { 0xf8, 0x0000 }, 206 { 0xf9, 0x0000 }, 207 { 0xfa, 0x2060 }, 208 { 0xfb, 0x4040 }, 209 { 0xfc, 0x0000 }, 210 { 0xfd, 0x0002 }, 211 { 0xfe, 0x10ec }, 212 { 0xff, 0x6308 }, 213 }; 214 215 static int rt5645_reset(struct snd_soc_codec *codec) 216 { 217 return snd_soc_write(codec, RT5645_RESET, 0); 218 } 219 220 static bool rt5645_volatile_register(struct device *dev, unsigned int reg) 221 { 222 int i; 223 224 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) { 225 if (reg >= rt5645_ranges[i].range_min && 226 reg <= rt5645_ranges[i].range_max) { 227 return true; 228 } 229 } 230 231 switch (reg) { 232 case RT5645_RESET: 233 case RT5645_PRIV_DATA: 234 case RT5645_IN1_CTRL1: 235 case RT5645_IN1_CTRL2: 236 case RT5645_IN1_CTRL3: 237 case RT5645_A_JD_CTRL1: 238 case RT5645_ADC_EQ_CTRL1: 239 case RT5645_EQ_CTRL1: 240 case RT5645_ALC_CTRL_1: 241 case RT5645_IRQ_CTRL2: 242 case RT5645_IRQ_CTRL3: 243 case RT5645_INT_IRQ_ST: 244 case RT5645_IL_CMD: 245 case RT5645_VENDOR_ID: 246 case RT5645_VENDOR_ID1: 247 case RT5645_VENDOR_ID2: 248 return true; 249 default: 250 return false; 251 } 252 } 253 254 static bool rt5645_readable_register(struct device *dev, unsigned int reg) 255 { 256 int i; 257 258 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) { 259 if (reg >= rt5645_ranges[i].range_min && 260 reg <= rt5645_ranges[i].range_max) { 261 return true; 262 } 263 } 264 265 switch (reg) { 266 case RT5645_RESET: 267 case RT5645_SPK_VOL: 268 case RT5645_HP_VOL: 269 case RT5645_LOUT1: 270 case RT5645_IN1_CTRL1: 271 case RT5645_IN1_CTRL2: 272 case RT5645_IN1_CTRL3: 273 case RT5645_IN2_CTRL: 274 case RT5645_INL1_INR1_VOL: 275 case RT5645_SPK_FUNC_LIM: 276 case RT5645_ADJ_HPF_CTRL: 277 case RT5645_DAC1_DIG_VOL: 278 case RT5645_DAC2_DIG_VOL: 279 case RT5645_DAC_CTRL: 280 case RT5645_STO1_ADC_DIG_VOL: 281 case RT5645_MONO_ADC_DIG_VOL: 282 case RT5645_ADC_BST_VOL1: 283 case RT5645_ADC_BST_VOL2: 284 case RT5645_STO1_ADC_MIXER: 285 case RT5645_MONO_ADC_MIXER: 286 case RT5645_AD_DA_MIXER: 287 case RT5645_STO_DAC_MIXER: 288 case RT5645_MONO_DAC_MIXER: 289 case RT5645_DIG_MIXER: 290 case RT5645_DIG_INF1_DATA: 291 case RT5645_PDM_OUT_CTRL: 292 case RT5645_REC_L1_MIXER: 293 case RT5645_REC_L2_MIXER: 294 case RT5645_REC_R1_MIXER: 295 case RT5645_REC_R2_MIXER: 296 case RT5645_HPMIXL_CTRL: 297 case RT5645_HPOMIXL_CTRL: 298 case RT5645_HPMIXR_CTRL: 299 case RT5645_HPOMIXR_CTRL: 300 case RT5645_HPO_MIXER: 301 case RT5645_SPK_L_MIXER: 302 case RT5645_SPK_R_MIXER: 303 case RT5645_SPO_MIXER: 304 case RT5645_SPO_CLSD_RATIO: 305 case RT5645_OUT_L1_MIXER: 306 case RT5645_OUT_R1_MIXER: 307 case RT5645_OUT_L_GAIN1: 308 case RT5645_OUT_L_GAIN2: 309 case RT5645_OUT_R_GAIN1: 310 case RT5645_OUT_R_GAIN2: 311 case RT5645_LOUT_MIXER: 312 case RT5645_HAPTIC_CTRL1: 313 case RT5645_HAPTIC_CTRL2: 314 case RT5645_HAPTIC_CTRL3: 315 case RT5645_HAPTIC_CTRL4: 316 case RT5645_HAPTIC_CTRL5: 317 case RT5645_HAPTIC_CTRL6: 318 case RT5645_HAPTIC_CTRL7: 319 case RT5645_HAPTIC_CTRL8: 320 case RT5645_HAPTIC_CTRL9: 321 case RT5645_HAPTIC_CTRL10: 322 case RT5645_PWR_DIG1: 323 case RT5645_PWR_DIG2: 324 case RT5645_PWR_ANLG1: 325 case RT5645_PWR_ANLG2: 326 case RT5645_PWR_MIXER: 327 case RT5645_PWR_VOL: 328 case RT5645_PRIV_INDEX: 329 case RT5645_PRIV_DATA: 330 case RT5645_I2S1_SDP: 331 case RT5645_I2S2_SDP: 332 case RT5645_ADDA_CLK1: 333 case RT5645_ADDA_CLK2: 334 case RT5645_DMIC_CTRL1: 335 case RT5645_DMIC_CTRL2: 336 case RT5645_TDM_CTRL_1: 337 case RT5645_TDM_CTRL_2: 338 case RT5645_TDM_CTRL_3: 339 case RT5645_GLB_CLK: 340 case RT5645_PLL_CTRL1: 341 case RT5645_PLL_CTRL2: 342 case RT5645_ASRC_1: 343 case RT5645_ASRC_2: 344 case RT5645_ASRC_3: 345 case RT5645_ASRC_4: 346 case RT5645_DEPOP_M1: 347 case RT5645_DEPOP_M2: 348 case RT5645_DEPOP_M3: 349 case RT5645_MICBIAS: 350 case RT5645_A_JD_CTRL1: 351 case RT5645_VAD_CTRL4: 352 case RT5645_CLSD_OUT_CTRL: 353 case RT5645_ADC_EQ_CTRL1: 354 case RT5645_ADC_EQ_CTRL2: 355 case RT5645_EQ_CTRL1: 356 case RT5645_EQ_CTRL2: 357 case RT5645_ALC_CTRL_1: 358 case RT5645_ALC_CTRL_2: 359 case RT5645_ALC_CTRL_3: 360 case RT5645_ALC_CTRL_4: 361 case RT5645_ALC_CTRL_5: 362 case RT5645_JD_CTRL: 363 case RT5645_IRQ_CTRL1: 364 case RT5645_IRQ_CTRL2: 365 case RT5645_IRQ_CTRL3: 366 case RT5645_INT_IRQ_ST: 367 case RT5645_GPIO_CTRL1: 368 case RT5645_GPIO_CTRL2: 369 case RT5645_GPIO_CTRL3: 370 case RT5645_BASS_BACK: 371 case RT5645_MP3_PLUS1: 372 case RT5645_MP3_PLUS2: 373 case RT5645_ADJ_HPF1: 374 case RT5645_ADJ_HPF2: 375 case RT5645_HP_CALIB_AMP_DET: 376 case RT5645_SV_ZCD1: 377 case RT5645_SV_ZCD2: 378 case RT5645_IL_CMD: 379 case RT5645_IL_CMD2: 380 case RT5645_IL_CMD3: 381 case RT5645_DRC1_HL_CTRL1: 382 case RT5645_DRC2_HL_CTRL1: 383 case RT5645_ADC_MONO_HP_CTRL1: 384 case RT5645_ADC_MONO_HP_CTRL2: 385 case RT5645_DRC2_CTRL1: 386 case RT5645_DRC2_CTRL2: 387 case RT5645_DRC2_CTRL3: 388 case RT5645_DRC2_CTRL4: 389 case RT5645_DRC2_CTRL5: 390 case RT5645_JD_CTRL3: 391 case RT5645_JD_CTRL4: 392 case RT5645_GEN_CTRL1: 393 case RT5645_GEN_CTRL2: 394 case RT5645_GEN_CTRL3: 395 case RT5645_VENDOR_ID: 396 case RT5645_VENDOR_ID1: 397 case RT5645_VENDOR_ID2: 398 return true; 399 default: 400 return false; 401 } 402 } 403 404 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 405 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); 406 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 407 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); 408 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); 409 410 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ 411 static unsigned int bst_tlv[] = { 412 TLV_DB_RANGE_HEAD(7), 413 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), 414 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), 415 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), 416 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), 417 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), 418 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), 419 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0), 420 }; 421 422 static const char * const rt5645_tdm_data_swap_select[] = { 423 "L/R", "R/L", "L/L", "R/R" 424 }; 425 426 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum, 427 RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select); 428 429 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum, 430 RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select); 431 432 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum, 433 RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select); 434 435 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum, 436 RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select); 437 438 static const char * const rt5645_tdm_adc_data_select[] = { 439 "1/2/R", "2/1/R", "R/1/2", "R/2/1" 440 }; 441 442 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum, 443 RT5645_TDM_CTRL_1, 8, 444 rt5645_tdm_adc_data_select); 445 446 static const struct snd_kcontrol_new rt5645_snd_controls[] = { 447 /* Speaker Output Volume */ 448 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL, 449 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1), 450 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL, 451 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv), 452 453 /* Headphone Output Volume */ 454 SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL, 455 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1), 456 SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL, 457 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv), 458 459 /* OUTPUT Control */ 460 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1, 461 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1), 462 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1, 463 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1), 464 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1, 465 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv), 466 467 /* DAC Digital Volume */ 468 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL, 469 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1), 470 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL, 471 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv), 472 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL, 473 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv), 474 475 /* IN1/IN2 Control */ 476 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1, 477 RT5645_BST_SFT1, 8, 0, bst_tlv), 478 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL, 479 RT5645_BST_SFT2, 8, 0, bst_tlv), 480 481 /* INL/INR Volume Control */ 482 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL, 483 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv), 484 485 /* ADC Digital Volume Control */ 486 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL, 487 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1), 488 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL, 489 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv), 490 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL, 491 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1), 492 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL, 493 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv), 494 495 /* ADC Boost Volume Control */ 496 SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1, 497 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0, 498 adc_bst_tlv), 499 SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1, 500 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0, 501 adc_bst_tlv), 502 503 /* I2S2 function select */ 504 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT, 505 1, 1), 506 507 /* TDM */ 508 SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum), 509 SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum), 510 SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum), 511 SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum), 512 SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum), 513 SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0), 514 SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0), 515 SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0), 516 SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0), 517 }; 518 519 /** 520 * set_dmic_clk - Set parameter of dmic. 521 * 522 * @w: DAPM widget. 523 * @kcontrol: The kcontrol of this widget. 524 * @event: Event id. 525 * 526 */ 527 static int set_dmic_clk(struct snd_soc_dapm_widget *w, 528 struct snd_kcontrol *kcontrol, int event) 529 { 530 struct snd_soc_codec *codec = w->codec; 531 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 532 int idx = -EINVAL; 533 534 idx = rl6231_calc_dmic_clk(rt5645->sysclk); 535 536 if (idx < 0) 537 dev_err(codec->dev, "Failed to set DMIC clock\n"); 538 else 539 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1, 540 RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT); 541 return idx; 542 } 543 544 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, 545 struct snd_soc_dapm_widget *sink) 546 { 547 unsigned int val; 548 549 val = snd_soc_read(source->codec, RT5645_GLB_CLK); 550 val &= RT5645_SCLK_SRC_MASK; 551 if (val == RT5645_SCLK_SRC_PLL1) 552 return 1; 553 else 554 return 0; 555 } 556 557 static int is_using_asrc(struct snd_soc_dapm_widget *source, 558 struct snd_soc_dapm_widget *sink) 559 { 560 unsigned int reg, shift, val; 561 562 switch (source->shift) { 563 case 0: 564 reg = RT5645_ASRC_3; 565 shift = 0; 566 break; 567 case 1: 568 reg = RT5645_ASRC_3; 569 shift = 4; 570 break; 571 case 3: 572 reg = RT5645_ASRC_2; 573 shift = 0; 574 break; 575 case 8: 576 reg = RT5645_ASRC_2; 577 shift = 4; 578 break; 579 case 9: 580 reg = RT5645_ASRC_2; 581 shift = 8; 582 break; 583 case 10: 584 reg = RT5645_ASRC_2; 585 shift = 12; 586 break; 587 default: 588 return 0; 589 } 590 591 val = (snd_soc_read(source->codec, reg) >> shift) & 0xf; 592 switch (val) { 593 case 1: 594 case 2: 595 case 3: 596 case 4: 597 return 1; 598 default: 599 return 0; 600 } 601 602 } 603 604 /* Digital Mixer */ 605 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = { 606 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER, 607 RT5645_M_ADC_L1_SFT, 1, 1), 608 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER, 609 RT5645_M_ADC_L2_SFT, 1, 1), 610 }; 611 612 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = { 613 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER, 614 RT5645_M_ADC_R1_SFT, 1, 1), 615 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER, 616 RT5645_M_ADC_R2_SFT, 1, 1), 617 }; 618 619 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = { 620 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER, 621 RT5645_M_MONO_ADC_L1_SFT, 1, 1), 622 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER, 623 RT5645_M_MONO_ADC_L2_SFT, 1, 1), 624 }; 625 626 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = { 627 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER, 628 RT5645_M_MONO_ADC_R1_SFT, 1, 1), 629 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER, 630 RT5645_M_MONO_ADC_R2_SFT, 1, 1), 631 }; 632 633 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = { 634 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER, 635 RT5645_M_ADCMIX_L_SFT, 1, 1), 636 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER, 637 RT5645_M_DAC1_L_SFT, 1, 1), 638 }; 639 640 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = { 641 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER, 642 RT5645_M_ADCMIX_R_SFT, 1, 1), 643 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER, 644 RT5645_M_DAC1_R_SFT, 1, 1), 645 }; 646 647 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = { 648 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER, 649 RT5645_M_DAC_L1_SFT, 1, 1), 650 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER, 651 RT5645_M_DAC_L2_SFT, 1, 1), 652 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER, 653 RT5645_M_DAC_R1_STO_L_SFT, 1, 1), 654 }; 655 656 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = { 657 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER, 658 RT5645_M_DAC_R1_SFT, 1, 1), 659 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER, 660 RT5645_M_DAC_R2_SFT, 1, 1), 661 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER, 662 RT5645_M_DAC_L1_STO_R_SFT, 1, 1), 663 }; 664 665 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = { 666 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER, 667 RT5645_M_DAC_L1_MONO_L_SFT, 1, 1), 668 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER, 669 RT5645_M_DAC_L2_MONO_L_SFT, 1, 1), 670 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER, 671 RT5645_M_DAC_R2_MONO_L_SFT, 1, 1), 672 }; 673 674 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = { 675 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER, 676 RT5645_M_DAC_R1_MONO_R_SFT, 1, 1), 677 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER, 678 RT5645_M_DAC_R2_MONO_R_SFT, 1, 1), 679 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER, 680 RT5645_M_DAC_L2_MONO_R_SFT, 1, 1), 681 }; 682 683 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = { 684 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER, 685 RT5645_M_STO_L_DAC_L_SFT, 1, 1), 686 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER, 687 RT5645_M_DAC_L2_DAC_L_SFT, 1, 1), 688 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER, 689 RT5645_M_DAC_R2_DAC_L_SFT, 1, 1), 690 }; 691 692 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = { 693 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER, 694 RT5645_M_STO_R_DAC_R_SFT, 1, 1), 695 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER, 696 RT5645_M_DAC_R2_DAC_R_SFT, 1, 1), 697 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER, 698 RT5645_M_DAC_L2_DAC_R_SFT, 1, 1), 699 }; 700 701 /* Analog Input Mixer */ 702 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = { 703 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER, 704 RT5645_M_HP_L_RM_L_SFT, 1, 1), 705 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER, 706 RT5645_M_IN_L_RM_L_SFT, 1, 1), 707 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER, 708 RT5645_M_BST2_RM_L_SFT, 1, 1), 709 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER, 710 RT5645_M_BST1_RM_L_SFT, 1, 1), 711 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER, 712 RT5645_M_OM_L_RM_L_SFT, 1, 1), 713 }; 714 715 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = { 716 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER, 717 RT5645_M_HP_R_RM_R_SFT, 1, 1), 718 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER, 719 RT5645_M_IN_R_RM_R_SFT, 1, 1), 720 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER, 721 RT5645_M_BST2_RM_R_SFT, 1, 1), 722 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER, 723 RT5645_M_BST1_RM_R_SFT, 1, 1), 724 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER, 725 RT5645_M_OM_R_RM_R_SFT, 1, 1), 726 }; 727 728 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = { 729 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER, 730 RT5645_M_DAC_L1_SM_L_SFT, 1, 1), 731 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER, 732 RT5645_M_DAC_L2_SM_L_SFT, 1, 1), 733 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER, 734 RT5645_M_IN_L_SM_L_SFT, 1, 1), 735 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER, 736 RT5645_M_BST1_L_SM_L_SFT, 1, 1), 737 }; 738 739 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = { 740 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER, 741 RT5645_M_DAC_R1_SM_R_SFT, 1, 1), 742 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER, 743 RT5645_M_DAC_R2_SM_R_SFT, 1, 1), 744 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER, 745 RT5645_M_IN_R_SM_R_SFT, 1, 1), 746 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER, 747 RT5645_M_BST2_R_SM_R_SFT, 1, 1), 748 }; 749 750 static const struct snd_kcontrol_new rt5645_out_l_mix[] = { 751 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER, 752 RT5645_M_BST1_OM_L_SFT, 1, 1), 753 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER, 754 RT5645_M_IN_L_OM_L_SFT, 1, 1), 755 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER, 756 RT5645_M_DAC_L2_OM_L_SFT, 1, 1), 757 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER, 758 RT5645_M_DAC_L1_OM_L_SFT, 1, 1), 759 }; 760 761 static const struct snd_kcontrol_new rt5645_out_r_mix[] = { 762 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER, 763 RT5645_M_BST2_OM_R_SFT, 1, 1), 764 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER, 765 RT5645_M_IN_R_OM_R_SFT, 1, 1), 766 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER, 767 RT5645_M_DAC_R2_OM_R_SFT, 1, 1), 768 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER, 769 RT5645_M_DAC_R1_OM_R_SFT, 1, 1), 770 }; 771 772 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = { 773 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER, 774 RT5645_M_DAC_R1_SPM_L_SFT, 1, 1), 775 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER, 776 RT5645_M_DAC_L1_SPM_L_SFT, 1, 1), 777 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER, 778 RT5645_M_SV_R_SPM_L_SFT, 1, 1), 779 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER, 780 RT5645_M_SV_L_SPM_L_SFT, 1, 1), 781 }; 782 783 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = { 784 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER, 785 RT5645_M_DAC_R1_SPM_R_SFT, 1, 1), 786 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER, 787 RT5645_M_SV_R_SPM_R_SFT, 1, 1), 788 }; 789 790 static const struct snd_kcontrol_new rt5645_hpo_mix[] = { 791 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER, 792 RT5645_M_DAC1_HM_SFT, 1, 1), 793 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER, 794 RT5645_M_HPVOL_HM_SFT, 1, 1), 795 }; 796 797 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = { 798 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL, 799 RT5645_M_DAC1_HV_SFT, 1, 1), 800 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL, 801 RT5645_M_DAC2_HV_SFT, 1, 1), 802 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL, 803 RT5645_M_IN_HV_SFT, 1, 1), 804 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL, 805 RT5645_M_BST1_HV_SFT, 1, 1), 806 }; 807 808 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = { 809 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL, 810 RT5645_M_DAC1_HV_SFT, 1, 1), 811 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL, 812 RT5645_M_DAC2_HV_SFT, 1, 1), 813 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL, 814 RT5645_M_IN_HV_SFT, 1, 1), 815 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL, 816 RT5645_M_BST2_HV_SFT, 1, 1), 817 }; 818 819 static const struct snd_kcontrol_new rt5645_lout_mix[] = { 820 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER, 821 RT5645_M_DAC_L1_LM_SFT, 1, 1), 822 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER, 823 RT5645_M_DAC_R1_LM_SFT, 1, 1), 824 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER, 825 RT5645_M_OV_L_LM_SFT, 1, 1), 826 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER, 827 RT5645_M_OV_R_LM_SFT, 1, 1), 828 }; 829 830 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */ 831 static const char * const rt5645_dac1_src[] = { 832 "IF1 DAC", "IF2 DAC", "IF3 DAC" 833 }; 834 835 static SOC_ENUM_SINGLE_DECL( 836 rt5645_dac1l_enum, RT5645_AD_DA_MIXER, 837 RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src); 838 839 static const struct snd_kcontrol_new rt5645_dac1l_mux = 840 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum); 841 842 static SOC_ENUM_SINGLE_DECL( 843 rt5645_dac1r_enum, RT5645_AD_DA_MIXER, 844 RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src); 845 846 static const struct snd_kcontrol_new rt5645_dac1r_mux = 847 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum); 848 849 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ 850 static const char * const rt5645_dac12_src[] = { 851 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC" 852 }; 853 854 static SOC_ENUM_SINGLE_DECL( 855 rt5645_dac2l_enum, RT5645_DAC_CTRL, 856 RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src); 857 858 static const struct snd_kcontrol_new rt5645_dac_l2_mux = 859 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum); 860 861 static const char * const rt5645_dacr2_src[] = { 862 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic" 863 }; 864 865 static SOC_ENUM_SINGLE_DECL( 866 rt5645_dac2r_enum, RT5645_DAC_CTRL, 867 RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src); 868 869 static const struct snd_kcontrol_new rt5645_dac_r2_mux = 870 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum); 871 872 873 /* INL/R source */ 874 static const char * const rt5645_inl_src[] = { 875 "IN2P", "MonoP" 876 }; 877 878 static SOC_ENUM_SINGLE_DECL( 879 rt5645_inl_enum, RT5645_INL1_INR1_VOL, 880 RT5645_INL_SEL_SFT, rt5645_inl_src); 881 882 static const struct snd_kcontrol_new rt5645_inl_mux = 883 SOC_DAPM_ENUM("INL source", rt5645_inl_enum); 884 885 static const char * const rt5645_inr_src[] = { 886 "IN2N", "MonoN" 887 }; 888 889 static SOC_ENUM_SINGLE_DECL( 890 rt5645_inr_enum, RT5645_INL1_INR1_VOL, 891 RT5645_INR_SEL_SFT, rt5645_inr_src); 892 893 static const struct snd_kcontrol_new rt5645_inr_mux = 894 SOC_DAPM_ENUM("INR source", rt5645_inr_enum); 895 896 /* Stereo1 ADC source */ 897 /* MX-27 [12] */ 898 static const char * const rt5645_stereo_adc1_src[] = { 899 "DAC MIX", "ADC" 900 }; 901 902 static SOC_ENUM_SINGLE_DECL( 903 rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER, 904 RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src); 905 906 static const struct snd_kcontrol_new rt5645_sto_adc1_mux = 907 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum); 908 909 /* MX-27 [11] */ 910 static const char * const rt5645_stereo_adc2_src[] = { 911 "DAC MIX", "DMIC" 912 }; 913 914 static SOC_ENUM_SINGLE_DECL( 915 rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER, 916 RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src); 917 918 static const struct snd_kcontrol_new rt5645_sto_adc2_mux = 919 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum); 920 921 /* MX-27 [8] */ 922 static const char * const rt5645_stereo_dmic_src[] = { 923 "DMIC1", "DMIC2" 924 }; 925 926 static SOC_ENUM_SINGLE_DECL( 927 rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER, 928 RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src); 929 930 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux = 931 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum); 932 933 /* Mono ADC source */ 934 /* MX-28 [12] */ 935 static const char * const rt5645_mono_adc_l1_src[] = { 936 "Mono DAC MIXL", "ADC" 937 }; 938 939 static SOC_ENUM_SINGLE_DECL( 940 rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER, 941 RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src); 942 943 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux = 944 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum); 945 /* MX-28 [11] */ 946 static const char * const rt5645_mono_adc_l2_src[] = { 947 "Mono DAC MIXL", "DMIC" 948 }; 949 950 static SOC_ENUM_SINGLE_DECL( 951 rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER, 952 RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src); 953 954 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux = 955 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum); 956 957 /* MX-28 [8] */ 958 static const char * const rt5645_mono_dmic_src[] = { 959 "DMIC1", "DMIC2" 960 }; 961 962 static SOC_ENUM_SINGLE_DECL( 963 rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER, 964 RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src); 965 966 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux = 967 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum); 968 /* MX-28 [1:0] */ 969 static SOC_ENUM_SINGLE_DECL( 970 rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER, 971 RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src); 972 973 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux = 974 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum); 975 /* MX-28 [4] */ 976 static const char * const rt5645_mono_adc_r1_src[] = { 977 "Mono DAC MIXR", "ADC" 978 }; 979 980 static SOC_ENUM_SINGLE_DECL( 981 rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER, 982 RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src); 983 984 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux = 985 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum); 986 /* MX-28 [3] */ 987 static const char * const rt5645_mono_adc_r2_src[] = { 988 "Mono DAC MIXR", "DMIC" 989 }; 990 991 static SOC_ENUM_SINGLE_DECL( 992 rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER, 993 RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src); 994 995 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux = 996 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum); 997 998 /* MX-77 [9:8] */ 999 static const char * const rt5645_if1_adc_in_src[] = { 1000 "IF_ADC1", "IF_ADC2", "VAD_ADC" 1001 }; 1002 1003 static SOC_ENUM_SINGLE_DECL( 1004 rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1, 1005 RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src); 1006 1007 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux = 1008 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum); 1009 1010 /* MX-2F [13:12] */ 1011 static const char * const rt5645_if2_adc_in_src[] = { 1012 "IF_ADC1", "IF_ADC2", "VAD_ADC" 1013 }; 1014 1015 static SOC_ENUM_SINGLE_DECL( 1016 rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA, 1017 RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src); 1018 1019 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux = 1020 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum); 1021 1022 /* MX-2F [1:0] */ 1023 static const char * const rt5645_if3_adc_in_src[] = { 1024 "IF_ADC1", "IF_ADC2", "VAD_ADC" 1025 }; 1026 1027 static SOC_ENUM_SINGLE_DECL( 1028 rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA, 1029 RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src); 1030 1031 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux = 1032 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum); 1033 1034 /* MX-31 [15] [13] [11] [9] */ 1035 static const char * const rt5645_pdm_src[] = { 1036 "Mono DAC", "Stereo DAC" 1037 }; 1038 1039 static SOC_ENUM_SINGLE_DECL( 1040 rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL, 1041 RT5645_PDM1_L_SFT, rt5645_pdm_src); 1042 1043 static const struct snd_kcontrol_new rt5645_pdm1_l_mux = 1044 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum); 1045 1046 static SOC_ENUM_SINGLE_DECL( 1047 rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL, 1048 RT5645_PDM1_R_SFT, rt5645_pdm_src); 1049 1050 static const struct snd_kcontrol_new rt5645_pdm1_r_mux = 1051 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum); 1052 1053 /* MX-9D [9:8] */ 1054 static const char * const rt5645_vad_adc_src[] = { 1055 "Sto1 ADC L", "Mono ADC L", "Mono ADC R" 1056 }; 1057 1058 static SOC_ENUM_SINGLE_DECL( 1059 rt5645_vad_adc_enum, RT5645_VAD_CTRL4, 1060 RT5645_VAD_SEL_SFT, rt5645_vad_adc_src); 1061 1062 static const struct snd_kcontrol_new rt5645_vad_adc_mux = 1063 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum); 1064 1065 static const struct snd_kcontrol_new spk_l_vol_control = 1066 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL, 1067 RT5645_L_MUTE_SFT, 1, 1); 1068 1069 static const struct snd_kcontrol_new spk_r_vol_control = 1070 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL, 1071 RT5645_R_MUTE_SFT, 1, 1); 1072 1073 static const struct snd_kcontrol_new hp_l_vol_control = 1074 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL, 1075 RT5645_L_MUTE_SFT, 1, 1); 1076 1077 static const struct snd_kcontrol_new hp_r_vol_control = 1078 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL, 1079 RT5645_R_MUTE_SFT, 1, 1); 1080 1081 static const struct snd_kcontrol_new pdm1_l_vol_control = 1082 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL, 1083 RT5645_M_PDM1_L, 1, 1); 1084 1085 static const struct snd_kcontrol_new pdm1_r_vol_control = 1086 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL, 1087 RT5645_M_PDM1_R, 1, 1); 1088 1089 static void hp_amp_power(struct snd_soc_codec *codec, int on) 1090 { 1091 static int hp_amp_power_count; 1092 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 1093 1094 if (on) { 1095 if (hp_amp_power_count <= 0) { 1096 /* depop parameters */ 1097 snd_soc_update_bits(codec, RT5645_DEPOP_M2, 1098 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN); 1099 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d); 1100 regmap_write(rt5645->regmap, RT5645_PR_BASE + 1101 RT5645_HP_DCC_INT1, 0x9f01); 1102 mdelay(150); 1103 /* headphone amp power on */ 1104 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 1105 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0); 1106 snd_soc_update_bits(codec, RT5645_PWR_VOL, 1107 RT5645_PWR_HV_L | RT5645_PWR_HV_R, 1108 RT5645_PWR_HV_L | RT5645_PWR_HV_R); 1109 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 1110 RT5645_PWR_HP_L | RT5645_PWR_HP_R | 1111 RT5645_PWR_HA, 1112 RT5645_PWR_HP_L | RT5645_PWR_HP_R | 1113 RT5645_PWR_HA); 1114 mdelay(5); 1115 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 1116 RT5645_PWR_FV1 | RT5645_PWR_FV2, 1117 RT5645_PWR_FV1 | RT5645_PWR_FV2); 1118 1119 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1120 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK, 1121 RT5645_HP_CO_EN | RT5645_HP_SG_EN); 1122 regmap_write(rt5645->regmap, RT5645_PR_BASE + 1123 0x14, 0x1aaa); 1124 regmap_write(rt5645->regmap, RT5645_PR_BASE + 1125 0x24, 0x0430); 1126 } 1127 hp_amp_power_count++; 1128 } else { 1129 hp_amp_power_count--; 1130 if (hp_amp_power_count <= 0) { 1131 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1132 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK | 1133 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS | 1134 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS); 1135 /* headphone amp power down */ 1136 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000); 1137 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 1138 RT5645_PWR_HP_L | RT5645_PWR_HP_R | 1139 RT5645_PWR_HA, 0); 1140 } 1141 } 1142 } 1143 1144 static int rt5645_hp_event(struct snd_soc_dapm_widget *w, 1145 struct snd_kcontrol *kcontrol, int event) 1146 { 1147 struct snd_soc_codec *codec = w->codec; 1148 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 1149 1150 switch (event) { 1151 case SND_SOC_DAPM_POST_PMU: 1152 hp_amp_power(codec, 1); 1153 /* headphone unmute sequence */ 1154 snd_soc_update_bits(codec, RT5645_DEPOP_M3, RT5645_CP_FQ1_MASK | 1155 RT5645_CP_FQ2_MASK | RT5645_CP_FQ3_MASK, 1156 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) | 1157 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) | 1158 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT)); 1159 regmap_write(rt5645->regmap, 1160 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00); 1161 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1162 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN); 1163 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1164 RT5645_RSTN_MASK, RT5645_RSTN_EN); 1165 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1166 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK | 1167 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS | 1168 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN); 1169 msleep(40); 1170 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1171 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK | 1172 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS | 1173 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS); 1174 break; 1175 1176 case SND_SOC_DAPM_PRE_PMD: 1177 /* headphone mute sequence */ 1178 snd_soc_update_bits(codec, RT5645_DEPOP_M3, 1179 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK | 1180 RT5645_CP_FQ3_MASK, 1181 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) | 1182 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) | 1183 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT)); 1184 regmap_write(rt5645->regmap, 1185 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00); 1186 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1187 RT5645_HP_SG_MASK, RT5645_HP_SG_EN); 1188 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1189 RT5645_RSTP_MASK, RT5645_RSTP_EN); 1190 snd_soc_update_bits(codec, RT5645_DEPOP_M1, 1191 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK | 1192 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS | 1193 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN); 1194 msleep(30); 1195 hp_amp_power(codec, 0); 1196 break; 1197 1198 default: 1199 return 0; 1200 } 1201 1202 return 0; 1203 } 1204 1205 static int rt5645_spk_event(struct snd_soc_dapm_widget *w, 1206 struct snd_kcontrol *kcontrol, int event) 1207 { 1208 struct snd_soc_codec *codec = w->codec; 1209 1210 switch (event) { 1211 case SND_SOC_DAPM_POST_PMU: 1212 snd_soc_update_bits(codec, RT5645_PWR_DIG1, 1213 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R | 1214 RT5645_PWR_CLS_D_L, 1215 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R | 1216 RT5645_PWR_CLS_D_L); 1217 break; 1218 1219 case SND_SOC_DAPM_PRE_PMD: 1220 snd_soc_update_bits(codec, RT5645_PWR_DIG1, 1221 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R | 1222 RT5645_PWR_CLS_D_L, 0); 1223 break; 1224 1225 default: 1226 return 0; 1227 } 1228 1229 return 0; 1230 } 1231 1232 static int rt5645_lout_event(struct snd_soc_dapm_widget *w, 1233 struct snd_kcontrol *kcontrol, int event) 1234 { 1235 struct snd_soc_codec *codec = w->codec; 1236 1237 switch (event) { 1238 case SND_SOC_DAPM_POST_PMU: 1239 hp_amp_power(codec, 1); 1240 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 1241 RT5645_PWR_LM, RT5645_PWR_LM); 1242 snd_soc_update_bits(codec, RT5645_LOUT1, 1243 RT5645_L_MUTE | RT5645_R_MUTE, 0); 1244 break; 1245 1246 case SND_SOC_DAPM_PRE_PMD: 1247 snd_soc_update_bits(codec, RT5645_LOUT1, 1248 RT5645_L_MUTE | RT5645_R_MUTE, 1249 RT5645_L_MUTE | RT5645_R_MUTE); 1250 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 1251 RT5645_PWR_LM, 0); 1252 hp_amp_power(codec, 0); 1253 break; 1254 1255 default: 1256 return 0; 1257 } 1258 1259 return 0; 1260 } 1261 1262 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w, 1263 struct snd_kcontrol *kcontrol, int event) 1264 { 1265 struct snd_soc_codec *codec = w->codec; 1266 1267 switch (event) { 1268 case SND_SOC_DAPM_POST_PMU: 1269 snd_soc_update_bits(codec, RT5645_PWR_ANLG2, 1270 RT5645_PWR_BST2_P, RT5645_PWR_BST2_P); 1271 break; 1272 1273 case SND_SOC_DAPM_PRE_PMD: 1274 snd_soc_update_bits(codec, RT5645_PWR_ANLG2, 1275 RT5645_PWR_BST2_P, 0); 1276 break; 1277 1278 default: 1279 return 0; 1280 } 1281 1282 return 0; 1283 } 1284 1285 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = { 1286 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER, 1287 RT5645_PWR_LDO2_BIT, 0, NULL, 0), 1288 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2, 1289 RT5645_PWR_PLL_BIT, 0, NULL, 0), 1290 1291 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2, 1292 RT5645_PWR_JD1_BIT, 0, NULL, 0), 1293 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL, 1294 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0), 1295 1296 /* ASRC */ 1297 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1, 1298 11, 0, NULL, 0), 1299 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1, 1300 12, 0, NULL, 0), 1301 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1, 1302 10, 0, NULL, 0), 1303 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1, 1304 9, 0, NULL, 0), 1305 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1, 1306 8, 0, NULL, 0), 1307 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1, 1308 7, 0, NULL, 0), 1309 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1, 1310 5, 0, NULL, 0), 1311 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1, 1312 4, 0, NULL, 0), 1313 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1, 1314 3, 0, NULL, 0), 1315 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1, 1316 1, 0, NULL, 0), 1317 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1, 1318 0, 0, NULL, 0), 1319 1320 /* Input Side */ 1321 /* micbias */ 1322 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2, 1323 RT5645_PWR_MB1_BIT, 0), 1324 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2, 1325 RT5645_PWR_MB2_BIT, 0), 1326 /* Input Lines */ 1327 SND_SOC_DAPM_INPUT("DMIC L1"), 1328 SND_SOC_DAPM_INPUT("DMIC R1"), 1329 SND_SOC_DAPM_INPUT("DMIC L2"), 1330 SND_SOC_DAPM_INPUT("DMIC R2"), 1331 1332 SND_SOC_DAPM_INPUT("IN1P"), 1333 SND_SOC_DAPM_INPUT("IN1N"), 1334 SND_SOC_DAPM_INPUT("IN2P"), 1335 SND_SOC_DAPM_INPUT("IN2N"), 1336 1337 SND_SOC_DAPM_INPUT("Haptic Generator"), 1338 1339 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1340 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1341 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, 1342 set_dmic_clk, SND_SOC_DAPM_PRE_PMU), 1343 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1, 1344 RT5645_DMIC_1_EN_SFT, 0, NULL, 0), 1345 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1, 1346 RT5645_DMIC_2_EN_SFT, 0, NULL, 0), 1347 /* Boost */ 1348 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2, 1349 RT5645_PWR_BST1_BIT, 0, NULL, 0), 1350 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2, 1351 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event, 1352 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1353 /* Input Volume */ 1354 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL, 1355 RT5645_PWR_IN_L_BIT, 0, NULL, 0), 1356 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL, 1357 RT5645_PWR_IN_R_BIT, 0, NULL, 0), 1358 /* REC Mixer */ 1359 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT, 1360 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)), 1361 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT, 1362 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)), 1363 /* ADCs */ 1364 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 1365 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 1366 1367 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1, 1368 RT5645_PWR_ADC_L_BIT, 0, NULL, 0), 1369 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1, 1370 RT5645_PWR_ADC_R_BIT, 0, NULL, 0), 1371 1372 /* ADC Mux */ 1373 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, 1374 &rt5645_sto1_dmic_mux), 1375 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1376 &rt5645_sto_adc2_mux), 1377 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1378 &rt5645_sto_adc2_mux), 1379 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1380 &rt5645_sto_adc1_mux), 1381 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1382 &rt5645_sto_adc1_mux), 1383 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, 1384 &rt5645_mono_dmic_l_mux), 1385 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, 1386 &rt5645_mono_dmic_r_mux), 1387 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, 1388 &rt5645_mono_adc_l2_mux), 1389 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, 1390 &rt5645_mono_adc_l1_mux), 1391 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, 1392 &rt5645_mono_adc_r1_mux), 1393 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, 1394 &rt5645_mono_adc_r2_mux), 1395 /* ADC Mixer */ 1396 1397 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2, 1398 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0), 1399 SND_SOC_DAPM_SUPPLY_S("adc stereo2 filter", 1, RT5645_PWR_DIG2, 1400 RT5645_PWR_ADC_S2F_BIT, 0, NULL, 0), 1401 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0, 1402 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix), 1403 NULL, 0), 1404 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0, 1405 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix), 1406 NULL, 0), 1407 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2, 1408 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0), 1409 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0, 1410 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix), 1411 NULL, 0), 1412 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2, 1413 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0), 1414 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0, 1415 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix), 1416 NULL, 0), 1417 1418 /* ADC PGA */ 1419 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), 1420 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), 1421 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), 1422 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1423 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1424 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1425 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1426 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1427 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), 1428 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0), 1429 1430 /* IF1 2 Mux */ 1431 SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM, 1432 0, 0, &rt5645_if1_adc_in_mux), 1433 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 1434 0, 0, &rt5645_if2_adc_in_mux), 1435 1436 /* Digital Interface */ 1437 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1, 1438 RT5645_PWR_I2S1_BIT, 0, NULL, 0), 1439 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), 1440 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), 1441 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1442 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1443 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), 1444 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), 1445 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1446 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1447 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1448 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1, 1449 RT5645_PWR_I2S2_BIT, 0, NULL, 0), 1450 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), 1451 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), 1452 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), 1453 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), 1454 1455 /* Digital Interface Select */ 1456 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 1457 0, 0, &rt5645_vad_adc_mux), 1458 1459 /* Audio Interface */ 1460 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 1461 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 1462 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 1463 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), 1464 1465 /* Output Side */ 1466 /* DAC mixer before sound effect */ 1467 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, 1468 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)), 1469 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, 1470 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)), 1471 1472 /* DAC2 channel Mux */ 1473 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux), 1474 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux), 1475 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1, 1476 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0), 1477 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1, 1478 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0), 1479 1480 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux), 1481 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux), 1482 1483 /* DAC Mixer */ 1484 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2, 1485 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0), 1486 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2, 1487 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0), 1488 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2, 1489 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0), 1490 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, 1491 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)), 1492 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, 1493 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)), 1494 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, 1495 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)), 1496 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, 1497 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)), 1498 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, 1499 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)), 1500 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, 1501 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)), 1502 1503 /* DACs */ 1504 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT, 1505 0), 1506 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT, 1507 0), 1508 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT, 1509 0), 1510 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT, 1511 0), 1512 /* OUT Mixer */ 1513 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT, 1514 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)), 1515 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT, 1516 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)), 1517 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT, 1518 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)), 1519 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT, 1520 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)), 1521 /* Ouput Volume */ 1522 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0, 1523 &spk_l_vol_control), 1524 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0, 1525 &spk_r_vol_control), 1526 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT, 1527 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)), 1528 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT, 1529 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)), 1530 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER, 1531 RT5645_PWR_HM_L_BIT, 0, NULL, 0), 1532 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER, 1533 RT5645_PWR_HM_R_BIT, 0, NULL, 0), 1534 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), 1535 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), 1536 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), 1537 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control), 1538 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control), 1539 1540 /* HPO/LOUT/Mono Mixer */ 1541 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix, 1542 ARRAY_SIZE(rt5645_spo_l_mix)), 1543 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix, 1544 ARRAY_SIZE(rt5645_spo_r_mix)), 1545 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix, 1546 ARRAY_SIZE(rt5645_hpo_mix)), 1547 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix, 1548 ARRAY_SIZE(rt5645_lout_mix)), 1549 1550 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event, 1551 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1552 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event, 1553 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1554 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event, 1555 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 1556 1557 /* PDM */ 1558 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT, 1559 0, NULL, 0), 1560 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux), 1561 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux), 1562 1563 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control), 1564 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control), 1565 1566 /* Output Lines */ 1567 SND_SOC_DAPM_OUTPUT("HPOL"), 1568 SND_SOC_DAPM_OUTPUT("HPOR"), 1569 SND_SOC_DAPM_OUTPUT("LOUTL"), 1570 SND_SOC_DAPM_OUTPUT("LOUTR"), 1571 SND_SOC_DAPM_OUTPUT("PDM1L"), 1572 SND_SOC_DAPM_OUTPUT("PDM1R"), 1573 SND_SOC_DAPM_OUTPUT("SPOL"), 1574 SND_SOC_DAPM_OUTPUT("SPOR"), 1575 }; 1576 1577 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = { 1578 { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc }, 1579 { "adc stereo2 filter", NULL, "ADC STO2 ASRC", is_using_asrc }, 1580 { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc }, 1581 { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc }, 1582 { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc }, 1583 { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc }, 1584 { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc }, 1585 1586 { "I2S1", NULL, "I2S1 ASRC" }, 1587 { "I2S2", NULL, "I2S2 ASRC" }, 1588 1589 { "IN1P", NULL, "LDO2" }, 1590 { "IN2P", NULL, "LDO2" }, 1591 1592 { "DMIC1", NULL, "DMIC L1" }, 1593 { "DMIC1", NULL, "DMIC R1" }, 1594 { "DMIC2", NULL, "DMIC L2" }, 1595 { "DMIC2", NULL, "DMIC R2" }, 1596 1597 { "BST1", NULL, "IN1P" }, 1598 { "BST1", NULL, "IN1N" }, 1599 { "BST1", NULL, "JD Power" }, 1600 { "BST1", NULL, "Mic Det Power" }, 1601 { "BST2", NULL, "IN2P" }, 1602 { "BST2", NULL, "IN2N" }, 1603 1604 { "INL VOL", NULL, "IN2P" }, 1605 { "INR VOL", NULL, "IN2N" }, 1606 1607 { "RECMIXL", "HPOL Switch", "HPOL" }, 1608 { "RECMIXL", "INL Switch", "INL VOL" }, 1609 { "RECMIXL", "BST2 Switch", "BST2" }, 1610 { "RECMIXL", "BST1 Switch", "BST1" }, 1611 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" }, 1612 1613 { "RECMIXR", "HPOR Switch", "HPOR" }, 1614 { "RECMIXR", "INR Switch", "INR VOL" }, 1615 { "RECMIXR", "BST2 Switch", "BST2" }, 1616 { "RECMIXR", "BST1 Switch", "BST1" }, 1617 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" }, 1618 1619 { "ADC L", NULL, "RECMIXL" }, 1620 { "ADC L", NULL, "ADC L power" }, 1621 { "ADC R", NULL, "RECMIXR" }, 1622 { "ADC R", NULL, "ADC R power" }, 1623 1624 {"DMIC L1", NULL, "DMIC CLK"}, 1625 {"DMIC L1", NULL, "DMIC1 Power"}, 1626 {"DMIC R1", NULL, "DMIC CLK"}, 1627 {"DMIC R1", NULL, "DMIC1 Power"}, 1628 {"DMIC L2", NULL, "DMIC CLK"}, 1629 {"DMIC L2", NULL, "DMIC2 Power"}, 1630 {"DMIC R2", NULL, "DMIC CLK"}, 1631 {"DMIC R2", NULL, "DMIC2 Power"}, 1632 1633 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, 1634 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, 1635 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" }, 1636 1637 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, 1638 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, 1639 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" }, 1640 1641 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, 1642 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, 1643 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" }, 1644 1645 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1646 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, 1647 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" }, 1648 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, 1649 1650 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" }, 1651 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, 1652 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, 1653 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, 1654 1655 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, 1656 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 1657 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, 1658 { "Mono ADC L1 Mux", "ADC", "ADC L" }, 1659 1660 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 1661 { "Mono ADC R1 Mux", "ADC", "ADC R" }, 1662 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, 1663 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, 1664 1665 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, 1666 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, 1667 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, 1668 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, 1669 1670 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, 1671 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" }, 1672 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll }, 1673 1674 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, 1675 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" }, 1676 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll }, 1677 1678 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, 1679 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, 1680 { "Mono ADC MIXL", NULL, "adc mono left filter" }, 1681 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll }, 1682 1683 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, 1684 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, 1685 { "Mono ADC MIXR", NULL, "adc mono right filter" }, 1686 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll }, 1687 1688 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, 1689 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, 1690 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, 1691 1692 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, 1693 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, 1694 { "IF_ADC2", NULL, "Mono ADC MIXL" }, 1695 { "IF_ADC2", NULL, "Mono ADC MIXR" }, 1696 { "VAD_ADC", NULL, "VAD ADC Mux" }, 1697 1698 { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" }, 1699 { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" }, 1700 { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" }, 1701 1702 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, 1703 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, 1704 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, 1705 1706 { "IF1 ADC", NULL, "I2S1" }, 1707 { "IF1 ADC", NULL, "IF1 ADC Mux" }, 1708 { "IF2 ADC", NULL, "I2S2" }, 1709 { "IF2 ADC", NULL, "IF2 ADC Mux" }, 1710 1711 { "AIF1TX", NULL, "IF1 ADC" }, 1712 { "AIF1TX", NULL, "IF2 ADC" }, 1713 { "AIF2TX", NULL, "IF2 ADC" }, 1714 1715 { "IF1 DAC1", NULL, "AIF1RX" }, 1716 { "IF1 DAC2", NULL, "AIF1RX" }, 1717 { "IF2 DAC", NULL, "AIF2RX" }, 1718 1719 { "IF1 DAC1", NULL, "I2S1" }, 1720 { "IF1 DAC2", NULL, "I2S1" }, 1721 { "IF2 DAC", NULL, "I2S2" }, 1722 1723 { "IF1 DAC2 L", NULL, "IF1 DAC2" }, 1724 { "IF1 DAC2 R", NULL, "IF1 DAC2" }, 1725 { "IF1 DAC1 L", NULL, "IF1 DAC1" }, 1726 { "IF1 DAC1 R", NULL, "IF1 DAC1" }, 1727 { "IF2 DAC L", NULL, "IF2 DAC" }, 1728 { "IF2 DAC R", NULL, "IF2 DAC" }, 1729 1730 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" }, 1731 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, 1732 1733 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" }, 1734 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, 1735 1736 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, 1737 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, 1738 { "DAC1 MIXL", NULL, "dac stereo1 filter" }, 1739 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, 1740 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, 1741 { "DAC1 MIXR", NULL, "dac stereo1 filter" }, 1742 1743 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" }, 1744 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, 1745 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" }, 1746 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, 1747 { "DAC L2 Volume", NULL, "DAC L2 Mux" }, 1748 { "DAC L2 Volume", NULL, "dac mono left filter" }, 1749 1750 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" }, 1751 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, 1752 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" }, 1753 { "DAC R2 Mux", "Haptic", "Haptic Generator" }, 1754 { "DAC R2 Volume", NULL, "DAC R2 Mux" }, 1755 { "DAC R2 Volume", NULL, "dac mono right filter" }, 1756 1757 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 1758 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, 1759 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 1760 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" }, 1761 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 1762 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, 1763 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 1764 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" }, 1765 1766 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, 1767 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 1768 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 1769 { "Mono DAC MIXL", NULL, "dac mono left filter" }, 1770 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, 1771 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 1772 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 1773 { "Mono DAC MIXR", NULL, "dac mono right filter" }, 1774 1775 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, 1776 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, 1777 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, 1778 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, 1779 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, 1780 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, 1781 1782 { "DAC L1", NULL, "Stereo DAC MIXL" }, 1783 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll }, 1784 { "DAC R1", NULL, "Stereo DAC MIXR" }, 1785 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll }, 1786 { "DAC L2", NULL, "Mono DAC MIXL" }, 1787 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll }, 1788 { "DAC R2", NULL, "Mono DAC MIXR" }, 1789 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll }, 1790 1791 { "SPK MIXL", "BST1 Switch", "BST1" }, 1792 { "SPK MIXL", "INL Switch", "INL VOL" }, 1793 { "SPK MIXL", "DAC L1 Switch", "DAC L1" }, 1794 { "SPK MIXL", "DAC L2 Switch", "DAC L2" }, 1795 { "SPK MIXR", "BST2 Switch", "BST2" }, 1796 { "SPK MIXR", "INR Switch", "INR VOL" }, 1797 { "SPK MIXR", "DAC R1 Switch", "DAC R1" }, 1798 { "SPK MIXR", "DAC R2 Switch", "DAC R2" }, 1799 1800 { "OUT MIXL", "BST1 Switch", "BST1" }, 1801 { "OUT MIXL", "INL Switch", "INL VOL" }, 1802 { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, 1803 { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, 1804 1805 { "OUT MIXR", "BST2 Switch", "BST2" }, 1806 { "OUT MIXR", "INR Switch", "INR VOL" }, 1807 { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, 1808 { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, 1809 1810 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, 1811 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" }, 1812 { "HPOVOL MIXL", "INL Switch", "INL VOL" }, 1813 { "HPOVOL MIXL", "BST1 Switch", "BST1" }, 1814 { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" }, 1815 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, 1816 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" }, 1817 { "HPOVOL MIXR", "INR Switch", "INR VOL" }, 1818 { "HPOVOL MIXR", "BST2 Switch", "BST2" }, 1819 { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" }, 1820 1821 { "DAC 2", NULL, "DAC L2" }, 1822 { "DAC 2", NULL, "DAC R2" }, 1823 { "DAC 1", NULL, "DAC L1" }, 1824 { "DAC 1", NULL, "DAC R1" }, 1825 { "HPOVOL L", "Switch", "HPOVOL MIXL" }, 1826 { "HPOVOL R", "Switch", "HPOVOL MIXR" }, 1827 { "HPOVOL", NULL, "HPOVOL L" }, 1828 { "HPOVOL", NULL, "HPOVOL R" }, 1829 { "HPO MIX", "DAC1 Switch", "DAC 1" }, 1830 { "HPO MIX", "HPVOL Switch", "HPOVOL" }, 1831 1832 { "SPKVOL L", "Switch", "SPK MIXL" }, 1833 { "SPKVOL R", "Switch", "SPK MIXR" }, 1834 1835 { "SPOL MIX", "DAC R1 Switch", "DAC R1" }, 1836 { "SPOL MIX", "DAC L1 Switch", "DAC L1" }, 1837 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" }, 1838 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" }, 1839 { "SPOR MIX", "DAC R1 Switch", "DAC R1" }, 1840 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" }, 1841 1842 { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, 1843 { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, 1844 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, 1845 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, 1846 1847 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, 1848 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, 1849 { "PDM1 L Mux", NULL, "PDM1 Power" }, 1850 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, 1851 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, 1852 { "PDM1 R Mux", NULL, "PDM1 Power" }, 1853 1854 { "HP amp", NULL, "HPO MIX" }, 1855 { "HP amp", NULL, "JD Power" }, 1856 { "HP amp", NULL, "Mic Det Power" }, 1857 { "HP amp", NULL, "LDO2" }, 1858 { "HPOL", NULL, "HP amp" }, 1859 { "HPOR", NULL, "HP amp" }, 1860 1861 { "LOUT amp", NULL, "LOUT MIX" }, 1862 { "LOUTL", NULL, "LOUT amp" }, 1863 { "LOUTR", NULL, "LOUT amp" }, 1864 1865 { "PDM1 L", "Switch", "PDM1 L Mux" }, 1866 { "PDM1 R", "Switch", "PDM1 R Mux" }, 1867 1868 { "PDM1L", NULL, "PDM1 L" }, 1869 { "PDM1R", NULL, "PDM1 R" }, 1870 1871 { "SPK amp", NULL, "SPOL MIX" }, 1872 { "SPK amp", NULL, "SPOR MIX" }, 1873 { "SPOL", NULL, "SPK amp" }, 1874 { "SPOR", NULL, "SPK amp" }, 1875 }; 1876 1877 static int rt5645_hw_params(struct snd_pcm_substream *substream, 1878 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 1879 { 1880 struct snd_soc_codec *codec = dai->codec; 1881 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 1882 unsigned int val_len = 0, val_clk, mask_clk; 1883 int pre_div, bclk_ms, frame_size; 1884 1885 rt5645->lrck[dai->id] = params_rate(params); 1886 pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]); 1887 if (pre_div < 0) { 1888 dev_err(codec->dev, "Unsupported clock setting\n"); 1889 return -EINVAL; 1890 } 1891 frame_size = snd_soc_params_to_frame_size(params); 1892 if (frame_size < 0) { 1893 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); 1894 return -EINVAL; 1895 } 1896 bclk_ms = frame_size > 32; 1897 rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms); 1898 1899 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", 1900 rt5645->bclk[dai->id], rt5645->lrck[dai->id]); 1901 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", 1902 bclk_ms, pre_div, dai->id); 1903 1904 switch (params_width(params)) { 1905 case 16: 1906 break; 1907 case 20: 1908 val_len |= RT5645_I2S_DL_20; 1909 break; 1910 case 24: 1911 val_len |= RT5645_I2S_DL_24; 1912 break; 1913 case 8: 1914 val_len |= RT5645_I2S_DL_8; 1915 break; 1916 default: 1917 return -EINVAL; 1918 } 1919 1920 switch (dai->id) { 1921 case RT5645_AIF1: 1922 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK; 1923 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT | 1924 pre_div << RT5645_I2S_PD1_SFT; 1925 snd_soc_update_bits(codec, RT5645_I2S1_SDP, 1926 RT5645_I2S_DL_MASK, val_len); 1927 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk); 1928 break; 1929 case RT5645_AIF2: 1930 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK; 1931 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT | 1932 pre_div << RT5645_I2S_PD2_SFT; 1933 snd_soc_update_bits(codec, RT5645_I2S2_SDP, 1934 RT5645_I2S_DL_MASK, val_len); 1935 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk); 1936 break; 1937 default: 1938 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 1939 return -EINVAL; 1940 } 1941 1942 return 0; 1943 } 1944 1945 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1946 { 1947 struct snd_soc_codec *codec = dai->codec; 1948 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 1949 unsigned int reg_val = 0; 1950 1951 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1952 case SND_SOC_DAIFMT_CBM_CFM: 1953 rt5645->master[dai->id] = 1; 1954 break; 1955 case SND_SOC_DAIFMT_CBS_CFS: 1956 reg_val |= RT5645_I2S_MS_S; 1957 rt5645->master[dai->id] = 0; 1958 break; 1959 default: 1960 return -EINVAL; 1961 } 1962 1963 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1964 case SND_SOC_DAIFMT_NB_NF: 1965 break; 1966 case SND_SOC_DAIFMT_IB_NF: 1967 reg_val |= RT5645_I2S_BP_INV; 1968 break; 1969 default: 1970 return -EINVAL; 1971 } 1972 1973 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1974 case SND_SOC_DAIFMT_I2S: 1975 break; 1976 case SND_SOC_DAIFMT_LEFT_J: 1977 reg_val |= RT5645_I2S_DF_LEFT; 1978 break; 1979 case SND_SOC_DAIFMT_DSP_A: 1980 reg_val |= RT5645_I2S_DF_PCM_A; 1981 break; 1982 case SND_SOC_DAIFMT_DSP_B: 1983 reg_val |= RT5645_I2S_DF_PCM_B; 1984 break; 1985 default: 1986 return -EINVAL; 1987 } 1988 switch (dai->id) { 1989 case RT5645_AIF1: 1990 snd_soc_update_bits(codec, RT5645_I2S1_SDP, 1991 RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK | 1992 RT5645_I2S_DF_MASK, reg_val); 1993 break; 1994 case RT5645_AIF2: 1995 snd_soc_update_bits(codec, RT5645_I2S2_SDP, 1996 RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK | 1997 RT5645_I2S_DF_MASK, reg_val); 1998 break; 1999 default: 2000 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 2001 return -EINVAL; 2002 } 2003 return 0; 2004 } 2005 2006 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai, 2007 int clk_id, unsigned int freq, int dir) 2008 { 2009 struct snd_soc_codec *codec = dai->codec; 2010 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 2011 unsigned int reg_val = 0; 2012 2013 if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src) 2014 return 0; 2015 2016 switch (clk_id) { 2017 case RT5645_SCLK_S_MCLK: 2018 reg_val |= RT5645_SCLK_SRC_MCLK; 2019 break; 2020 case RT5645_SCLK_S_PLL1: 2021 reg_val |= RT5645_SCLK_SRC_PLL1; 2022 break; 2023 case RT5645_SCLK_S_RCCLK: 2024 reg_val |= RT5645_SCLK_SRC_RCCLK; 2025 break; 2026 default: 2027 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); 2028 return -EINVAL; 2029 } 2030 snd_soc_update_bits(codec, RT5645_GLB_CLK, 2031 RT5645_SCLK_SRC_MASK, reg_val); 2032 rt5645->sysclk = freq; 2033 rt5645->sysclk_src = clk_id; 2034 2035 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); 2036 2037 return 0; 2038 } 2039 2040 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, 2041 unsigned int freq_in, unsigned int freq_out) 2042 { 2043 struct snd_soc_codec *codec = dai->codec; 2044 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 2045 struct rl6231_pll_code pll_code; 2046 int ret; 2047 2048 if (source == rt5645->pll_src && freq_in == rt5645->pll_in && 2049 freq_out == rt5645->pll_out) 2050 return 0; 2051 2052 if (!freq_in || !freq_out) { 2053 dev_dbg(codec->dev, "PLL disabled\n"); 2054 2055 rt5645->pll_in = 0; 2056 rt5645->pll_out = 0; 2057 snd_soc_update_bits(codec, RT5645_GLB_CLK, 2058 RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK); 2059 return 0; 2060 } 2061 2062 switch (source) { 2063 case RT5645_PLL1_S_MCLK: 2064 snd_soc_update_bits(codec, RT5645_GLB_CLK, 2065 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK); 2066 break; 2067 case RT5645_PLL1_S_BCLK1: 2068 case RT5645_PLL1_S_BCLK2: 2069 switch (dai->id) { 2070 case RT5645_AIF1: 2071 snd_soc_update_bits(codec, RT5645_GLB_CLK, 2072 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1); 2073 break; 2074 case RT5645_AIF2: 2075 snd_soc_update_bits(codec, RT5645_GLB_CLK, 2076 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2); 2077 break; 2078 default: 2079 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); 2080 return -EINVAL; 2081 } 2082 break; 2083 default: 2084 dev_err(codec->dev, "Unknown PLL source %d\n", source); 2085 return -EINVAL; 2086 } 2087 2088 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); 2089 if (ret < 0) { 2090 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); 2091 return ret; 2092 } 2093 2094 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", 2095 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), 2096 pll_code.n_code, pll_code.k_code); 2097 2098 snd_soc_write(codec, RT5645_PLL_CTRL1, 2099 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code); 2100 snd_soc_write(codec, RT5645_PLL_CTRL2, 2101 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT | 2102 pll_code.m_bp << RT5645_PLL_M_BP_SFT); 2103 2104 rt5645->pll_in = freq_in; 2105 rt5645->pll_out = freq_out; 2106 rt5645->pll_src = source; 2107 2108 return 0; 2109 } 2110 2111 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 2112 unsigned int rx_mask, int slots, int slot_width) 2113 { 2114 struct snd_soc_codec *codec = dai->codec; 2115 unsigned int val = 0; 2116 2117 if (rx_mask || tx_mask) { 2118 val |= (1 << 14); 2119 snd_soc_update_bits(codec, RT5645_BASS_BACK, 2120 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB); 2121 } 2122 2123 switch (slots) { 2124 case 4: 2125 val |= (1 << 12); 2126 break; 2127 case 6: 2128 val |= (2 << 12); 2129 break; 2130 case 8: 2131 val |= (3 << 12); 2132 break; 2133 case 2: 2134 default: 2135 break; 2136 } 2137 2138 switch (slot_width) { 2139 case 20: 2140 val |= (1 << 10); 2141 break; 2142 case 24: 2143 val |= (2 << 10); 2144 break; 2145 case 32: 2146 val |= (3 << 10); 2147 break; 2148 case 16: 2149 default: 2150 break; 2151 } 2152 2153 snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, 0x7c00, val); 2154 2155 return 0; 2156 } 2157 2158 static int rt5645_set_bias_level(struct snd_soc_codec *codec, 2159 enum snd_soc_bias_level level) 2160 { 2161 switch (level) { 2162 case SND_SOC_BIAS_PREPARE: 2163 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) { 2164 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 2165 RT5645_PWR_VREF1 | RT5645_PWR_MB | 2166 RT5645_PWR_BG | RT5645_PWR_VREF2, 2167 RT5645_PWR_VREF1 | RT5645_PWR_MB | 2168 RT5645_PWR_BG | RT5645_PWR_VREF2); 2169 mdelay(10); 2170 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 2171 RT5645_PWR_FV1 | RT5645_PWR_FV2, 2172 RT5645_PWR_FV1 | RT5645_PWR_FV2); 2173 snd_soc_update_bits(codec, RT5645_GEN_CTRL1, 2174 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL); 2175 } 2176 break; 2177 2178 case SND_SOC_BIAS_STANDBY: 2179 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 2180 RT5645_PWR_VREF1 | RT5645_PWR_MB | 2181 RT5645_PWR_BG | RT5645_PWR_VREF2, 2182 RT5645_PWR_VREF1 | RT5645_PWR_MB | 2183 RT5645_PWR_BG | RT5645_PWR_VREF2); 2184 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 2185 RT5645_PWR_FV1 | RT5645_PWR_FV2, 2186 RT5645_PWR_FV1 | RT5645_PWR_FV2); 2187 break; 2188 2189 case SND_SOC_BIAS_OFF: 2190 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100); 2191 snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128); 2192 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 2193 RT5645_PWR_VREF1 | RT5645_PWR_MB | 2194 RT5645_PWR_BG | RT5645_PWR_VREF2 | 2195 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0); 2196 break; 2197 2198 default: 2199 break; 2200 } 2201 codec->dapm.bias_level = level; 2202 2203 return 0; 2204 } 2205 2206 static int rt5645_jack_detect(struct snd_soc_codec *codec) 2207 { 2208 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 2209 int gpio_state, jack_type = 0; 2210 unsigned int val; 2211 2212 if (!gpio_is_valid(rt5645->pdata.hp_det_gpio)) { 2213 dev_err(codec->dev, "invalid gpio\n"); 2214 return -EINVAL; 2215 } 2216 gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio); 2217 2218 dev_dbg(codec->dev, "gpio = %d(%d)\n", rt5645->pdata.hp_det_gpio, 2219 gpio_state); 2220 2221 if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) || 2222 (!rt5645->pdata.gpio_hp_det_active_high && !gpio_state)) { 2223 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias1"); 2224 snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias2"); 2225 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2"); 2226 snd_soc_dapm_force_enable_pin(&codec->dapm, "Mic Det Power"); 2227 snd_soc_dapm_sync(&codec->dapm); 2228 2229 snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006); 2230 snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0); 2231 2232 snd_soc_update_bits(codec, RT5645_IN1_CTRL2, 2233 RT5645_CBJ_MN_JD, 0); 2234 snd_soc_update_bits(codec, RT5645_IN1_CTRL2, 2235 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD); 2236 2237 msleep(400); 2238 val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7; 2239 dev_dbg(codec->dev, "val = %d\n", val); 2240 2241 if (val == 1 || val == 2) 2242 jack_type = SND_JACK_HEADSET; 2243 else 2244 jack_type = SND_JACK_HEADPHONE; 2245 2246 snd_soc_dapm_disable_pin(&codec->dapm, "micbias1"); 2247 snd_soc_dapm_disable_pin(&codec->dapm, "micbias2"); 2248 if (rt5645->pdata.jd_mode == 0) 2249 snd_soc_dapm_disable_pin(&codec->dapm, "LDO2"); 2250 snd_soc_dapm_disable_pin(&codec->dapm, "Mic Det Power"); 2251 snd_soc_dapm_sync(&codec->dapm); 2252 } 2253 2254 snd_soc_jack_report(rt5645->hp_jack, jack_type, SND_JACK_HEADPHONE); 2255 snd_soc_jack_report(rt5645->mic_jack, jack_type, SND_JACK_MICROPHONE); 2256 return 0; 2257 } 2258 2259 int rt5645_set_jack_detect(struct snd_soc_codec *codec, 2260 struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack) 2261 { 2262 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 2263 2264 rt5645->hp_jack = hp_jack; 2265 rt5645->mic_jack = mic_jack; 2266 rt5645_jack_detect(codec); 2267 2268 return 0; 2269 } 2270 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect); 2271 2272 static void rt5645_jack_detect_work(struct work_struct *work) 2273 { 2274 struct rt5645_priv *rt5645 = 2275 container_of(work, struct rt5645_priv, jack_detect_work.work); 2276 2277 rt5645_jack_detect(rt5645->codec); 2278 } 2279 2280 static irqreturn_t rt5645_irq(int irq, void *data) 2281 { 2282 struct rt5645_priv *rt5645 = data; 2283 2284 queue_delayed_work(system_power_efficient_wq, 2285 &rt5645->jack_detect_work, msecs_to_jiffies(250)); 2286 2287 return IRQ_HANDLED; 2288 } 2289 2290 static int rt5645_probe(struct snd_soc_codec *codec) 2291 { 2292 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 2293 2294 rt5645->codec = codec; 2295 2296 rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF); 2297 2298 snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200); 2299 2300 /* for JD function */ 2301 if (rt5645->pdata.en_jd_func) { 2302 snd_soc_dapm_force_enable_pin(&codec->dapm, "JD Power"); 2303 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2"); 2304 snd_soc_dapm_sync(&codec->dapm); 2305 } 2306 2307 return 0; 2308 } 2309 2310 static int rt5645_remove(struct snd_soc_codec *codec) 2311 { 2312 rt5645_reset(codec); 2313 return 0; 2314 } 2315 2316 #ifdef CONFIG_PM 2317 static int rt5645_suspend(struct snd_soc_codec *codec) 2318 { 2319 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 2320 2321 regcache_cache_only(rt5645->regmap, true); 2322 regcache_mark_dirty(rt5645->regmap); 2323 2324 return 0; 2325 } 2326 2327 static int rt5645_resume(struct snd_soc_codec *codec) 2328 { 2329 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec); 2330 2331 regcache_cache_only(rt5645->regmap, false); 2332 regcache_sync(rt5645->regmap); 2333 2334 return 0; 2335 } 2336 #else 2337 #define rt5645_suspend NULL 2338 #define rt5645_resume NULL 2339 #endif 2340 2341 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000 2342 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 2343 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 2344 2345 static struct snd_soc_dai_ops rt5645_aif_dai_ops = { 2346 .hw_params = rt5645_hw_params, 2347 .set_fmt = rt5645_set_dai_fmt, 2348 .set_sysclk = rt5645_set_dai_sysclk, 2349 .set_tdm_slot = rt5645_set_tdm_slot, 2350 .set_pll = rt5645_set_dai_pll, 2351 }; 2352 2353 static struct snd_soc_dai_driver rt5645_dai[] = { 2354 { 2355 .name = "rt5645-aif1", 2356 .id = RT5645_AIF1, 2357 .playback = { 2358 .stream_name = "AIF1 Playback", 2359 .channels_min = 1, 2360 .channels_max = 2, 2361 .rates = RT5645_STEREO_RATES, 2362 .formats = RT5645_FORMATS, 2363 }, 2364 .capture = { 2365 .stream_name = "AIF1 Capture", 2366 .channels_min = 1, 2367 .channels_max = 2, 2368 .rates = RT5645_STEREO_RATES, 2369 .formats = RT5645_FORMATS, 2370 }, 2371 .ops = &rt5645_aif_dai_ops, 2372 }, 2373 { 2374 .name = "rt5645-aif2", 2375 .id = RT5645_AIF2, 2376 .playback = { 2377 .stream_name = "AIF2 Playback", 2378 .channels_min = 1, 2379 .channels_max = 2, 2380 .rates = RT5645_STEREO_RATES, 2381 .formats = RT5645_FORMATS, 2382 }, 2383 .capture = { 2384 .stream_name = "AIF2 Capture", 2385 .channels_min = 1, 2386 .channels_max = 2, 2387 .rates = RT5645_STEREO_RATES, 2388 .formats = RT5645_FORMATS, 2389 }, 2390 .ops = &rt5645_aif_dai_ops, 2391 }, 2392 }; 2393 2394 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = { 2395 .probe = rt5645_probe, 2396 .remove = rt5645_remove, 2397 .suspend = rt5645_suspend, 2398 .resume = rt5645_resume, 2399 .set_bias_level = rt5645_set_bias_level, 2400 .idle_bias_off = true, 2401 .controls = rt5645_snd_controls, 2402 .num_controls = ARRAY_SIZE(rt5645_snd_controls), 2403 .dapm_widgets = rt5645_dapm_widgets, 2404 .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets), 2405 .dapm_routes = rt5645_dapm_routes, 2406 .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes), 2407 }; 2408 2409 static const struct regmap_config rt5645_regmap = { 2410 .reg_bits = 8, 2411 .val_bits = 16, 2412 2413 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) * 2414 RT5645_PR_SPACING), 2415 .volatile_reg = rt5645_volatile_register, 2416 .readable_reg = rt5645_readable_register, 2417 2418 .cache_type = REGCACHE_RBTREE, 2419 .reg_defaults = rt5645_reg, 2420 .num_reg_defaults = ARRAY_SIZE(rt5645_reg), 2421 .ranges = rt5645_ranges, 2422 .num_ranges = ARRAY_SIZE(rt5645_ranges), 2423 }; 2424 2425 static const struct i2c_device_id rt5645_i2c_id[] = { 2426 { "rt5645", 0 }, 2427 { } 2428 }; 2429 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id); 2430 2431 static int rt5645_i2c_probe(struct i2c_client *i2c, 2432 const struct i2c_device_id *id) 2433 { 2434 struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev); 2435 struct rt5645_priv *rt5645; 2436 int ret; 2437 unsigned int val; 2438 2439 rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv), 2440 GFP_KERNEL); 2441 if (rt5645 == NULL) 2442 return -ENOMEM; 2443 2444 rt5645->i2c = i2c; 2445 i2c_set_clientdata(i2c, rt5645); 2446 2447 if (pdata) 2448 rt5645->pdata = *pdata; 2449 2450 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap); 2451 if (IS_ERR(rt5645->regmap)) { 2452 ret = PTR_ERR(rt5645->regmap); 2453 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 2454 ret); 2455 return ret; 2456 } 2457 2458 regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val); 2459 if (val != RT5645_DEVICE_ID) { 2460 dev_err(&i2c->dev, 2461 "Device with ID register %x is not rt5645\n", val); 2462 return -ENODEV; 2463 } 2464 2465 regmap_write(rt5645->regmap, RT5645_RESET, 0); 2466 2467 ret = regmap_register_patch(rt5645->regmap, init_list, 2468 ARRAY_SIZE(init_list)); 2469 if (ret != 0) 2470 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 2471 2472 if (rt5645->pdata.in2_diff) 2473 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL, 2474 RT5645_IN_DF2, RT5645_IN_DF2); 2475 2476 if (rt5645->pdata.dmic_en) { 2477 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, 2478 RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL); 2479 2480 switch (rt5645->pdata.dmic1_data_pin) { 2481 case RT5645_DMIC_DATA_IN2N: 2482 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, 2483 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N); 2484 break; 2485 2486 case RT5645_DMIC_DATA_GPIO5: 2487 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, 2488 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5); 2489 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, 2490 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA); 2491 break; 2492 2493 case RT5645_DMIC_DATA_GPIO11: 2494 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, 2495 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11); 2496 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, 2497 RT5645_GP11_PIN_MASK, 2498 RT5645_GP11_PIN_DMIC1_SDA); 2499 break; 2500 2501 default: 2502 break; 2503 } 2504 2505 switch (rt5645->pdata.dmic2_data_pin) { 2506 case RT5645_DMIC_DATA_IN2P: 2507 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, 2508 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P); 2509 break; 2510 2511 case RT5645_DMIC_DATA_GPIO6: 2512 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, 2513 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6); 2514 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, 2515 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA); 2516 break; 2517 2518 case RT5645_DMIC_DATA_GPIO10: 2519 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, 2520 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10); 2521 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, 2522 RT5645_GP10_PIN_MASK, 2523 RT5645_GP10_PIN_DMIC2_SDA); 2524 break; 2525 2526 case RT5645_DMIC_DATA_GPIO12: 2527 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1, 2528 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12); 2529 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, 2530 RT5645_GP12_PIN_MASK, 2531 RT5645_GP12_PIN_DMIC2_SDA); 2532 break; 2533 2534 default: 2535 break; 2536 } 2537 2538 } 2539 2540 if (rt5645->pdata.en_jd_func) { 2541 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, 2542 RT5645_IRQ_CLK_GATE_CTRL | RT5645_MICINDET_MANU, 2543 RT5645_IRQ_CLK_GATE_CTRL | RT5645_MICINDET_MANU); 2544 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, 2545 RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN); 2546 regmap_update_bits(rt5645->regmap, RT5645_JD_CTRL3, 2547 RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL, 2548 RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL); 2549 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS, 2550 RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT); 2551 } 2552 2553 if (rt5645->pdata.jd_mode) { 2554 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, 2555 RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN); 2556 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3, 2557 RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE); 2558 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER, 2559 RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE); 2560 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS, 2561 RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN); 2562 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1, 2563 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ); 2564 switch (rt5645->pdata.jd_mode) { 2565 case 1: 2566 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1, 2567 RT5645_JD1_MODE_MASK, 2568 RT5645_JD1_MODE_0); 2569 break; 2570 case 2: 2571 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1, 2572 RT5645_JD1_MODE_MASK, 2573 RT5645_JD1_MODE_1); 2574 break; 2575 case 3: 2576 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1, 2577 RT5645_JD1_MODE_MASK, 2578 RT5645_JD1_MODE_2); 2579 break; 2580 default: 2581 break; 2582 } 2583 } 2584 2585 if (rt5645->i2c->irq) { 2586 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq, 2587 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 2588 | IRQF_ONESHOT, "rt5645", rt5645); 2589 if (ret) 2590 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret); 2591 } 2592 2593 if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) { 2594 ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645"); 2595 if (ret) 2596 dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n"); 2597 2598 ret = gpio_direction_input(rt5645->pdata.hp_det_gpio); 2599 if (ret) 2600 dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n"); 2601 } 2602 2603 INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work); 2604 2605 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645, 2606 rt5645_dai, ARRAY_SIZE(rt5645_dai)); 2607 } 2608 2609 static int rt5645_i2c_remove(struct i2c_client *i2c) 2610 { 2611 struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c); 2612 2613 if (i2c->irq) 2614 free_irq(i2c->irq, rt5645); 2615 2616 cancel_delayed_work_sync(&rt5645->jack_detect_work); 2617 2618 if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) 2619 gpio_free(rt5645->pdata.hp_det_gpio); 2620 2621 snd_soc_unregister_codec(&i2c->dev); 2622 2623 return 0; 2624 } 2625 2626 static struct i2c_driver rt5645_i2c_driver = { 2627 .driver = { 2628 .name = "rt5645", 2629 .owner = THIS_MODULE, 2630 }, 2631 .probe = rt5645_i2c_probe, 2632 .remove = rt5645_i2c_remove, 2633 .id_table = rt5645_i2c_id, 2634 }; 2635 module_i2c_driver(rt5645_i2c_driver); 2636 2637 MODULE_DESCRIPTION("ASoC RT5645 driver"); 2638 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 2639 MODULE_LICENSE("GPL v2"); 2640