xref: /openbmc/linux/sound/soc/codecs/rt5640.c (revision 5bd8e16d)
1 /*
2  * rt5640.c  --  RT5640 ALSA SoC audio codec driver
3  *
4  * Copyright 2011 Realtek Semiconductor Corp.
5  * Author: Johnny Hsu <johnnyhsu@realtek.com>
6  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/gpio.h>
19 #include <linux/i2c.h>
20 #include <linux/regmap.h>
21 #include <linux/of_gpio.h>
22 #include <linux/platform_device.h>
23 #include <linux/spi/spi.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31 
32 #include "rt5640.h"
33 
34 #define RT5640_DEVICE_ID 0x6231
35 
36 #define RT5640_PR_RANGE_BASE (0xff + 1)
37 #define RT5640_PR_SPACING 0x100
38 
39 #define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
40 
41 static const struct regmap_range_cfg rt5640_ranges[] = {
42 	{ .name = "PR", .range_min = RT5640_PR_BASE,
43 	  .range_max = RT5640_PR_BASE + 0xb4,
44 	  .selector_reg = RT5640_PRIV_INDEX,
45 	  .selector_mask = 0xff,
46 	  .selector_shift = 0x0,
47 	  .window_start = RT5640_PRIV_DATA,
48 	  .window_len = 0x1, },
49 };
50 
51 static struct reg_default init_list[] = {
52 	{RT5640_PR_BASE + 0x3d,	0x3600},
53 	{RT5640_PR_BASE + 0x12,	0x0aa8},
54 	{RT5640_PR_BASE + 0x14,	0x0aaa},
55 	{RT5640_PR_BASE + 0x20,	0x6110},
56 	{RT5640_PR_BASE + 0x21,	0xe0e0},
57 	{RT5640_PR_BASE + 0x23,	0x1804},
58 };
59 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
60 
61 static const struct reg_default rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
62 	{ 0x00, 0x000e },
63 	{ 0x01, 0xc8c8 },
64 	{ 0x02, 0xc8c8 },
65 	{ 0x03, 0xc8c8 },
66 	{ 0x04, 0x8000 },
67 	{ 0x0d, 0x0000 },
68 	{ 0x0e, 0x0000 },
69 	{ 0x0f, 0x0808 },
70 	{ 0x19, 0xafaf },
71 	{ 0x1a, 0xafaf },
72 	{ 0x1b, 0x0000 },
73 	{ 0x1c, 0x2f2f },
74 	{ 0x1d, 0x2f2f },
75 	{ 0x1e, 0x0000 },
76 	{ 0x27, 0x7060 },
77 	{ 0x28, 0x7070 },
78 	{ 0x29, 0x8080 },
79 	{ 0x2a, 0x5454 },
80 	{ 0x2b, 0x5454 },
81 	{ 0x2c, 0xaa00 },
82 	{ 0x2d, 0x0000 },
83 	{ 0x2e, 0xa000 },
84 	{ 0x2f, 0x0000 },
85 	{ 0x3b, 0x0000 },
86 	{ 0x3c, 0x007f },
87 	{ 0x3d, 0x0000 },
88 	{ 0x3e, 0x007f },
89 	{ 0x45, 0xe000 },
90 	{ 0x46, 0x003e },
91 	{ 0x47, 0x003e },
92 	{ 0x48, 0xf800 },
93 	{ 0x49, 0x3800 },
94 	{ 0x4a, 0x0004 },
95 	{ 0x4c, 0xfc00 },
96 	{ 0x4d, 0x0000 },
97 	{ 0x4f, 0x01ff },
98 	{ 0x50, 0x0000 },
99 	{ 0x51, 0x0000 },
100 	{ 0x52, 0x01ff },
101 	{ 0x53, 0xf000 },
102 	{ 0x61, 0x0000 },
103 	{ 0x62, 0x0000 },
104 	{ 0x63, 0x00c0 },
105 	{ 0x64, 0x0000 },
106 	{ 0x65, 0x0000 },
107 	{ 0x66, 0x0000 },
108 	{ 0x6a, 0x0000 },
109 	{ 0x6c, 0x0000 },
110 	{ 0x70, 0x8000 },
111 	{ 0x71, 0x8000 },
112 	{ 0x72, 0x8000 },
113 	{ 0x73, 0x1114 },
114 	{ 0x74, 0x0c00 },
115 	{ 0x75, 0x1d00 },
116 	{ 0x80, 0x0000 },
117 	{ 0x81, 0x0000 },
118 	{ 0x82, 0x0000 },
119 	{ 0x83, 0x0000 },
120 	{ 0x84, 0x0000 },
121 	{ 0x85, 0x0008 },
122 	{ 0x89, 0x0000 },
123 	{ 0x8a, 0x0000 },
124 	{ 0x8b, 0x0600 },
125 	{ 0x8c, 0x0228 },
126 	{ 0x8d, 0xa000 },
127 	{ 0x8e, 0x0004 },
128 	{ 0x8f, 0x1100 },
129 	{ 0x90, 0x0646 },
130 	{ 0x91, 0x0c00 },
131 	{ 0x92, 0x0000 },
132 	{ 0x93, 0x3000 },
133 	{ 0xb0, 0x2080 },
134 	{ 0xb1, 0x0000 },
135 	{ 0xb4, 0x2206 },
136 	{ 0xb5, 0x1f00 },
137 	{ 0xb6, 0x0000 },
138 	{ 0xb8, 0x034b },
139 	{ 0xb9, 0x0066 },
140 	{ 0xba, 0x000b },
141 	{ 0xbb, 0x0000 },
142 	{ 0xbc, 0x0000 },
143 	{ 0xbd, 0x0000 },
144 	{ 0xbe, 0x0000 },
145 	{ 0xbf, 0x0000 },
146 	{ 0xc0, 0x0400 },
147 	{ 0xc2, 0x0000 },
148 	{ 0xc4, 0x0000 },
149 	{ 0xc5, 0x0000 },
150 	{ 0xc6, 0x2000 },
151 	{ 0xc8, 0x0000 },
152 	{ 0xc9, 0x0000 },
153 	{ 0xca, 0x0000 },
154 	{ 0xcb, 0x0000 },
155 	{ 0xcc, 0x0000 },
156 	{ 0xcf, 0x0013 },
157 	{ 0xd0, 0x0680 },
158 	{ 0xd1, 0x1c17 },
159 	{ 0xd2, 0x8c00 },
160 	{ 0xd3, 0xaa20 },
161 	{ 0xd6, 0x0400 },
162 	{ 0xd9, 0x0809 },
163 	{ 0xfe, 0x10ec },
164 	{ 0xff, 0x6231 },
165 };
166 
167 static int rt5640_reset(struct snd_soc_codec *codec)
168 {
169 	return snd_soc_write(codec, RT5640_RESET, 0);
170 }
171 
172 static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
173 {
174 	int i;
175 
176 	for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
177 		if ((reg >= rt5640_ranges[i].window_start &&
178 		     reg <= rt5640_ranges[i].window_start +
179 		     rt5640_ranges[i].window_len) ||
180 		    (reg >= rt5640_ranges[i].range_min &&
181 		     reg <= rt5640_ranges[i].range_max))
182 			return true;
183 
184 	switch (reg) {
185 	case RT5640_RESET:
186 	case RT5640_ASRC_5:
187 	case RT5640_EQ_CTRL1:
188 	case RT5640_DRC_AGC_1:
189 	case RT5640_ANC_CTRL1:
190 	case RT5640_IRQ_CTRL2:
191 	case RT5640_INT_IRQ_ST:
192 	case RT5640_DSP_CTRL2:
193 	case RT5640_DSP_CTRL3:
194 	case RT5640_PRIV_INDEX:
195 	case RT5640_PRIV_DATA:
196 	case RT5640_PGM_REG_ARR1:
197 	case RT5640_PGM_REG_ARR3:
198 	case RT5640_VENDOR_ID:
199 	case RT5640_VENDOR_ID1:
200 	case RT5640_VENDOR_ID2:
201 		return true;
202 	default:
203 		return false;
204 	}
205 }
206 
207 static bool rt5640_readable_register(struct device *dev, unsigned int reg)
208 {
209 	int i;
210 
211 	for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
212 		if ((reg >= rt5640_ranges[i].window_start &&
213 		     reg <= rt5640_ranges[i].window_start +
214 		     rt5640_ranges[i].window_len) ||
215 		    (reg >= rt5640_ranges[i].range_min &&
216 		     reg <= rt5640_ranges[i].range_max))
217 			return true;
218 
219 	switch (reg) {
220 	case RT5640_RESET:
221 	case RT5640_SPK_VOL:
222 	case RT5640_HP_VOL:
223 	case RT5640_OUTPUT:
224 	case RT5640_MONO_OUT:
225 	case RT5640_IN1_IN2:
226 	case RT5640_IN3_IN4:
227 	case RT5640_INL_INR_VOL:
228 	case RT5640_DAC1_DIG_VOL:
229 	case RT5640_DAC2_DIG_VOL:
230 	case RT5640_DAC2_CTRL:
231 	case RT5640_ADC_DIG_VOL:
232 	case RT5640_ADC_DATA:
233 	case RT5640_ADC_BST_VOL:
234 	case RT5640_STO_ADC_MIXER:
235 	case RT5640_MONO_ADC_MIXER:
236 	case RT5640_AD_DA_MIXER:
237 	case RT5640_STO_DAC_MIXER:
238 	case RT5640_MONO_DAC_MIXER:
239 	case RT5640_DIG_MIXER:
240 	case RT5640_DSP_PATH1:
241 	case RT5640_DSP_PATH2:
242 	case RT5640_DIG_INF_DATA:
243 	case RT5640_REC_L1_MIXER:
244 	case RT5640_REC_L2_MIXER:
245 	case RT5640_REC_R1_MIXER:
246 	case RT5640_REC_R2_MIXER:
247 	case RT5640_HPO_MIXER:
248 	case RT5640_SPK_L_MIXER:
249 	case RT5640_SPK_R_MIXER:
250 	case RT5640_SPO_L_MIXER:
251 	case RT5640_SPO_R_MIXER:
252 	case RT5640_SPO_CLSD_RATIO:
253 	case RT5640_MONO_MIXER:
254 	case RT5640_OUT_L1_MIXER:
255 	case RT5640_OUT_L2_MIXER:
256 	case RT5640_OUT_L3_MIXER:
257 	case RT5640_OUT_R1_MIXER:
258 	case RT5640_OUT_R2_MIXER:
259 	case RT5640_OUT_R3_MIXER:
260 	case RT5640_LOUT_MIXER:
261 	case RT5640_PWR_DIG1:
262 	case RT5640_PWR_DIG2:
263 	case RT5640_PWR_ANLG1:
264 	case RT5640_PWR_ANLG2:
265 	case RT5640_PWR_MIXER:
266 	case RT5640_PWR_VOL:
267 	case RT5640_PRIV_INDEX:
268 	case RT5640_PRIV_DATA:
269 	case RT5640_I2S1_SDP:
270 	case RT5640_I2S2_SDP:
271 	case RT5640_ADDA_CLK1:
272 	case RT5640_ADDA_CLK2:
273 	case RT5640_DMIC:
274 	case RT5640_GLB_CLK:
275 	case RT5640_PLL_CTRL1:
276 	case RT5640_PLL_CTRL2:
277 	case RT5640_ASRC_1:
278 	case RT5640_ASRC_2:
279 	case RT5640_ASRC_3:
280 	case RT5640_ASRC_4:
281 	case RT5640_ASRC_5:
282 	case RT5640_HP_OVCD:
283 	case RT5640_CLS_D_OVCD:
284 	case RT5640_CLS_D_OUT:
285 	case RT5640_DEPOP_M1:
286 	case RT5640_DEPOP_M2:
287 	case RT5640_DEPOP_M3:
288 	case RT5640_CHARGE_PUMP:
289 	case RT5640_PV_DET_SPK_G:
290 	case RT5640_MICBIAS:
291 	case RT5640_EQ_CTRL1:
292 	case RT5640_EQ_CTRL2:
293 	case RT5640_WIND_FILTER:
294 	case RT5640_DRC_AGC_1:
295 	case RT5640_DRC_AGC_2:
296 	case RT5640_DRC_AGC_3:
297 	case RT5640_SVOL_ZC:
298 	case RT5640_ANC_CTRL1:
299 	case RT5640_ANC_CTRL2:
300 	case RT5640_ANC_CTRL3:
301 	case RT5640_JD_CTRL:
302 	case RT5640_ANC_JD:
303 	case RT5640_IRQ_CTRL1:
304 	case RT5640_IRQ_CTRL2:
305 	case RT5640_INT_IRQ_ST:
306 	case RT5640_GPIO_CTRL1:
307 	case RT5640_GPIO_CTRL2:
308 	case RT5640_GPIO_CTRL3:
309 	case RT5640_DSP_CTRL1:
310 	case RT5640_DSP_CTRL2:
311 	case RT5640_DSP_CTRL3:
312 	case RT5640_DSP_CTRL4:
313 	case RT5640_PGM_REG_ARR1:
314 	case RT5640_PGM_REG_ARR2:
315 	case RT5640_PGM_REG_ARR3:
316 	case RT5640_PGM_REG_ARR4:
317 	case RT5640_PGM_REG_ARR5:
318 	case RT5640_SCB_FUNC:
319 	case RT5640_SCB_CTRL:
320 	case RT5640_BASE_BACK:
321 	case RT5640_MP3_PLUS1:
322 	case RT5640_MP3_PLUS2:
323 	case RT5640_3D_HP:
324 	case RT5640_ADJ_HPF:
325 	case RT5640_HP_CALIB_AMP_DET:
326 	case RT5640_HP_CALIB2:
327 	case RT5640_SV_ZCD1:
328 	case RT5640_SV_ZCD2:
329 	case RT5640_DUMMY1:
330 	case RT5640_DUMMY2:
331 	case RT5640_DUMMY3:
332 	case RT5640_VENDOR_ID:
333 	case RT5640_VENDOR_ID1:
334 	case RT5640_VENDOR_ID2:
335 		return true;
336 	default:
337 		return false;
338 	}
339 }
340 
341 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
342 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
343 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
344 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
345 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
346 
347 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
348 static unsigned int bst_tlv[] = {
349 	TLV_DB_RANGE_HEAD(7),
350 	0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
351 	1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
352 	2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
353 	3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
354 	6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
355 	7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
356 	8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
357 };
358 
359 /* Interface data select */
360 static const char * const rt5640_data_select[] = {
361 	"Normal", "left copy to right", "right copy to left", "Swap"};
362 
363 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
364 				RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
365 
366 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
367 				RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
368 
369 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
370 				RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
371 
372 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
373 				RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
374 
375 /* Class D speaker gain ratio */
376 static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
377 	"2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
378 
379 static const SOC_ENUM_SINGLE_DECL(
380 	rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
381 	RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
382 
383 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
384 	/* Speaker Output Volume */
385 	SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
386 		RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
387 	SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
388 		RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
389 	/* Headphone Output Volume */
390 	SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
391 		RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
392 	SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
393 		RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
394 	/* OUTPUT Control */
395 	SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
396 		RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
397 	SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
398 		RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
399 	SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
400 		RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
401 	/* MONO Output Control */
402 	SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
403 				RT5640_L_MUTE_SFT, 1, 1),
404 	/* DAC Digital Volume */
405 	SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
406 		RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
407 	SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
408 			RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
409 			175, 0, dac_vol_tlv),
410 	SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
411 			RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
412 			175, 0, dac_vol_tlv),
413 	/* IN1/IN2 Control */
414 	SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
415 		RT5640_BST_SFT1, 8, 0, bst_tlv),
416 	SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
417 		RT5640_BST_SFT2, 8, 0, bst_tlv),
418 	/* INL/INR Volume Control */
419 	SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
420 			RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
421 			31, 1, in_vol_tlv),
422 	/* ADC Digital Volume Control */
423 	SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
424 		RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
425 	SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
426 			RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
427 			127, 0, adc_vol_tlv),
428 	SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
429 			RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
430 			127, 0, adc_vol_tlv),
431 	/* ADC Boost Volume Control */
432 	SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
433 			RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
434 			3, 0, adc_bst_tlv),
435 	/* Class D speaker gain ratio */
436 	SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
437 
438 	SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
439 	SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
440 	SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
441 	SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
442 };
443 
444 /**
445  * set_dmic_clk - Set parameter of dmic.
446  *
447  * @w: DAPM widget.
448  * @kcontrol: The kcontrol of this widget.
449  * @event: Event id.
450  *
451  * Choose dmic clock between 1MHz and 3MHz.
452  * It is better for clock to approximate 3MHz.
453  */
454 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
455 	struct snd_kcontrol *kcontrol, int event)
456 {
457 	struct snd_soc_codec *codec = w->codec;
458 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
459 	int div[] = {2, 3, 4, 6, 8, 12};
460 	int idx = -EINVAL, i;
461 	int rate, red, bound, temp;
462 
463 	rate = rt5640->sysclk;
464 	red = 3000000 * 12;
465 	for (i = 0; i < ARRAY_SIZE(div); i++) {
466 		bound = div[i] * 3000000;
467 		if (rate > bound)
468 			continue;
469 		temp = bound - rate;
470 		if (temp < red) {
471 			red = temp;
472 			idx = i;
473 		}
474 	}
475 	if (idx < 0)
476 		dev_err(codec->dev, "Failed to set DMIC clock\n");
477 	else
478 		snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
479 					idx << RT5640_DMIC_CLK_SFT);
480 	return idx;
481 }
482 
483 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
484 			 struct snd_soc_dapm_widget *sink)
485 {
486 	unsigned int val;
487 
488 	val = snd_soc_read(source->codec, RT5640_GLB_CLK);
489 	val &= RT5640_SCLK_SRC_MASK;
490 	if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
491 		return 1;
492 	else
493 		return 0;
494 }
495 
496 /* Digital Mixer */
497 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
498 	SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
499 			RT5640_M_ADC_L1_SFT, 1, 1),
500 	SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
501 			RT5640_M_ADC_L2_SFT, 1, 1),
502 };
503 
504 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
505 	SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
506 			RT5640_M_ADC_R1_SFT, 1, 1),
507 	SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
508 			RT5640_M_ADC_R2_SFT, 1, 1),
509 };
510 
511 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
512 	SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
513 			RT5640_M_MONO_ADC_L1_SFT, 1, 1),
514 	SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
515 			RT5640_M_MONO_ADC_L2_SFT, 1, 1),
516 };
517 
518 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
519 	SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
520 			RT5640_M_MONO_ADC_R1_SFT, 1, 1),
521 	SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
522 			RT5640_M_MONO_ADC_R2_SFT, 1, 1),
523 };
524 
525 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
526 	SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
527 			RT5640_M_ADCMIX_L_SFT, 1, 1),
528 	SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
529 			RT5640_M_IF1_DAC_L_SFT, 1, 1),
530 };
531 
532 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
533 	SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
534 			RT5640_M_ADCMIX_R_SFT, 1, 1),
535 	SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
536 			RT5640_M_IF1_DAC_R_SFT, 1, 1),
537 };
538 
539 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
540 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
541 			RT5640_M_DAC_L1_SFT, 1, 1),
542 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
543 			RT5640_M_DAC_L2_SFT, 1, 1),
544 	SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
545 			RT5640_M_ANC_DAC_L_SFT, 1, 1),
546 };
547 
548 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
549 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
550 			RT5640_M_DAC_R1_SFT, 1, 1),
551 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
552 			RT5640_M_DAC_R2_SFT, 1, 1),
553 	SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
554 			RT5640_M_ANC_DAC_R_SFT, 1, 1),
555 };
556 
557 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
558 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
559 			RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
560 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
561 			RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
562 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
563 			RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
564 };
565 
566 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
567 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
568 			RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
569 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
570 			RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
571 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
572 			RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
573 };
574 
575 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
576 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
577 			RT5640_M_STO_L_DAC_L_SFT, 1, 1),
578 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
579 			RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
580 };
581 
582 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
583 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
584 			RT5640_M_STO_R_DAC_R_SFT, 1, 1),
585 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
586 			RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
587 };
588 
589 /* Analog Input Mixer */
590 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
591 	SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
592 			RT5640_M_HP_L_RM_L_SFT, 1, 1),
593 	SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
594 			RT5640_M_IN_L_RM_L_SFT, 1, 1),
595 	SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
596 			RT5640_M_BST4_RM_L_SFT, 1, 1),
597 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
598 			RT5640_M_BST1_RM_L_SFT, 1, 1),
599 	SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
600 			RT5640_M_OM_L_RM_L_SFT, 1, 1),
601 };
602 
603 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
604 	SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
605 			RT5640_M_HP_R_RM_R_SFT, 1, 1),
606 	SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
607 			RT5640_M_IN_R_RM_R_SFT, 1, 1),
608 	SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
609 			RT5640_M_BST4_RM_R_SFT, 1, 1),
610 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
611 			RT5640_M_BST1_RM_R_SFT, 1, 1),
612 	SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
613 			RT5640_M_OM_R_RM_R_SFT, 1, 1),
614 };
615 
616 /* Analog Output Mixer */
617 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
618 	SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
619 			RT5640_M_RM_L_SM_L_SFT, 1, 1),
620 	SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
621 			RT5640_M_IN_L_SM_L_SFT, 1, 1),
622 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
623 			RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
624 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
625 			RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
626 	SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
627 			RT5640_M_OM_L_SM_L_SFT, 1, 1),
628 };
629 
630 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
631 	SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
632 			RT5640_M_RM_R_SM_R_SFT, 1, 1),
633 	SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
634 			RT5640_M_IN_R_SM_R_SFT, 1, 1),
635 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
636 			RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
637 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
638 			RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
639 	SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
640 			RT5640_M_OM_R_SM_R_SFT, 1, 1),
641 };
642 
643 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
644 	SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
645 			RT5640_M_SM_L_OM_L_SFT, 1, 1),
646 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
647 			RT5640_M_BST1_OM_L_SFT, 1, 1),
648 	SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
649 			RT5640_M_IN_L_OM_L_SFT, 1, 1),
650 	SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
651 			RT5640_M_RM_L_OM_L_SFT, 1, 1),
652 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
653 			RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
654 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
655 			RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
656 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
657 			RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
658 };
659 
660 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
661 	SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
662 			RT5640_M_SM_L_OM_R_SFT, 1, 1),
663 	SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
664 			RT5640_M_BST4_OM_R_SFT, 1, 1),
665 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
666 			RT5640_M_BST1_OM_R_SFT, 1, 1),
667 	SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
668 			RT5640_M_IN_R_OM_R_SFT, 1, 1),
669 	SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
670 			RT5640_M_RM_R_OM_R_SFT, 1, 1),
671 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
672 			RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
673 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
674 			RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
675 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
676 			RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
677 };
678 
679 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
680 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
681 			RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
682 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
683 			RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
684 	SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
685 			RT5640_M_SV_R_SPM_L_SFT, 1, 1),
686 	SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
687 			RT5640_M_SV_L_SPM_L_SFT, 1, 1),
688 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
689 			RT5640_M_BST1_SPM_L_SFT, 1, 1),
690 };
691 
692 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
693 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
694 			RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
695 	SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
696 			RT5640_M_SV_R_SPM_R_SFT, 1, 1),
697 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
698 			RT5640_M_BST1_SPM_R_SFT, 1, 1),
699 };
700 
701 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
702 	SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
703 			RT5640_M_DAC2_HM_SFT, 1, 1),
704 	SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
705 			RT5640_M_DAC1_HM_SFT, 1, 1),
706 	SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
707 			RT5640_M_HPVOL_HM_SFT, 1, 1),
708 };
709 
710 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
711 	SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
712 			RT5640_M_DAC_L1_LM_SFT, 1, 1),
713 	SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
714 			RT5640_M_DAC_R1_LM_SFT, 1, 1),
715 	SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
716 			RT5640_M_OV_L_LM_SFT, 1, 1),
717 	SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
718 			RT5640_M_OV_R_LM_SFT, 1, 1),
719 };
720 
721 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
722 	SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
723 			RT5640_M_DAC_R2_MM_SFT, 1, 1),
724 	SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
725 			RT5640_M_DAC_L2_MM_SFT, 1, 1),
726 	SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
727 			RT5640_M_OV_R_MM_SFT, 1, 1),
728 	SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
729 			RT5640_M_OV_L_MM_SFT, 1, 1),
730 	SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
731 			RT5640_M_BST1_MM_SFT, 1, 1),
732 };
733 
734 static const struct snd_kcontrol_new spk_l_enable_control =
735 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
736 		RT5640_L_MUTE_SFT, 1, 1);
737 
738 static const struct snd_kcontrol_new spk_r_enable_control =
739 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
740 		RT5640_R_MUTE_SFT, 1, 1);
741 
742 static const struct snd_kcontrol_new hp_l_enable_control =
743 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
744 		RT5640_L_MUTE_SFT, 1, 1);
745 
746 static const struct snd_kcontrol_new hp_r_enable_control =
747 	SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
748 		RT5640_R_MUTE_SFT, 1, 1);
749 
750 /* Stereo ADC source */
751 static const char * const rt5640_stereo_adc1_src[] = {
752 	"DIG MIX", "ADC"
753 };
754 
755 static const SOC_ENUM_SINGLE_DECL(
756 	rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
757 	RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
758 
759 static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
760 	SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
761 
762 static const char * const rt5640_stereo_adc2_src[] = {
763 	"DMIC1", "DMIC2", "DIG MIX"
764 };
765 
766 static const SOC_ENUM_SINGLE_DECL(
767 	rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
768 	RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
769 
770 static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
771 	SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
772 
773 /* Mono ADC source */
774 static const char * const rt5640_mono_adc_l1_src[] = {
775 	"Mono DAC MIXL", "ADCL"
776 };
777 
778 static const SOC_ENUM_SINGLE_DECL(
779 	rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
780 	RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
781 
782 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
783 	SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
784 
785 static const char * const rt5640_mono_adc_l2_src[] = {
786 	"DMIC L1", "DMIC L2", "Mono DAC MIXL"
787 };
788 
789 static const SOC_ENUM_SINGLE_DECL(
790 	rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
791 	RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
792 
793 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
794 	SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
795 
796 static const char * const rt5640_mono_adc_r1_src[] = {
797 	"Mono DAC MIXR", "ADCR"
798 };
799 
800 static const SOC_ENUM_SINGLE_DECL(
801 	rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
802 	RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
803 
804 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
805 	SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
806 
807 static const char * const rt5640_mono_adc_r2_src[] = {
808 	"DMIC R1", "DMIC R2", "Mono DAC MIXR"
809 };
810 
811 static const SOC_ENUM_SINGLE_DECL(
812 	rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
813 	RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
814 
815 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
816 	SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
817 
818 /* DAC2 channel source */
819 static const char * const rt5640_dac_l2_src[] = {
820 	"IF2", "Base L/R"
821 };
822 
823 static int rt5640_dac_l2_values[] = {
824 	0,
825 	3,
826 };
827 
828 static const SOC_VALUE_ENUM_SINGLE_DECL(
829 	rt5640_dac_l2_enum, RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
830 	0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
831 
832 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
833 	SOC_DAPM_VALUE_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
834 
835 static const char * const rt5640_dac_r2_src[] = {
836 	"IF2",
837 };
838 
839 static int rt5640_dac_r2_values[] = {
840 	0,
841 };
842 
843 static const SOC_VALUE_ENUM_SINGLE_DECL(
844 	rt5640_dac_r2_enum, RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
845 	0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
846 
847 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
848 	SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
849 
850 /* digital interface and iis interface map */
851 static const char * const rt5640_dai_iis_map[] = {
852 	"1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
853 };
854 
855 static int rt5640_dai_iis_map_values[] = {
856 	0,
857 	5,
858 	6,
859 	7,
860 };
861 
862 static const SOC_VALUE_ENUM_SINGLE_DECL(
863 	rt5640_dai_iis_map_enum, RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
864 	0x7, rt5640_dai_iis_map, rt5640_dai_iis_map_values);
865 
866 static const struct snd_kcontrol_new rt5640_dai_mux =
867 	SOC_DAPM_VALUE_ENUM("DAI select", rt5640_dai_iis_map_enum);
868 
869 /* SDI select */
870 static const char * const rt5640_sdi_sel[] = {
871 	"IF1", "IF2"
872 };
873 
874 static const SOC_ENUM_SINGLE_DECL(
875 	rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
876 	RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
877 
878 static const struct snd_kcontrol_new rt5640_sdi_mux =
879 	SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
880 
881 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
882 	struct snd_kcontrol *kcontrol, int event)
883 {
884 	struct snd_soc_codec *codec = w->codec;
885 
886 	switch (event) {
887 	case SND_SOC_DAPM_PRE_PMU:
888 		snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
889 			RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
890 			RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
891 		snd_soc_update_bits(codec, RT5640_DMIC,
892 			RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
893 			RT5640_DMIC_1_DP_MASK,
894 			RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
895 			RT5640_DMIC_1_DP_IN1P);
896 		break;
897 
898 	default:
899 		return 0;
900 	}
901 
902 	return 0;
903 }
904 
905 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
906 	struct snd_kcontrol *kcontrol, int event)
907 {
908 	struct snd_soc_codec *codec = w->codec;
909 
910 	switch (event) {
911 	case SND_SOC_DAPM_PRE_PMU:
912 		snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
913 			RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
914 			RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
915 		snd_soc_update_bits(codec, RT5640_DMIC,
916 			RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
917 			RT5640_DMIC_2_DP_MASK,
918 			RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
919 			RT5640_DMIC_2_DP_IN1N);
920 		break;
921 
922 	default:
923 		return 0;
924 	}
925 
926 	return 0;
927 }
928 
929 void hp_amp_power_on(struct snd_soc_codec *codec)
930 {
931 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
932 
933 	/* depop parameters */
934 	regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
935 		RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
936 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
937 		RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
938 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
939 		RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
940 		RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
941 	regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
942 			   0x9f00);
943 	/* headphone amp power on */
944 	regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
945 		RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
946 	regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
947 		RT5640_PWR_HA,
948 		RT5640_PWR_HA);
949 	usleep_range(10000, 15000);
950 	regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
951 		RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
952 		RT5640_PWR_FV1 | RT5640_PWR_FV2);
953 }
954 
955 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
956 {
957 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
958 
959 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
960 		RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
961 		RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
962 	regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
963 		RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
964 
965 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
966 		RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
967 		(RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
968 		(RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
969 		(RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
970 
971 	regmap_write(rt5640->regmap, RT5640_PR_BASE +
972 		RT5640_MAMP_INT_REG2, 0x1c00);
973 	regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
974 		RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
975 		RT5640_HP_CP_PD | RT5640_HP_SG_EN);
976 	regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
977 		RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
978 }
979 
980 static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
981 			   struct snd_kcontrol *kcontrol, int event)
982 {
983 	struct snd_soc_codec *codec = w->codec;
984 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
985 
986 	switch (event) {
987 	case SND_SOC_DAPM_POST_PMU:
988 		rt5640_pmu_depop(codec);
989 		rt5640->hp_mute = 0;
990 		break;
991 
992 	case SND_SOC_DAPM_PRE_PMD:
993 		rt5640->hp_mute = 1;
994 		usleep_range(70000, 75000);
995 		break;
996 
997 	default:
998 		return 0;
999 	}
1000 
1001 	return 0;
1002 }
1003 
1004 static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
1005 			   struct snd_kcontrol *kcontrol, int event)
1006 {
1007 	struct snd_soc_codec *codec = w->codec;
1008 
1009 	switch (event) {
1010 	case SND_SOC_DAPM_POST_PMU:
1011 		hp_amp_power_on(codec);
1012 		break;
1013 	default:
1014 		return 0;
1015 	}
1016 
1017 	return 0;
1018 }
1019 
1020 static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1021 			   struct snd_kcontrol *kcontrol, int event)
1022 {
1023 	struct snd_soc_codec *codec = w->codec;
1024 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1025 
1026 	switch (event) {
1027 	case SND_SOC_DAPM_POST_PMU:
1028 		if (!rt5640->hp_mute)
1029 			usleep_range(80000, 85000);
1030 
1031 		break;
1032 
1033 	default:
1034 		return 0;
1035 	}
1036 
1037 	return 0;
1038 }
1039 
1040 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1041 	SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1042 			RT5640_PWR_PLL_BIT, 0, NULL, 0),
1043 	/* Input Side */
1044 	/* micbias */
1045 	SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1046 			RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1047 	SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
1048 			RT5640_PWR_MB1_BIT, 0, NULL, 0),
1049 	/* Input Lines */
1050 	SND_SOC_DAPM_INPUT("DMIC1"),
1051 	SND_SOC_DAPM_INPUT("DMIC2"),
1052 	SND_SOC_DAPM_INPUT("IN1P"),
1053 	SND_SOC_DAPM_INPUT("IN1N"),
1054 	SND_SOC_DAPM_INPUT("IN2P"),
1055 	SND_SOC_DAPM_INPUT("IN2N"),
1056 	SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1057 	SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1058 	SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1059 	SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1060 
1061 	SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1062 		set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1063 	SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC,
1064 		RT5640_DMIC_1_EN_SFT, 0, rt5640_set_dmic1_event,
1065 		SND_SOC_DAPM_PRE_PMU),
1066 	SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC,
1067 		RT5640_DMIC_2_EN_SFT, 0, rt5640_set_dmic2_event,
1068 		SND_SOC_DAPM_PRE_PMU),
1069 	/* Boost */
1070 	SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1071 		RT5640_PWR_BST1_BIT, 0, NULL, 0),
1072 	SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1073 		RT5640_PWR_BST4_BIT, 0, NULL, 0),
1074 	/* Input Volume */
1075 	SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1076 		RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1077 	SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1078 		RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1079 	/* REC Mixer */
1080 	SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1081 			rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1082 	SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1083 			rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1084 	/* ADCs */
1085 	SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1086 			RT5640_PWR_ADC_L_BIT, 0),
1087 	SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1088 			RT5640_PWR_ADC_R_BIT, 0),
1089 	/* ADC Mux */
1090 	SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1091 				&rt5640_sto_adc_2_mux),
1092 	SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1093 				&rt5640_sto_adc_2_mux),
1094 	SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1095 				&rt5640_sto_adc_1_mux),
1096 	SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1097 				&rt5640_sto_adc_1_mux),
1098 	SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1099 				&rt5640_mono_adc_l2_mux),
1100 	SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1101 				&rt5640_mono_adc_l1_mux),
1102 	SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1103 				&rt5640_mono_adc_r1_mux),
1104 	SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1105 				&rt5640_mono_adc_r2_mux),
1106 	/* ADC Mixer */
1107 	SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1108 		RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1109 	SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1110 		rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1111 	SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1112 		rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1113 	SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1114 		RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1115 	SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1116 		rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1117 	SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1118 		RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1119 	SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1120 		rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1121 
1122 	/* Digital Interface */
1123 	SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1124 		RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1125 	SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1126 	SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1127 	SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1128 	SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1129 	SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1130 	SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1131 	SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1132 		RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1133 	SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1134 	SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1135 	SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1136 	SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1137 	SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1138 	SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1139 	/* Digital Interface Select */
1140 	SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1141 	SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1142 	SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1143 	SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1144 	SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1145 	SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1146 	SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1147 	SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1148 	SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1149 	SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1150 	/* Audio Interface */
1151 	SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1152 	SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1153 	SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1154 	SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1155 	/* Audio DSP */
1156 	SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1157 	/* ANC */
1158 	SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1159 	/* Output Side */
1160 	/* DAC mixer before sound effect  */
1161 	SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1162 		rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1163 	SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1164 		rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1165 	/* DAC2 channel Mux */
1166 	SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1167 				&rt5640_dac_l2_mux),
1168 	SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1169 				&rt5640_dac_r2_mux),
1170 	/* DAC Mixer */
1171 	SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1172 		rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1173 	SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1174 		rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1175 	SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1176 		rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1177 	SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1178 		rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1179 	SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1180 		rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1181 	SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1182 		rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1183 	/* DACs */
1184 	SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1185 			RT5640_PWR_DAC_L1_BIT, 0),
1186 	SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1187 			RT5640_PWR_DAC_L2_BIT, 0),
1188 	SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1189 			RT5640_PWR_DAC_R1_BIT, 0),
1190 	SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1191 			RT5640_PWR_DAC_R2_BIT, 0),
1192 	/* SPK/OUT Mixer */
1193 	SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1194 		0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1195 	SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1196 		0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1197 	SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1198 		0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1199 	SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1200 		0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1201 	/* Ouput Volume */
1202 	SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1203 		RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1204 	SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1205 		RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1206 	SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1207 		RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1208 	SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1209 		RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1210 	SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1211 		RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1212 	SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1213 		RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1214 	/* SPO/HPO/LOUT/Mono Mixer */
1215 	SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1216 		0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1217 	SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1218 		0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1219 	SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1220 		rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1221 	SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1222 		rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1223 	SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1224 		rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1225 	SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1226 		rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1227 	SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1228 		RT5640_PWR_MA_BIT, 0, NULL, 0),
1229 	SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1230 		0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1231 	SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1232 		rt5640_hp_event,
1233 		SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1234 	SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
1235 		RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1236 	SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
1237 		RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1238 	SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
1239 		RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1240 
1241 	/* Output Switch */
1242 	SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1243 			&spk_l_enable_control),
1244 	SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1245 			&spk_r_enable_control),
1246 	SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1247 			&hp_l_enable_control),
1248 	SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1249 			&hp_r_enable_control),
1250 	SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
1251 	/* Output Lines */
1252 	SND_SOC_DAPM_OUTPUT("SPOLP"),
1253 	SND_SOC_DAPM_OUTPUT("SPOLN"),
1254 	SND_SOC_DAPM_OUTPUT("SPORP"),
1255 	SND_SOC_DAPM_OUTPUT("SPORN"),
1256 	SND_SOC_DAPM_OUTPUT("HPOL"),
1257 	SND_SOC_DAPM_OUTPUT("HPOR"),
1258 	SND_SOC_DAPM_OUTPUT("LOUTL"),
1259 	SND_SOC_DAPM_OUTPUT("LOUTR"),
1260 	SND_SOC_DAPM_OUTPUT("MONOP"),
1261 	SND_SOC_DAPM_OUTPUT("MONON"),
1262 };
1263 
1264 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1265 	{"IN1P", NULL, "LDO2"},
1266 	{"IN2P", NULL, "LDO2"},
1267 
1268 	{"DMIC L1", NULL, "DMIC1"},
1269 	{"DMIC R1", NULL, "DMIC1"},
1270 	{"DMIC L2", NULL, "DMIC2"},
1271 	{"DMIC R2", NULL, "DMIC2"},
1272 
1273 	{"BST1", NULL, "IN1P"},
1274 	{"BST1", NULL, "IN1N"},
1275 	{"BST2", NULL, "IN2P"},
1276 	{"BST2", NULL, "IN2N"},
1277 
1278 	{"INL VOL", NULL, "IN2P"},
1279 	{"INR VOL", NULL, "IN2N"},
1280 
1281 	{"RECMIXL", "HPOL Switch", "HPOL"},
1282 	{"RECMIXL", "INL Switch", "INL VOL"},
1283 	{"RECMIXL", "BST2 Switch", "BST2"},
1284 	{"RECMIXL", "BST1 Switch", "BST1"},
1285 	{"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1286 
1287 	{"RECMIXR", "HPOR Switch", "HPOR"},
1288 	{"RECMIXR", "INR Switch", "INR VOL"},
1289 	{"RECMIXR", "BST2 Switch", "BST2"},
1290 	{"RECMIXR", "BST1 Switch", "BST1"},
1291 	{"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1292 
1293 	{"ADC L", NULL, "RECMIXL"},
1294 	{"ADC R", NULL, "RECMIXR"},
1295 
1296 	{"DMIC L1", NULL, "DMIC CLK"},
1297 	{"DMIC L1", NULL, "DMIC1 Power"},
1298 	{"DMIC R1", NULL, "DMIC CLK"},
1299 	{"DMIC R1", NULL, "DMIC1 Power"},
1300 	{"DMIC L2", NULL, "DMIC CLK"},
1301 	{"DMIC L2", NULL, "DMIC2 Power"},
1302 	{"DMIC R2", NULL, "DMIC CLK"},
1303 	{"DMIC R2", NULL, "DMIC2 Power"},
1304 
1305 	{"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1306 	{"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1307 	{"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1308 	{"Stereo ADC L1 Mux", "ADC", "ADC L"},
1309 	{"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1310 
1311 	{"Stereo ADC R1 Mux", "ADC", "ADC R"},
1312 	{"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1313 	{"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1314 	{"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1315 	{"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1316 
1317 	{"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1318 	{"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1319 	{"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1320 	{"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1321 	{"Mono ADC L1 Mux", "ADCL", "ADC L"},
1322 
1323 	{"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1324 	{"Mono ADC R1 Mux", "ADCR", "ADC R"},
1325 	{"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1326 	{"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1327 	{"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1328 
1329 	{"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1330 	{"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1331 	{"Stereo ADC MIXL", NULL, "Stereo Filter"},
1332 	{"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1333 
1334 	{"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1335 	{"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1336 	{"Stereo ADC MIXR", NULL, "Stereo Filter"},
1337 	{"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1338 
1339 	{"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1340 	{"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1341 	{"Mono ADC MIXL", NULL, "Mono Left Filter"},
1342 	{"Mono Left Filter", NULL, "PLL1", check_sysclk1_source},
1343 
1344 	{"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1345 	{"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1346 	{"Mono ADC MIXR", NULL, "Mono Right Filter"},
1347 	{"Mono Right Filter", NULL, "PLL1", check_sysclk1_source},
1348 
1349 	{"IF2 ADC L", NULL, "Mono ADC MIXL"},
1350 	{"IF2 ADC R", NULL, "Mono ADC MIXR"},
1351 	{"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1352 	{"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1353 
1354 	{"IF1 ADC", NULL, "I2S1"},
1355 	{"IF1 ADC", NULL, "IF1 ADC L"},
1356 	{"IF1 ADC", NULL, "IF1 ADC R"},
1357 	{"IF2 ADC", NULL, "I2S2"},
1358 	{"IF2 ADC", NULL, "IF2 ADC L"},
1359 	{"IF2 ADC", NULL, "IF2 ADC R"},
1360 
1361 	{"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1362 	{"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1363 	{"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1364 	{"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1365 	{"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1366 	{"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1367 
1368 	{"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1369 	{"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1370 	{"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1371 	{"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1372 	{"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1373 	{"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1374 
1375 	{"AIF1TX", NULL, "DAI1 TX Mux"},
1376 	{"AIF1TX", NULL, "SDI1 TX Mux"},
1377 	{"AIF2TX", NULL, "DAI2 TX Mux"},
1378 	{"AIF2TX", NULL, "SDI2 TX Mux"},
1379 
1380 	{"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1381 	{"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1382 	{"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1383 	{"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1384 
1385 	{"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1386 	{"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1387 	{"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1388 	{"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1389 
1390 	{"IF1 DAC", NULL, "I2S1"},
1391 	{"IF1 DAC", NULL, "DAI1 RX Mux"},
1392 	{"IF2 DAC", NULL, "I2S2"},
1393 	{"IF2 DAC", NULL, "DAI2 RX Mux"},
1394 
1395 	{"IF1 DAC L", NULL, "IF1 DAC"},
1396 	{"IF1 DAC R", NULL, "IF1 DAC"},
1397 	{"IF2 DAC L", NULL, "IF2 DAC"},
1398 	{"IF2 DAC R", NULL, "IF2 DAC"},
1399 
1400 	{"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1401 	{"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1402 	{"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1403 	{"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1404 
1405 	{"ANC", NULL, "Stereo ADC MIXL"},
1406 	{"ANC", NULL, "Stereo ADC MIXR"},
1407 
1408 	{"Audio DSP", NULL, "DAC MIXL"},
1409 	{"Audio DSP", NULL, "DAC MIXR"},
1410 
1411 	{"DAC L2 Mux", "IF2", "IF2 DAC L"},
1412 	{"DAC L2 Mux", "Base L/R", "Audio DSP"},
1413 
1414 	{"DAC R2 Mux", "IF2", "IF2 DAC R"},
1415 
1416 	{"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1417 	{"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1418 	{"Stereo DAC MIXL", "ANC Switch", "ANC"},
1419 	{"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1420 	{"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1421 	{"Stereo DAC MIXR", "ANC Switch", "ANC"},
1422 
1423 	{"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1424 	{"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1425 	{"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1426 	{"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1427 	{"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1428 	{"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1429 
1430 	{"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1431 	{"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1432 	{"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1433 	{"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1434 
1435 	{"DAC L1", NULL, "Stereo DAC MIXL"},
1436 	{"DAC L1", NULL, "PLL1", check_sysclk1_source},
1437 	{"DAC R1", NULL, "Stereo DAC MIXR"},
1438 	{"DAC R1", NULL, "PLL1", check_sysclk1_source},
1439 	{"DAC L2", NULL, "Mono DAC MIXL"},
1440 	{"DAC L2", NULL, "PLL1", check_sysclk1_source},
1441 	{"DAC R2", NULL, "Mono DAC MIXR"},
1442 	{"DAC R2", NULL, "PLL1", check_sysclk1_source},
1443 
1444 	{"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1445 	{"SPK MIXL", "INL Switch", "INL VOL"},
1446 	{"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1447 	{"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1448 	{"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1449 	{"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1450 	{"SPK MIXR", "INR Switch", "INR VOL"},
1451 	{"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1452 	{"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1453 	{"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1454 
1455 	{"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1456 	{"OUT MIXL", "BST1 Switch", "BST1"},
1457 	{"OUT MIXL", "INL Switch", "INL VOL"},
1458 	{"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1459 	{"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1460 	{"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1461 	{"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1462 
1463 	{"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1464 	{"OUT MIXR", "BST2 Switch", "BST2"},
1465 	{"OUT MIXR", "BST1 Switch", "BST1"},
1466 	{"OUT MIXR", "INR Switch", "INR VOL"},
1467 	{"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1468 	{"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1469 	{"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1470 	{"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1471 
1472 	{"SPKVOL L", NULL, "SPK MIXL"},
1473 	{"SPKVOL R", NULL, "SPK MIXR"},
1474 	{"HPOVOL L", NULL, "OUT MIXL"},
1475 	{"HPOVOL R", NULL, "OUT MIXR"},
1476 	{"OUTVOL L", NULL, "OUT MIXL"},
1477 	{"OUTVOL R", NULL, "OUT MIXR"},
1478 
1479 	{"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1480 	{"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1481 	{"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1482 	{"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1483 	{"SPOL MIX", "BST1 Switch", "BST1"},
1484 	{"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1485 	{"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1486 	{"SPOR MIX", "BST1 Switch", "BST1"},
1487 
1488 	{"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1489 	{"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1490 	{"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
1491 	{"HPO MIX L", NULL, "HP L Amp"},
1492 	{"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1493 	{"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1494 	{"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
1495 	{"HPO MIX R", NULL, "HP R Amp"},
1496 
1497 	{"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1498 	{"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1499 	{"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1500 	{"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1501 
1502 	{"Mono MIX", "DAC R2 Switch", "DAC R2"},
1503 	{"Mono MIX", "DAC L2 Switch", "DAC L2"},
1504 	{"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1505 	{"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1506 	{"Mono MIX", "BST1 Switch", "BST1"},
1507 
1508 	{"HP Amp", NULL, "HPO MIX L"},
1509 	{"HP Amp", NULL, "HPO MIX R"},
1510 
1511 	{"Speaker L Playback", "Switch", "SPOL MIX"},
1512 	{"Speaker R Playback", "Switch", "SPOR MIX"},
1513 	{"SPOLP", NULL, "Speaker L Playback"},
1514 	{"SPOLN", NULL, "Speaker L Playback"},
1515 	{"SPORP", NULL, "Speaker R Playback"},
1516 	{"SPORN", NULL, "Speaker R Playback"},
1517 
1518 	{"SPOLP", NULL, "Improve SPK Amp Drv"},
1519 	{"SPOLN", NULL, "Improve SPK Amp Drv"},
1520 	{"SPORP", NULL, "Improve SPK Amp Drv"},
1521 	{"SPORN", NULL, "Improve SPK Amp Drv"},
1522 
1523 	{"HPOL", NULL, "Improve HP Amp Drv"},
1524 	{"HPOR", NULL, "Improve HP Amp Drv"},
1525 
1526 	{"HP L Playback", "Switch", "HP Amp"},
1527 	{"HP R Playback", "Switch", "HP Amp"},
1528 	{"HPOL", NULL, "HP L Playback"},
1529 	{"HPOR", NULL, "HP R Playback"},
1530 	{"LOUTL", NULL, "LOUT MIX"},
1531 	{"LOUTR", NULL, "LOUT MIX"},
1532 	{"MONOP", NULL, "Mono MIX"},
1533 	{"MONON", NULL, "Mono MIX"},
1534 	{"MONOP", NULL, "Improve MONO Amp Drv"},
1535 };
1536 
1537 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1538 {
1539 	int ret = 0, val;
1540 
1541 	if (codec == NULL)
1542 		return -EINVAL;
1543 
1544 	val = snd_soc_read(codec, RT5640_I2S1_SDP);
1545 	val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1546 	switch (dai_id) {
1547 	case RT5640_AIF1:
1548 		switch (val) {
1549 		case RT5640_IF_123:
1550 		case RT5640_IF_132:
1551 			ret |= RT5640_U_IF1;
1552 			break;
1553 		case RT5640_IF_113:
1554 			ret |= RT5640_U_IF1;
1555 		case RT5640_IF_312:
1556 		case RT5640_IF_213:
1557 			ret |= RT5640_U_IF2;
1558 			break;
1559 		}
1560 		break;
1561 
1562 	case RT5640_AIF2:
1563 		switch (val) {
1564 		case RT5640_IF_231:
1565 		case RT5640_IF_213:
1566 			ret |= RT5640_U_IF1;
1567 			break;
1568 		case RT5640_IF_223:
1569 			ret |= RT5640_U_IF1;
1570 		case RT5640_IF_123:
1571 		case RT5640_IF_321:
1572 			ret |= RT5640_U_IF2;
1573 			break;
1574 		}
1575 		break;
1576 
1577 	default:
1578 		ret = -EINVAL;
1579 		break;
1580 	}
1581 
1582 	return ret;
1583 }
1584 
1585 static int get_clk_info(int sclk, int rate)
1586 {
1587 	int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1588 
1589 	if (sclk <= 0 || rate <= 0)
1590 		return -EINVAL;
1591 
1592 	rate = rate << 8;
1593 	for (i = 0; i < ARRAY_SIZE(pd); i++)
1594 		if (sclk == rate * pd[i])
1595 			return i;
1596 
1597 	return -EINVAL;
1598 }
1599 
1600 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1601 	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1602 {
1603 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
1604 	struct snd_soc_codec *codec = rtd->codec;
1605 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1606 	unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1607 	int pre_div, bclk_ms, frame_size;
1608 
1609 	rt5640->lrck[dai->id] = params_rate(params);
1610 	pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1611 	if (pre_div < 0) {
1612 		dev_err(codec->dev, "Unsupported clock setting\n");
1613 		return -EINVAL;
1614 	}
1615 	frame_size = snd_soc_params_to_frame_size(params);
1616 	if (frame_size < 0) {
1617 		dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1618 		return frame_size;
1619 	}
1620 	if (frame_size > 32)
1621 		bclk_ms = 1;
1622 	else
1623 		bclk_ms = 0;
1624 	rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1625 
1626 	dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1627 		rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1628 	dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1629 				bclk_ms, pre_div, dai->id);
1630 
1631 	switch (params_format(params)) {
1632 	case SNDRV_PCM_FORMAT_S16_LE:
1633 		break;
1634 	case SNDRV_PCM_FORMAT_S20_3LE:
1635 		val_len |= RT5640_I2S_DL_20;
1636 		break;
1637 	case SNDRV_PCM_FORMAT_S24_LE:
1638 		val_len |= RT5640_I2S_DL_24;
1639 		break;
1640 	case SNDRV_PCM_FORMAT_S8:
1641 		val_len |= RT5640_I2S_DL_8;
1642 		break;
1643 	default:
1644 		return -EINVAL;
1645 	}
1646 
1647 	dai_sel = get_sdp_info(codec, dai->id);
1648 	if (dai_sel < 0) {
1649 		dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1650 		return -EINVAL;
1651 	}
1652 	if (dai_sel & RT5640_U_IF1) {
1653 		mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1654 		val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1655 			pre_div << RT5640_I2S_PD1_SFT;
1656 		snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1657 			RT5640_I2S_DL_MASK, val_len);
1658 		snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1659 	}
1660 	if (dai_sel & RT5640_U_IF2) {
1661 		mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1662 		val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1663 			pre_div << RT5640_I2S_PD2_SFT;
1664 		snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1665 			RT5640_I2S_DL_MASK, val_len);
1666 		snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1667 	}
1668 
1669 	return 0;
1670 }
1671 
1672 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1673 {
1674 	struct snd_soc_codec *codec = dai->codec;
1675 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1676 	unsigned int reg_val = 0, dai_sel;
1677 
1678 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1679 	case SND_SOC_DAIFMT_CBM_CFM:
1680 		rt5640->master[dai->id] = 1;
1681 		break;
1682 	case SND_SOC_DAIFMT_CBS_CFS:
1683 		reg_val |= RT5640_I2S_MS_S;
1684 		rt5640->master[dai->id] = 0;
1685 		break;
1686 	default:
1687 		return -EINVAL;
1688 	}
1689 
1690 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1691 	case SND_SOC_DAIFMT_NB_NF:
1692 		break;
1693 	case SND_SOC_DAIFMT_IB_NF:
1694 		reg_val |= RT5640_I2S_BP_INV;
1695 		break;
1696 	default:
1697 		return -EINVAL;
1698 	}
1699 
1700 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1701 	case SND_SOC_DAIFMT_I2S:
1702 		break;
1703 	case SND_SOC_DAIFMT_LEFT_J:
1704 		reg_val |= RT5640_I2S_DF_LEFT;
1705 		break;
1706 	case SND_SOC_DAIFMT_DSP_A:
1707 		reg_val |= RT5640_I2S_DF_PCM_A;
1708 		break;
1709 	case SND_SOC_DAIFMT_DSP_B:
1710 		reg_val  |= RT5640_I2S_DF_PCM_B;
1711 		break;
1712 	default:
1713 		return -EINVAL;
1714 	}
1715 
1716 	dai_sel = get_sdp_info(codec, dai->id);
1717 	if (dai_sel < 0) {
1718 		dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1719 		return -EINVAL;
1720 	}
1721 	if (dai_sel & RT5640_U_IF1) {
1722 		snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1723 			RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1724 			RT5640_I2S_DF_MASK, reg_val);
1725 	}
1726 	if (dai_sel & RT5640_U_IF2) {
1727 		snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1728 			RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1729 			RT5640_I2S_DF_MASK, reg_val);
1730 	}
1731 
1732 	return 0;
1733 }
1734 
1735 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1736 		int clk_id, unsigned int freq, int dir)
1737 {
1738 	struct snd_soc_codec *codec = dai->codec;
1739 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1740 	unsigned int reg_val = 0;
1741 
1742 	if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1743 		return 0;
1744 
1745 	switch (clk_id) {
1746 	case RT5640_SCLK_S_MCLK:
1747 		reg_val |= RT5640_SCLK_SRC_MCLK;
1748 		break;
1749 	case RT5640_SCLK_S_PLL1:
1750 		reg_val |= RT5640_SCLK_SRC_PLL1;
1751 		break;
1752 	case RT5640_SCLK_S_PLL1_TK:
1753 		reg_val |= RT5640_SCLK_SRC_PLL1T;
1754 		break;
1755 	case RT5640_SCLK_S_RCCLK:
1756 		reg_val |= RT5640_SCLK_SRC_RCCLK;
1757 		break;
1758 	default:
1759 		dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1760 		return -EINVAL;
1761 	}
1762 	snd_soc_update_bits(codec, RT5640_GLB_CLK,
1763 		RT5640_SCLK_SRC_MASK, reg_val);
1764 	rt5640->sysclk = freq;
1765 	rt5640->sysclk_src = clk_id;
1766 
1767 	dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1768 	return 0;
1769 }
1770 
1771 /**
1772  * rt5640_pll_calc - Calculate PLL M/N/K code.
1773  * @freq_in: external clock provided to codec.
1774  * @freq_out: target clock which codec works on.
1775  * @pll_code: Pointer to structure with M, N, K and bypass flag.
1776  *
1777  * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1778  * which make calculation more efficiently.
1779  *
1780  * Returns 0 for success or negative error code.
1781  */
1782 static int rt5640_pll_calc(const unsigned int freq_in,
1783 	const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1784 {
1785 	int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1786 	int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1787 	int red_t = abs(freq_out - freq_in);
1788 	bool bypass = false;
1789 
1790 	if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1791 		return -EINVAL;
1792 
1793 	for (n_t = 0; n_t <= max_n; n_t++) {
1794 		in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1795 		if (in_t < 0)
1796 			continue;
1797 		if (in_t == freq_out) {
1798 			bypass = true;
1799 			n = n_t;
1800 			goto code_find;
1801 		}
1802 		for (m_t = 0; m_t <= max_m; m_t++) {
1803 			out_t = in_t / (m_t + 2);
1804 			red = abs(out_t - freq_out);
1805 			if (red < red_t) {
1806 				n = n_t;
1807 				m = m_t;
1808 				if (red == 0)
1809 					goto code_find;
1810 				red_t = red;
1811 			}
1812 		}
1813 	}
1814 	pr_debug("Only get approximation about PLL\n");
1815 
1816 code_find:
1817 	pll_code->m_bp = bypass;
1818 	pll_code->m_code = m;
1819 	pll_code->n_code = n;
1820 	pll_code->k_code = 2;
1821 	return 0;
1822 }
1823 
1824 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1825 			unsigned int freq_in, unsigned int freq_out)
1826 {
1827 	struct snd_soc_codec *codec = dai->codec;
1828 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1829 	struct rt5640_pll_code *pll_code = &rt5640->pll_code;
1830 	int ret, dai_sel;
1831 
1832 	if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1833 	    freq_out == rt5640->pll_out)
1834 		return 0;
1835 
1836 	if (!freq_in || !freq_out) {
1837 		dev_dbg(codec->dev, "PLL disabled\n");
1838 
1839 		rt5640->pll_in = 0;
1840 		rt5640->pll_out = 0;
1841 		snd_soc_update_bits(codec, RT5640_GLB_CLK,
1842 			RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1843 		return 0;
1844 	}
1845 
1846 	switch (source) {
1847 	case RT5640_PLL1_S_MCLK:
1848 		snd_soc_update_bits(codec, RT5640_GLB_CLK,
1849 			RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1850 		break;
1851 	case RT5640_PLL1_S_BCLK1:
1852 	case RT5640_PLL1_S_BCLK2:
1853 		dai_sel = get_sdp_info(codec, dai->id);
1854 		if (dai_sel < 0) {
1855 			dev_err(codec->dev,
1856 				"Failed to get sdp info: %d\n", dai_sel);
1857 			return -EINVAL;
1858 		}
1859 		if (dai_sel & RT5640_U_IF1) {
1860 			snd_soc_update_bits(codec, RT5640_GLB_CLK,
1861 				RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1862 		}
1863 		if (dai_sel & RT5640_U_IF2) {
1864 			snd_soc_update_bits(codec, RT5640_GLB_CLK,
1865 				RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1866 		}
1867 		break;
1868 	default:
1869 		dev_err(codec->dev, "Unknown PLL source %d\n", source);
1870 		return -EINVAL;
1871 	}
1872 
1873 	ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
1874 	if (ret < 0) {
1875 		dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1876 		return ret;
1877 	}
1878 
1879 	dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
1880 		(pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
1881 
1882 	snd_soc_write(codec, RT5640_PLL_CTRL1,
1883 		pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
1884 	snd_soc_write(codec, RT5640_PLL_CTRL2,
1885 		(pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
1886 		pll_code->m_bp << RT5640_PLL_M_BP_SFT);
1887 
1888 	rt5640->pll_in = freq_in;
1889 	rt5640->pll_out = freq_out;
1890 	rt5640->pll_src = source;
1891 
1892 	return 0;
1893 }
1894 
1895 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1896 			enum snd_soc_bias_level level)
1897 {
1898 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1899 	switch (level) {
1900 	case SND_SOC_BIAS_STANDBY:
1901 		if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1902 			regcache_cache_only(rt5640->regmap, false);
1903 			snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1904 				RT5640_PWR_VREF1 | RT5640_PWR_MB |
1905 				RT5640_PWR_BG | RT5640_PWR_VREF2,
1906 				RT5640_PWR_VREF1 | RT5640_PWR_MB |
1907 				RT5640_PWR_BG | RT5640_PWR_VREF2);
1908 			usleep_range(10000, 15000);
1909 			snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1910 				RT5640_PWR_FV1 | RT5640_PWR_FV2,
1911 				RT5640_PWR_FV1 | RT5640_PWR_FV2);
1912 			regcache_sync(rt5640->regmap);
1913 			snd_soc_update_bits(codec, RT5640_DUMMY1,
1914 						0x0301, 0x0301);
1915 			snd_soc_update_bits(codec, RT5640_MICBIAS,
1916 						0x0030, 0x0030);
1917 		}
1918 		break;
1919 
1920 	case SND_SOC_BIAS_OFF:
1921 		snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1922 		snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1923 		snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1924 		snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1925 		snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1926 		snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1927 		snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1928 		snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1929 		snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1930 		break;
1931 
1932 	default:
1933 		break;
1934 	}
1935 	codec->dapm.bias_level = level;
1936 
1937 	return 0;
1938 }
1939 
1940 static int rt5640_probe(struct snd_soc_codec *codec)
1941 {
1942 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1943 	int ret;
1944 
1945 	rt5640->codec = codec;
1946 	codec->control_data = rt5640->regmap;
1947 
1948 	ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
1949 	if (ret != 0) {
1950 		dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1951 		return ret;
1952 	}
1953 
1954 	codec->dapm.idle_bias_off = 1;
1955 	rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1956 
1957 	snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
1958 	snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1959 	snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1960 
1961 	return 0;
1962 }
1963 
1964 static int rt5640_remove(struct snd_soc_codec *codec)
1965 {
1966 	rt5640_reset(codec);
1967 
1968 	return 0;
1969 }
1970 
1971 #ifdef CONFIG_PM
1972 static int rt5640_suspend(struct snd_soc_codec *codec)
1973 {
1974 	struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1975 
1976 	rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1977 	rt5640_reset(codec);
1978 	regcache_cache_only(rt5640->regmap, true);
1979 	regcache_mark_dirty(rt5640->regmap);
1980 
1981 	return 0;
1982 }
1983 
1984 static int rt5640_resume(struct snd_soc_codec *codec)
1985 {
1986 	rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1987 
1988 	return 0;
1989 }
1990 #else
1991 #define rt5640_suspend NULL
1992 #define rt5640_resume NULL
1993 #endif
1994 
1995 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1996 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1997 			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1998 
1999 static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2000 	.hw_params = rt5640_hw_params,
2001 	.set_fmt = rt5640_set_dai_fmt,
2002 	.set_sysclk = rt5640_set_dai_sysclk,
2003 	.set_pll = rt5640_set_dai_pll,
2004 };
2005 
2006 static struct snd_soc_dai_driver rt5640_dai[] = {
2007 	{
2008 		.name = "rt5640-aif1",
2009 		.id = RT5640_AIF1,
2010 		.playback = {
2011 			.stream_name = "AIF1 Playback",
2012 			.channels_min = 1,
2013 			.channels_max = 2,
2014 			.rates = RT5640_STEREO_RATES,
2015 			.formats = RT5640_FORMATS,
2016 		},
2017 		.capture = {
2018 			.stream_name = "AIF1 Capture",
2019 			.channels_min = 1,
2020 			.channels_max = 2,
2021 			.rates = RT5640_STEREO_RATES,
2022 			.formats = RT5640_FORMATS,
2023 		},
2024 		.ops = &rt5640_aif_dai_ops,
2025 	},
2026 	{
2027 		.name = "rt5640-aif2",
2028 		.id = RT5640_AIF2,
2029 		.playback = {
2030 			.stream_name = "AIF2 Playback",
2031 			.channels_min = 1,
2032 			.channels_max = 2,
2033 			.rates = RT5640_STEREO_RATES,
2034 			.formats = RT5640_FORMATS,
2035 		},
2036 		.capture = {
2037 			.stream_name = "AIF2 Capture",
2038 			.channels_min = 1,
2039 			.channels_max = 2,
2040 			.rates = RT5640_STEREO_RATES,
2041 			.formats = RT5640_FORMATS,
2042 		},
2043 		.ops = &rt5640_aif_dai_ops,
2044 	},
2045 };
2046 
2047 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2048 	.probe = rt5640_probe,
2049 	.remove = rt5640_remove,
2050 	.suspend = rt5640_suspend,
2051 	.resume = rt5640_resume,
2052 	.set_bias_level = rt5640_set_bias_level,
2053 	.controls = rt5640_snd_controls,
2054 	.num_controls = ARRAY_SIZE(rt5640_snd_controls),
2055 	.dapm_widgets = rt5640_dapm_widgets,
2056 	.num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2057 	.dapm_routes = rt5640_dapm_routes,
2058 	.num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2059 };
2060 
2061 static const struct regmap_config rt5640_regmap = {
2062 	.reg_bits = 8,
2063 	.val_bits = 16,
2064 
2065 	.max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2066 					       RT5640_PR_SPACING),
2067 	.volatile_reg = rt5640_volatile_register,
2068 	.readable_reg = rt5640_readable_register,
2069 
2070 	.cache_type = REGCACHE_RBTREE,
2071 	.reg_defaults = rt5640_reg,
2072 	.num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2073 	.ranges = rt5640_ranges,
2074 	.num_ranges = ARRAY_SIZE(rt5640_ranges),
2075 };
2076 
2077 static const struct i2c_device_id rt5640_i2c_id[] = {
2078 	{ "rt5640", 0 },
2079 	{ }
2080 };
2081 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2082 
2083 static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2084 {
2085 	rt5640->pdata.in1_diff = of_property_read_bool(np,
2086 					"realtek,in1-differential");
2087 	rt5640->pdata.in2_diff = of_property_read_bool(np,
2088 					"realtek,in2-differential");
2089 
2090 	rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2091 					"realtek,ldo1-en-gpios", 0);
2092 	/*
2093 	 * LDO1_EN is optional (it may be statically tied on the board).
2094 	 * -ENOENT means that the property doesn't exist, i.e. there is no
2095 	 * GPIO, so is not an error. Any other error code means the property
2096 	 * exists, but could not be parsed.
2097 	 */
2098 	if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2099 			(rt5640->pdata.ldo1_en != -ENOENT))
2100 		return rt5640->pdata.ldo1_en;
2101 
2102 	return 0;
2103 }
2104 
2105 static int rt5640_i2c_probe(struct i2c_client *i2c,
2106 		    const struct i2c_device_id *id)
2107 {
2108 	struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2109 	struct rt5640_priv *rt5640;
2110 	int ret;
2111 	unsigned int val;
2112 
2113 	rt5640 = devm_kzalloc(&i2c->dev,
2114 				sizeof(struct rt5640_priv),
2115 				GFP_KERNEL);
2116 	if (NULL == rt5640)
2117 		return -ENOMEM;
2118 	i2c_set_clientdata(i2c, rt5640);
2119 
2120 	if (pdata) {
2121 		rt5640->pdata = *pdata;
2122 		/*
2123 		 * Translate zero'd out (default) pdata value to an invalid
2124 		 * GPIO ID. This makes the pdata and DT paths consistent in
2125 		 * terms of the value left in this field when no GPIO is
2126 		 * specified, but means we can't actually use GPIO 0.
2127 		 */
2128 		if (!rt5640->pdata.ldo1_en)
2129 			rt5640->pdata.ldo1_en = -EINVAL;
2130 	} else if (i2c->dev.of_node) {
2131 		ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2132 		if (ret)
2133 			return ret;
2134 	} else
2135 		rt5640->pdata.ldo1_en = -EINVAL;
2136 
2137 	rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2138 	if (IS_ERR(rt5640->regmap)) {
2139 		ret = PTR_ERR(rt5640->regmap);
2140 		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2141 			ret);
2142 		return ret;
2143 	}
2144 
2145 	if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
2146 		ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2147 					    GPIOF_OUT_INIT_HIGH,
2148 					    "RT5640 LDO1_EN");
2149 		if (ret < 0) {
2150 			dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2151 				rt5640->pdata.ldo1_en, ret);
2152 			return ret;
2153 		}
2154 		msleep(400);
2155 	}
2156 
2157 	regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2158 	if ((val != RT5640_DEVICE_ID)) {
2159 		dev_err(&i2c->dev,
2160 			"Device with ID register %x is not rt5640/39\n", val);
2161 		return -ENODEV;
2162 	}
2163 
2164 	regmap_write(rt5640->regmap, RT5640_RESET, 0);
2165 
2166 	ret = regmap_register_patch(rt5640->regmap, init_list,
2167 				    ARRAY_SIZE(init_list));
2168 	if (ret != 0)
2169 		dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2170 
2171 	if (rt5640->pdata.in1_diff)
2172 		regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2173 					RT5640_IN_DF1, RT5640_IN_DF1);
2174 
2175 	if (rt5640->pdata.in2_diff)
2176 		regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2177 					RT5640_IN_DF2, RT5640_IN_DF2);
2178 
2179 	rt5640->hp_mute = 1;
2180 
2181 	ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2182 			rt5640_dai, ARRAY_SIZE(rt5640_dai));
2183 	if (ret < 0)
2184 		goto err;
2185 
2186 	return 0;
2187 err:
2188 	return ret;
2189 }
2190 
2191 static int rt5640_i2c_remove(struct i2c_client *i2c)
2192 {
2193 	snd_soc_unregister_codec(&i2c->dev);
2194 
2195 	return 0;
2196 }
2197 
2198 static struct i2c_driver rt5640_i2c_driver = {
2199 	.driver = {
2200 		.name = "rt5640",
2201 		.owner = THIS_MODULE,
2202 	},
2203 	.probe = rt5640_i2c_probe,
2204 	.remove   = rt5640_i2c_remove,
2205 	.id_table = rt5640_i2c_id,
2206 };
2207 module_i2c_driver(rt5640_i2c_driver);
2208 
2209 MODULE_DESCRIPTION("ASoC RT5640 driver");
2210 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2211 MODULE_LICENSE("GPL v2");
2212