1 /* 2 * rt5514.h -- RT5514 ALSA SoC audio driver 3 * 4 * Copyright 2015 Realtek Microelectronics 5 * Author: Oder Chiou <oder_chiou@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #ifndef __RT5514_H__ 13 #define __RT5514_H__ 14 15 #define RT5514_DEVICE_ID 0x10ec5514 16 17 #define RT5514_RESET 0x2000 18 #define RT5514_PWR_ANA1 0x2004 19 #define RT5514_PWR_ANA2 0x2008 20 #define RT5514_I2S_CTRL1 0x2010 21 #define RT5514_I2S_CTRL2 0x2014 22 #define RT5514_VAD_CTRL6 0x2030 23 #define RT5514_EXT_VAD_CTRL 0x206c 24 #define RT5514_DIG_IO_CTRL 0x2070 25 #define RT5514_PAD_CTRL1 0x2080 26 #define RT5514_DMIC_DATA_CTRL 0x20a0 27 #define RT5514_DIG_SOURCE_CTRL 0x20a4 28 #define RT5514_SRC_CTRL 0x20ac 29 #define RT5514_DOWNFILTER2_CTRL1 0x20d0 30 #define RT5514_PLL_SOURCE_CTRL 0x2100 31 #define RT5514_CLK_CTRL1 0x2104 32 #define RT5514_CLK_CTRL2 0x2108 33 #define RT5514_PLL3_CALIB_CTRL1 0x2110 34 #define RT5514_PLL3_CALIB_CTRL5 0x2124 35 #define RT5514_DELAY_BUF_CTRL1 0x2140 36 #define RT5514_DELAY_BUF_CTRL3 0x2148 37 #define RT5514_DOWNFILTER0_CTRL1 0x2190 38 #define RT5514_DOWNFILTER0_CTRL2 0x2194 39 #define RT5514_DOWNFILTER0_CTRL3 0x2198 40 #define RT5514_DOWNFILTER1_CTRL1 0x21a0 41 #define RT5514_DOWNFILTER1_CTRL2 0x21a4 42 #define RT5514_DOWNFILTER1_CTRL3 0x21a8 43 #define RT5514_ANA_CTRL_LDO10 0x2200 44 #define RT5514_ANA_CTRL_LDO18_16 0x2204 45 #define RT5514_ANA_CTRL_ADC12 0x2210 46 #define RT5514_ANA_CTRL_ADC21 0x2214 47 #define RT5514_ANA_CTRL_ADC22 0x2218 48 #define RT5514_ANA_CTRL_ADC23 0x221c 49 #define RT5514_ANA_CTRL_MICBST 0x2220 50 #define RT5514_ANA_CTRL_ADCFED 0x2224 51 #define RT5514_ANA_CTRL_INBUF 0x2228 52 #define RT5514_ANA_CTRL_VREF 0x222c 53 #define RT5514_ANA_CTRL_PLL3 0x2240 54 #define RT5514_ANA_CTRL_PLL1_1 0x2260 55 #define RT5514_ANA_CTRL_PLL1_2 0x2264 56 #define RT5514_DMIC_LP_CTRL 0x2e00 57 #define RT5514_MISC_CTRL_DSP 0x2e04 58 #define RT5514_DSP_CTRL1 0x2f00 59 #define RT5514_DSP_CTRL3 0x2f08 60 #define RT5514_DSP_CTRL4 0x2f10 61 #define RT5514_VENDOR_ID1 0x2ff0 62 #define RT5514_VENDOR_ID2 0x2ff4 63 64 #define RT5514_DSP_MAPPING 0x18000000 65 66 /* RT5514_PWR_ANA1 (0x2004) */ 67 #define RT5514_POW_LDO18_IN (0x1 << 5) 68 #define RT5514_POW_LDO18_IN_BIT 5 69 #define RT5514_POW_LDO18_ADC (0x1 << 4) 70 #define RT5514_POW_LDO18_ADC_BIT 4 71 #define RT5514_POW_LDO21 (0x1 << 3) 72 #define RT5514_POW_LDO21_BIT 3 73 #define RT5514_POW_BG_LDO18_IN (0x1 << 2) 74 #define RT5514_POW_BG_LDO18_IN_BIT 2 75 #define RT5514_POW_BG_LDO21 (0x1 << 1) 76 #define RT5514_POW_BG_LDO21_BIT 1 77 78 /* RT5514_PWR_ANA2 (0x2008) */ 79 #define RT5514_POW_PLL1 (0x1 << 18) 80 #define RT5514_POW_PLL1_BIT 18 81 #define RT5514_POW_PLL1_LDO (0x1 << 16) 82 #define RT5514_POW_PLL1_LDO_BIT 16 83 #define RT5514_POW_BG_MBIAS (0x1 << 15) 84 #define RT5514_POW_BG_MBIAS_BIT 15 85 #define RT5514_POW_MBIAS (0x1 << 14) 86 #define RT5514_POW_MBIAS_BIT 14 87 #define RT5514_POW_VREF2 (0x1 << 13) 88 #define RT5514_POW_VREF2_BIT 13 89 #define RT5514_POW_VREF1 (0x1 << 12) 90 #define RT5514_POW_VREF1_BIT 12 91 #define RT5514_POWR_LDO16 (0x1 << 11) 92 #define RT5514_POWR_LDO16_BIT 11 93 #define RT5514_POWL_LDO16 (0x1 << 10) 94 #define RT5514_POWL_LDO16_BIT 10 95 #define RT5514_POW_ADC2 (0x1 << 9) 96 #define RT5514_POW_ADC2_BIT 9 97 #define RT5514_POW_INPUT_BUF (0x1 << 8) 98 #define RT5514_POW_INPUT_BUF_BIT 8 99 #define RT5514_POW_ADC1_R (0x1 << 7) 100 #define RT5514_POW_ADC1_R_BIT 7 101 #define RT5514_POW_ADC1_L (0x1 << 6) 102 #define RT5514_POW_ADC1_L_BIT 6 103 #define RT5514_POW2_BSTR (0x1 << 5) 104 #define RT5514_POW2_BSTR_BIT 5 105 #define RT5514_POW2_BSTL (0x1 << 4) 106 #define RT5514_POW2_BSTL_BIT 4 107 #define RT5514_POW_BSTR (0x1 << 3) 108 #define RT5514_POW_BSTR_BIT 3 109 #define RT5514_POW_BSTL (0x1 << 2) 110 #define RT5514_POW_BSTL_BIT 2 111 #define RT5514_POW_ADCFEDR (0x1 << 1) 112 #define RT5514_POW_ADCFEDR_BIT 1 113 #define RT5514_POW_ADCFEDL (0x1 << 0) 114 #define RT5514_POW_ADCFEDL_BIT 0 115 116 /* RT5514_I2S_CTRL1 (0x2010) */ 117 #define RT5514_TDM_MODE (0x1 << 28) 118 #define RT5514_TDM_MODE_SFT 28 119 #define RT5514_I2S_LR_MASK (0x1 << 26) 120 #define RT5514_I2S_LR_SFT 26 121 #define RT5514_I2S_LR_NOR (0x0 << 26) 122 #define RT5514_I2S_LR_INV (0x1 << 26) 123 #define RT5514_I2S_BP_MASK (0x1 << 25) 124 #define RT5514_I2S_BP_SFT 25 125 #define RT5514_I2S_BP_NOR (0x0 << 25) 126 #define RT5514_I2S_BP_INV (0x1 << 25) 127 #define RT5514_I2S_DF_MASK (0x7 << 16) 128 #define RT5514_I2S_DF_SFT 16 129 #define RT5514_I2S_DF_I2S (0x0 << 16) 130 #define RT5514_I2S_DF_LEFT (0x1 << 16) 131 #define RT5514_I2S_DF_PCM_A (0x2 << 16) 132 #define RT5514_I2S_DF_PCM_B (0x3 << 16) 133 #define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10) 134 #define RT5514_TDMSLOT_SEL_RX_SFT 10 135 #define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10) 136 #define RT5514_CH_LEN_RX_MASK (0x3 << 8) 137 #define RT5514_CH_LEN_RX_SFT 8 138 #define RT5514_CH_LEN_RX_16 (0x0 << 8) 139 #define RT5514_CH_LEN_RX_20 (0x1 << 8) 140 #define RT5514_CH_LEN_RX_24 (0x2 << 8) 141 #define RT5514_CH_LEN_RX_32 (0x3 << 8) 142 #define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6) 143 #define RT5514_TDMSLOT_SEL_TX_SFT 6 144 #define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6) 145 #define RT5514_CH_LEN_TX_MASK (0x3 << 4) 146 #define RT5514_CH_LEN_TX_SFT 4 147 #define RT5514_CH_LEN_TX_16 (0x0 << 4) 148 #define RT5514_CH_LEN_TX_20 (0x1 << 4) 149 #define RT5514_CH_LEN_TX_24 (0x2 << 4) 150 #define RT5514_CH_LEN_TX_32 (0x3 << 4) 151 #define RT5514_I2S_DL_MASK (0x3 << 0) 152 #define RT5514_I2S_DL_SFT 0 153 #define RT5514_I2S_DL_16 (0x0 << 0) 154 #define RT5514_I2S_DL_20 (0x1 << 0) 155 #define RT5514_I2S_DL_24 (0x2 << 0) 156 #define RT5514_I2S_DL_8 (0x3 << 0) 157 158 /* RT5514_DIG_SOURCE_CTRL (0x20a4) */ 159 #define RT5514_AD1_DMIC_INPUT_SEL (0x1 << 1) 160 #define RT5514_AD1_DMIC_INPUT_SEL_SFT 1 161 #define RT5514_AD0_DMIC_INPUT_SEL (0x1 << 0) 162 #define RT5514_AD0_DMIC_INPUT_SEL_SFT 0 163 164 /* RT5514_PLL_SOURCE_CTRL (0x2100) */ 165 #define RT5514_PLL_1_SEL_MASK (0x7 << 12) 166 #define RT5514_PLL_1_SEL_SFT 12 167 #define RT5514_PLL_1_SEL_SCLK (0x3 << 12) 168 #define RT5514_PLL_1_SEL_MCLK (0x4 << 12) 169 170 /* RT5514_CLK_CTRL1 (0x2104) */ 171 #define RT5514_CLK_AD_ANA1_EN (0x1 << 31) 172 #define RT5514_CLK_AD_ANA1_EN_BIT 31 173 #define RT5514_CLK_AD1_EN (0x1 << 24) 174 #define RT5514_CLK_AD1_EN_BIT 24 175 #define RT5514_CLK_AD0_EN (0x1 << 23) 176 #define RT5514_CLK_AD0_EN_BIT 23 177 #define RT5514_CLK_DMIC_OUT_SEL_MASK (0x7 << 8) 178 #define RT5514_CLK_DMIC_OUT_SEL_SFT 8 179 180 /* RT5514_CLK_CTRL2 (0x2108) */ 181 #define RT5514_CLK_SYS_DIV_OUT_MASK (0x7 << 8) 182 #define RT5514_CLK_SYS_DIV_OUT_SFT 8 183 #define RT5514_SEL_ADC_OSR_MASK (0x7 << 4) 184 #define RT5514_SEL_ADC_OSR_SFT 4 185 #define RT5514_CLK_SYS_PRE_SEL_MASK (0x3 << 0) 186 #define RT5514_CLK_SYS_PRE_SEL_SFT 0 187 #define RT5514_CLK_SYS_PRE_SEL_MCLK (0x2 << 0) 188 #define RT5514_CLK_SYS_PRE_SEL_PLL (0x3 << 0) 189 190 /* RT5514_DOWNFILTER_CTRL (0x2190 0x2194 0x21a0 0x21a4) */ 191 #define RT5514_AD_DMIC_MIX (0x1 << 11) 192 #define RT5514_AD_DMIC_MIX_BIT 11 193 #define RT5514_AD_AD_MIX (0x1 << 10) 194 #define RT5514_AD_AD_MIX_BIT 10 195 #define RT5514_AD_AD_MUTE (0x1 << 7) 196 #define RT5514_AD_AD_MUTE_BIT 7 197 #define RT5514_AD_GAIN_MASK (0x7f << 0) 198 #define RT5514_AD_GAIN_SFT 0 199 200 /* RT5514_ANA_CTRL_MICBST (0x2220) */ 201 #define RT5514_SEL_BSTL_MASK (0xf << 4) 202 #define RT5514_SEL_BSTL_SFT 4 203 #define RT5514_SEL_BSTR_MASK (0xf << 0) 204 #define RT5514_SEL_BSTR_SFT 0 205 206 /* RT5514_ANA_CTRL_PLL1_1 (0x2260) */ 207 #define RT5514_PLL_K_MAX 0x1f 208 #define RT5514_PLL_K_MASK (RT5514_PLL_K_MAX << 16) 209 #define RT5514_PLL_K_SFT 16 210 #define RT5514_PLL_N_MAX 0x1ff 211 #define RT5514_PLL_N_MASK (RT5514_PLL_N_MAX << 7) 212 #define RT5514_PLL_N_SFT 4 213 #define RT5514_PLL_M_MAX 0xf 214 #define RT5514_PLL_M_MASK (RT5514_PLL_M_MAX << 0) 215 #define RT5514_PLL_M_SFT 0 216 217 /* RT5514_ANA_CTRL_PLL1_2 (0x2264) */ 218 #define RT5514_PLL_M_BP (0x1 << 2) 219 #define RT5514_PLL_M_BP_SFT 2 220 #define RT5514_PLL_K_BP (0x1 << 1) 221 #define RT5514_PLL_K_BP_SFT 1 222 #define RT5514_EN_LDO_PLL1 (0x1 << 0) 223 #define RT5514_EN_LDO_PLL1_BIT 0 224 225 #define RT5514_PLL_INP_MAX 40000000 226 #define RT5514_PLL_INP_MIN 256000 227 228 /* System Clock Source */ 229 enum { 230 RT5514_SCLK_S_MCLK, 231 RT5514_SCLK_S_PLL1, 232 }; 233 234 /* PLL1 Source */ 235 enum { 236 RT5514_PLL1_S_MCLK, 237 RT5514_PLL1_S_BCLK, 238 }; 239 240 struct rt5514_priv { 241 struct snd_soc_codec *codec; 242 struct regmap *i2c_regmap, *regmap; 243 int sysclk; 244 int sysclk_src; 245 int lrck; 246 int bclk; 247 int pll_src; 248 int pll_in; 249 int pll_out; 250 }; 251 252 #endif /* __RT5514_H__ */ 253