1 /* 2 * rt286.c -- RT286 ALSA SoC audio codec driver 3 * 4 * Copyright 2013 Realtek Semiconductor Corp. 5 * Author: Bard Liao <bardliao@realtek.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/pm.h> 17 #include <linux/i2c.h> 18 #include <linux/platform_device.h> 19 #include <linux/spi/spi.h> 20 #include <linux/acpi.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/soc.h> 25 #include <sound/soc-dapm.h> 26 #include <sound/initval.h> 27 #include <sound/tlv.h> 28 #include <sound/jack.h> 29 #include <linux/workqueue.h> 30 #include <sound/rt286.h> 31 #include <sound/hda_verbs.h> 32 33 #include "rt286.h" 34 35 #define RT286_VENDOR_ID 0x10ec0286 36 37 struct rt286_priv { 38 struct regmap *regmap; 39 struct rt286_platform_data pdata; 40 struct i2c_client *i2c; 41 struct snd_soc_jack *jack; 42 struct delayed_work jack_detect_work; 43 int sys_clk; 44 struct reg_default *index_cache; 45 }; 46 47 static struct reg_default rt286_index_def[] = { 48 { 0x01, 0xaaaa }, 49 { 0x02, 0x8aaa }, 50 { 0x03, 0x0002 }, 51 { 0x04, 0xaf01 }, 52 { 0x08, 0x000d }, 53 { 0x09, 0xd810 }, 54 { 0x0a, 0x0120 }, 55 { 0x0b, 0x0000 }, 56 { 0x0d, 0x2800 }, 57 { 0x0f, 0x0000 }, 58 { 0x19, 0x0a17 }, 59 { 0x20, 0x0020 }, 60 { 0x33, 0x0208 }, 61 { 0x49, 0x0004 }, 62 { 0x4f, 0x50e9 }, 63 { 0x50, 0x2000 }, 64 { 0x63, 0x2902 }, 65 { 0x67, 0x1111 }, 66 { 0x68, 0x1016 }, 67 { 0x69, 0x273f }, 68 }; 69 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt286_index_def) 70 71 static const struct reg_default rt286_reg[] = { 72 { 0x00170500, 0x00000400 }, 73 { 0x00220000, 0x00000031 }, 74 { 0x00239000, 0x0000007f }, 75 { 0x0023a000, 0x0000007f }, 76 { 0x00270500, 0x00000400 }, 77 { 0x00370500, 0x00000400 }, 78 { 0x00870500, 0x00000400 }, 79 { 0x00920000, 0x00000031 }, 80 { 0x00935000, 0x000000c3 }, 81 { 0x00936000, 0x000000c3 }, 82 { 0x00970500, 0x00000400 }, 83 { 0x00b37000, 0x00000097 }, 84 { 0x00b37200, 0x00000097 }, 85 { 0x00b37300, 0x00000097 }, 86 { 0x00c37000, 0x00000000 }, 87 { 0x00c37100, 0x00000080 }, 88 { 0x01270500, 0x00000400 }, 89 { 0x01370500, 0x00000400 }, 90 { 0x01371f00, 0x411111f0 }, 91 { 0x01439000, 0x00000080 }, 92 { 0x0143a000, 0x00000080 }, 93 { 0x01470700, 0x00000000 }, 94 { 0x01470500, 0x00000400 }, 95 { 0x01470c00, 0x00000000 }, 96 { 0x01470100, 0x00000000 }, 97 { 0x01837000, 0x00000000 }, 98 { 0x01870500, 0x00000400 }, 99 { 0x02050000, 0x00000000 }, 100 { 0x02139000, 0x00000080 }, 101 { 0x0213a000, 0x00000080 }, 102 { 0x02170100, 0x00000000 }, 103 { 0x02170500, 0x00000400 }, 104 { 0x02170700, 0x00000000 }, 105 { 0x02270100, 0x00000000 }, 106 { 0x02370100, 0x00000000 }, 107 { 0x01870700, 0x00000020 }, 108 { 0x00830000, 0x000000c3 }, 109 { 0x00930000, 0x000000c3 }, 110 { 0x01270700, 0x00000000 }, 111 }; 112 113 static bool rt286_volatile_register(struct device *dev, unsigned int reg) 114 { 115 switch (reg) { 116 case 0 ... 0xff: 117 case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID): 118 case RT286_GET_HP_SENSE: 119 case RT286_GET_MIC1_SENSE: 120 case RT286_PROC_COEF: 121 return true; 122 default: 123 return false; 124 } 125 126 127 } 128 129 static bool rt286_readable_register(struct device *dev, unsigned int reg) 130 { 131 switch (reg) { 132 case 0 ... 0xff: 133 case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID): 134 case RT286_GET_HP_SENSE: 135 case RT286_GET_MIC1_SENSE: 136 case RT286_SET_AUDIO_POWER: 137 case RT286_SET_HPO_POWER: 138 case RT286_SET_SPK_POWER: 139 case RT286_SET_DMIC1_POWER: 140 case RT286_SPK_MUX: 141 case RT286_HPO_MUX: 142 case RT286_ADC0_MUX: 143 case RT286_ADC1_MUX: 144 case RT286_SET_MIC1: 145 case RT286_SET_PIN_HPO: 146 case RT286_SET_PIN_SPK: 147 case RT286_SET_PIN_DMIC1: 148 case RT286_SPK_EAPD: 149 case RT286_SET_AMP_GAIN_HPO: 150 case RT286_SET_DMIC2_DEFAULT: 151 case RT286_DACL_GAIN: 152 case RT286_DACR_GAIN: 153 case RT286_ADCL_GAIN: 154 case RT286_ADCR_GAIN: 155 case RT286_MIC_GAIN: 156 case RT286_SPOL_GAIN: 157 case RT286_SPOR_GAIN: 158 case RT286_HPOL_GAIN: 159 case RT286_HPOR_GAIN: 160 case RT286_F_DAC_SWITCH: 161 case RT286_F_RECMIX_SWITCH: 162 case RT286_REC_MIC_SWITCH: 163 case RT286_REC_I2S_SWITCH: 164 case RT286_REC_LINE_SWITCH: 165 case RT286_REC_BEEP_SWITCH: 166 case RT286_DAC_FORMAT: 167 case RT286_ADC_FORMAT: 168 case RT286_COEF_INDEX: 169 case RT286_PROC_COEF: 170 case RT286_SET_AMP_GAIN_ADC_IN1: 171 case RT286_SET_AMP_GAIN_ADC_IN2: 172 case RT286_SET_POWER(RT286_DAC_OUT1): 173 case RT286_SET_POWER(RT286_DAC_OUT2): 174 case RT286_SET_POWER(RT286_ADC_IN1): 175 case RT286_SET_POWER(RT286_ADC_IN2): 176 case RT286_SET_POWER(RT286_DMIC2): 177 case RT286_SET_POWER(RT286_MIC1): 178 return true; 179 default: 180 return false; 181 } 182 } 183 184 static int rt286_hw_write(void *context, unsigned int reg, unsigned int value) 185 { 186 struct i2c_client *client = context; 187 struct rt286_priv *rt286 = i2c_get_clientdata(client); 188 u8 data[4]; 189 int ret, i; 190 191 /*handle index registers*/ 192 if (reg <= 0xff) { 193 rt286_hw_write(client, RT286_COEF_INDEX, reg); 194 for (i = 0; i < INDEX_CACHE_SIZE; i++) { 195 if (reg == rt286->index_cache[i].reg) { 196 rt286->index_cache[i].def = value; 197 break; 198 } 199 200 } 201 reg = RT286_PROC_COEF; 202 } 203 204 data[0] = (reg >> 24) & 0xff; 205 data[1] = (reg >> 16) & 0xff; 206 /* 207 * 4 bit VID: reg should be 0 208 * 12 bit VID: value should be 0 209 * So we use an OR operator to handle it rather than use if condition. 210 */ 211 data[2] = ((reg >> 8) & 0xff) | ((value >> 8) & 0xff); 212 data[3] = value & 0xff; 213 214 ret = i2c_master_send(client, data, 4); 215 216 if (ret == 4) 217 return 0; 218 else 219 pr_err("ret=%d\n", ret); 220 if (ret < 0) 221 return ret; 222 else 223 return -EIO; 224 } 225 226 static int rt286_hw_read(void *context, unsigned int reg, unsigned int *value) 227 { 228 struct i2c_client *client = context; 229 struct i2c_msg xfer[2]; 230 int ret; 231 __be32 be_reg; 232 unsigned int index, vid, buf = 0x0; 233 234 /*handle index registers*/ 235 if (reg <= 0xff) { 236 rt286_hw_write(client, RT286_COEF_INDEX, reg); 237 reg = RT286_PROC_COEF; 238 } 239 240 reg = reg | 0x80000; 241 vid = (reg >> 8) & 0xfff; 242 243 if (AC_VERB_GET_AMP_GAIN_MUTE == (vid & 0xf00)) { 244 index = (reg >> 8) & 0xf; 245 reg = (reg & ~0xf0f) | index; 246 } 247 be_reg = cpu_to_be32(reg); 248 249 /* Write register */ 250 xfer[0].addr = client->addr; 251 xfer[0].flags = 0; 252 xfer[0].len = 4; 253 xfer[0].buf = (u8 *)&be_reg; 254 255 /* Read data */ 256 xfer[1].addr = client->addr; 257 xfer[1].flags = I2C_M_RD; 258 xfer[1].len = 4; 259 xfer[1].buf = (u8 *)&buf; 260 261 ret = i2c_transfer(client->adapter, xfer, 2); 262 if (ret < 0) 263 return ret; 264 else if (ret != 2) 265 return -EIO; 266 267 *value = be32_to_cpu(buf); 268 269 return 0; 270 } 271 272 #ifdef CONFIG_PM 273 static void rt286_index_sync(struct snd_soc_codec *codec) 274 { 275 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); 276 int i; 277 278 for (i = 0; i < INDEX_CACHE_SIZE; i++) { 279 snd_soc_write(codec, rt286->index_cache[i].reg, 280 rt286->index_cache[i].def); 281 } 282 } 283 #endif 284 285 static int rt286_support_power_controls[] = { 286 RT286_DAC_OUT1, 287 RT286_DAC_OUT2, 288 RT286_ADC_IN1, 289 RT286_ADC_IN2, 290 RT286_MIC1, 291 RT286_DMIC1, 292 RT286_DMIC2, 293 RT286_SPK_OUT, 294 RT286_HP_OUT, 295 }; 296 #define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls) 297 298 static int rt286_jack_detect(struct rt286_priv *rt286, bool *hp, bool *mic) 299 { 300 unsigned int val, buf; 301 int i; 302 303 *hp = false; 304 *mic = false; 305 306 if (rt286->pdata.cbj_en) { 307 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf); 308 *hp = buf & 0x80000000; 309 if (*hp) { 310 /* power on HV,VERF */ 311 regmap_update_bits(rt286->regmap, 312 RT286_POWER_CTRL1, 0x1001, 0x0); 313 /* power LDO1 */ 314 regmap_update_bits(rt286->regmap, 315 RT286_POWER_CTRL2, 0x4, 0x4); 316 regmap_write(rt286->regmap, RT286_SET_MIC1, 0x24); 317 regmap_read(rt286->regmap, RT286_CBJ_CTRL2, &val); 318 319 msleep(200); 320 i = 40; 321 while (((val & 0x0800) == 0) && (i > 0)) { 322 regmap_read(rt286->regmap, 323 RT286_CBJ_CTRL2, &val); 324 i--; 325 msleep(20); 326 } 327 328 if (0x0400 == (val & 0x0700)) { 329 *mic = false; 330 331 regmap_write(rt286->regmap, 332 RT286_SET_MIC1, 0x20); 333 /* power off HV,VERF */ 334 regmap_update_bits(rt286->regmap, 335 RT286_POWER_CTRL1, 0x1001, 0x1001); 336 regmap_update_bits(rt286->regmap, 337 RT286_A_BIAS_CTRL3, 0xc000, 0x0000); 338 regmap_update_bits(rt286->regmap, 339 RT286_CBJ_CTRL1, 0x0030, 0x0000); 340 regmap_update_bits(rt286->regmap, 341 RT286_A_BIAS_CTRL2, 0xc000, 0x0000); 342 } else if ((0x0200 == (val & 0x0700)) || 343 (0x0100 == (val & 0x0700))) { 344 *mic = true; 345 regmap_update_bits(rt286->regmap, 346 RT286_A_BIAS_CTRL3, 0xc000, 0x8000); 347 regmap_update_bits(rt286->regmap, 348 RT286_CBJ_CTRL1, 0x0030, 0x0020); 349 regmap_update_bits(rt286->regmap, 350 RT286_A_BIAS_CTRL2, 0xc000, 0x8000); 351 } else { 352 *mic = false; 353 } 354 355 regmap_update_bits(rt286->regmap, 356 RT286_MISC_CTRL1, 357 0x0060, 0x0000); 358 } else { 359 regmap_update_bits(rt286->regmap, 360 RT286_MISC_CTRL1, 361 0x0060, 0x0020); 362 regmap_update_bits(rt286->regmap, 363 RT286_A_BIAS_CTRL3, 364 0xc000, 0x8000); 365 regmap_update_bits(rt286->regmap, 366 RT286_CBJ_CTRL1, 367 0x0030, 0x0020); 368 regmap_update_bits(rt286->regmap, 369 RT286_A_BIAS_CTRL2, 370 0xc000, 0x8000); 371 372 *mic = false; 373 } 374 } else { 375 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf); 376 *hp = buf & 0x80000000; 377 regmap_read(rt286->regmap, RT286_GET_MIC1_SENSE, &buf); 378 *mic = buf & 0x80000000; 379 } 380 381 return 0; 382 } 383 384 static void rt286_jack_detect_work(struct work_struct *work) 385 { 386 struct rt286_priv *rt286 = 387 container_of(work, struct rt286_priv, jack_detect_work.work); 388 int status = 0; 389 bool hp = false; 390 bool mic = false; 391 392 rt286_jack_detect(rt286, &hp, &mic); 393 394 if (hp == true) 395 status |= SND_JACK_HEADPHONE; 396 397 if (mic == true) 398 status |= SND_JACK_MICROPHONE; 399 400 snd_soc_jack_report(rt286->jack, status, 401 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); 402 } 403 404 int rt286_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack) 405 { 406 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); 407 408 rt286->jack = jack; 409 410 /* Send an initial empty report */ 411 snd_soc_jack_report(rt286->jack, 0, 412 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); 413 414 return 0; 415 } 416 EXPORT_SYMBOL_GPL(rt286_mic_detect); 417 418 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0); 419 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0); 420 421 static const struct snd_kcontrol_new rt286_snd_controls[] = { 422 SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT286_DACL_GAIN, 423 RT286_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv), 424 SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT286_ADCL_GAIN, 425 RT286_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv), 426 SOC_SINGLE_TLV("AMIC Volume", RT286_MIC_GAIN, 427 0, 0x3, 0, mic_vol_tlv), 428 SOC_DOUBLE_R("Speaker Playback Switch", RT286_SPOL_GAIN, 429 RT286_SPOR_GAIN, RT286_MUTE_SFT, 1, 1), 430 }; 431 432 /* Digital Mixer */ 433 static const struct snd_kcontrol_new rt286_front_mix[] = { 434 SOC_DAPM_SINGLE("DAC Switch", RT286_F_DAC_SWITCH, 435 RT286_MUTE_SFT, 1, 1), 436 SOC_DAPM_SINGLE("RECMIX Switch", RT286_F_RECMIX_SWITCH, 437 RT286_MUTE_SFT, 1, 1), 438 }; 439 440 /* Analog Input Mixer */ 441 static const struct snd_kcontrol_new rt286_rec_mix[] = { 442 SOC_DAPM_SINGLE("Mic1 Switch", RT286_REC_MIC_SWITCH, 443 RT286_MUTE_SFT, 1, 1), 444 SOC_DAPM_SINGLE("I2S Switch", RT286_REC_I2S_SWITCH, 445 RT286_MUTE_SFT, 1, 1), 446 SOC_DAPM_SINGLE("Line1 Switch", RT286_REC_LINE_SWITCH, 447 RT286_MUTE_SFT, 1, 1), 448 SOC_DAPM_SINGLE("Beep Switch", RT286_REC_BEEP_SWITCH, 449 RT286_MUTE_SFT, 1, 1), 450 }; 451 452 static const struct snd_kcontrol_new spo_enable_control = 453 SOC_DAPM_SINGLE("Switch", RT286_SET_PIN_SPK, 454 RT286_SET_PIN_SFT, 1, 0); 455 456 static const struct snd_kcontrol_new hpol_enable_control = 457 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOL_GAIN, 458 RT286_MUTE_SFT, 1, 1); 459 460 static const struct snd_kcontrol_new hpor_enable_control = 461 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOR_GAIN, 462 RT286_MUTE_SFT, 1, 1); 463 464 /* ADC0 source */ 465 static const char * const rt286_adc_src[] = { 466 "Mic", "RECMIX", "Dmic" 467 }; 468 469 static const int rt286_adc_values[] = { 470 0, 4, 5, 471 }; 472 473 static SOC_VALUE_ENUM_SINGLE_DECL( 474 rt286_adc0_enum, RT286_ADC0_MUX, RT286_ADC_SEL_SFT, 475 RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values); 476 477 static const struct snd_kcontrol_new rt286_adc0_mux = 478 SOC_DAPM_ENUM("ADC 0 source", rt286_adc0_enum); 479 480 static SOC_VALUE_ENUM_SINGLE_DECL( 481 rt286_adc1_enum, RT286_ADC1_MUX, RT286_ADC_SEL_SFT, 482 RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values); 483 484 static const struct snd_kcontrol_new rt286_adc1_mux = 485 SOC_DAPM_ENUM("ADC 1 source", rt286_adc1_enum); 486 487 static const char * const rt286_dac_src[] = { 488 "Front", "Surround" 489 }; 490 /* HP-OUT source */ 491 static SOC_ENUM_SINGLE_DECL(rt286_hpo_enum, RT286_HPO_MUX, 492 0, rt286_dac_src); 493 494 static const struct snd_kcontrol_new rt286_hpo_mux = 495 SOC_DAPM_ENUM("HPO source", rt286_hpo_enum); 496 497 /* SPK-OUT source */ 498 static SOC_ENUM_SINGLE_DECL(rt286_spo_enum, RT286_SPK_MUX, 499 0, rt286_dac_src); 500 501 static const struct snd_kcontrol_new rt286_spo_mux = 502 SOC_DAPM_ENUM("SPO source", rt286_spo_enum); 503 504 static int rt286_spk_event(struct snd_soc_dapm_widget *w, 505 struct snd_kcontrol *kcontrol, int event) 506 { 507 struct snd_soc_codec *codec = w->codec; 508 509 switch (event) { 510 case SND_SOC_DAPM_POST_PMU: 511 snd_soc_write(codec, 512 RT286_SPK_EAPD, RT286_SET_EAPD_HIGH); 513 break; 514 case SND_SOC_DAPM_PRE_PMD: 515 snd_soc_write(codec, 516 RT286_SPK_EAPD, RT286_SET_EAPD_LOW); 517 break; 518 519 default: 520 return 0; 521 } 522 523 return 0; 524 } 525 526 static int rt286_set_dmic1_event(struct snd_soc_dapm_widget *w, 527 struct snd_kcontrol *kcontrol, int event) 528 { 529 struct snd_soc_codec *codec = w->codec; 530 531 switch (event) { 532 case SND_SOC_DAPM_POST_PMU: 533 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0x20); 534 break; 535 case SND_SOC_DAPM_PRE_PMD: 536 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0); 537 break; 538 default: 539 return 0; 540 } 541 542 return 0; 543 } 544 545 static int rt286_adc_event(struct snd_soc_dapm_widget *w, 546 struct snd_kcontrol *kcontrol, int event) 547 { 548 struct snd_soc_codec *codec = w->codec; 549 unsigned int nid; 550 551 nid = (w->reg >> 20) & 0xff; 552 553 switch (event) { 554 case SND_SOC_DAPM_POST_PMU: 555 snd_soc_update_bits(codec, 556 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0), 557 0x7080, 0x7000); 558 break; 559 case SND_SOC_DAPM_PRE_PMD: 560 snd_soc_update_bits(codec, 561 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0), 562 0x7080, 0x7080); 563 break; 564 default: 565 return 0; 566 } 567 568 return 0; 569 } 570 571 static const struct snd_soc_dapm_widget rt286_dapm_widgets[] = { 572 /* Input Lines */ 573 SND_SOC_DAPM_INPUT("DMIC1 Pin"), 574 SND_SOC_DAPM_INPUT("DMIC2 Pin"), 575 SND_SOC_DAPM_INPUT("MIC1"), 576 SND_SOC_DAPM_INPUT("LINE1"), 577 SND_SOC_DAPM_INPUT("Beep"), 578 579 /* DMIC */ 580 SND_SOC_DAPM_PGA_E("DMIC1", RT286_SET_POWER(RT286_DMIC1), 0, 1, 581 NULL, 0, rt286_set_dmic1_event, 582 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 583 SND_SOC_DAPM_PGA("DMIC2", RT286_SET_POWER(RT286_DMIC2), 0, 1, 584 NULL, 0), 585 SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM, 586 0, 0, NULL, 0), 587 588 /* REC Mixer */ 589 SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0, 590 rt286_rec_mix, ARRAY_SIZE(rt286_rec_mix)), 591 592 /* ADCs */ 593 SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0), 594 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), 595 596 /* ADC Mux */ 597 SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT286_SET_POWER(RT286_ADC_IN1), 0, 1, 598 &rt286_adc0_mux, rt286_adc_event, SND_SOC_DAPM_PRE_PMD | 599 SND_SOC_DAPM_POST_PMU), 600 SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT286_SET_POWER(RT286_ADC_IN2), 0, 1, 601 &rt286_adc1_mux, rt286_adc_event, SND_SOC_DAPM_PRE_PMD | 602 SND_SOC_DAPM_POST_PMU), 603 604 /* Audio Interface */ 605 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), 606 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), 607 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), 608 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), 609 610 /* Output Side */ 611 /* DACs */ 612 SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0), 613 SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0), 614 615 /* Output Mux */ 616 SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt286_spo_mux), 617 SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt286_hpo_mux), 618 619 SND_SOC_DAPM_SUPPLY("HP Power", RT286_SET_PIN_HPO, 620 RT286_SET_PIN_SFT, 0, NULL, 0), 621 622 /* Output Mixer */ 623 SND_SOC_DAPM_MIXER("Front", RT286_SET_POWER(RT286_DAC_OUT1), 0, 1, 624 rt286_front_mix, ARRAY_SIZE(rt286_front_mix)), 625 SND_SOC_DAPM_PGA("Surround", RT286_SET_POWER(RT286_DAC_OUT2), 0, 1, 626 NULL, 0), 627 628 /* Output Pga */ 629 SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0, 630 &spo_enable_control, rt286_spk_event, 631 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), 632 SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0, 633 &hpol_enable_control), 634 SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0, 635 &hpor_enable_control), 636 637 /* Output Lines */ 638 SND_SOC_DAPM_OUTPUT("SPOL"), 639 SND_SOC_DAPM_OUTPUT("SPOR"), 640 SND_SOC_DAPM_OUTPUT("HPO Pin"), 641 SND_SOC_DAPM_OUTPUT("SPDIF"), 642 }; 643 644 static const struct snd_soc_dapm_route rt286_dapm_routes[] = { 645 {"DMIC1", NULL, "DMIC1 Pin"}, 646 {"DMIC2", NULL, "DMIC2 Pin"}, 647 {"DMIC1", NULL, "DMIC Receiver"}, 648 {"DMIC2", NULL, "DMIC Receiver"}, 649 650 {"RECMIX", "Beep Switch", "Beep"}, 651 {"RECMIX", "Line1 Switch", "LINE1"}, 652 {"RECMIX", "Mic1 Switch", "MIC1"}, 653 654 {"ADC 0 Mux", "Dmic", "DMIC1"}, 655 {"ADC 0 Mux", "RECMIX", "RECMIX"}, 656 {"ADC 0 Mux", "Mic", "MIC1"}, 657 {"ADC 1 Mux", "Dmic", "DMIC2"}, 658 {"ADC 1 Mux", "RECMIX", "RECMIX"}, 659 {"ADC 1 Mux", "Mic", "MIC1"}, 660 661 {"ADC 0", NULL, "ADC 0 Mux"}, 662 {"ADC 1", NULL, "ADC 1 Mux"}, 663 664 {"AIF1TX", NULL, "ADC 0"}, 665 {"AIF2TX", NULL, "ADC 1"}, 666 667 {"DAC 0", NULL, "AIF1RX"}, 668 {"DAC 1", NULL, "AIF2RX"}, 669 670 {"Front", "DAC Switch", "DAC 0"}, 671 {"Front", "RECMIX Switch", "RECMIX"}, 672 673 {"Surround", NULL, "DAC 1"}, 674 675 {"SPK Mux", "Front", "Front"}, 676 {"SPK Mux", "Surround", "Surround"}, 677 678 {"HPO Mux", "Front", "Front"}, 679 {"HPO Mux", "Surround", "Surround"}, 680 681 {"SPO", "Switch", "SPK Mux"}, 682 {"HPO L", "Switch", "HPO Mux"}, 683 {"HPO R", "Switch", "HPO Mux"}, 684 {"HPO L", NULL, "HP Power"}, 685 {"HPO R", NULL, "HP Power"}, 686 687 {"SPOL", NULL, "SPO"}, 688 {"SPOR", NULL, "SPO"}, 689 {"HPO Pin", NULL, "HPO L"}, 690 {"HPO Pin", NULL, "HPO R"}, 691 }; 692 693 static int rt286_hw_params(struct snd_pcm_substream *substream, 694 struct snd_pcm_hw_params *params, 695 struct snd_soc_dai *dai) 696 { 697 struct snd_soc_codec *codec = dai->codec; 698 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); 699 unsigned int val = 0; 700 int d_len_code; 701 702 switch (params_rate(params)) { 703 /* bit 14 0:48K 1:44.1K */ 704 case 44100: 705 val |= 0x4000; 706 break; 707 case 48000: 708 break; 709 default: 710 dev_err(codec->dev, "Unsupported sample rate %d\n", 711 params_rate(params)); 712 return -EINVAL; 713 } 714 switch (rt286->sys_clk) { 715 case 12288000: 716 case 24576000: 717 if (params_rate(params) != 48000) { 718 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n", 719 params_rate(params), rt286->sys_clk); 720 return -EINVAL; 721 } 722 break; 723 case 11289600: 724 case 22579200: 725 if (params_rate(params) != 44100) { 726 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n", 727 params_rate(params), rt286->sys_clk); 728 return -EINVAL; 729 } 730 break; 731 } 732 733 if (params_channels(params) <= 16) { 734 /* bit 3:0 Number of Channel */ 735 val |= (params_channels(params) - 1); 736 } else { 737 dev_err(codec->dev, "Unsupported channels %d\n", 738 params_channels(params)); 739 return -EINVAL; 740 } 741 742 d_len_code = 0; 743 switch (params_width(params)) { 744 /* bit 6:4 Bits per Sample */ 745 case 16: 746 d_len_code = 0; 747 val |= (0x1 << 4); 748 break; 749 case 32: 750 d_len_code = 2; 751 val |= (0x4 << 4); 752 break; 753 case 20: 754 d_len_code = 1; 755 val |= (0x2 << 4); 756 break; 757 case 24: 758 d_len_code = 2; 759 val |= (0x3 << 4); 760 break; 761 case 8: 762 d_len_code = 3; 763 break; 764 default: 765 return -EINVAL; 766 } 767 768 snd_soc_update_bits(codec, 769 RT286_I2S_CTRL1, 0x0018, d_len_code << 3); 770 dev_dbg(codec->dev, "format val = 0x%x\n", val); 771 772 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 773 snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x407f, val); 774 else 775 snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x407f, val); 776 777 return 0; 778 } 779 780 static int rt286_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 781 { 782 struct snd_soc_codec *codec = dai->codec; 783 784 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 785 case SND_SOC_DAIFMT_CBM_CFM: 786 snd_soc_update_bits(codec, 787 RT286_I2S_CTRL1, 0x800, 0x800); 788 break; 789 case SND_SOC_DAIFMT_CBS_CFS: 790 snd_soc_update_bits(codec, 791 RT286_I2S_CTRL1, 0x800, 0x0); 792 break; 793 default: 794 return -EINVAL; 795 } 796 797 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 798 case SND_SOC_DAIFMT_I2S: 799 snd_soc_update_bits(codec, 800 RT286_I2S_CTRL1, 0x300, 0x0); 801 break; 802 case SND_SOC_DAIFMT_LEFT_J: 803 snd_soc_update_bits(codec, 804 RT286_I2S_CTRL1, 0x300, 0x1 << 8); 805 break; 806 case SND_SOC_DAIFMT_DSP_A: 807 snd_soc_update_bits(codec, 808 RT286_I2S_CTRL1, 0x300, 0x2 << 8); 809 break; 810 case SND_SOC_DAIFMT_DSP_B: 811 snd_soc_update_bits(codec, 812 RT286_I2S_CTRL1, 0x300, 0x3 << 8); 813 break; 814 default: 815 return -EINVAL; 816 } 817 /* bit 15 Stream Type 0:PCM 1:Non-PCM */ 818 snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x8000, 0); 819 snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x8000, 0); 820 821 return 0; 822 } 823 824 static int rt286_set_dai_sysclk(struct snd_soc_dai *dai, 825 int clk_id, unsigned int freq, int dir) 826 { 827 struct snd_soc_codec *codec = dai->codec; 828 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); 829 830 dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq); 831 832 if (RT286_SCLK_S_MCLK == clk_id) { 833 snd_soc_update_bits(codec, 834 RT286_I2S_CTRL2, 0x0100, 0x0); 835 snd_soc_update_bits(codec, 836 RT286_PLL_CTRL1, 0x20, 0x20); 837 } else { 838 snd_soc_update_bits(codec, 839 RT286_I2S_CTRL2, 0x0100, 0x0100); 840 snd_soc_update_bits(codec, 841 RT286_PLL_CTRL, 0x4, 0x4); 842 snd_soc_update_bits(codec, 843 RT286_PLL_CTRL1, 0x20, 0x0); 844 } 845 846 switch (freq) { 847 case 19200000: 848 if (RT286_SCLK_S_MCLK == clk_id) { 849 dev_err(codec->dev, "Should not use MCLK\n"); 850 return -EINVAL; 851 } 852 snd_soc_update_bits(codec, 853 RT286_I2S_CTRL2, 0x40, 0x40); 854 break; 855 case 24000000: 856 if (RT286_SCLK_S_MCLK == clk_id) { 857 dev_err(codec->dev, "Should not use MCLK\n"); 858 return -EINVAL; 859 } 860 snd_soc_update_bits(codec, 861 RT286_I2S_CTRL2, 0x40, 0x0); 862 break; 863 case 12288000: 864 case 11289600: 865 snd_soc_update_bits(codec, 866 RT286_I2S_CTRL2, 0x8, 0x0); 867 snd_soc_update_bits(codec, 868 RT286_CLK_DIV, 0xfc1e, 0x0004); 869 break; 870 case 24576000: 871 case 22579200: 872 snd_soc_update_bits(codec, 873 RT286_I2S_CTRL2, 0x8, 0x8); 874 snd_soc_update_bits(codec, 875 RT286_CLK_DIV, 0xfc1e, 0x5406); 876 break; 877 default: 878 dev_err(codec->dev, "Unsupported system clock\n"); 879 return -EINVAL; 880 } 881 882 rt286->sys_clk = freq; 883 884 return 0; 885 } 886 887 static int rt286_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) 888 { 889 struct snd_soc_codec *codec = dai->codec; 890 891 dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio); 892 if (50 == ratio) 893 snd_soc_update_bits(codec, 894 RT286_I2S_CTRL1, 0x1000, 0x1000); 895 else 896 snd_soc_update_bits(codec, 897 RT286_I2S_CTRL1, 0x1000, 0x0); 898 899 900 return 0; 901 } 902 903 static int rt286_set_bias_level(struct snd_soc_codec *codec, 904 enum snd_soc_bias_level level) 905 { 906 switch (level) { 907 case SND_SOC_BIAS_PREPARE: 908 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) { 909 snd_soc_write(codec, 910 RT286_SET_AUDIO_POWER, AC_PWRST_D0); 911 snd_soc_update_bits(codec, 912 RT286_DC_GAIN, 0x200, 0x200); 913 } 914 break; 915 916 case SND_SOC_BIAS_ON: 917 mdelay(10); 918 break; 919 920 case SND_SOC_BIAS_STANDBY: 921 snd_soc_write(codec, 922 RT286_SET_AUDIO_POWER, AC_PWRST_D3); 923 snd_soc_update_bits(codec, 924 RT286_DC_GAIN, 0x200, 0x0); 925 break; 926 927 default: 928 break; 929 } 930 codec->dapm.bias_level = level; 931 932 return 0; 933 } 934 935 static irqreturn_t rt286_irq(int irq, void *data) 936 { 937 struct rt286_priv *rt286 = data; 938 bool hp = false; 939 bool mic = false; 940 int status = 0; 941 942 rt286_jack_detect(rt286, &hp, &mic); 943 944 /* Clear IRQ */ 945 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x1, 0x1); 946 947 if (hp == true) 948 status |= SND_JACK_HEADPHONE; 949 950 if (mic == true) 951 status |= SND_JACK_MICROPHONE; 952 953 snd_soc_jack_report(rt286->jack, status, 954 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); 955 956 pm_wakeup_event(&rt286->i2c->dev, 300); 957 958 return IRQ_HANDLED; 959 } 960 961 static int rt286_probe(struct snd_soc_codec *codec) 962 { 963 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); 964 965 codec->dapm.bias_level = SND_SOC_BIAS_OFF; 966 967 if (rt286->i2c->irq) { 968 regmap_update_bits(rt286->regmap, 969 RT286_IRQ_CTRL, 0x2, 0x2); 970 971 INIT_DELAYED_WORK(&rt286->jack_detect_work, 972 rt286_jack_detect_work); 973 schedule_delayed_work(&rt286->jack_detect_work, 974 msecs_to_jiffies(1250)); 975 } 976 977 return 0; 978 } 979 980 static int rt286_remove(struct snd_soc_codec *codec) 981 { 982 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); 983 984 cancel_delayed_work_sync(&rt286->jack_detect_work); 985 986 return 0; 987 } 988 989 #ifdef CONFIG_PM 990 static int rt286_suspend(struct snd_soc_codec *codec) 991 { 992 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); 993 994 regcache_cache_only(rt286->regmap, true); 995 regcache_mark_dirty(rt286->regmap); 996 997 return 0; 998 } 999 1000 static int rt286_resume(struct snd_soc_codec *codec) 1001 { 1002 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec); 1003 1004 regcache_cache_only(rt286->regmap, false); 1005 rt286_index_sync(codec); 1006 regcache_sync(rt286->regmap); 1007 1008 return 0; 1009 } 1010 #else 1011 #define rt286_suspend NULL 1012 #define rt286_resume NULL 1013 #endif 1014 1015 #define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) 1016 #define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1017 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) 1018 1019 static const struct snd_soc_dai_ops rt286_aif_dai_ops = { 1020 .hw_params = rt286_hw_params, 1021 .set_fmt = rt286_set_dai_fmt, 1022 .set_sysclk = rt286_set_dai_sysclk, 1023 .set_bclk_ratio = rt286_set_bclk_ratio, 1024 }; 1025 1026 static struct snd_soc_dai_driver rt286_dai[] = { 1027 { 1028 .name = "rt286-aif1", 1029 .id = RT286_AIF1, 1030 .playback = { 1031 .stream_name = "AIF1 Playback", 1032 .channels_min = 1, 1033 .channels_max = 2, 1034 .rates = RT286_STEREO_RATES, 1035 .formats = RT286_FORMATS, 1036 }, 1037 .capture = { 1038 .stream_name = "AIF1 Capture", 1039 .channels_min = 1, 1040 .channels_max = 2, 1041 .rates = RT286_STEREO_RATES, 1042 .formats = RT286_FORMATS, 1043 }, 1044 .ops = &rt286_aif_dai_ops, 1045 .symmetric_rates = 1, 1046 }, 1047 { 1048 .name = "rt286-aif2", 1049 .id = RT286_AIF2, 1050 .playback = { 1051 .stream_name = "AIF2 Playback", 1052 .channels_min = 1, 1053 .channels_max = 2, 1054 .rates = RT286_STEREO_RATES, 1055 .formats = RT286_FORMATS, 1056 }, 1057 .capture = { 1058 .stream_name = "AIF2 Capture", 1059 .channels_min = 1, 1060 .channels_max = 2, 1061 .rates = RT286_STEREO_RATES, 1062 .formats = RT286_FORMATS, 1063 }, 1064 .ops = &rt286_aif_dai_ops, 1065 .symmetric_rates = 1, 1066 }, 1067 1068 }; 1069 1070 static struct snd_soc_codec_driver soc_codec_dev_rt286 = { 1071 .probe = rt286_probe, 1072 .remove = rt286_remove, 1073 .suspend = rt286_suspend, 1074 .resume = rt286_resume, 1075 .set_bias_level = rt286_set_bias_level, 1076 .idle_bias_off = true, 1077 .controls = rt286_snd_controls, 1078 .num_controls = ARRAY_SIZE(rt286_snd_controls), 1079 .dapm_widgets = rt286_dapm_widgets, 1080 .num_dapm_widgets = ARRAY_SIZE(rt286_dapm_widgets), 1081 .dapm_routes = rt286_dapm_routes, 1082 .num_dapm_routes = ARRAY_SIZE(rt286_dapm_routes), 1083 }; 1084 1085 static const struct regmap_config rt286_regmap = { 1086 .reg_bits = 32, 1087 .val_bits = 32, 1088 .max_register = 0x02370100, 1089 .volatile_reg = rt286_volatile_register, 1090 .readable_reg = rt286_readable_register, 1091 .reg_write = rt286_hw_write, 1092 .reg_read = rt286_hw_read, 1093 .cache_type = REGCACHE_RBTREE, 1094 .reg_defaults = rt286_reg, 1095 .num_reg_defaults = ARRAY_SIZE(rt286_reg), 1096 }; 1097 1098 static const struct i2c_device_id rt286_i2c_id[] = { 1099 {"rt286", 0}, 1100 {} 1101 }; 1102 MODULE_DEVICE_TABLE(i2c, rt286_i2c_id); 1103 1104 static const struct acpi_device_id rt286_acpi_match[] = { 1105 { "INT343A", 0 }, 1106 {}, 1107 }; 1108 MODULE_DEVICE_TABLE(acpi, rt286_acpi_match); 1109 1110 static int rt286_i2c_probe(struct i2c_client *i2c, 1111 const struct i2c_device_id *id) 1112 { 1113 struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev); 1114 struct rt286_priv *rt286; 1115 int i, ret; 1116 1117 rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286), 1118 GFP_KERNEL); 1119 if (NULL == rt286) 1120 return -ENOMEM; 1121 1122 rt286->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt286_regmap); 1123 if (IS_ERR(rt286->regmap)) { 1124 ret = PTR_ERR(rt286->regmap); 1125 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 1126 ret); 1127 return ret; 1128 } 1129 1130 regmap_read(rt286->regmap, 1131 RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret); 1132 if (ret != RT286_VENDOR_ID) { 1133 dev_err(&i2c->dev, 1134 "Device with ID register %x is not rt286\n", ret); 1135 return -ENODEV; 1136 } 1137 1138 rt286->index_cache = rt286_index_def; 1139 rt286->i2c = i2c; 1140 i2c_set_clientdata(i2c, rt286); 1141 1142 if (pdata) 1143 rt286->pdata = *pdata; 1144 1145 regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3); 1146 1147 for (i = 0; i < RT286_POWER_REG_LEN; i++) 1148 regmap_write(rt286->regmap, 1149 RT286_SET_POWER(rt286_support_power_controls[i]), 1150 AC_PWRST_D1); 1151 1152 if (!rt286->pdata.cbj_en) { 1153 regmap_write(rt286->regmap, RT286_CBJ_CTRL2, 0x0000); 1154 regmap_write(rt286->regmap, RT286_MIC1_DET_CTRL, 0x0816); 1155 regmap_write(rt286->regmap, RT286_MISC_CTRL1, 0x0000); 1156 regmap_update_bits(rt286->regmap, 1157 RT286_CBJ_CTRL1, 0xf000, 0xb000); 1158 } else { 1159 regmap_update_bits(rt286->regmap, 1160 RT286_CBJ_CTRL1, 0xf000, 0x5000); 1161 } 1162 1163 mdelay(10); 1164 1165 if (!rt286->pdata.gpio2_en) 1166 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x4000); 1167 else 1168 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0); 1169 1170 mdelay(10); 1171 1172 /*Power down LDO2*/ 1173 regmap_update_bits(rt286->regmap, RT286_POWER_CTRL2, 0x8, 0x0); 1174 1175 /*Set depop parameter*/ 1176 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL2, 0x403a, 0x401a); 1177 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL3, 0xf777, 0x4737); 1178 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL4, 0x00ff, 0x003f); 1179 1180 if (rt286->i2c->irq) { 1181 ret = request_threaded_irq(rt286->i2c->irq, NULL, rt286_irq, 1182 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt286", rt286); 1183 if (ret != 0) { 1184 dev_err(&i2c->dev, 1185 "Failed to reguest IRQ: %d\n", ret); 1186 return ret; 1187 } 1188 } 1189 1190 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt286, 1191 rt286_dai, ARRAY_SIZE(rt286_dai)); 1192 1193 return ret; 1194 } 1195 1196 static int rt286_i2c_remove(struct i2c_client *i2c) 1197 { 1198 struct rt286_priv *rt286 = i2c_get_clientdata(i2c); 1199 1200 if (i2c->irq) 1201 free_irq(i2c->irq, rt286); 1202 snd_soc_unregister_codec(&i2c->dev); 1203 1204 return 0; 1205 } 1206 1207 1208 static struct i2c_driver rt286_i2c_driver = { 1209 .driver = { 1210 .name = "rt286", 1211 .owner = THIS_MODULE, 1212 .acpi_match_table = ACPI_PTR(rt286_acpi_match), 1213 }, 1214 .probe = rt286_i2c_probe, 1215 .remove = rt286_i2c_remove, 1216 .id_table = rt286_i2c_id, 1217 }; 1218 1219 module_i2c_driver(rt286_i2c_driver); 1220 1221 MODULE_DESCRIPTION("ASoC RT286 driver"); 1222 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); 1223 MODULE_LICENSE("GPL"); 1224