1 /* 2 * rl6231.c - RL6231 class device shared support 3 * 4 * Copyright 2014 Realtek Semiconductor Corp. 5 * 6 * Author: Oder Chiou <oder_chiou@realtek.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 15 #include "rl6231.h" 16 17 /** 18 * rl6231_calc_dmic_clk - Calculate the parameter of dmic. 19 * 20 * @rate: base clock rate. 21 * 22 * Choose dmic clock between 1MHz and 3MHz. 23 * It is better for clock to approximate 3MHz. 24 */ 25 int rl6231_calc_dmic_clk(int rate) 26 { 27 int div[] = {2, 3, 4, 6, 8, 12}, idx = -EINVAL; 28 int i, red, bound, temp; 29 30 red = 3000000 * 12; 31 for (i = 0; i < ARRAY_SIZE(div); i++) { 32 bound = div[i] * 3000000; 33 if (rate > bound) 34 continue; 35 temp = bound - rate; 36 if (temp < red) { 37 red = temp; 38 idx = i; 39 } 40 } 41 42 return idx; 43 } 44 EXPORT_SYMBOL_GPL(rl6231_calc_dmic_clk); 45 46 /** 47 * rl6231_pll_calc - Calcualte PLL M/N/K code. 48 * @freq_in: external clock provided to codec. 49 * @freq_out: target clock which codec works on. 50 * @pll_code: Pointer to structure with M, N, K and bypass flag. 51 * 52 * Calcualte M/N/K code to configure PLL for codec. 53 * 54 * Returns 0 for success or negative error code. 55 */ 56 int rl6231_pll_calc(const unsigned int freq_in, 57 const unsigned int freq_out, struct rl6231_pll_code *pll_code) 58 { 59 int max_n = RL6231_PLL_N_MAX, max_m = RL6231_PLL_M_MAX; 60 int k, red, n_t, pll_out, in_t, out_t; 61 int n = 0, m = 0, m_t = 0; 62 int red_t = abs(freq_out - freq_in); 63 bool bypass = false; 64 65 if (RL6231_PLL_INP_MAX < freq_in || RL6231_PLL_INP_MIN > freq_in) 66 return -EINVAL; 67 68 k = 100000000 / freq_out - 2; 69 if (k > RL6231_PLL_K_MAX) 70 k = RL6231_PLL_K_MAX; 71 for (n_t = 0; n_t <= max_n; n_t++) { 72 in_t = freq_in / (k + 2); 73 pll_out = freq_out / (n_t + 2); 74 if (in_t < 0) 75 continue; 76 if (in_t == pll_out) { 77 bypass = true; 78 n = n_t; 79 goto code_find; 80 } 81 red = abs(in_t - pll_out); 82 if (red < red_t) { 83 bypass = true; 84 n = n_t; 85 m = m_t; 86 if (red == 0) 87 goto code_find; 88 red_t = red; 89 } 90 for (m_t = 0; m_t <= max_m; m_t++) { 91 out_t = in_t / (m_t + 2); 92 red = abs(out_t - pll_out); 93 if (red < red_t) { 94 bypass = false; 95 n = n_t; 96 m = m_t; 97 if (red == 0) 98 goto code_find; 99 red_t = red; 100 } 101 } 102 } 103 pr_debug("Only get approximation about PLL\n"); 104 105 code_find: 106 107 pll_code->m_bp = bypass; 108 pll_code->m_code = m; 109 pll_code->n_code = n; 110 pll_code->k_code = k; 111 return 0; 112 } 113 EXPORT_SYMBOL_GPL(rl6231_pll_calc); 114 115 int rl6231_get_clk_info(int sclk, int rate) 116 { 117 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16}; 118 119 if (sclk <= 0 || rate <= 0) 120 return -EINVAL; 121 122 rate = rate << 8; 123 for (i = 0; i < ARRAY_SIZE(pd); i++) 124 if (sclk == rate * pd[i]) 125 return i; 126 127 return -EINVAL; 128 } 129 EXPORT_SYMBOL_GPL(rl6231_get_clk_info); 130 131 MODULE_DESCRIPTION("RL6231 class device shared support"); 132 MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); 133 MODULE_LICENSE("GPL v2"); 134