1c3275903SKatsuhiro Suzuki /* SPDX-License-Identifier: GPL-2.0 */ 2c3275903SKatsuhiro Suzuki /* 3c3275903SKatsuhiro Suzuki * rk3328 ALSA SoC Audio driver 4c3275903SKatsuhiro Suzuki * 5c3275903SKatsuhiro Suzuki * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd All rights reserved. 6c3275903SKatsuhiro Suzuki */ 7c3275903SKatsuhiro Suzuki 8c3275903SKatsuhiro Suzuki #ifndef _RK3328_CODEC_H 9c3275903SKatsuhiro Suzuki #define _RK3328_CODEC_H 10c3275903SKatsuhiro Suzuki 11c3275903SKatsuhiro Suzuki #include <linux/bitfield.h> 12c3275903SKatsuhiro Suzuki 13c3275903SKatsuhiro Suzuki /* codec register */ 14c3275903SKatsuhiro Suzuki #define CODEC_RESET (0x00 << 2) 15c3275903SKatsuhiro Suzuki #define DAC_INIT_CTRL1 (0x03 << 2) 16c3275903SKatsuhiro Suzuki #define DAC_INIT_CTRL2 (0x04 << 2) 17c3275903SKatsuhiro Suzuki #define DAC_INIT_CTRL3 (0x05 << 2) 18c3275903SKatsuhiro Suzuki #define DAC_PRECHARGE_CTRL (0x22 << 2) 19c3275903SKatsuhiro Suzuki #define DAC_PWR_CTRL (0x23 << 2) 20c3275903SKatsuhiro Suzuki #define DAC_CLK_CTRL (0x24 << 2) 21c3275903SKatsuhiro Suzuki #define HPMIX_CTRL (0x25 << 2) 22c3275903SKatsuhiro Suzuki #define DAC_SELECT (0x26 << 2) 23c3275903SKatsuhiro Suzuki #define HPOUT_CTRL (0x27 << 2) 24c3275903SKatsuhiro Suzuki #define HPOUTL_GAIN_CTRL (0x28 << 2) 25c3275903SKatsuhiro Suzuki #define HPOUTR_GAIN_CTRL (0x29 << 2) 26c3275903SKatsuhiro Suzuki #define HPOUT_POP_CTRL (0x2a << 2) 27c3275903SKatsuhiro Suzuki 28c3275903SKatsuhiro Suzuki /* REG00: CODEC_RESET */ 29c3275903SKatsuhiro Suzuki #define PWR_RST_BYPASS_DIS (0x0 << 6) 30c3275903SKatsuhiro Suzuki #define PWR_RST_BYPASS_EN (0x1 << 6) 31c3275903SKatsuhiro Suzuki #define DIG_CORE_RST (0x0 << 1) 32c3275903SKatsuhiro Suzuki #define DIG_CORE_WORK (0x1 << 1) 33c3275903SKatsuhiro Suzuki #define SYS_RST (0x0 << 0) 34c3275903SKatsuhiro Suzuki #define SYS_WORK (0x1 << 0) 35c3275903SKatsuhiro Suzuki 36c3275903SKatsuhiro Suzuki /* REG03: DAC_INIT_CTRL1 */ 37c3275903SKatsuhiro Suzuki #define PIN_DIRECTION_MASK BIT(5) 38c3275903SKatsuhiro Suzuki #define PIN_DIRECTION_IN (0x0 << 5) 39c3275903SKatsuhiro Suzuki #define PIN_DIRECTION_OUT (0x1 << 5) 40c3275903SKatsuhiro Suzuki #define DAC_I2S_MODE_MASK BIT(4) 41c3275903SKatsuhiro Suzuki #define DAC_I2S_MODE_SLAVE (0x0 << 4) 42c3275903SKatsuhiro Suzuki #define DAC_I2S_MODE_MASTER (0x1 << 4) 43c3275903SKatsuhiro Suzuki 44c3275903SKatsuhiro Suzuki /* REG04: DAC_INIT_CTRL2 */ 45c3275903SKatsuhiro Suzuki #define DAC_I2S_LRP_MASK BIT(7) 46c3275903SKatsuhiro Suzuki #define DAC_I2S_LRP_NORMAL (0x0 << 7) 47c3275903SKatsuhiro Suzuki #define DAC_I2S_LRP_REVERSAL (0x1 << 7) 48c3275903SKatsuhiro Suzuki #define DAC_VDL_MASK GENMASK(6, 5) 49c3275903SKatsuhiro Suzuki #define DAC_VDL_16BITS (0x0 << 5) 50c3275903SKatsuhiro Suzuki #define DAC_VDL_20BITS (0x1 << 5) 51c3275903SKatsuhiro Suzuki #define DAC_VDL_24BITS (0x2 << 5) 52c3275903SKatsuhiro Suzuki #define DAC_VDL_32BITS (0x3 << 5) 53c3275903SKatsuhiro Suzuki #define DAC_MODE_MASK GENMASK(4, 3) 54c3275903SKatsuhiro Suzuki #define DAC_MODE_RJM (0x0 << 3) 55c3275903SKatsuhiro Suzuki #define DAC_MODE_LJM (0x1 << 3) 56c3275903SKatsuhiro Suzuki #define DAC_MODE_I2S (0x2 << 3) 57c3275903SKatsuhiro Suzuki #define DAC_MODE_PCM (0x3 << 3) 58c3275903SKatsuhiro Suzuki #define DAC_LR_SWAP_MASK BIT(2) 59c3275903SKatsuhiro Suzuki #define DAC_LR_SWAP_DIS (0x0 << 2) 60c3275903SKatsuhiro Suzuki #define DAC_LR_SWAP_EN (0x1 << 2) 61c3275903SKatsuhiro Suzuki 62c3275903SKatsuhiro Suzuki /* REG05: DAC_INIT_CTRL3 */ 63c3275903SKatsuhiro Suzuki #define DAC_WL_MASK GENMASK(3, 2) 64c3275903SKatsuhiro Suzuki #define DAC_WL_16BITS (0x0 << 2) 65c3275903SKatsuhiro Suzuki #define DAC_WL_20BITS (0x1 << 2) 66c3275903SKatsuhiro Suzuki #define DAC_WL_24BITS (0x2 << 2) 67c3275903SKatsuhiro Suzuki #define DAC_WL_32BITS (0x3 << 2) 68c3275903SKatsuhiro Suzuki #define DAC_RST_MASK BIT(1) 69c3275903SKatsuhiro Suzuki #define DAC_RST_EN (0x0 << 1) 70c3275903SKatsuhiro Suzuki #define DAC_RST_DIS (0x1 << 1) 71c3275903SKatsuhiro Suzuki #define DAC_BCP_MASK BIT(0) 72c3275903SKatsuhiro Suzuki #define DAC_BCP_NORMAL (0x0 << 0) 73c3275903SKatsuhiro Suzuki #define DAC_BCP_REVERSAL (0x1 << 0) 74c3275903SKatsuhiro Suzuki 75c3275903SKatsuhiro Suzuki /* REG22: DAC_PRECHARGE_CTRL */ 76c3275903SKatsuhiro Suzuki #define DAC_CHARGE_XCHARGE_MASK BIT(7) 77c3275903SKatsuhiro Suzuki #define DAC_CHARGE_DISCHARGE (0x0 << 7) 78c3275903SKatsuhiro Suzuki #define DAC_CHARGE_PRECHARGE (0x1 << 7) 79c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_64I_MASK BIT(6) 80c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_64I (0x1 << 6) 81c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_32I_MASK BIT(5) 82c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_32I (0x1 << 5) 83c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_16I_MASK BIT(4) 84c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_16I (0x1 << 4) 85c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_08I_MASK BIT(3) 86c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_08I (0x1 << 3) 87c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_04I_MASK BIT(2) 88c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_04I (0x1 << 2) 89c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_02I_MASK BIT(1) 90c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_02I (0x1 << 1) 91c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_I_MASK BIT(0) 92c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_I (0x1 << 0) 93c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_ALL_MASK GENMASK(6, 0) 94c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_ALL_OFF 0x00 95c3275903SKatsuhiro Suzuki #define DAC_CHARGE_CURRENT_ALL_ON 0x7f 96c3275903SKatsuhiro Suzuki 97c3275903SKatsuhiro Suzuki /* REG23: DAC_PWR_CTRL */ 98c3275903SKatsuhiro Suzuki #define DAC_PWR_MASK BIT(6) 99c3275903SKatsuhiro Suzuki #define DAC_PWR_OFF (0x0 << 6) 100c3275903SKatsuhiro Suzuki #define DAC_PWR_ON (0x1 << 6) 101c3275903SKatsuhiro Suzuki #define DACL_PATH_REFV_MASK BIT(5) 102c3275903SKatsuhiro Suzuki #define DACL_PATH_REFV_OFF (0x0 << 5) 103c3275903SKatsuhiro Suzuki #define DACL_PATH_REFV_ON (0x1 << 5) 104c3275903SKatsuhiro Suzuki #define HPOUTL_ZERO_CROSSING_MASK BIT(4) 105c3275903SKatsuhiro Suzuki #define HPOUTL_ZERO_CROSSING_OFF (0x0 << 4) 106c3275903SKatsuhiro Suzuki #define HPOUTL_ZERO_CROSSING_ON (0x1 << 4) 107c3275903SKatsuhiro Suzuki #define DACR_PATH_REFV_MASK BIT(1) 108c3275903SKatsuhiro Suzuki #define DACR_PATH_REFV_OFF (0x0 << 1) 109c3275903SKatsuhiro Suzuki #define DACR_PATH_REFV_ON (0x1 << 1) 110c3275903SKatsuhiro Suzuki #define HPOUTR_ZERO_CROSSING_MASK BIT(0) 111c3275903SKatsuhiro Suzuki #define HPOUTR_ZERO_CROSSING_OFF (0x0 << 0) 112c3275903SKatsuhiro Suzuki #define HPOUTR_ZERO_CROSSING_ON (0x1 << 0) 113c3275903SKatsuhiro Suzuki 114c3275903SKatsuhiro Suzuki /* REG24: DAC_CLK_CTRL */ 115c3275903SKatsuhiro Suzuki #define DACL_REFV_MASK BIT(7) 116c3275903SKatsuhiro Suzuki #define DACL_REFV_OFF (0x0 << 7) 117c3275903SKatsuhiro Suzuki #define DACL_REFV_ON (0x1 << 7) 118c3275903SKatsuhiro Suzuki #define DACL_CLK_MASK BIT(6) 119c3275903SKatsuhiro Suzuki #define DACL_CLK_OFF (0x0 << 6) 120c3275903SKatsuhiro Suzuki #define DACL_CLK_ON (0x1 << 6) 121c3275903SKatsuhiro Suzuki #define DACL_MASK BIT(5) 122c3275903SKatsuhiro Suzuki #define DACL_OFF (0x0 << 5) 123c3275903SKatsuhiro Suzuki #define DACL_ON (0x1 << 5) 124c3275903SKatsuhiro Suzuki #define DACL_INIT_MASK BIT(4) 125c3275903SKatsuhiro Suzuki #define DACL_INIT_OFF (0x0 << 4) 126c3275903SKatsuhiro Suzuki #define DACL_INIT_ON (0x1 << 4) 127c3275903SKatsuhiro Suzuki #define DACR_REFV_MASK BIT(3) 128c3275903SKatsuhiro Suzuki #define DACR_REFV_OFF (0x0 << 3) 129c3275903SKatsuhiro Suzuki #define DACR_REFV_ON (0x1 << 3) 130c3275903SKatsuhiro Suzuki #define DACR_CLK_MASK BIT(2) 131c3275903SKatsuhiro Suzuki #define DACR_CLK_OFF (0x0 << 2) 132c3275903SKatsuhiro Suzuki #define DACR_CLK_ON (0x1 << 2) 133c3275903SKatsuhiro Suzuki #define DACR_MASK BIT(1) 134c3275903SKatsuhiro Suzuki #define DACR_OFF (0x0 << 1) 135c3275903SKatsuhiro Suzuki #define DACR_ON (0x1 << 1) 136c3275903SKatsuhiro Suzuki #define DACR_INIT_MASK BIT(0) 137c3275903SKatsuhiro Suzuki #define DACR_INIT_OFF (0x0 << 0) 138c3275903SKatsuhiro Suzuki #define DACR_INIT_ON (0x1 << 0) 139c3275903SKatsuhiro Suzuki 140c3275903SKatsuhiro Suzuki /* REG25: HPMIX_CTRL*/ 141c3275903SKatsuhiro Suzuki #define HPMIXL_MASK BIT(6) 142c3275903SKatsuhiro Suzuki #define HPMIXL_DIS (0x0 << 6) 143c3275903SKatsuhiro Suzuki #define HPMIXL_EN (0x1 << 6) 144c3275903SKatsuhiro Suzuki #define HPMIXL_INIT_MASK BIT(5) 145c3275903SKatsuhiro Suzuki #define HPMIXL_INIT_DIS (0x0 << 5) 146c3275903SKatsuhiro Suzuki #define HPMIXL_INIT_EN (0x1 << 5) 147c3275903SKatsuhiro Suzuki #define HPMIXL_INIT2_MASK BIT(4) 148c3275903SKatsuhiro Suzuki #define HPMIXL_INIT2_DIS (0x0 << 4) 149c3275903SKatsuhiro Suzuki #define HPMIXL_INIT2_EN (0x1 << 4) 150c3275903SKatsuhiro Suzuki #define HPMIXR_MASK BIT(2) 151c3275903SKatsuhiro Suzuki #define HPMIXR_DIS (0x0 << 2) 152c3275903SKatsuhiro Suzuki #define HPMIXR_EN (0x1 << 2) 153c3275903SKatsuhiro Suzuki #define HPMIXR_INIT_MASK BIT(1) 154c3275903SKatsuhiro Suzuki #define HPMIXR_INIT_DIS (0x0 << 1) 155c3275903SKatsuhiro Suzuki #define HPMIXR_INIT_EN (0x1 << 1) 156c3275903SKatsuhiro Suzuki #define HPMIXR_INIT2_MASK BIT(0) 157c3275903SKatsuhiro Suzuki #define HPMIXR_INIT2_DIS (0x0 << 0) 158c3275903SKatsuhiro Suzuki #define HPMIXR_INIT2_EN (0x1 << 0) 159c3275903SKatsuhiro Suzuki 160c3275903SKatsuhiro Suzuki /* REG26: DAC_SELECT */ 161c3275903SKatsuhiro Suzuki #define DACL_SELECT_MASK BIT(4) 162c3275903SKatsuhiro Suzuki #define DACL_UNSELECT (0x0 << 4) 163c3275903SKatsuhiro Suzuki #define DACL_SELECT (0x1 << 4) 164c3275903SKatsuhiro Suzuki #define DACR_SELECT_MASK BIT(0) 165c3275903SKatsuhiro Suzuki #define DACR_UNSELECT (0x0 << 0) 166c3275903SKatsuhiro Suzuki #define DACR_SELECT (0x1 << 0) 167c3275903SKatsuhiro Suzuki 168c3275903SKatsuhiro Suzuki /* REG27: HPOUT_CTRL */ 169c3275903SKatsuhiro Suzuki #define HPOUTL_MASK BIT(7) 170c3275903SKatsuhiro Suzuki #define HPOUTL_DIS (0x0 << 7) 171c3275903SKatsuhiro Suzuki #define HPOUTL_EN (0x1 << 7) 172c3275903SKatsuhiro Suzuki #define HPOUTL_INIT_MASK BIT(6) 173c3275903SKatsuhiro Suzuki #define HPOUTL_INIT_DIS (0x0 << 6) 174c3275903SKatsuhiro Suzuki #define HPOUTL_INIT_EN (0x1 << 6) 175c3275903SKatsuhiro Suzuki #define HPOUTL_MUTE_MASK BIT(5) 176c3275903SKatsuhiro Suzuki #define HPOUTL_MUTE (0x0 << 5) 177c3275903SKatsuhiro Suzuki #define HPOUTL_UNMUTE (0x1 << 5) 178c3275903SKatsuhiro Suzuki #define HPOUTR_MASK BIT(4) 179c3275903SKatsuhiro Suzuki #define HPOUTR_DIS (0x0 << 4) 180c3275903SKatsuhiro Suzuki #define HPOUTR_EN (0x1 << 4) 181c3275903SKatsuhiro Suzuki #define HPOUTR_INIT_MASK BIT(3) 182c3275903SKatsuhiro Suzuki #define HPOUTR_INIT_DIS (0x0 << 3) 183c3275903SKatsuhiro Suzuki #define HPOUTR_INIT_EN (0x1 << 3) 184c3275903SKatsuhiro Suzuki #define HPOUTR_MUTE_MASK BIT(2) 185c3275903SKatsuhiro Suzuki #define HPOUTR_MUTE (0x0 << 2) 186c3275903SKatsuhiro Suzuki #define HPOUTR_UNMUTE (0x1 << 2) 187c3275903SKatsuhiro Suzuki 188c3275903SKatsuhiro Suzuki /* REG28: HPOUTL_GAIN_CTRL */ 189c3275903SKatsuhiro Suzuki #define HPOUTL_GAIN_MASK GENMASK(4, 0) 190c3275903SKatsuhiro Suzuki 191c3275903SKatsuhiro Suzuki /* REG29: HPOUTR_GAIN_CTRL */ 192c3275903SKatsuhiro Suzuki #define HPOUTR_GAIN_MASK GENMASK(4, 0) 193c3275903SKatsuhiro Suzuki 194c3275903SKatsuhiro Suzuki /* REG2a: HPOUT_POP_CTRL */ 195c3275903SKatsuhiro Suzuki #define HPOUTR_POP_MASK GENMASK(5, 4) 196c3275903SKatsuhiro Suzuki #define HPOUTR_POP_XCHARGE (0x1 << 4) 197c3275903SKatsuhiro Suzuki #define HPOUTR_POP_WORK (0x2 << 4) 198c3275903SKatsuhiro Suzuki #define HPOUTL_POP_MASK GENMASK(1, 0) 199c3275903SKatsuhiro Suzuki #define HPOUTL_POP_XCHARGE (0x1 << 0) 200c3275903SKatsuhiro Suzuki #define HPOUTL_POP_WORK (0x2 << 0) 201c3275903SKatsuhiro Suzuki 202c3275903SKatsuhiro Suzuki #define RK3328_HIFI 0 203c3275903SKatsuhiro Suzuki 204c3275903SKatsuhiro Suzuki struct rk3328_reg_msk_val { 205c3275903SKatsuhiro Suzuki unsigned int reg; 206c3275903SKatsuhiro Suzuki unsigned int msk; 207c3275903SKatsuhiro Suzuki unsigned int val; 208c3275903SKatsuhiro Suzuki }; 209c3275903SKatsuhiro Suzuki 210c3275903SKatsuhiro Suzuki #endif 211