xref: /openbmc/linux/sound/soc/codecs/pcm512x.h (revision f086ba9d)
1 /*
2  * Driver for the PCM512x CODECs
3  *
4  * Author:	Mark Brown <broonie@linaro.org>
5  *		Copyright 2014 Linaro Ltd
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  */
16 
17 #ifndef _SND_SOC_PCM512X
18 #define _SND_SOC_PCM512X
19 
20 #include <linux/pm.h>
21 #include <linux/regmap.h>
22 
23 #define PCM512x_VIRT_BASE 0x100
24 #define PCM512x_PAGE_LEN  0x100
25 #define PCM512x_PAGE_BASE(n)  (PCM512x_VIRT_BASE + (PCM512x_PAGE_LEN * n))
26 
27 #define PCM512x_PAGE              0
28 
29 #define PCM512x_RESET             (PCM512x_PAGE_BASE(0) +   1)
30 #define PCM512x_POWER             (PCM512x_PAGE_BASE(0) +   2)
31 #define PCM512x_MUTE              (PCM512x_PAGE_BASE(0) +   3)
32 #define PCM512x_PLL_EN            (PCM512x_PAGE_BASE(0) +   4)
33 #define PCM512x_SPI_MISO_FUNCTION (PCM512x_PAGE_BASE(0) +   6)
34 #define PCM512x_DSP               (PCM512x_PAGE_BASE(0) +   7)
35 #define PCM512x_GPIO_EN           (PCM512x_PAGE_BASE(0) +   8)
36 #define PCM512x_BCLK_LRCLK_CFG    (PCM512x_PAGE_BASE(0) +   9)
37 #define PCM512x_DSP_GPIO_INPUT    (PCM512x_PAGE_BASE(0) +  10)
38 #define PCM512x_MASTER_MODE       (PCM512x_PAGE_BASE(0) +  12)
39 #define PCM512x_PLL_REF           (PCM512x_PAGE_BASE(0) +  13)
40 #define PCM512x_DAC_REF           (PCM512x_PAGE_BASE(0) +  14)
41 #define PCM512x_GPIO_PLLIN        (PCM512x_PAGE_BASE(0) +  18)
42 #define PCM512x_SYNCHRONIZE       (PCM512x_PAGE_BASE(0) +  19)
43 #define PCM512x_PLL_COEFF_0       (PCM512x_PAGE_BASE(0) +  20)
44 #define PCM512x_PLL_COEFF_1       (PCM512x_PAGE_BASE(0) +  21)
45 #define PCM512x_PLL_COEFF_2       (PCM512x_PAGE_BASE(0) +  22)
46 #define PCM512x_PLL_COEFF_3       (PCM512x_PAGE_BASE(0) +  23)
47 #define PCM512x_PLL_COEFF_4       (PCM512x_PAGE_BASE(0) +  24)
48 #define PCM512x_DSP_CLKDIV        (PCM512x_PAGE_BASE(0) +  27)
49 #define PCM512x_DAC_CLKDIV        (PCM512x_PAGE_BASE(0) +  28)
50 #define PCM512x_NCP_CLKDIV        (PCM512x_PAGE_BASE(0) +  29)
51 #define PCM512x_OSR_CLKDIV        (PCM512x_PAGE_BASE(0) +  30)
52 #define PCM512x_MASTER_CLKDIV_1   (PCM512x_PAGE_BASE(0) +  32)
53 #define PCM512x_MASTER_CLKDIV_2   (PCM512x_PAGE_BASE(0) +  33)
54 #define PCM512x_FS_SPEED_MODE     (PCM512x_PAGE_BASE(0) +  34)
55 #define PCM512x_IDAC_1            (PCM512x_PAGE_BASE(0) +  35)
56 #define PCM512x_IDAC_2            (PCM512x_PAGE_BASE(0) +  36)
57 #define PCM512x_ERROR_DETECT      (PCM512x_PAGE_BASE(0) +  37)
58 #define PCM512x_I2S_1             (PCM512x_PAGE_BASE(0) +  40)
59 #define PCM512x_I2S_2             (PCM512x_PAGE_BASE(0) +  41)
60 #define PCM512x_DAC_ROUTING       (PCM512x_PAGE_BASE(0) +  42)
61 #define PCM512x_DSP_PROGRAM       (PCM512x_PAGE_BASE(0) +  43)
62 #define PCM512x_CLKDET            (PCM512x_PAGE_BASE(0) +  44)
63 #define PCM512x_AUTO_MUTE         (PCM512x_PAGE_BASE(0) +  59)
64 #define PCM512x_DIGITAL_VOLUME_1  (PCM512x_PAGE_BASE(0) +  60)
65 #define PCM512x_DIGITAL_VOLUME_2  (PCM512x_PAGE_BASE(0) +  61)
66 #define PCM512x_DIGITAL_VOLUME_3  (PCM512x_PAGE_BASE(0) +  62)
67 #define PCM512x_DIGITAL_MUTE_1    (PCM512x_PAGE_BASE(0) +  63)
68 #define PCM512x_DIGITAL_MUTE_2    (PCM512x_PAGE_BASE(0) +  64)
69 #define PCM512x_DIGITAL_MUTE_3    (PCM512x_PAGE_BASE(0) +  65)
70 #define PCM512x_GPIO_OUTPUT_1     (PCM512x_PAGE_BASE(0) +  80)
71 #define PCM512x_GPIO_OUTPUT_2     (PCM512x_PAGE_BASE(0) +  81)
72 #define PCM512x_GPIO_OUTPUT_3     (PCM512x_PAGE_BASE(0) +  82)
73 #define PCM512x_GPIO_OUTPUT_4     (PCM512x_PAGE_BASE(0) +  83)
74 #define PCM512x_GPIO_OUTPUT_5     (PCM512x_PAGE_BASE(0) +  84)
75 #define PCM512x_GPIO_OUTPUT_6     (PCM512x_PAGE_BASE(0) +  85)
76 #define PCM512x_GPIO_CONTROL_1    (PCM512x_PAGE_BASE(0) +  86)
77 #define PCM512x_GPIO_CONTROL_2    (PCM512x_PAGE_BASE(0) +  87)
78 #define PCM512x_OVERFLOW          (PCM512x_PAGE_BASE(0) +  90)
79 #define PCM512x_RATE_DET_1        (PCM512x_PAGE_BASE(0) +  91)
80 #define PCM512x_RATE_DET_2        (PCM512x_PAGE_BASE(0) +  92)
81 #define PCM512x_RATE_DET_3        (PCM512x_PAGE_BASE(0) +  93)
82 #define PCM512x_RATE_DET_4        (PCM512x_PAGE_BASE(0) +  94)
83 #define PCM512x_CLOCK_STATUS      (PCM512x_PAGE_BASE(0) +  95)
84 #define PCM512x_ANALOG_MUTE_DET   (PCM512x_PAGE_BASE(0) + 108)
85 #define PCM512x_GPIN              (PCM512x_PAGE_BASE(0) + 119)
86 #define PCM512x_DIGITAL_MUTE_DET  (PCM512x_PAGE_BASE(0) + 120)
87 
88 #define PCM512x_OUTPUT_AMPLITUDE  (PCM512x_PAGE_BASE(1) +   1)
89 #define PCM512x_ANALOG_GAIN_CTRL  (PCM512x_PAGE_BASE(1) +   2)
90 #define PCM512x_UNDERVOLTAGE_PROT (PCM512x_PAGE_BASE(1) +   5)
91 #define PCM512x_ANALOG_MUTE_CTRL  (PCM512x_PAGE_BASE(1) +   6)
92 #define PCM512x_ANALOG_GAIN_BOOST (PCM512x_PAGE_BASE(1) +   7)
93 #define PCM512x_VCOM_CTRL_1       (PCM512x_PAGE_BASE(1) +   8)
94 #define PCM512x_VCOM_CTRL_2       (PCM512x_PAGE_BASE(1) +   9)
95 
96 #define PCM512x_CRAM_CTRL         (PCM512x_PAGE_BASE(44) +  1)
97 
98 #define PCM512x_FLEX_A            (PCM512x_PAGE_BASE(253) + 63)
99 #define PCM512x_FLEX_B            (PCM512x_PAGE_BASE(253) + 64)
100 
101 #define PCM512x_MAX_REGISTER      (PCM512x_PAGE_BASE(253) + 64)
102 
103 /* Page 0, Register 1 - reset */
104 #define PCM512x_RSTR (1 << 0)
105 #define PCM512x_RSTM (1 << 4)
106 
107 /* Page 0, Register 2 - power */
108 #define PCM512x_RQPD       (1 << 0)
109 #define PCM512x_RQPD_SHIFT 0
110 #define PCM512x_RQST       (1 << 4)
111 #define PCM512x_RQST_SHIFT 4
112 
113 /* Page 0, Register 3 - mute */
114 #define PCM512x_RQMR_SHIFT 0
115 #define PCM512x_RQML_SHIFT 4
116 
117 /* Page 0, Register 4 - PLL */
118 #define PCM512x_PLLE       (1 << 0)
119 #define PCM512x_PLLE_SHIFT 0
120 #define PCM512x_PLCK       (1 << 4)
121 #define PCM512x_PLCK_SHIFT 4
122 
123 /* Page 0, Register 7 - DSP */
124 #define PCM512x_SDSL       (1 << 0)
125 #define PCM512x_SDSL_SHIFT 0
126 #define PCM512x_DEMP       (1 << 4)
127 #define PCM512x_DEMP_SHIFT 4
128 
129 /* Page 0, Register 8 - GPIO output enable */
130 #define PCM512x_G1OE       (1 << 0)
131 #define PCM512x_G2OE       (1 << 1)
132 #define PCM512x_G3OE       (1 << 2)
133 #define PCM512x_G4OE       (1 << 3)
134 #define PCM512x_G5OE       (1 << 4)
135 #define PCM512x_G6OE       (1 << 5)
136 
137 /* Page 0, Register 9 - BCK, LRCLK configuration */
138 #define PCM512x_LRKO       (1 << 0)
139 #define PCM512x_LRKO_SHIFT 0
140 #define PCM512x_BCKO       (1 << 4)
141 #define PCM512x_BCKO_SHIFT 4
142 #define PCM512x_BCKP       (1 << 5)
143 #define PCM512x_BCKP_SHIFT 5
144 
145 /* Page 0, Register 12 - Master mode BCK, LRCLK reset */
146 #define PCM512x_RLRK       (1 << 0)
147 #define PCM512x_RLRK_SHIFT 0
148 #define PCM512x_RBCK       (1 << 1)
149 #define PCM512x_RBCK_SHIFT 1
150 
151 /* Page 0, Register 13 - PLL reference */
152 #define PCM512x_SREF        (7 << 4)
153 #define PCM512x_SREF_SHIFT  4
154 #define PCM512x_SREF_SCK    (0 << 4)
155 #define PCM512x_SREF_BCK    (1 << 4)
156 #define PCM512x_SREF_GPIO   (3 << 4)
157 
158 /* Page 0, Register 14 - DAC reference */
159 #define PCM512x_SDAC        (7 << 4)
160 #define PCM512x_SDAC_SHIFT  4
161 #define PCM512x_SDAC_MCK    (0 << 4)
162 #define PCM512x_SDAC_PLL    (1 << 4)
163 #define PCM512x_SDAC_SCK    (3 << 4)
164 #define PCM512x_SDAC_BCK    (4 << 4)
165 
166 /* Page 0, Register 18 - GPIO source for PLL */
167 #define PCM512x_GREF        (7 << 0)
168 #define PCM512x_GREF_SHIFT  0
169 #define PCM512x_GREF_GPIO1  (0 << 0)
170 #define PCM512x_GREF_GPIO2  (1 << 0)
171 #define PCM512x_GREF_GPIO3  (2 << 0)
172 #define PCM512x_GREF_GPIO4  (3 << 0)
173 #define PCM512x_GREF_GPIO5  (4 << 0)
174 #define PCM512x_GREF_GPIO6  (5 << 0)
175 
176 /* Page 0, Register 19 - synchronize */
177 #define PCM512x_RQSY        (1 << 0)
178 #define PCM512x_RQSY_RESUME (0 << 0)
179 #define PCM512x_RQSY_HALT   (1 << 0)
180 
181 /* Page 0, Register 34 - fs speed mode */
182 #define PCM512x_FSSP        (3 << 0)
183 #define PCM512x_FSSP_SHIFT  0
184 #define PCM512x_FSSP_48KHZ  (0 << 0)
185 #define PCM512x_FSSP_96KHZ  (1 << 0)
186 #define PCM512x_FSSP_192KHZ (2 << 0)
187 #define PCM512x_FSSP_384KHZ (3 << 0)
188 
189 /* Page 0, Register 37 - Error detection */
190 #define PCM512x_IPLK (1 << 0)
191 #define PCM512x_DCAS (1 << 1)
192 #define PCM512x_IDCM (1 << 2)
193 #define PCM512x_IDCH (1 << 3)
194 #define PCM512x_IDSK (1 << 4)
195 #define PCM512x_IDBK (1 << 5)
196 #define PCM512x_IDFS (1 << 6)
197 
198 /* Page 0, Register 40 - I2S configuration */
199 #define PCM512x_ALEN       (3 << 0)
200 #define PCM512x_ALEN_SHIFT 0
201 #define PCM512x_ALEN_16    (0 << 0)
202 #define PCM512x_ALEN_20    (1 << 0)
203 #define PCM512x_ALEN_24    (2 << 0)
204 #define PCM512x_ALEN_32    (3 << 0)
205 #define PCM512x_AFMT       (3 << 4)
206 #define PCM512x_AFMT_SHIFT 4
207 #define PCM512x_AFMT_I2S   (0 << 4)
208 #define PCM512x_AFMT_DSP   (1 << 4)
209 #define PCM512x_AFMT_RTJ   (2 << 4)
210 #define PCM512x_AFMT_LTJ   (3 << 4)
211 
212 /* Page 0, Register 42 - DAC routing */
213 #define PCM512x_AUPR_SHIFT 0
214 #define PCM512x_AUPL_SHIFT 4
215 
216 /* Page 0, Register 59 - auto mute */
217 #define PCM512x_ATMR_SHIFT 0
218 #define PCM512x_ATML_SHIFT 4
219 
220 /* Page 0, Register 63 - ramp rates */
221 #define PCM512x_VNDF_SHIFT 6
222 #define PCM512x_VNDS_SHIFT 4
223 #define PCM512x_VNUF_SHIFT 2
224 #define PCM512x_VNUS_SHIFT 0
225 
226 /* Page 0, Register 64 - emergency ramp rates */
227 #define PCM512x_VEDF_SHIFT 6
228 #define PCM512x_VEDS_SHIFT 4
229 
230 /* Page 0, Register 65 - Digital mute enables */
231 #define PCM512x_ACTL_SHIFT 2
232 #define PCM512x_AMLE_SHIFT 1
233 #define PCM512x_AMRE_SHIFT 0
234 
235 /* Page 0, Register 80-85, GPIO output selection */
236 #define PCM512x_GxSL       (31 << 0)
237 #define PCM512x_GxSL_SHIFT 0
238 #define PCM512x_GxSL_OFF   (0 << 0)
239 #define PCM512x_GxSL_DSP   (1 << 0)
240 #define PCM512x_GxSL_REG   (2 << 0)
241 #define PCM512x_GxSL_AMUTB (3 << 0)
242 #define PCM512x_GxSL_AMUTL (4 << 0)
243 #define PCM512x_GxSL_AMUTR (5 << 0)
244 #define PCM512x_GxSL_CLKI  (6 << 0)
245 #define PCM512x_GxSL_SDOUT (7 << 0)
246 #define PCM512x_GxSL_ANMUL (8 << 0)
247 #define PCM512x_GxSL_ANMUR (9 << 0)
248 #define PCM512x_GxSL_PLLLK (10 << 0)
249 #define PCM512x_GxSL_CPCLK (11 << 0)
250 #define PCM512x_GxSL_UV0_7 (14 << 0)
251 #define PCM512x_GxSL_UV0_3 (15 << 0)
252 #define PCM512x_GxSL_PLLCK (16 << 0)
253 
254 /* Page 1, Register 2 - analog volume control */
255 #define PCM512x_RAGN_SHIFT 0
256 #define PCM512x_LAGN_SHIFT 4
257 
258 /* Page 1, Register 7 - analog boost control */
259 #define PCM512x_AGBR_SHIFT 0
260 #define PCM512x_AGBL_SHIFT 4
261 
262 extern const struct dev_pm_ops pcm512x_pm_ops;
263 extern const struct regmap_config pcm512x_regmap;
264 
265 int pcm512x_probe(struct device *dev, struct regmap *regmap);
266 void pcm512x_remove(struct device *dev);
267 
268 #endif
269