1 /* 2 * Driver for the PCM512x CODECs 3 * 4 * Author: Mark Brown <broonie@linaro.org> 5 * Copyright 2014 Linaro Ltd 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * version 2 as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * General Public License for more details. 15 */ 16 17 #ifndef _SND_SOC_PCM512X 18 #define _SND_SOC_PCM512X 19 20 #define PCM512x_PAGE_0_BASE 0 21 22 #define PCM512x_PAGE 0 23 24 #define PCM512x_RESET (PCM512x_PAGE_0_BASE + 1) 25 #define PCM512x_POWER (PCM512x_PAGE_0_BASE + 2) 26 #define PCM512x_MUTE (PCM512x_PAGE_0_BASE + 3) 27 #define PCM512x_PLL_EN (PCM512x_PAGE_0_BASE + 4) 28 #define PCM512x_SPI_MISO_FUNCTION (PCM512x_PAGE_0_BASE + 6) 29 #define PCM512x_DSP (PCM512x_PAGE_0_BASE + 7) 30 #define PCM512x_GPIO_EN (PCM512x_PAGE_0_BASE + 8) 31 #define PCM512x_BCLK_LRCLK_CFG (PCM512x_PAGE_0_BASE + 9) 32 #define PCM512x_DSP_GPIO_INPUT (PCM512x_PAGE_0_BASE + 10) 33 #define PCM512x_MASTER_MODE (PCM512x_PAGE_0_BASE + 12) 34 #define PCM512x_PLL_REF (PCM512x_PAGE_0_BASE + 13) 35 #define PCM512x_PLL_COEFF_0 (PCM512x_PAGE_0_BASE + 20) 36 #define PCM512x_PLL_COEFF_1 (PCM512x_PAGE_0_BASE + 21) 37 #define PCM512x_PLL_COEFF_2 (PCM512x_PAGE_0_BASE + 22) 38 #define PCM512x_PLL_COEFF_3 (PCM512x_PAGE_0_BASE + 23) 39 #define PCM512x_PLL_COEFF_4 (PCM512x_PAGE_0_BASE + 24) 40 #define PCM512x_DSP_CLKDIV (PCM512x_PAGE_0_BASE + 27) 41 #define PCM512x_DAC_CLKDIV (PCM512x_PAGE_0_BASE + 28) 42 #define PCM512x_NCP_CLKDIV (PCM512x_PAGE_0_BASE + 29) 43 #define PCM512x_OSR_CLKDIV (PCM512x_PAGE_0_BASE + 30) 44 #define PCM512x_MASTER_CLKDIV_1 (PCM512x_PAGE_0_BASE + 32) 45 #define PCM512x_MASTER_CLKDIV_2 (PCM512x_PAGE_0_BASE + 33) 46 #define PCM512x_FS_SPEED_MODE (PCM512x_PAGE_0_BASE + 34) 47 #define PCM512x_IDAC_1 (PCM512x_PAGE_0_BASE + 35) 48 #define PCM512x_IDAC_2 (PCM512x_PAGE_0_BASE + 36) 49 #define PCM512x_ERROR_DETECT (PCM512x_PAGE_0_BASE + 37) 50 #define PCM512x_I2S_1 (PCM512x_PAGE_0_BASE + 40) 51 #define PCM512x_I2S_2 (PCM512x_PAGE_0_BASE + 41) 52 #define PCM512x_DAC_ROUTING (PCM512x_PAGE_0_BASE + 42) 53 #define PCM512x_DSP_PROGRAM (PCM512x_PAGE_0_BASE + 43) 54 #define PCM512x_CLKDET (PCM512x_PAGE_0_BASE + 44) 55 #define PCM512x_AUTO_MUTE (PCM512x_PAGE_0_BASE + 59) 56 #define PCM512x_DIGITAL_VOLUME_1 (PCM512x_PAGE_0_BASE + 60) 57 #define PCM512x_DIGITAL_VOLUME_2 (PCM512x_PAGE_0_BASE + 61) 58 #define PCM512x_DIGITAL_VOLUME_3 (PCM512x_PAGE_0_BASE + 62) 59 #define PCM512x_DIGITAL_MUTE_1 (PCM512x_PAGE_0_BASE + 63) 60 #define PCM512x_DIGITAL_MUTE_2 (PCM512x_PAGE_0_BASE + 64) 61 #define PCM512x_DIGITAL_MUTE_3 (PCM512x_PAGE_0_BASE + 65) 62 #define PCM512x_GPIO_OUTPUT_1 (PCM512x_PAGE_0_BASE + 80) 63 #define PCM512x_GPIO_OUTPUT_2 (PCM512x_PAGE_0_BASE + 81) 64 #define PCM512x_GPIO_OUTPUT_3 (PCM512x_PAGE_0_BASE + 82) 65 #define PCM512x_GPIO_OUTPUT_4 (PCM512x_PAGE_0_BASE + 83) 66 #define PCM512x_GPIO_OUTPUT_5 (PCM512x_PAGE_0_BASE + 84) 67 #define PCM512x_GPIO_OUTPUT_6 (PCM512x_PAGE_0_BASE + 85) 68 #define PCM512x_GPIO_CONTROL_1 (PCM512x_PAGE_0_BASE + 86) 69 #define PCM512x_GPIO_CONTROL_2 (PCM512x_PAGE_0_BASE + 87) 70 #define PCM512x_OVERFLOW (PCM512x_PAGE_0_BASE + 90) 71 #define PCM512x_RATE_DET_1 (PCM512x_PAGE_0_BASE + 91) 72 #define PCM512x_RATE_DET_2 (PCM512x_PAGE_0_BASE + 92) 73 #define PCM512x_RATE_DET_3 (PCM512x_PAGE_0_BASE + 93) 74 #define PCM512x_RATE_DET_4 (PCM512x_PAGE_0_BASE + 94) 75 #define PCM512x_ANALOG_MUTE_DET (PCM512x_PAGE_0_BASE + 108) 76 #define PCM512x_GPIN (PCM512x_PAGE_0_BASE + 119) 77 #define PCM512x_DIGITAL_MUTE_DET (PCM512x_PAGE_0_BASE + 120) 78 79 #define PCM512x_MAX_REGISTER (PCM512x_PAGE_0_BASE + 120) 80 81 /* Page 0, Register 1 - reset */ 82 #define PCM512x_RSTR (1 << 0) 83 #define PCM512x_RSTM (1 << 4) 84 85 /* Page 0, Register 2 - power */ 86 #define PCM512x_RQPD (1 << 0) 87 #define PCM512x_RQPD_SHIFT 0 88 #define PCM512x_RQST (1 << 4) 89 #define PCM512x_RQST_SHIFT 4 90 91 /* Page 0, Register 3 - mute */ 92 #define PCM512x_RQMR_SHIFT 0 93 #define PCM512x_RQML_SHIFT 4 94 95 /* Page 0, Register 4 - PLL */ 96 #define PCM512x_PLCE (1 << 0) 97 #define PCM512x_RLCE_SHIFT 0 98 #define PCM512x_PLCK (1 << 4) 99 #define PCM512x_PLCK_SHIFT 4 100 101 /* Page 0, Register 7 - DSP */ 102 #define PCM512x_SDSL (1 << 0) 103 #define PCM512x_SDSL_SHIFT 0 104 #define PCM512x_DEMP (1 << 4) 105 #define PCM512x_DEMP_SHIFT 4 106 107 /* Page 0, Register 13 - PLL reference */ 108 #define PCM512x_SREF (1 << 4) 109 110 /* Page 0, Register 37 - Error detection */ 111 #define PCM512x_IPLK (1 << 0) 112 #define PCM512x_DCAS (1 << 1) 113 #define PCM512x_IDCM (1 << 2) 114 #define PCM512x_IDCH (1 << 3) 115 #define PCM512x_IDSK (1 << 4) 116 #define PCM512x_IDBK (1 << 5) 117 #define PCM512x_IDFS (1 << 6) 118 119 /* Page 0, Register 42 - DAC routing */ 120 #define PCM512x_AUPR_SHIFT 0 121 #define PCM512x_AUPL_SHIFT 4 122 123 /* Page 0, Register 59 - auto mute */ 124 #define PCM512x_ATMR_SHIFT 0 125 #define PCM512x_ATML_SHIFT 4 126 127 /* Page 0, Register 63 - ramp rates */ 128 #define PCM512x_VNDF_SHIFT 6 129 #define PCM512x_VNDS_SHIFT 4 130 #define PCM512x_VNUF_SHIFT 2 131 #define PCM512x_VNUS_SHIFT 0 132 133 /* Page 0, Register 64 - emergency ramp rates */ 134 #define PCM512x_VEDF_SHIFT 6 135 #define PCM512x_VEDS_SHIFT 4 136 137 /* Page 0, Register 65 - Digital mute enables */ 138 #define PCM512x_ACTL_SHIFT 2 139 #define PCM512x_AMLE_SHIFT 1 140 #define PCM512x_AMLR_SHIFT 0 141 142 #endif 143