1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * PCM3060 codec driver 4 * 5 * Copyright (C) 2018 Kirill Marinushkin <kmarinushkin@birdec.tech> 6 */ 7 8 #ifndef _SND_SOC_PCM3060_H 9 #define _SND_SOC_PCM3060_H 10 11 #include <linux/device.h> 12 #include <linux/regmap.h> 13 14 extern const struct regmap_config pcm3060_regmap; 15 16 #define PCM3060_DAI_ID_DAC 0 17 #define PCM3060_DAI_ID_ADC 1 18 #define PCM3060_DAI_IDS_NUM 2 19 20 struct pcm3060_priv_dai { 21 bool is_master; 22 unsigned int sclk_freq; 23 }; 24 25 struct pcm3060_priv { 26 struct regmap *regmap; 27 struct pcm3060_priv_dai dai[PCM3060_DAI_IDS_NUM]; 28 u8 out_se: 1; 29 }; 30 31 int pcm3060_probe(struct device *dev); 32 int pcm3060_remove(struct device *dev); 33 34 /* registers */ 35 36 #define PCM3060_REG64 0x40 37 #define PCM3060_REG_MRST 0x80 38 #define PCM3060_REG_SRST 0x40 39 #define PCM3060_REG_ADPSV 0x20 40 #define PCM3060_REG_SHIFT_ADPSV 0x05 41 #define PCM3060_REG_DAPSV 0x10 42 #define PCM3060_REG_SHIFT_DAPSV 0x04 43 #define PCM3060_REG_SE 0x01 44 45 #define PCM3060_REG65 0x41 46 #define PCM3060_REG66 0x42 47 #define PCM3060_REG_AT2_MIN 0x36 48 #define PCM3060_REG_AT2_MAX 0xFF 49 50 #define PCM3060_REG67 0x43 51 #define PCM3060_REG72 0x48 52 #define PCM3060_REG_CSEL 0x80 53 #define PCM3060_REG_MASK_MS 0x70 54 #define PCM3060_REG_MS_S 0x00 55 #define PCM3060_REG_MS_M768 (0x01 << 4) 56 #define PCM3060_REG_MS_M512 (0x02 << 4) 57 #define PCM3060_REG_MS_M384 (0x03 << 4) 58 #define PCM3060_REG_MS_M256 (0x04 << 4) 59 #define PCM3060_REG_MS_M192 (0x05 << 4) 60 #define PCM3060_REG_MS_M128 (0x06 << 4) 61 #define PCM3060_REG_MASK_FMT 0x03 62 #define PCM3060_REG_FMT_I2S 0x00 63 #define PCM3060_REG_FMT_LJ 0x01 64 #define PCM3060_REG_FMT_RJ 0x02 65 66 #define PCM3060_REG68 0x44 67 #define PCM3060_REG_OVER 0x40 68 #define PCM3060_REG_DREV2 0x04 69 #define PCM3060_REG_SHIFT_MUT21 0x00 70 #define PCM3060_REG_SHIFT_MUT22 0x01 71 72 #define PCM3060_REG69 0x45 73 #define PCM3060_REG_FLT 0x80 74 #define PCM3060_REG_MASK_DMF 0x60 75 #define PCM3060_REG_DMC 0x10 76 #define PCM3060_REG_ZREV 0x02 77 #define PCM3060_REG_AZRO 0x01 78 79 #define PCM3060_REG70 0x46 80 #define PCM3060_REG71 0x47 81 #define PCM3060_REG_AT1_MIN 0x0E 82 #define PCM3060_REG_AT1_MAX 0xFF 83 84 #define PCM3060_REG73 0x49 85 #define PCM3060_REG_ZCDD 0x10 86 #define PCM3060_REG_BYP 0x08 87 #define PCM3060_REG_DREV1 0x04 88 #define PCM3060_REG_SHIFT_MUT11 0x00 89 #define PCM3060_REG_SHIFT_MUT12 0x01 90 91 #endif /* _SND_SOC_PCM3060_H */ 92