1180cad3cSRyan Lee // SPDX-License-Identifier: GPL-2.0 2180cad3cSRyan Lee // Copyright (c) 2017, Maxim Integrated 32f3d24a1SRyan Lee 42f3d24a1SRyan Lee #include <linux/acpi.h> 53004136bSGrant Grundler #include <linux/delay.h> 62f3d24a1SRyan Lee #include <linux/i2c.h> 72f3d24a1SRyan Lee #include <linux/module.h> 8*011e397fSPierre-Louis Bossart #include <linux/pm_runtime.h> 92f3d24a1SRyan Lee #include <linux/regmap.h> 102f3d24a1SRyan Lee #include <linux/slab.h> 112f3d24a1SRyan Lee #include <linux/cdev.h> 122f3d24a1SRyan Lee #include <sound/pcm.h> 132f3d24a1SRyan Lee #include <sound/pcm_params.h> 142f3d24a1SRyan Lee #include <sound/soc.h> 152f3d24a1SRyan Lee #include <linux/gpio.h> 1696cd3b97Sfengchunguo #include <linux/of.h> 172f3d24a1SRyan Lee #include <linux/of_gpio.h> 182f3d24a1SRyan Lee #include <sound/tlv.h> 192f3d24a1SRyan Lee #include "max98373.h" 202f3d24a1SRyan Lee 212f3d24a1SRyan Lee static int max98373_dac_event(struct snd_soc_dapm_widget *w, 222f3d24a1SRyan Lee struct snd_kcontrol *kcontrol, int event) 232f3d24a1SRyan Lee { 2441572b54SKuninori Morimoto struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 2541572b54SKuninori Morimoto struct max98373_priv *max98373 = snd_soc_component_get_drvdata(component); 262f3d24a1SRyan Lee 272f3d24a1SRyan Lee switch (event) { 282f3d24a1SRyan Lee case SND_SOC_DAPM_POST_PMU: 292f3d24a1SRyan Lee regmap_update_bits(max98373->regmap, 302f3d24a1SRyan Lee MAX98373_R20FF_GLOBAL_SHDN, 312f3d24a1SRyan Lee MAX98373_GLOBAL_EN_MASK, 1); 323a27875eSRyan Lee usleep_range(30000, 31000); 332f3d24a1SRyan Lee break; 342f3d24a1SRyan Lee case SND_SOC_DAPM_POST_PMD: 352f3d24a1SRyan Lee regmap_update_bits(max98373->regmap, 362f3d24a1SRyan Lee MAX98373_R20FF_GLOBAL_SHDN, 372f3d24a1SRyan Lee MAX98373_GLOBAL_EN_MASK, 0); 383a27875eSRyan Lee usleep_range(30000, 31000); 397c3727baSPierre-Louis Bossart max98373->tdm_mode = false; 402f3d24a1SRyan Lee break; 412f3d24a1SRyan Lee default: 422f3d24a1SRyan Lee return 0; 432f3d24a1SRyan Lee } 442f3d24a1SRyan Lee return 0; 452f3d24a1SRyan Lee } 462f3d24a1SRyan Lee 472f3d24a1SRyan Lee static const char * const max98373_switch_text[] = { 482f3d24a1SRyan Lee "Left", "Right", "LeftRight"}; 492f3d24a1SRyan Lee 502f3d24a1SRyan Lee static const struct soc_enum dai_sel_enum = 512f3d24a1SRyan Lee SOC_ENUM_SINGLE(MAX98373_R2029_PCM_TO_SPK_MONO_MIX_1, 522f3d24a1SRyan Lee MAX98373_PCM_TO_SPK_MONOMIX_CFG_SHIFT, 532f3d24a1SRyan Lee 3, max98373_switch_text); 542f3d24a1SRyan Lee 552f3d24a1SRyan Lee static const struct snd_kcontrol_new max98373_dai_controls = 562f3d24a1SRyan Lee SOC_DAPM_ENUM("DAI Sel", dai_sel_enum); 572f3d24a1SRyan Lee 582f3d24a1SRyan Lee static const struct snd_kcontrol_new max98373_vi_control = 592f3d24a1SRyan Lee SOC_DAPM_SINGLE("Switch", MAX98373_R202C_PCM_TX_EN, 0, 1, 0); 602f3d24a1SRyan Lee 612f3d24a1SRyan Lee static const struct snd_kcontrol_new max98373_spkfb_control = 622f3d24a1SRyan Lee SOC_DAPM_SINGLE("Switch", MAX98373_R2043_AMP_EN, 1, 1, 0); 632f3d24a1SRyan Lee 642f3d24a1SRyan Lee static const struct snd_soc_dapm_widget max98373_dapm_widgets[] = { 652f3d24a1SRyan Lee SND_SOC_DAPM_DAC_E("Amp Enable", "HiFi Playback", 662f3d24a1SRyan Lee MAX98373_R202B_PCM_RX_EN, 0, 0, max98373_dac_event, 672f3d24a1SRyan Lee SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), 682f3d24a1SRyan Lee SND_SOC_DAPM_MUX("DAI Sel Mux", SND_SOC_NOPM, 0, 0, 692f3d24a1SRyan Lee &max98373_dai_controls), 702f3d24a1SRyan Lee SND_SOC_DAPM_OUTPUT("BE_OUT"), 712f3d24a1SRyan Lee SND_SOC_DAPM_AIF_OUT("Voltage Sense", "HiFi Capture", 0, 722f3d24a1SRyan Lee MAX98373_R2047_IV_SENSE_ADC_EN, 0, 0), 732f3d24a1SRyan Lee SND_SOC_DAPM_AIF_OUT("Current Sense", "HiFi Capture", 0, 742f3d24a1SRyan Lee MAX98373_R2047_IV_SENSE_ADC_EN, 1, 0), 752f3d24a1SRyan Lee SND_SOC_DAPM_AIF_OUT("Speaker FB Sense", "HiFi Capture", 0, 762f3d24a1SRyan Lee SND_SOC_NOPM, 0, 0), 772f3d24a1SRyan Lee SND_SOC_DAPM_SWITCH("VI Sense", SND_SOC_NOPM, 0, 0, 782f3d24a1SRyan Lee &max98373_vi_control), 792f3d24a1SRyan Lee SND_SOC_DAPM_SWITCH("SpkFB Sense", SND_SOC_NOPM, 0, 0, 802f3d24a1SRyan Lee &max98373_spkfb_control), 812f3d24a1SRyan Lee SND_SOC_DAPM_SIGGEN("VMON"), 822f3d24a1SRyan Lee SND_SOC_DAPM_SIGGEN("IMON"), 832f3d24a1SRyan Lee SND_SOC_DAPM_SIGGEN("FBMON"), 842f3d24a1SRyan Lee }; 852f3d24a1SRyan Lee 864cbbc916SRyan Lee static DECLARE_TLV_DB_SCALE(max98373_digital_tlv, -6350, 50, 1); 872f3d24a1SRyan Lee static const DECLARE_TLV_DB_RANGE(max98373_spk_tlv, 882f3d24a1SRyan Lee 0, 8, TLV_DB_SCALE_ITEM(0, 50, 0), 892f3d24a1SRyan Lee 9, 10, TLV_DB_SCALE_ITEM(500, 100, 0), 902f3d24a1SRyan Lee ); 912f3d24a1SRyan Lee static const DECLARE_TLV_DB_RANGE(max98373_spkgain_max_tlv, 922f3d24a1SRyan Lee 0, 9, TLV_DB_SCALE_ITEM(800, 100, 0), 932f3d24a1SRyan Lee ); 942f3d24a1SRyan Lee static const DECLARE_TLV_DB_RANGE(max98373_dht_step_size_tlv, 952f3d24a1SRyan Lee 0, 1, TLV_DB_SCALE_ITEM(25, 25, 0), 962f3d24a1SRyan Lee 2, 4, TLV_DB_SCALE_ITEM(100, 100, 0), 972f3d24a1SRyan Lee ); 982f3d24a1SRyan Lee static const DECLARE_TLV_DB_RANGE(max98373_dht_spkgain_min_tlv, 992f3d24a1SRyan Lee 0, 9, TLV_DB_SCALE_ITEM(800, 100, 0), 1002f3d24a1SRyan Lee ); 1012f3d24a1SRyan Lee static const DECLARE_TLV_DB_RANGE(max98373_dht_rotation_point_tlv, 102a23f5dc8SRyan Lee 0, 1, TLV_DB_SCALE_ITEM(-3000, 500, 0), 103a23f5dc8SRyan Lee 2, 4, TLV_DB_SCALE_ITEM(-2200, 200, 0), 104a23f5dc8SRyan Lee 5, 6, TLV_DB_SCALE_ITEM(-1500, 300, 0), 105a23f5dc8SRyan Lee 7, 9, TLV_DB_SCALE_ITEM(-1000, 200, 0), 106a23f5dc8SRyan Lee 10, 13, TLV_DB_SCALE_ITEM(-500, 100, 0), 107a23f5dc8SRyan Lee 14, 15, TLV_DB_SCALE_ITEM(-100, 50, 0), 1082f3d24a1SRyan Lee ); 1092f3d24a1SRyan Lee static const DECLARE_TLV_DB_RANGE(max98373_limiter_thresh_tlv, 1106c3beecaSRyan Lee 0, 15, TLV_DB_SCALE_ITEM(-1500, 100, 0), 1112f3d24a1SRyan Lee ); 1122f3d24a1SRyan Lee 1132f3d24a1SRyan Lee static const DECLARE_TLV_DB_RANGE(max98373_bde_gain_tlv, 114d34c8f37SRyan Lee 0, 60, TLV_DB_SCALE_ITEM(-1500, 25, 0), 1152f3d24a1SRyan Lee ); 1162f3d24a1SRyan Lee 1172f3d24a1SRyan Lee static const char * const max98373_output_voltage_lvl_text[] = { 1182f3d24a1SRyan Lee "5.43V", "6.09V", "6.83V", "7.67V", "8.60V", 1192f3d24a1SRyan Lee "9.65V", "10.83V", "12.15V", "13.63V", "15.29V" 1202f3d24a1SRyan Lee }; 1212f3d24a1SRyan Lee 1222f3d24a1SRyan Lee static SOC_ENUM_SINGLE_DECL(max98373_out_volt_enum, 1232f3d24a1SRyan Lee MAX98373_R203E_AMP_PATH_GAIN, 0, 1242f3d24a1SRyan Lee max98373_output_voltage_lvl_text); 1252f3d24a1SRyan Lee 1262f3d24a1SRyan Lee static const char * const max98373_dht_attack_rate_text[] = { 1272f3d24a1SRyan Lee "17.5us", "35us", "70us", "140us", 1282f3d24a1SRyan Lee "280us", "560us", "1120us", "2240us" 1292f3d24a1SRyan Lee }; 1302f3d24a1SRyan Lee 1312f3d24a1SRyan Lee static SOC_ENUM_SINGLE_DECL(max98373_dht_attack_rate_enum, 1322f3d24a1SRyan Lee MAX98373_R20D2_DHT_ATTACK_CFG, 0, 1332f3d24a1SRyan Lee max98373_dht_attack_rate_text); 1342f3d24a1SRyan Lee 1352f3d24a1SRyan Lee static const char * const max98373_dht_release_rate_text[] = { 1362f3d24a1SRyan Lee "45ms", "225ms", "450ms", "1150ms", 1372f3d24a1SRyan Lee "2250ms", "3100ms", "4500ms", "6750ms" 1382f3d24a1SRyan Lee }; 1392f3d24a1SRyan Lee 1402f3d24a1SRyan Lee static SOC_ENUM_SINGLE_DECL(max98373_dht_release_rate_enum, 1412f3d24a1SRyan Lee MAX98373_R20D3_DHT_RELEASE_CFG, 0, 1422f3d24a1SRyan Lee max98373_dht_release_rate_text); 1432f3d24a1SRyan Lee 1442f3d24a1SRyan Lee static const char * const max98373_limiter_attack_rate_text[] = { 1452f3d24a1SRyan Lee "10us", "20us", "40us", "80us", 1462f3d24a1SRyan Lee "160us", "320us", "640us", "1.28ms", 1472f3d24a1SRyan Lee "2.56ms", "5.12ms", "10.24ms", "20.48ms", 1482f3d24a1SRyan Lee "40.96ms", "81.92ms", "16.384ms", "32.768ms" 1492f3d24a1SRyan Lee }; 1502f3d24a1SRyan Lee 1512f3d24a1SRyan Lee static SOC_ENUM_SINGLE_DECL(max98373_limiter_attack_rate_enum, 1522f3d24a1SRyan Lee MAX98373_R20E1_LIMITER_ATK_REL_RATES, 4, 1532f3d24a1SRyan Lee max98373_limiter_attack_rate_text); 1542f3d24a1SRyan Lee 1552f3d24a1SRyan Lee static const char * const max98373_limiter_release_rate_text[] = { 1562f3d24a1SRyan Lee "40us", "80us", "160us", "320us", 1572f3d24a1SRyan Lee "640us", "1.28ms", "2.56ms", "5.120ms", 1582f3d24a1SRyan Lee "10.24ms", "20.48ms", "40.96ms", "81.92ms", 1592f3d24a1SRyan Lee "163.84ms", "327.68ms", "655.36ms", "1310.72ms" 1602f3d24a1SRyan Lee }; 1612f3d24a1SRyan Lee 1622f3d24a1SRyan Lee static SOC_ENUM_SINGLE_DECL(max98373_limiter_release_rate_enum, 1632f3d24a1SRyan Lee MAX98373_R20E1_LIMITER_ATK_REL_RATES, 0, 1642f3d24a1SRyan Lee max98373_limiter_release_rate_text); 1652f3d24a1SRyan Lee 1662f3d24a1SRyan Lee static const char * const max98373_ADC_samplerate_text[] = { 1672f3d24a1SRyan Lee "333kHz", "192kHz", "64kHz", "48kHz" 1682f3d24a1SRyan Lee }; 1692f3d24a1SRyan Lee 1702f3d24a1SRyan Lee static SOC_ENUM_SINGLE_DECL(max98373_adc_samplerate_enum, 1712f3d24a1SRyan Lee MAX98373_R2051_MEAS_ADC_SAMPLING_RATE, 0, 1722f3d24a1SRyan Lee max98373_ADC_samplerate_text); 1732f3d24a1SRyan Lee 174349dd239SBard Liao static int max98373_feedback_get(struct snd_kcontrol *kcontrol, 175349dd239SBard Liao struct snd_ctl_elem_value *ucontrol) 176349dd239SBard Liao { 177349dd239SBard Liao struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 178349dd239SBard Liao struct soc_mixer_control *mc = 179349dd239SBard Liao (struct soc_mixer_control *)kcontrol->private_value; 180349dd239SBard Liao struct max98373_priv *max98373 = snd_soc_component_get_drvdata(component); 181349dd239SBard Liao int i; 182349dd239SBard Liao 183349dd239SBard Liao if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { 184349dd239SBard Liao /* 185349dd239SBard Liao * Register values will be cached before suspend. The cached value 186349dd239SBard Liao * will be a valid value and userspace will happy with that. 187349dd239SBard Liao */ 188349dd239SBard Liao for (i = 0; i < max98373->cache_num; i++) { 189349dd239SBard Liao if (mc->reg == max98373->cache[i].reg) { 190349dd239SBard Liao ucontrol->value.integer.value[0] = max98373->cache[i].val; 191349dd239SBard Liao return 0; 192349dd239SBard Liao } 193349dd239SBard Liao } 194349dd239SBard Liao } 195349dd239SBard Liao 196ded055eeSJudy Hsiao return snd_soc_get_volsw(kcontrol, ucontrol); 197349dd239SBard Liao } 198349dd239SBard Liao 1992f3d24a1SRyan Lee static const struct snd_kcontrol_new max98373_snd_controls[] = { 2002f3d24a1SRyan Lee SOC_SINGLE("Digital Vol Sel Switch", MAX98373_R203F_AMP_DSP_CFG, 2012f3d24a1SRyan Lee MAX98373_AMP_VOL_SEL_SHIFT, 1, 0), 2022f3d24a1SRyan Lee SOC_SINGLE("Volume Location Switch", MAX98373_R203F_AMP_DSP_CFG, 2032f3d24a1SRyan Lee MAX98373_AMP_VOL_SEL_SHIFT, 1, 0), 2042f3d24a1SRyan Lee SOC_SINGLE("Ramp Up Switch", MAX98373_R203F_AMP_DSP_CFG, 2052f3d24a1SRyan Lee MAX98373_AMP_DSP_CFG_RMP_UP_SHIFT, 1, 0), 2062f3d24a1SRyan Lee SOC_SINGLE("Ramp Down Switch", MAX98373_R203F_AMP_DSP_CFG, 2072f3d24a1SRyan Lee MAX98373_AMP_DSP_CFG_RMP_DN_SHIFT, 1, 0), 2087a0d8849SRyan Lee /* Speaker Amplifier Overcurrent Automatic Restart Enable */ 2097a0d8849SRyan Lee SOC_SINGLE("OVC Autorestart Switch", MAX98373_R20FE_DEVICE_AUTO_RESTART_CFG, 2107a0d8849SRyan Lee MAX98373_OVC_AUTORESTART_SHIFT, 1, 0), 2117a0d8849SRyan Lee /* Thermal Shutdown Automatic Restart Enable */ 2127a0d8849SRyan Lee SOC_SINGLE("THERM Autorestart Switch", MAX98373_R20FE_DEVICE_AUTO_RESTART_CFG, 2137a0d8849SRyan Lee MAX98373_THERM_AUTORESTART_SHIFT, 1, 0), 2147a0d8849SRyan Lee /* Clock Monitor Automatic Restart Enable */ 2157a0d8849SRyan Lee SOC_SINGLE("CMON Autorestart Switch", MAX98373_R20FE_DEVICE_AUTO_RESTART_CFG, 2167a0d8849SRyan Lee MAX98373_CMON_AUTORESTART_SHIFT, 1, 0), 2172f3d24a1SRyan Lee SOC_SINGLE("CLK Monitor Switch", MAX98373_R20FE_DEVICE_AUTO_RESTART_CFG, 2182f3d24a1SRyan Lee MAX98373_CLOCK_MON_SHIFT, 1, 0), 2192f3d24a1SRyan Lee SOC_SINGLE("Dither Switch", MAX98373_R203F_AMP_DSP_CFG, 2202f3d24a1SRyan Lee MAX98373_AMP_DSP_CFG_DITH_SHIFT, 1, 0), 2212f3d24a1SRyan Lee SOC_SINGLE("DC Blocker Switch", MAX98373_R203F_AMP_DSP_CFG, 2222f3d24a1SRyan Lee MAX98373_AMP_DSP_CFG_DCBLK_SHIFT, 1, 0), 2232f3d24a1SRyan Lee SOC_SINGLE_TLV("Digital Volume", MAX98373_R203D_AMP_DIG_VOL_CTRL, 2244cbbc916SRyan Lee 0, 0x7F, 1, max98373_digital_tlv), 2252f3d24a1SRyan Lee SOC_SINGLE_TLV("Speaker Volume", MAX98373_R203E_AMP_PATH_GAIN, 2262f3d24a1SRyan Lee MAX98373_SPK_DIGI_GAIN_SHIFT, 10, 0, max98373_spk_tlv), 2272f3d24a1SRyan Lee SOC_SINGLE_TLV("FS Max Volume", MAX98373_R203E_AMP_PATH_GAIN, 2282f3d24a1SRyan Lee MAX98373_FS_GAIN_MAX_SHIFT, 9, 0, max98373_spkgain_max_tlv), 2292f3d24a1SRyan Lee SOC_ENUM("Output Voltage", max98373_out_volt_enum), 2302f3d24a1SRyan Lee /* Dynamic Headroom Tracking */ 2312f3d24a1SRyan Lee SOC_SINGLE("DHT Switch", MAX98373_R20D4_DHT_EN, 2322f3d24a1SRyan Lee MAX98373_DHT_EN_SHIFT, 1, 0), 233b6158323SRyan Lee SOC_SINGLE_TLV("DHT Min Volume", MAX98373_R20D1_DHT_CFG, 2342f3d24a1SRyan Lee MAX98373_DHT_SPK_GAIN_MIN_SHIFT, 9, 0, max98373_dht_spkgain_min_tlv), 235b6158323SRyan Lee SOC_SINGLE_TLV("DHT Rot Pnt Volume", MAX98373_R20D1_DHT_CFG, 236a23f5dc8SRyan Lee MAX98373_DHT_ROT_PNT_SHIFT, 15, 1, max98373_dht_rotation_point_tlv), 237b6158323SRyan Lee SOC_SINGLE_TLV("DHT Attack Step Volume", MAX98373_R20D2_DHT_ATTACK_CFG, 2382f3d24a1SRyan Lee MAX98373_DHT_ATTACK_STEP_SHIFT, 4, 0, max98373_dht_step_size_tlv), 239b6158323SRyan Lee SOC_SINGLE_TLV("DHT Release Step Volume", MAX98373_R20D3_DHT_RELEASE_CFG, 2402f3d24a1SRyan Lee MAX98373_DHT_RELEASE_STEP_SHIFT, 4, 0, max98373_dht_step_size_tlv), 2412f3d24a1SRyan Lee SOC_ENUM("DHT Attack Rate", max98373_dht_attack_rate_enum), 2422f3d24a1SRyan Lee SOC_ENUM("DHT Release Rate", max98373_dht_release_rate_enum), 2432f3d24a1SRyan Lee /* ADC configuration */ 2442f3d24a1SRyan Lee SOC_SINGLE("ADC PVDD CH Switch", MAX98373_R2056_MEAS_ADC_PVDD_CH_EN, 0, 1, 0), 2452f3d24a1SRyan Lee SOC_SINGLE("ADC PVDD FLT Switch", MAX98373_R2052_MEAS_ADC_PVDD_FLT_CFG, 2462f3d24a1SRyan Lee MAX98373_FLT_EN_SHIFT, 1, 0), 2472f3d24a1SRyan Lee SOC_SINGLE("ADC TEMP FLT Switch", MAX98373_R2053_MEAS_ADC_THERM_FLT_CFG, 2482f3d24a1SRyan Lee MAX98373_FLT_EN_SHIFT, 1, 0), 249349dd239SBard Liao SOC_SINGLE_EXT("ADC PVDD", MAX98373_R2054_MEAS_ADC_PVDD_CH_READBACK, 0, 0xFF, 0, 250349dd239SBard Liao max98373_feedback_get, NULL), 251349dd239SBard Liao SOC_SINGLE_EXT("ADC TEMP", MAX98373_R2055_MEAS_ADC_THERM_CH_READBACK, 0, 0xFF, 0, 252349dd239SBard Liao max98373_feedback_get, NULL), 2532f3d24a1SRyan Lee SOC_SINGLE("ADC PVDD FLT Coeff", MAX98373_R2052_MEAS_ADC_PVDD_FLT_CFG, 2542f3d24a1SRyan Lee 0, 0x3, 0), 2552f3d24a1SRyan Lee SOC_SINGLE("ADC TEMP FLT Coeff", MAX98373_R2053_MEAS_ADC_THERM_FLT_CFG, 2562f3d24a1SRyan Lee 0, 0x3, 0), 2572f3d24a1SRyan Lee SOC_ENUM("ADC SampleRate", max98373_adc_samplerate_enum), 2582f3d24a1SRyan Lee /* Brownout Detection Engine */ 2592f3d24a1SRyan Lee SOC_SINGLE("BDE Switch", MAX98373_R20B5_BDE_EN, MAX98373_BDE_EN_SHIFT, 1, 0), 2602f3d24a1SRyan Lee SOC_SINGLE("BDE LVL4 Mute Switch", MAX98373_R20B2_BDE_L4_CFG_2, 2612f3d24a1SRyan Lee MAX98373_LVL4_MUTE_EN_SHIFT, 1, 0), 2622f3d24a1SRyan Lee SOC_SINGLE("BDE LVL4 Hold Switch", MAX98373_R20B2_BDE_L4_CFG_2, 2632f3d24a1SRyan Lee MAX98373_LVL4_HOLD_EN_SHIFT, 1, 0), 2642f3d24a1SRyan Lee SOC_SINGLE("BDE LVL1 Thresh", MAX98373_R2097_BDE_L1_THRESH, 0, 0xFF, 0), 2652f3d24a1SRyan Lee SOC_SINGLE("BDE LVL2 Thresh", MAX98373_R2098_BDE_L2_THRESH, 0, 0xFF, 0), 2662f3d24a1SRyan Lee SOC_SINGLE("BDE LVL3 Thresh", MAX98373_R2099_BDE_L3_THRESH, 0, 0xFF, 0), 2672f3d24a1SRyan Lee SOC_SINGLE("BDE LVL4 Thresh", MAX98373_R209A_BDE_L4_THRESH, 0, 0xFF, 0), 268349dd239SBard Liao SOC_SINGLE_EXT("BDE Active Level", MAX98373_R20B6_BDE_CUR_STATE_READBACK, 0, 8, 0, 269349dd239SBard Liao max98373_feedback_get, NULL), 2702f3d24a1SRyan Lee SOC_SINGLE("BDE Clip Mode Switch", MAX98373_R2092_BDE_CLIPPER_MODE, 0, 1, 0), 2712f3d24a1SRyan Lee SOC_SINGLE("BDE Thresh Hysteresis", MAX98373_R209B_BDE_THRESH_HYST, 0, 0xFF, 0), 2722f3d24a1SRyan Lee SOC_SINGLE("BDE Hold Time", MAX98373_R2090_BDE_LVL_HOLD, 0, 0xFF, 0), 2732f3d24a1SRyan Lee SOC_SINGLE("BDE Attack Rate", MAX98373_R2091_BDE_GAIN_ATK_REL_RATE, 4, 0xF, 0), 2742f3d24a1SRyan Lee SOC_SINGLE("BDE Release Rate", MAX98373_R2091_BDE_GAIN_ATK_REL_RATE, 0, 0xF, 0), 275b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL1 Clip Thresh Volume", MAX98373_R20A9_BDE_L1_CFG_2, 276d34c8f37SRyan Lee 0, 0x3C, 1, max98373_bde_gain_tlv), 277b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL2 Clip Thresh Volume", MAX98373_R20AC_BDE_L2_CFG_2, 278d34c8f37SRyan Lee 0, 0x3C, 1, max98373_bde_gain_tlv), 279b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL3 Clip Thresh Volume", MAX98373_R20AF_BDE_L3_CFG_2, 280d34c8f37SRyan Lee 0, 0x3C, 1, max98373_bde_gain_tlv), 281b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL4 Clip Thresh Volume", MAX98373_R20B2_BDE_L4_CFG_2, 282d34c8f37SRyan Lee 0, 0x3C, 1, max98373_bde_gain_tlv), 283b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL1 Clip Reduction Volume", MAX98373_R20AA_BDE_L1_CFG_3, 284d34c8f37SRyan Lee 0, 0x3C, 1, max98373_bde_gain_tlv), 285b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL2 Clip Reduction Volume", MAX98373_R20AD_BDE_L2_CFG_3, 286d34c8f37SRyan Lee 0, 0x3C, 1, max98373_bde_gain_tlv), 287b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL3 Clip Reduction Volume", MAX98373_R20B0_BDE_L3_CFG_3, 288d34c8f37SRyan Lee 0, 0x3C, 1, max98373_bde_gain_tlv), 289b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL4 Clip Reduction Volume", MAX98373_R20B3_BDE_L4_CFG_3, 290d34c8f37SRyan Lee 0, 0x3C, 1, max98373_bde_gain_tlv), 291b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL1 Limiter Thresh Volume", MAX98373_R20A8_BDE_L1_CFG_1, 2926c3beecaSRyan Lee 0, 0xF, 1, max98373_limiter_thresh_tlv), 293b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL2 Limiter Thresh Volume", MAX98373_R20AB_BDE_L2_CFG_1, 2946c3beecaSRyan Lee 0, 0xF, 1, max98373_limiter_thresh_tlv), 295b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL3 Limiter Thresh Volume", MAX98373_R20AE_BDE_L3_CFG_1, 2966c3beecaSRyan Lee 0, 0xF, 1, max98373_limiter_thresh_tlv), 297b6158323SRyan Lee SOC_SINGLE_TLV("BDE LVL4 Limiter Thresh Volume", MAX98373_R20B1_BDE_L4_CFG_1, 2986c3beecaSRyan Lee 0, 0xF, 1, max98373_limiter_thresh_tlv), 2992f3d24a1SRyan Lee /* Limiter */ 3002f3d24a1SRyan Lee SOC_SINGLE("Limiter Switch", MAX98373_R20E2_LIMITER_EN, 3012f3d24a1SRyan Lee MAX98373_LIMITER_EN_SHIFT, 1, 0), 3022f3d24a1SRyan Lee SOC_SINGLE("Limiter Src Switch", MAX98373_R20E0_LIMITER_THRESH_CFG, 3032f3d24a1SRyan Lee MAX98373_LIMITER_THRESH_SRC_SHIFT, 1, 0), 304b6158323SRyan Lee SOC_SINGLE_TLV("Limiter Thresh Volume", MAX98373_R20E0_LIMITER_THRESH_CFG, 3052f3d24a1SRyan Lee MAX98373_LIMITER_THRESH_SHIFT, 15, 0, max98373_limiter_thresh_tlv), 3062f3d24a1SRyan Lee SOC_ENUM("Limiter Attack Rate", max98373_limiter_attack_rate_enum), 3072f3d24a1SRyan Lee SOC_ENUM("Limiter Release Rate", max98373_limiter_release_rate_enum), 3082f3d24a1SRyan Lee }; 3092f3d24a1SRyan Lee 3102f3d24a1SRyan Lee static const struct snd_soc_dapm_route max98373_audio_map[] = { 3112f3d24a1SRyan Lee /* Plabyack */ 3122f3d24a1SRyan Lee {"DAI Sel Mux", "Left", "Amp Enable"}, 3132f3d24a1SRyan Lee {"DAI Sel Mux", "Right", "Amp Enable"}, 3142f3d24a1SRyan Lee {"DAI Sel Mux", "LeftRight", "Amp Enable"}, 3152f3d24a1SRyan Lee {"BE_OUT", NULL, "DAI Sel Mux"}, 3162f3d24a1SRyan Lee /* Capture */ 3172f3d24a1SRyan Lee { "VI Sense", "Switch", "VMON" }, 3182f3d24a1SRyan Lee { "VI Sense", "Switch", "IMON" }, 3192f3d24a1SRyan Lee { "SpkFB Sense", "Switch", "FBMON" }, 3202f3d24a1SRyan Lee { "Voltage Sense", NULL, "VI Sense" }, 3212f3d24a1SRyan Lee { "Current Sense", NULL, "VI Sense" }, 3222f3d24a1SRyan Lee { "Speaker FB Sense", NULL, "SpkFB Sense" }, 3232f3d24a1SRyan Lee }; 3242f3d24a1SRyan Lee 325d7ee0c72SPierre-Louis Bossart void max98373_reset(struct max98373_priv *max98373, struct device *dev) 32620f2ab24SRyan Lee { 32720f2ab24SRyan Lee int ret, reg, count; 32820f2ab24SRyan Lee 32920f2ab24SRyan Lee /* Software Reset */ 33020f2ab24SRyan Lee ret = regmap_update_bits(max98373->regmap, 33120f2ab24SRyan Lee MAX98373_R2000_SW_RESET, 33220f2ab24SRyan Lee MAX98373_SOFT_RESET, 33320f2ab24SRyan Lee MAX98373_SOFT_RESET); 33420f2ab24SRyan Lee if (ret) 33520f2ab24SRyan Lee dev_err(dev, "Reset command failed. (ret:%d)\n", ret); 33620f2ab24SRyan Lee 33720f2ab24SRyan Lee count = 0; 33820f2ab24SRyan Lee while (count < 3) { 33920f2ab24SRyan Lee usleep_range(10000, 11000); 34020f2ab24SRyan Lee /* Software Reset Verification */ 34120f2ab24SRyan Lee ret = regmap_read(max98373->regmap, 34220f2ab24SRyan Lee MAX98373_R21FF_REV_ID, ®); 34320f2ab24SRyan Lee if (!ret) { 34420f2ab24SRyan Lee dev_info(dev, "Reset completed (retry:%d)\n", count); 34520f2ab24SRyan Lee return; 34620f2ab24SRyan Lee } 34720f2ab24SRyan Lee count++; 34820f2ab24SRyan Lee } 34920f2ab24SRyan Lee dev_err(dev, "Reset failed. (ret:%d)\n", ret); 35020f2ab24SRyan Lee } 351d7ee0c72SPierre-Louis Bossart EXPORT_SYMBOL_GPL(max98373_reset); 35220f2ab24SRyan Lee 35341572b54SKuninori Morimoto static int max98373_probe(struct snd_soc_component *component) 3542f3d24a1SRyan Lee { 35541572b54SKuninori Morimoto struct max98373_priv *max98373 = snd_soc_component_get_drvdata(component); 3562f3d24a1SRyan Lee 3572f3d24a1SRyan Lee /* Software Reset */ 35820f2ab24SRyan Lee max98373_reset(max98373, component->dev); 3592f3d24a1SRyan Lee 3602f3d24a1SRyan Lee /* IV default slot configuration */ 3612f3d24a1SRyan Lee regmap_write(max98373->regmap, 3622f3d24a1SRyan Lee MAX98373_R2020_PCM_TX_HIZ_EN_1, 3632f3d24a1SRyan Lee 0xFF); 3642f3d24a1SRyan Lee regmap_write(max98373->regmap, 3652f3d24a1SRyan Lee MAX98373_R2021_PCM_TX_HIZ_EN_2, 3662f3d24a1SRyan Lee 0xFF); 3672f3d24a1SRyan Lee /* L/R mix configuration */ 3682f3d24a1SRyan Lee regmap_write(max98373->regmap, 3692f3d24a1SRyan Lee MAX98373_R2029_PCM_TO_SPK_MONO_MIX_1, 3702f3d24a1SRyan Lee 0x80); 3712f3d24a1SRyan Lee regmap_write(max98373->regmap, 3722f3d24a1SRyan Lee MAX98373_R202A_PCM_TO_SPK_MONO_MIX_2, 3732f3d24a1SRyan Lee 0x1); 3742f3d24a1SRyan Lee /* Enable DC blocker */ 3752f3d24a1SRyan Lee regmap_write(max98373->regmap, 3762f3d24a1SRyan Lee MAX98373_R203F_AMP_DSP_CFG, 3772f3d24a1SRyan Lee 0x3); 3782f3d24a1SRyan Lee /* Enable IMON VMON DC blocker */ 3792f3d24a1SRyan Lee regmap_write(max98373->regmap, 3802f3d24a1SRyan Lee MAX98373_R2046_IV_SENSE_ADC_DSP_CFG, 3812f3d24a1SRyan Lee 0x7); 3822f3d24a1SRyan Lee /* voltage, current slot configuration */ 3832f3d24a1SRyan Lee regmap_write(max98373->regmap, 3842f3d24a1SRyan Lee MAX98373_R2022_PCM_TX_SRC_1, 3852f3d24a1SRyan Lee (max98373->i_slot << MAX98373_PCM_TX_CH_SRC_A_I_SHIFT | 3862f3d24a1SRyan Lee max98373->v_slot) & 0xFF); 3872f3d24a1SRyan Lee if (max98373->v_slot < 8) 3882f3d24a1SRyan Lee regmap_update_bits(max98373->regmap, 3892f3d24a1SRyan Lee MAX98373_R2020_PCM_TX_HIZ_EN_1, 3902f3d24a1SRyan Lee 1 << max98373->v_slot, 0); 3912f3d24a1SRyan Lee else 3922f3d24a1SRyan Lee regmap_update_bits(max98373->regmap, 3932f3d24a1SRyan Lee MAX98373_R2021_PCM_TX_HIZ_EN_2, 3942f3d24a1SRyan Lee 1 << (max98373->v_slot - 8), 0); 3952f3d24a1SRyan Lee 3962f3d24a1SRyan Lee if (max98373->i_slot < 8) 3972f3d24a1SRyan Lee regmap_update_bits(max98373->regmap, 3982f3d24a1SRyan Lee MAX98373_R2020_PCM_TX_HIZ_EN_1, 3992f3d24a1SRyan Lee 1 << max98373->i_slot, 0); 4002f3d24a1SRyan Lee else 4012f3d24a1SRyan Lee regmap_update_bits(max98373->regmap, 4022f3d24a1SRyan Lee MAX98373_R2021_PCM_TX_HIZ_EN_2, 4032f3d24a1SRyan Lee 1 << (max98373->i_slot - 8), 0); 4042f3d24a1SRyan Lee 4057a0d8849SRyan Lee /* enable auto restart function by default */ 4067a0d8849SRyan Lee regmap_write(max98373->regmap, 4077a0d8849SRyan Lee MAX98373_R20FE_DEVICE_AUTO_RESTART_CFG, 4087a0d8849SRyan Lee 0xF); 4097a0d8849SRyan Lee 4102f3d24a1SRyan Lee /* speaker feedback slot configuration */ 4112f3d24a1SRyan Lee regmap_write(max98373->regmap, 4122f3d24a1SRyan Lee MAX98373_R2023_PCM_TX_SRC_2, 4132f3d24a1SRyan Lee max98373->spkfb_slot & 0xFF); 4142f3d24a1SRyan Lee 4152f3d24a1SRyan Lee /* Set interleave mode */ 4162f3d24a1SRyan Lee if (max98373->interleave_mode) 4172f3d24a1SRyan Lee regmap_update_bits(max98373->regmap, 4182f3d24a1SRyan Lee MAX98373_R2024_PCM_DATA_FMT_CFG, 4192f3d24a1SRyan Lee MAX98373_PCM_TX_CH_INTERLEAVE_MASK, 4202f3d24a1SRyan Lee MAX98373_PCM_TX_CH_INTERLEAVE_MASK); 4212f3d24a1SRyan Lee 4222f3d24a1SRyan Lee /* Speaker enable */ 4232f3d24a1SRyan Lee regmap_update_bits(max98373->regmap, 4242f3d24a1SRyan Lee MAX98373_R2043_AMP_EN, 4252f3d24a1SRyan Lee MAX98373_SPK_EN_MASK, 1); 4262f3d24a1SRyan Lee 4272f3d24a1SRyan Lee return 0; 4282f3d24a1SRyan Lee } 4292f3d24a1SRyan Lee 430d7ee0c72SPierre-Louis Bossart const struct snd_soc_component_driver soc_codec_dev_max98373 = { 4312f3d24a1SRyan Lee .probe = max98373_probe, 4322f3d24a1SRyan Lee .controls = max98373_snd_controls, 4332f3d24a1SRyan Lee .num_controls = ARRAY_SIZE(max98373_snd_controls), 4342f3d24a1SRyan Lee .dapm_widgets = max98373_dapm_widgets, 4352f3d24a1SRyan Lee .num_dapm_widgets = ARRAY_SIZE(max98373_dapm_widgets), 4362f3d24a1SRyan Lee .dapm_routes = max98373_audio_map, 4372f3d24a1SRyan Lee .num_dapm_routes = ARRAY_SIZE(max98373_audio_map), 43841572b54SKuninori Morimoto .use_pmdown_time = 1, 43941572b54SKuninori Morimoto .endianness = 1, 44041572b54SKuninori Morimoto .non_legacy_dai_naming = 1, 4412f3d24a1SRyan Lee }; 442d7ee0c72SPierre-Louis Bossart EXPORT_SYMBOL_GPL(soc_codec_dev_max98373); 4432f3d24a1SRyan Lee 444*011e397fSPierre-Louis Bossart static int max98373_sdw_probe(struct snd_soc_component *component) 445*011e397fSPierre-Louis Bossart { 446*011e397fSPierre-Louis Bossart int ret; 447*011e397fSPierre-Louis Bossart 448*011e397fSPierre-Louis Bossart ret = pm_runtime_resume(component->dev); 449*011e397fSPierre-Louis Bossart if (ret < 0 && ret != -EACCES) 450*011e397fSPierre-Louis Bossart return ret; 451*011e397fSPierre-Louis Bossart 452*011e397fSPierre-Louis Bossart return 0; 453*011e397fSPierre-Louis Bossart } 454*011e397fSPierre-Louis Bossart 45556a5b791SRyan Lee const struct snd_soc_component_driver soc_codec_dev_max98373_sdw = { 456*011e397fSPierre-Louis Bossart .probe = max98373_sdw_probe, 45756a5b791SRyan Lee .controls = max98373_snd_controls, 45856a5b791SRyan Lee .num_controls = ARRAY_SIZE(max98373_snd_controls), 45956a5b791SRyan Lee .dapm_widgets = max98373_dapm_widgets, 46056a5b791SRyan Lee .num_dapm_widgets = ARRAY_SIZE(max98373_dapm_widgets), 46156a5b791SRyan Lee .dapm_routes = max98373_audio_map, 46256a5b791SRyan Lee .num_dapm_routes = ARRAY_SIZE(max98373_audio_map), 46356a5b791SRyan Lee .use_pmdown_time = 1, 46456a5b791SRyan Lee .endianness = 1, 46556a5b791SRyan Lee .non_legacy_dai_naming = 1, 46656a5b791SRyan Lee }; 46756a5b791SRyan Lee EXPORT_SYMBOL_GPL(soc_codec_dev_max98373_sdw); 46856a5b791SRyan Lee 469d7ee0c72SPierre-Louis Bossart void max98373_slot_config(struct device *dev, 4702f3d24a1SRyan Lee struct max98373_priv *max98373) 4712f3d24a1SRyan Lee { 4722f3d24a1SRyan Lee int value; 4732f3d24a1SRyan Lee 4742f3d24a1SRyan Lee if (!device_property_read_u32(dev, "maxim,vmon-slot-no", &value)) 4752f3d24a1SRyan Lee max98373->v_slot = value & 0xF; 4762f3d24a1SRyan Lee else 4772f3d24a1SRyan Lee max98373->v_slot = 0; 4782f3d24a1SRyan Lee 4792f3d24a1SRyan Lee if (!device_property_read_u32(dev, "maxim,imon-slot-no", &value)) 4802f3d24a1SRyan Lee max98373->i_slot = value & 0xF; 4812f3d24a1SRyan Lee else 4822f3d24a1SRyan Lee max98373->i_slot = 1; 4834bb41984SSathyanarayana Nujella if (dev->of_node) { 48496cd3b97Sfengchunguo max98373->reset_gpio = of_get_named_gpio(dev->of_node, 48596cd3b97Sfengchunguo "maxim,reset-gpio", 0); 48696cd3b97Sfengchunguo if (!gpio_is_valid(max98373->reset_gpio)) { 48796cd3b97Sfengchunguo dev_err(dev, "Looking up %s property in node %s failed %d\n", 48896cd3b97Sfengchunguo "maxim,reset-gpio", dev->of_node->full_name, 48996cd3b97Sfengchunguo max98373->reset_gpio); 49096cd3b97Sfengchunguo } else { 49196cd3b97Sfengchunguo dev_dbg(dev, "maxim,reset-gpio=%d", 49296cd3b97Sfengchunguo max98373->reset_gpio); 49396cd3b97Sfengchunguo } 4944bb41984SSathyanarayana Nujella } else { 4954bb41984SSathyanarayana Nujella /* this makes reset_gpio as invalid */ 4964bb41984SSathyanarayana Nujella max98373->reset_gpio = -1; 4974bb41984SSathyanarayana Nujella } 49896cd3b97Sfengchunguo 4992f3d24a1SRyan Lee if (!device_property_read_u32(dev, "maxim,spkfb-slot-no", &value)) 5002f3d24a1SRyan Lee max98373->spkfb_slot = value & 0xF; 5012f3d24a1SRyan Lee else 5022f3d24a1SRyan Lee max98373->spkfb_slot = 2; 5032f3d24a1SRyan Lee } 504d7ee0c72SPierre-Louis Bossart EXPORT_SYMBOL_GPL(max98373_slot_config); 5052f3d24a1SRyan Lee 5062f3d24a1SRyan Lee MODULE_DESCRIPTION("ALSA SoC MAX98373 driver"); 5072f3d24a1SRyan Lee MODULE_AUTHOR("Ryan Lee <ryans.lee@maximintegrated.com>"); 5082f3d24a1SRyan Lee MODULE_LICENSE("GPL"); 509