1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * max98371.c -- ALSA SoC Stereo MAX98371 driver 4 * 5 * Copyright 2015-16 Maxim Integrated Products 6 */ 7 8 #include <linux/i2c.h> 9 #include <linux/module.h> 10 #include <linux/regmap.h> 11 #include <linux/slab.h> 12 #include <sound/pcm.h> 13 #include <sound/pcm_params.h> 14 #include <sound/soc.h> 15 #include <sound/tlv.h> 16 #include "max98371.h" 17 18 static const char *const monomix_text[] = { 19 "Left", "Right", "LeftRightDiv2", 20 }; 21 22 static const char *const hpf_cutoff_txt[] = { 23 "Disable", "DC Block", "50Hz", 24 "100Hz", "200Hz", "400Hz", "800Hz", 25 }; 26 27 static SOC_ENUM_SINGLE_DECL(max98371_monomix, MAX98371_MONOMIX_CFG, 0, 28 monomix_text); 29 30 static SOC_ENUM_SINGLE_DECL(max98371_hpf_cutoff, MAX98371_HPF, 0, 31 hpf_cutoff_txt); 32 33 static const DECLARE_TLV_DB_RANGE(max98371_dht_min_gain, 34 0, 1, TLV_DB_SCALE_ITEM(537, 66, 0), 35 2, 3, TLV_DB_SCALE_ITEM(677, 82, 0), 36 4, 5, TLV_DB_SCALE_ITEM(852, 104, 0), 37 6, 7, TLV_DB_SCALE_ITEM(1072, 131, 0), 38 8, 9, TLV_DB_SCALE_ITEM(1350, 165, 0), 39 10, 11, TLV_DB_SCALE_ITEM(1699, 101, 0), 40 ); 41 42 static const DECLARE_TLV_DB_RANGE(max98371_dht_max_gain, 43 0, 1, TLV_DB_SCALE_ITEM(537, 66, 0), 44 2, 3, TLV_DB_SCALE_ITEM(677, 82, 0), 45 4, 5, TLV_DB_SCALE_ITEM(852, 104, 0), 46 6, 7, TLV_DB_SCALE_ITEM(1072, 131, 0), 47 8, 9, TLV_DB_SCALE_ITEM(1350, 165, 0), 48 10, 11, TLV_DB_SCALE_ITEM(1699, 208, 0), 49 ); 50 51 static const DECLARE_TLV_DB_RANGE(max98371_dht_rot_gain, 52 0, 1, TLV_DB_SCALE_ITEM(-50, -50, 0), 53 2, 6, TLV_DB_SCALE_ITEM(-100, -100, 0), 54 7, 8, TLV_DB_SCALE_ITEM(-800, -200, 0), 55 9, 11, TLV_DB_SCALE_ITEM(-1200, -300, 0), 56 12, 13, TLV_DB_SCALE_ITEM(-2000, -200, 0), 57 14, 15, TLV_DB_SCALE_ITEM(-2500, -500, 0), 58 ); 59 60 static const struct reg_default max98371_reg[] = { 61 { 0x01, 0x00 }, 62 { 0x02, 0x00 }, 63 { 0x03, 0x00 }, 64 { 0x04, 0x00 }, 65 { 0x05, 0x00 }, 66 { 0x06, 0x00 }, 67 { 0x07, 0x00 }, 68 { 0x08, 0x00 }, 69 { 0x09, 0x00 }, 70 { 0x0A, 0x00 }, 71 { 0x10, 0x06 }, 72 { 0x11, 0x08 }, 73 { 0x14, 0x80 }, 74 { 0x15, 0x00 }, 75 { 0x16, 0x00 }, 76 { 0x18, 0x00 }, 77 { 0x19, 0x00 }, 78 { 0x1C, 0x00 }, 79 { 0x1D, 0x00 }, 80 { 0x1E, 0x00 }, 81 { 0x1F, 0x00 }, 82 { 0x20, 0x00 }, 83 { 0x21, 0x00 }, 84 { 0x22, 0x00 }, 85 { 0x23, 0x00 }, 86 { 0x24, 0x00 }, 87 { 0x25, 0x00 }, 88 { 0x26, 0x00 }, 89 { 0x27, 0x00 }, 90 { 0x28, 0x00 }, 91 { 0x29, 0x00 }, 92 { 0x2A, 0x00 }, 93 { 0x2B, 0x00 }, 94 { 0x2C, 0x00 }, 95 { 0x2D, 0x00 }, 96 { 0x2E, 0x0B }, 97 { 0x31, 0x00 }, 98 { 0x32, 0x18 }, 99 { 0x33, 0x00 }, 100 { 0x34, 0x00 }, 101 { 0x36, 0x00 }, 102 { 0x37, 0x00 }, 103 { 0x38, 0x00 }, 104 { 0x39, 0x00 }, 105 { 0x3A, 0x00 }, 106 { 0x3B, 0x00 }, 107 { 0x3C, 0x00 }, 108 { 0x3D, 0x00 }, 109 { 0x3E, 0x00 }, 110 { 0x3F, 0x00 }, 111 { 0x40, 0x00 }, 112 { 0x41, 0x00 }, 113 { 0x42, 0x00 }, 114 { 0x43, 0x00 }, 115 { 0x4A, 0x00 }, 116 { 0x4B, 0x00 }, 117 { 0x4C, 0x00 }, 118 { 0x4D, 0x00 }, 119 { 0x4E, 0x00 }, 120 { 0x50, 0x00 }, 121 { 0x51, 0x00 }, 122 { 0x55, 0x00 }, 123 { 0x58, 0x00 }, 124 { 0x59, 0x00 }, 125 { 0x5C, 0x00 }, 126 { 0xFF, 0x43 }, 127 }; 128 129 static bool max98371_volatile_register(struct device *dev, unsigned int reg) 130 { 131 switch (reg) { 132 case MAX98371_IRQ_CLEAR1: 133 case MAX98371_IRQ_CLEAR2: 134 case MAX98371_IRQ_CLEAR3: 135 case MAX98371_VERSION: 136 return true; 137 default: 138 return false; 139 } 140 } 141 142 static bool max98371_readable_register(struct device *dev, unsigned int reg) 143 { 144 switch (reg) { 145 case MAX98371_SOFT_RESET: 146 return false; 147 default: 148 return true; 149 } 150 }; 151 152 static const DECLARE_TLV_DB_RANGE(max98371_gain_tlv, 153 0, 7, TLV_DB_SCALE_ITEM(0, 50, 0), 154 8, 10, TLV_DB_SCALE_ITEM(400, 100, 0) 155 ); 156 157 static const DECLARE_TLV_DB_RANGE(max98371_noload_gain_tlv, 158 0, 11, TLV_DB_SCALE_ITEM(950, 100, 0), 159 ); 160 161 static const DECLARE_TLV_DB_SCALE(digital_tlv, -6300, 50, 1); 162 163 static const struct snd_kcontrol_new max98371_snd_controls[] = { 164 SOC_SINGLE_TLV("Speaker Volume", MAX98371_GAIN, 165 MAX98371_GAIN_SHIFT, (1<<MAX98371_GAIN_WIDTH)-1, 0, 166 max98371_gain_tlv), 167 SOC_SINGLE_TLV("Digital Volume", MAX98371_DIGITAL_GAIN, 0, 168 (1<<MAX98371_DIGITAL_GAIN_WIDTH)-1, 1, digital_tlv), 169 SOC_SINGLE_TLV("Speaker DHT Max Volume", MAX98371_GAIN, 170 0, (1<<MAX98371_DHT_MAX_WIDTH)-1, 0, 171 max98371_dht_max_gain), 172 SOC_SINGLE_TLV("Speaker DHT Min Volume", MAX98371_DHT_GAIN, 173 0, (1<<MAX98371_DHT_GAIN_WIDTH)-1, 0, 174 max98371_dht_min_gain), 175 SOC_SINGLE_TLV("Speaker DHT Rotation Volume", MAX98371_DHT_GAIN, 176 0, (1<<MAX98371_DHT_ROT_WIDTH)-1, 0, 177 max98371_dht_rot_gain), 178 SOC_SINGLE("DHT Attack Step", MAX98371_DHT, MAX98371_DHT_STEP, 3, 0), 179 SOC_SINGLE("DHT Attack Rate", MAX98371_DHT, 0, 7, 0), 180 SOC_ENUM("Monomix Select", max98371_monomix), 181 SOC_ENUM("HPF Cutoff", max98371_hpf_cutoff), 182 }; 183 184 static int max98371_dai_set_fmt(struct snd_soc_dai *codec_dai, 185 unsigned int fmt) 186 { 187 struct snd_soc_component *component = codec_dai->component; 188 struct max98371_priv *max98371 = snd_soc_component_get_drvdata(component); 189 unsigned int val = 0; 190 191 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 192 case SND_SOC_DAIFMT_CBS_CFS: 193 break; 194 default: 195 dev_err(component->dev, "DAI clock mode unsupported"); 196 return -EINVAL; 197 } 198 199 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 200 case SND_SOC_DAIFMT_I2S: 201 val |= 0; 202 break; 203 case SND_SOC_DAIFMT_RIGHT_J: 204 val |= MAX98371_DAI_RIGHT; 205 break; 206 case SND_SOC_DAIFMT_LEFT_J: 207 val |= MAX98371_DAI_LEFT; 208 break; 209 default: 210 dev_err(component->dev, "DAI wrong mode unsupported"); 211 return -EINVAL; 212 } 213 regmap_update_bits(max98371->regmap, MAX98371_FMT, 214 MAX98371_FMT_MODE_MASK, val); 215 return 0; 216 } 217 218 static int max98371_dai_hw_params(struct snd_pcm_substream *substream, 219 struct snd_pcm_hw_params *params, 220 struct snd_soc_dai *dai) 221 { 222 struct snd_soc_component *component = dai->component; 223 struct max98371_priv *max98371 = snd_soc_component_get_drvdata(component); 224 int blr_clk_ratio, ch_size, channels = params_channels(params); 225 int rate = params_rate(params); 226 227 switch (params_format(params)) { 228 case SNDRV_PCM_FORMAT_S8: 229 regmap_update_bits(max98371->regmap, MAX98371_FMT, 230 MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_16); 231 ch_size = 8; 232 break; 233 case SNDRV_PCM_FORMAT_S16_LE: 234 regmap_update_bits(max98371->regmap, MAX98371_FMT, 235 MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_16); 236 ch_size = 16; 237 break; 238 case SNDRV_PCM_FORMAT_S24_LE: 239 regmap_update_bits(max98371->regmap, MAX98371_FMT, 240 MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_32); 241 ch_size = 24; 242 break; 243 case SNDRV_PCM_FORMAT_S32_LE: 244 regmap_update_bits(max98371->regmap, MAX98371_FMT, 245 MAX98371_FMT_MASK, MAX98371_DAI_CHANSZ_32); 246 ch_size = 32; 247 break; 248 default: 249 return -EINVAL; 250 } 251 252 /* BCLK/LRCLK ratio calculation */ 253 blr_clk_ratio = channels * ch_size; 254 switch (blr_clk_ratio) { 255 case 32: 256 regmap_update_bits(max98371->regmap, 257 MAX98371_DAI_CLK, 258 MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_32); 259 break; 260 case 48: 261 regmap_update_bits(max98371->regmap, 262 MAX98371_DAI_CLK, 263 MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_48); 264 break; 265 case 64: 266 regmap_update_bits(max98371->regmap, 267 MAX98371_DAI_CLK, 268 MAX98371_DAI_BSEL_MASK, MAX98371_DAI_BSEL_64); 269 break; 270 default: 271 return -EINVAL; 272 } 273 274 switch (rate) { 275 case 32000: 276 regmap_update_bits(max98371->regmap, 277 MAX98371_SPK_SR, 278 MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_32); 279 break; 280 case 44100: 281 regmap_update_bits(max98371->regmap, 282 MAX98371_SPK_SR, 283 MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_44); 284 break; 285 case 48000: 286 regmap_update_bits(max98371->regmap, 287 MAX98371_SPK_SR, 288 MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_48); 289 break; 290 case 88200: 291 regmap_update_bits(max98371->regmap, 292 MAX98371_SPK_SR, 293 MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_88); 294 break; 295 case 96000: 296 regmap_update_bits(max98371->regmap, 297 MAX98371_SPK_SR, 298 MAX98371_SPK_SR_MASK, MAX98371_SPK_SR_96); 299 break; 300 default: 301 return -EINVAL; 302 } 303 304 /* enabling both the RX channels*/ 305 regmap_update_bits(max98371->regmap, MAX98371_MONOMIX_SRC, 306 MAX98371_MONOMIX_SRC_MASK, MONOMIX_RX_0_1); 307 regmap_update_bits(max98371->regmap, MAX98371_DAI_CHANNEL, 308 MAX98371_CHANNEL_MASK, MAX98371_CHANNEL_MASK); 309 return 0; 310 } 311 312 static const struct snd_soc_dapm_widget max98371_dapm_widgets[] = { 313 SND_SOC_DAPM_DAC("DAC", NULL, MAX98371_SPK_ENABLE, 0, 0), 314 SND_SOC_DAPM_SUPPLY("Global Enable", MAX98371_GLOBAL_ENABLE, 315 0, 0, NULL, 0), 316 SND_SOC_DAPM_OUTPUT("SPK_OUT"), 317 }; 318 319 static const struct snd_soc_dapm_route max98371_audio_map[] = { 320 {"DAC", NULL, "HiFi Playback"}, 321 {"SPK_OUT", NULL, "DAC"}, 322 {"SPK_OUT", NULL, "Global Enable"}, 323 }; 324 325 #define MAX98371_RATES SNDRV_PCM_RATE_8000_48000 326 #define MAX98371_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \ 327 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE) 328 329 static const struct snd_soc_dai_ops max98371_dai_ops = { 330 .set_fmt = max98371_dai_set_fmt, 331 .hw_params = max98371_dai_hw_params, 332 }; 333 334 static struct snd_soc_dai_driver max98371_dai[] = { 335 { 336 .name = "max98371-aif1", 337 .playback = { 338 .stream_name = "HiFi Playback", 339 .channels_min = 1, 340 .channels_max = 2, 341 .rates = SNDRV_PCM_RATE_8000_48000, 342 .formats = MAX98371_FORMATS, 343 }, 344 .ops = &max98371_dai_ops, 345 } 346 }; 347 348 static const struct snd_soc_component_driver max98371_component = { 349 .controls = max98371_snd_controls, 350 .num_controls = ARRAY_SIZE(max98371_snd_controls), 351 .dapm_routes = max98371_audio_map, 352 .num_dapm_routes = ARRAY_SIZE(max98371_audio_map), 353 .dapm_widgets = max98371_dapm_widgets, 354 .num_dapm_widgets = ARRAY_SIZE(max98371_dapm_widgets), 355 .idle_bias_on = 1, 356 .use_pmdown_time = 1, 357 .endianness = 1, 358 .non_legacy_dai_naming = 1, 359 }; 360 361 static const struct regmap_config max98371_regmap = { 362 .reg_bits = 8, 363 .val_bits = 8, 364 .max_register = MAX98371_VERSION, 365 .reg_defaults = max98371_reg, 366 .num_reg_defaults = ARRAY_SIZE(max98371_reg), 367 .volatile_reg = max98371_volatile_register, 368 .readable_reg = max98371_readable_register, 369 .cache_type = REGCACHE_RBTREE, 370 }; 371 372 static int max98371_i2c_probe(struct i2c_client *i2c, 373 const struct i2c_device_id *id) 374 { 375 struct max98371_priv *max98371; 376 int ret, reg; 377 378 max98371 = devm_kzalloc(&i2c->dev, 379 sizeof(*max98371), GFP_KERNEL); 380 if (!max98371) 381 return -ENOMEM; 382 383 i2c_set_clientdata(i2c, max98371); 384 max98371->regmap = devm_regmap_init_i2c(i2c, &max98371_regmap); 385 if (IS_ERR(max98371->regmap)) { 386 ret = PTR_ERR(max98371->regmap); 387 dev_err(&i2c->dev, 388 "Failed to allocate regmap: %d\n", ret); 389 return ret; 390 } 391 392 ret = regmap_read(max98371->regmap, MAX98371_VERSION, ®); 393 if (ret < 0) { 394 dev_info(&i2c->dev, "device error %d\n", ret); 395 return ret; 396 } 397 dev_info(&i2c->dev, "device version %x\n", reg); 398 399 ret = devm_snd_soc_register_component(&i2c->dev, &max98371_component, 400 max98371_dai, ARRAY_SIZE(max98371_dai)); 401 if (ret < 0) { 402 dev_err(&i2c->dev, "Failed to register component: %d\n", ret); 403 return ret; 404 } 405 return ret; 406 } 407 408 static const struct i2c_device_id max98371_i2c_id[] = { 409 { "max98371", 0 }, 410 { } 411 }; 412 413 MODULE_DEVICE_TABLE(i2c, max98371_i2c_id); 414 415 static const struct of_device_id max98371_of_match[] = { 416 { .compatible = "maxim,max98371", }, 417 { } 418 }; 419 MODULE_DEVICE_TABLE(of, max98371_of_match); 420 421 static struct i2c_driver max98371_i2c_driver = { 422 .driver = { 423 .name = "max98371", 424 .pm = NULL, 425 .of_match_table = of_match_ptr(max98371_of_match), 426 }, 427 .probe = max98371_i2c_probe, 428 .id_table = max98371_i2c_id, 429 }; 430 431 module_i2c_driver(max98371_i2c_driver); 432 433 MODULE_AUTHOR("anish kumar <yesanishhere@gmail.com>"); 434 MODULE_DESCRIPTION("ALSA SoC MAX98371 driver"); 435 MODULE_LICENSE("GPL"); 436