1 /* 2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * You should have received a copy of the GNU General Public License along 9 * with this program; if not, write to the Free Software Foundation, Inc., 10 * 675 Mass Ave, Cambridge, MA 02139, USA. 11 * 12 */ 13 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/platform_device.h> 17 #include <linux/slab.h> 18 19 #include <linux/delay.h> 20 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/initval.h> 25 #include <sound/soc-dapm.h> 26 #include <sound/soc.h> 27 28 #define JZ4740_REG_CODEC_1 0x0 29 #define JZ4740_REG_CODEC_2 0x1 30 31 #define JZ4740_CODEC_1_LINE_ENABLE BIT(29) 32 #define JZ4740_CODEC_1_MIC_ENABLE BIT(28) 33 #define JZ4740_CODEC_1_SW1_ENABLE BIT(27) 34 #define JZ4740_CODEC_1_ADC_ENABLE BIT(26) 35 #define JZ4740_CODEC_1_SW2_ENABLE BIT(25) 36 #define JZ4740_CODEC_1_DAC_ENABLE BIT(24) 37 #define JZ4740_CODEC_1_VREF_DISABLE BIT(20) 38 #define JZ4740_CODEC_1_VREF_AMP_DISABLE BIT(19) 39 #define JZ4740_CODEC_1_VREF_PULLDOWN BIT(18) 40 #define JZ4740_CODEC_1_VREF_LOW_CURRENT BIT(17) 41 #define JZ4740_CODEC_1_VREF_HIGH_CURRENT BIT(16) 42 #define JZ4740_CODEC_1_HEADPHONE_DISABLE BIT(14) 43 #define JZ4740_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13) 44 #define JZ4740_CODEC_1_HEADPHONE_CHARGE BIT(12) 45 #define JZ4740_CODEC_1_HEADPHONE_PULLDOWN (BIT(11) | BIT(10)) 46 #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M BIT(9) 47 #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN BIT(8) 48 #define JZ4740_CODEC_1_SUSPEND BIT(1) 49 #define JZ4740_CODEC_1_RESET BIT(0) 50 51 #define JZ4740_CODEC_1_LINE_ENABLE_OFFSET 29 52 #define JZ4740_CODEC_1_MIC_ENABLE_OFFSET 28 53 #define JZ4740_CODEC_1_SW1_ENABLE_OFFSET 27 54 #define JZ4740_CODEC_1_ADC_ENABLE_OFFSET 26 55 #define JZ4740_CODEC_1_SW2_ENABLE_OFFSET 25 56 #define JZ4740_CODEC_1_DAC_ENABLE_OFFSET 24 57 #define JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET 14 58 #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET 8 59 60 #define JZ4740_CODEC_2_INPUT_VOLUME_MASK 0x1f0000 61 #define JZ4740_CODEC_2_SAMPLE_RATE_MASK 0x000f00 62 #define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK 0x000030 63 #define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK 0x000003 64 65 #define JZ4740_CODEC_2_INPUT_VOLUME_OFFSET 16 66 #define JZ4740_CODEC_2_SAMPLE_RATE_OFFSET 8 67 #define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4 68 #define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0 69 70 static const uint32_t jz4740_codec_regs[] = { 71 0x021b2302, 0x00170803, 72 }; 73 74 struct jz4740_codec { 75 void __iomem *base; 76 struct resource *mem; 77 }; 78 79 static unsigned int jz4740_codec_read(struct snd_soc_codec *codec, 80 unsigned int reg) 81 { 82 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec); 83 return readl(jz4740_codec->base + (reg << 2)); 84 } 85 86 static int jz4740_codec_write(struct snd_soc_codec *codec, unsigned int reg, 87 unsigned int val) 88 { 89 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec); 90 u32 *cache = codec->reg_cache; 91 92 cache[reg] = val; 93 writel(val, jz4740_codec->base + (reg << 2)); 94 95 return 0; 96 } 97 98 static const struct snd_kcontrol_new jz4740_codec_controls[] = { 99 SOC_SINGLE("Master Playback Volume", JZ4740_REG_CODEC_2, 100 JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0), 101 SOC_SINGLE("Master Capture Volume", JZ4740_REG_CODEC_2, 102 JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0), 103 SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1, 104 JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1), 105 SOC_SINGLE("Mic Capture Volume", JZ4740_REG_CODEC_2, 106 JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0), 107 }; 108 109 static const struct snd_kcontrol_new jz4740_codec_output_controls[] = { 110 SOC_DAPM_SINGLE("Bypass Switch", JZ4740_REG_CODEC_1, 111 JZ4740_CODEC_1_SW1_ENABLE_OFFSET, 1, 0), 112 SOC_DAPM_SINGLE("DAC Switch", JZ4740_REG_CODEC_1, 113 JZ4740_CODEC_1_SW2_ENABLE_OFFSET, 1, 0), 114 }; 115 116 static const struct snd_kcontrol_new jz4740_codec_input_controls[] = { 117 SOC_DAPM_SINGLE("Line Capture Switch", JZ4740_REG_CODEC_1, 118 JZ4740_CODEC_1_LINE_ENABLE_OFFSET, 1, 0), 119 SOC_DAPM_SINGLE("Mic Capture Switch", JZ4740_REG_CODEC_1, 120 JZ4740_CODEC_1_MIC_ENABLE_OFFSET, 1, 0), 121 }; 122 123 static const struct snd_soc_dapm_widget jz4740_codec_dapm_widgets[] = { 124 SND_SOC_DAPM_ADC("ADC", "Capture", JZ4740_REG_CODEC_1, 125 JZ4740_CODEC_1_ADC_ENABLE_OFFSET, 0), 126 SND_SOC_DAPM_DAC("DAC", "Playback", JZ4740_REG_CODEC_1, 127 JZ4740_CODEC_1_DAC_ENABLE_OFFSET, 0), 128 129 SND_SOC_DAPM_MIXER("Output Mixer", JZ4740_REG_CODEC_1, 130 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET, 1, 131 jz4740_codec_output_controls, 132 ARRAY_SIZE(jz4740_codec_output_controls)), 133 134 SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0, 135 jz4740_codec_input_controls, 136 ARRAY_SIZE(jz4740_codec_input_controls)), 137 SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0), 138 139 SND_SOC_DAPM_OUTPUT("LOUT"), 140 SND_SOC_DAPM_OUTPUT("ROUT"), 141 142 SND_SOC_DAPM_INPUT("MIC"), 143 SND_SOC_DAPM_INPUT("LIN"), 144 SND_SOC_DAPM_INPUT("RIN"), 145 }; 146 147 static const struct snd_soc_dapm_route jz4740_codec_dapm_routes[] = { 148 {"Line Input", NULL, "LIN"}, 149 {"Line Input", NULL, "RIN"}, 150 151 {"Input Mixer", "Line Capture Switch", "Line Input"}, 152 {"Input Mixer", "Mic Capture Switch", "MIC"}, 153 154 {"ADC", NULL, "Input Mixer"}, 155 156 {"Output Mixer", "Bypass Switch", "Input Mixer"}, 157 {"Output Mixer", "DAC Switch", "DAC"}, 158 159 {"LOUT", NULL, "Output Mixer"}, 160 {"ROUT", NULL, "Output Mixer"}, 161 }; 162 163 static int jz4740_codec_hw_params(struct snd_pcm_substream *substream, 164 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 165 { 166 uint32_t val; 167 struct snd_soc_pcm_runtime *rtd = substream->private_data; 168 struct snd_soc_codec *codec =rtd->codec; 169 170 switch (params_rate(params)) { 171 case 8000: 172 val = 0; 173 break; 174 case 11025: 175 val = 1; 176 break; 177 case 12000: 178 val = 2; 179 break; 180 case 16000: 181 val = 3; 182 break; 183 case 22050: 184 val = 4; 185 break; 186 case 24000: 187 val = 5; 188 break; 189 case 32000: 190 val = 6; 191 break; 192 case 44100: 193 val = 7; 194 break; 195 case 48000: 196 val = 8; 197 break; 198 default: 199 return -EINVAL; 200 } 201 202 val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET; 203 204 snd_soc_update_bits(codec, JZ4740_REG_CODEC_2, 205 JZ4740_CODEC_2_SAMPLE_RATE_MASK, val); 206 207 return 0; 208 } 209 210 static struct snd_soc_dai_ops jz4740_codec_dai_ops = { 211 .hw_params = jz4740_codec_hw_params, 212 }; 213 214 static struct snd_soc_dai_driver jz4740_codec_dai = { 215 .name = "jz4740-hifi", 216 .playback = { 217 .stream_name = "Playback", 218 .channels_min = 2, 219 .channels_max = 2, 220 .rates = SNDRV_PCM_RATE_8000_48000, 221 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8, 222 }, 223 .capture = { 224 .stream_name = "Capture", 225 .channels_min = 2, 226 .channels_max = 2, 227 .rates = SNDRV_PCM_RATE_8000_48000, 228 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8, 229 }, 230 .ops = &jz4740_codec_dai_ops, 231 .symmetric_rates = 1, 232 }; 233 234 static void jz4740_codec_wakeup(struct snd_soc_codec *codec) 235 { 236 int i; 237 uint32_t *cache = codec->reg_cache; 238 239 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, 240 JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET); 241 udelay(2); 242 243 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, 244 JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0); 245 246 for (i = 0; i < ARRAY_SIZE(jz4740_codec_regs); ++i) 247 jz4740_codec_write(codec, i, cache[i]); 248 } 249 250 static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec, 251 enum snd_soc_bias_level level) 252 { 253 unsigned int mask; 254 unsigned int value; 255 256 switch (level) { 257 case SND_SOC_BIAS_ON: 258 break; 259 case SND_SOC_BIAS_PREPARE: 260 mask = JZ4740_CODEC_1_VREF_DISABLE | 261 JZ4740_CODEC_1_VREF_AMP_DISABLE | 262 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M; 263 value = 0; 264 265 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value); 266 break; 267 case SND_SOC_BIAS_STANDBY: 268 /* The only way to clear the suspend flag is to reset the codec */ 269 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) 270 jz4740_codec_wakeup(codec); 271 272 mask = JZ4740_CODEC_1_VREF_DISABLE | 273 JZ4740_CODEC_1_VREF_AMP_DISABLE | 274 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M; 275 value = JZ4740_CODEC_1_VREF_DISABLE | 276 JZ4740_CODEC_1_VREF_AMP_DISABLE | 277 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M; 278 279 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value); 280 break; 281 case SND_SOC_BIAS_OFF: 282 mask = JZ4740_CODEC_1_SUSPEND; 283 value = JZ4740_CODEC_1_SUSPEND; 284 285 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value); 286 break; 287 default: 288 break; 289 } 290 291 codec->dapm.bias_level = level; 292 293 return 0; 294 } 295 296 static int jz4740_codec_dev_probe(struct snd_soc_codec *codec) 297 { 298 struct snd_soc_dapm_context *dapm = &codec->dapm; 299 300 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, 301 JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE); 302 303 snd_soc_add_controls(codec, jz4740_codec_controls, 304 ARRAY_SIZE(jz4740_codec_controls)); 305 306 snd_soc_dapm_new_controls(dapm, jz4740_codec_dapm_widgets, 307 ARRAY_SIZE(jz4740_codec_dapm_widgets)); 308 309 snd_soc_dapm_add_routes(dapm, jz4740_codec_dapm_routes, 310 ARRAY_SIZE(jz4740_codec_dapm_routes)); 311 312 snd_soc_dapm_new_widgets(codec); 313 314 jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 315 316 return 0; 317 } 318 319 static int jz4740_codec_dev_remove(struct snd_soc_codec *codec) 320 { 321 jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF); 322 323 return 0; 324 } 325 326 #ifdef CONFIG_PM_SLEEP 327 328 static int jz4740_codec_suspend(struct snd_soc_codec *codec, pm_message_t state) 329 { 330 return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF); 331 } 332 333 static int jz4740_codec_resume(struct snd_soc_codec *codec) 334 { 335 return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 336 } 337 338 #else 339 #define jz4740_codec_suspend NULL 340 #define jz4740_codec_resume NULL 341 #endif 342 343 static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec = { 344 .probe = jz4740_codec_dev_probe, 345 .remove = jz4740_codec_dev_remove, 346 .suspend = jz4740_codec_suspend, 347 .resume = jz4740_codec_resume, 348 .read = jz4740_codec_read, 349 .write = jz4740_codec_write, 350 .set_bias_level = jz4740_codec_set_bias_level, 351 .reg_cache_default = jz4740_codec_regs, 352 .reg_word_size = sizeof(u32), 353 .reg_cache_size = 2, 354 }; 355 356 static int __devinit jz4740_codec_probe(struct platform_device *pdev) 357 { 358 int ret; 359 struct jz4740_codec *jz4740_codec; 360 struct resource *mem; 361 362 jz4740_codec = kzalloc(sizeof(*jz4740_codec), GFP_KERNEL); 363 if (!jz4740_codec) 364 return -ENOMEM; 365 366 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 367 if (!mem) { 368 dev_err(&pdev->dev, "Failed to get mmio memory resource\n"); 369 ret = -ENOENT; 370 goto err_free_codec; 371 } 372 373 mem = request_mem_region(mem->start, resource_size(mem), pdev->name); 374 if (!mem) { 375 dev_err(&pdev->dev, "Failed to request mmio memory region\n"); 376 ret = -EBUSY; 377 goto err_free_codec; 378 } 379 380 jz4740_codec->base = ioremap(mem->start, resource_size(mem)); 381 if (!jz4740_codec->base) { 382 dev_err(&pdev->dev, "Failed to ioremap mmio memory\n"); 383 ret = -EBUSY; 384 goto err_release_mem_region; 385 } 386 jz4740_codec->mem = mem; 387 388 platform_set_drvdata(pdev, jz4740_codec); 389 390 ret = snd_soc_register_codec(&pdev->dev, 391 &soc_codec_dev_jz4740_codec, &jz4740_codec_dai, 1); 392 if (ret) { 393 dev_err(&pdev->dev, "Failed to register codec\n"); 394 goto err_iounmap; 395 } 396 397 return 0; 398 399 err_iounmap: 400 iounmap(jz4740_codec->base); 401 err_release_mem_region: 402 release_mem_region(mem->start, resource_size(mem)); 403 err_free_codec: 404 kfree(jz4740_codec); 405 406 return ret; 407 } 408 409 static int __devexit jz4740_codec_remove(struct platform_device *pdev) 410 { 411 struct jz4740_codec *jz4740_codec = platform_get_drvdata(pdev); 412 struct resource *mem = jz4740_codec->mem; 413 414 snd_soc_unregister_codec(&pdev->dev); 415 416 iounmap(jz4740_codec->base); 417 release_mem_region(mem->start, resource_size(mem)); 418 419 platform_set_drvdata(pdev, NULL); 420 kfree(jz4740_codec); 421 422 return 0; 423 } 424 425 static struct platform_driver jz4740_codec_driver = { 426 .probe = jz4740_codec_probe, 427 .remove = __devexit_p(jz4740_codec_remove), 428 .driver = { 429 .name = "jz4740-codec", 430 .owner = THIS_MODULE, 431 }, 432 }; 433 434 static int __init jz4740_codec_init(void) 435 { 436 return platform_driver_register(&jz4740_codec_driver); 437 } 438 module_init(jz4740_codec_init); 439 440 static void __exit jz4740_codec_exit(void) 441 { 442 platform_driver_unregister(&jz4740_codec_driver); 443 } 444 module_exit(jz4740_codec_exit); 445 446 MODULE_DESCRIPTION("JZ4740 SoC internal codec driver"); 447 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 448 MODULE_LICENSE("GPL v2"); 449 MODULE_ALIAS("platform:jz4740-codec"); 450