1 /* 2 * ALSA SoC codec for HDMI encoder drivers 3 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 4 * Author: Jyri Sarha <jsarha@ti.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 */ 15 #include <linux/module.h> 16 #include <linux/string.h> 17 #include <sound/core.h> 18 #include <sound/pcm.h> 19 #include <sound/pcm_params.h> 20 #include <sound/soc.h> 21 #include <sound/tlv.h> 22 #include <sound/pcm_drm_eld.h> 23 #include <sound/hdmi-codec.h> 24 #include <sound/pcm_iec958.h> 25 26 #include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */ 27 28 #define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1 29 30 struct hdmi_codec_channel_map_table { 31 unsigned char map; /* ALSA API channel map position */ 32 unsigned long spk_mask; /* speaker position bit mask */ 33 }; 34 35 /* 36 * CEA speaker placement for HDMI 1.4: 37 * 38 * FL FLC FC FRC FR FRW 39 * 40 * LFE 41 * 42 * RL RLC RC RRC RR 43 * 44 * Speaker placement has to be extended to support HDMI 2.0 45 */ 46 enum hdmi_codec_cea_spk_placement { 47 FL = BIT(0), /* Front Left */ 48 FC = BIT(1), /* Front Center */ 49 FR = BIT(2), /* Front Right */ 50 FLC = BIT(3), /* Front Left Center */ 51 FRC = BIT(4), /* Front Right Center */ 52 RL = BIT(5), /* Rear Left */ 53 RC = BIT(6), /* Rear Center */ 54 RR = BIT(7), /* Rear Right */ 55 RLC = BIT(8), /* Rear Left Center */ 56 RRC = BIT(9), /* Rear Right Center */ 57 LFE = BIT(10), /* Low Frequency Effect */ 58 }; 59 60 /* 61 * cea Speaker allocation structure 62 */ 63 struct hdmi_codec_cea_spk_alloc { 64 const int ca_id; 65 unsigned int n_ch; 66 unsigned long mask; 67 }; 68 69 /* Channel maps stereo HDMI */ 70 static const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = { 71 { .channels = 2, 72 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, 73 { } 74 }; 75 76 /* Channel maps for multi-channel playbacks, up to 8 n_ch */ 77 static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = { 78 { .channels = 2, /* CA_ID 0x00 */ 79 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, 80 { .channels = 4, /* CA_ID 0x01 */ 81 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 82 SNDRV_CHMAP_NA } }, 83 { .channels = 4, /* CA_ID 0x02 */ 84 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 85 SNDRV_CHMAP_FC } }, 86 { .channels = 4, /* CA_ID 0x03 */ 87 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 88 SNDRV_CHMAP_FC } }, 89 { .channels = 6, /* CA_ID 0x04 */ 90 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 91 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 92 { .channels = 6, /* CA_ID 0x05 */ 93 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 94 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 95 { .channels = 6, /* CA_ID 0x06 */ 96 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 97 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 98 { .channels = 6, /* CA_ID 0x07 */ 99 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 100 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 101 { .channels = 6, /* CA_ID 0x08 */ 102 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 103 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 104 { .channels = 6, /* CA_ID 0x09 */ 105 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 106 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 107 { .channels = 6, /* CA_ID 0x0A */ 108 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 109 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 110 { .channels = 6, /* CA_ID 0x0B */ 111 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 112 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 113 { .channels = 8, /* CA_ID 0x0C */ 114 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 115 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 116 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 117 { .channels = 8, /* CA_ID 0x0D */ 118 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 119 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 120 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 121 { .channels = 8, /* CA_ID 0x0E */ 122 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 123 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 124 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 125 { .channels = 8, /* CA_ID 0x0F */ 126 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 127 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 128 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 129 { .channels = 8, /* CA_ID 0x10 */ 130 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 131 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 132 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 133 { .channels = 8, /* CA_ID 0x11 */ 134 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 135 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 136 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 137 { .channels = 8, /* CA_ID 0x12 */ 138 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 139 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 140 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 141 { .channels = 8, /* CA_ID 0x13 */ 142 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 143 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 144 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 145 { .channels = 8, /* CA_ID 0x14 */ 146 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 147 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 148 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 149 { .channels = 8, /* CA_ID 0x15 */ 150 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 151 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 152 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 153 { .channels = 8, /* CA_ID 0x16 */ 154 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 155 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 156 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 157 { .channels = 8, /* CA_ID 0x17 */ 158 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 159 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 160 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 161 { .channels = 8, /* CA_ID 0x18 */ 162 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 163 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 164 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 165 { .channels = 8, /* CA_ID 0x19 */ 166 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 167 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 168 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 169 { .channels = 8, /* CA_ID 0x1A */ 170 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 171 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 172 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 173 { .channels = 8, /* CA_ID 0x1B */ 174 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 175 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 176 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 177 { .channels = 8, /* CA_ID 0x1C */ 178 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 179 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 180 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 181 { .channels = 8, /* CA_ID 0x1D */ 182 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 183 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 184 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 185 { .channels = 8, /* CA_ID 0x1E */ 186 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 187 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 188 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 189 { .channels = 8, /* CA_ID 0x1F */ 190 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 191 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 192 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 193 { } 194 }; 195 196 /* 197 * hdmi_codec_channel_alloc: speaker configuration available for CEA 198 * 199 * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct 200 * The preceding ones have better chances to be selected by 201 * hdmi_codec_get_ch_alloc_table_idx(). 202 */ 203 static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = { 204 { .ca_id = 0x00, .n_ch = 2, 205 .mask = FL | FR}, 206 /* 2.1 */ 207 { .ca_id = 0x01, .n_ch = 4, 208 .mask = FL | FR | LFE}, 209 /* Dolby Surround */ 210 { .ca_id = 0x02, .n_ch = 4, 211 .mask = FL | FR | FC }, 212 /* surround51 */ 213 { .ca_id = 0x0b, .n_ch = 6, 214 .mask = FL | FR | LFE | FC | RL | RR}, 215 /* surround40 */ 216 { .ca_id = 0x08, .n_ch = 6, 217 .mask = FL | FR | RL | RR }, 218 /* surround41 */ 219 { .ca_id = 0x09, .n_ch = 6, 220 .mask = FL | FR | LFE | RL | RR }, 221 /* surround50 */ 222 { .ca_id = 0x0a, .n_ch = 6, 223 .mask = FL | FR | FC | RL | RR }, 224 /* 6.1 */ 225 { .ca_id = 0x0f, .n_ch = 8, 226 .mask = FL | FR | LFE | FC | RL | RR | RC }, 227 /* surround71 */ 228 { .ca_id = 0x13, .n_ch = 8, 229 .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC }, 230 /* others */ 231 { .ca_id = 0x03, .n_ch = 8, 232 .mask = FL | FR | LFE | FC }, 233 { .ca_id = 0x04, .n_ch = 8, 234 .mask = FL | FR | RC}, 235 { .ca_id = 0x05, .n_ch = 8, 236 .mask = FL | FR | LFE | RC }, 237 { .ca_id = 0x06, .n_ch = 8, 238 .mask = FL | FR | FC | RC }, 239 { .ca_id = 0x07, .n_ch = 8, 240 .mask = FL | FR | LFE | FC | RC }, 241 { .ca_id = 0x0c, .n_ch = 8, 242 .mask = FL | FR | RC | RL | RR }, 243 { .ca_id = 0x0d, .n_ch = 8, 244 .mask = FL | FR | LFE | RL | RR | RC }, 245 { .ca_id = 0x0e, .n_ch = 8, 246 .mask = FL | FR | FC | RL | RR | RC }, 247 { .ca_id = 0x10, .n_ch = 8, 248 .mask = FL | FR | RL | RR | RLC | RRC }, 249 { .ca_id = 0x11, .n_ch = 8, 250 .mask = FL | FR | LFE | RL | RR | RLC | RRC }, 251 { .ca_id = 0x12, .n_ch = 8, 252 .mask = FL | FR | FC | RL | RR | RLC | RRC }, 253 { .ca_id = 0x14, .n_ch = 8, 254 .mask = FL | FR | FLC | FRC }, 255 { .ca_id = 0x15, .n_ch = 8, 256 .mask = FL | FR | LFE | FLC | FRC }, 257 { .ca_id = 0x16, .n_ch = 8, 258 .mask = FL | FR | FC | FLC | FRC }, 259 { .ca_id = 0x17, .n_ch = 8, 260 .mask = FL | FR | LFE | FC | FLC | FRC }, 261 { .ca_id = 0x18, .n_ch = 8, 262 .mask = FL | FR | RC | FLC | FRC }, 263 { .ca_id = 0x19, .n_ch = 8, 264 .mask = FL | FR | LFE | RC | FLC | FRC }, 265 { .ca_id = 0x1a, .n_ch = 8, 266 .mask = FL | FR | RC | FC | FLC | FRC }, 267 { .ca_id = 0x1b, .n_ch = 8, 268 .mask = FL | FR | LFE | RC | FC | FLC | FRC }, 269 { .ca_id = 0x1c, .n_ch = 8, 270 .mask = FL | FR | RL | RR | FLC | FRC }, 271 { .ca_id = 0x1d, .n_ch = 8, 272 .mask = FL | FR | LFE | RL | RR | FLC | FRC }, 273 { .ca_id = 0x1e, .n_ch = 8, 274 .mask = FL | FR | FC | RL | RR | FLC | FRC }, 275 { .ca_id = 0x1f, .n_ch = 8, 276 .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, 277 }; 278 279 struct hdmi_codec_priv { 280 struct hdmi_codec_pdata hcd; 281 struct snd_soc_dai_driver *daidrv; 282 struct hdmi_codec_daifmt daifmt[2]; 283 struct mutex current_stream_lock; 284 struct snd_pcm_substream *current_stream; 285 uint8_t eld[MAX_ELD_BYTES]; 286 struct snd_pcm_chmap *chmap_info; 287 unsigned int chmap_idx; 288 }; 289 290 static const struct snd_soc_dapm_widget hdmi_widgets[] = { 291 SND_SOC_DAPM_OUTPUT("TX"), 292 }; 293 294 static const struct snd_soc_dapm_route hdmi_routes[] = { 295 { "TX", NULL, "Playback" }, 296 }; 297 298 enum { 299 DAI_ID_I2S = 0, 300 DAI_ID_SPDIF, 301 }; 302 303 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 304 struct snd_ctl_elem_info *uinfo) 305 { 306 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 307 uinfo->count = FIELD_SIZEOF(struct hdmi_codec_priv, eld); 308 309 return 0; 310 } 311 312 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 313 struct snd_ctl_elem_value *ucontrol) 314 { 315 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 316 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component); 317 318 memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld)); 319 320 return 0; 321 } 322 323 static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc) 324 { 325 int i; 326 static const unsigned long hdmi_codec_eld_spk_alloc_bits[] = { 327 [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR, 328 [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC, 329 }; 330 unsigned long spk_mask = 0; 331 332 for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) { 333 if (spk_alloc & (1 << i)) 334 spk_mask |= hdmi_codec_eld_spk_alloc_bits[i]; 335 } 336 337 return spk_mask; 338 } 339 340 static void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp) 341 { 342 u8 spk_alloc; 343 unsigned long spk_mask; 344 345 spk_alloc = drm_eld_get_spk_alloc(hcp->eld); 346 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc); 347 348 /* Detect if only stereo supported, else return 8 channels mappings */ 349 if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2) 350 hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps; 351 else 352 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps; 353 } 354 355 static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp, 356 unsigned char channels) 357 { 358 int i; 359 u8 spk_alloc; 360 unsigned long spk_mask; 361 const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc; 362 363 spk_alloc = drm_eld_get_spk_alloc(hcp->eld); 364 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc); 365 366 for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) { 367 /* If spk_alloc == 0, HDMI is unplugged return stereo config*/ 368 if (!spk_alloc && cap->ca_id == 0) 369 return i; 370 if (cap->n_ch != channels) 371 continue; 372 if (!(cap->mask == (spk_mask & cap->mask))) 373 continue; 374 return i; 375 } 376 377 return -EINVAL; 378 } 379 static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol, 380 struct snd_ctl_elem_value *ucontrol) 381 { 382 unsigned const char *map; 383 unsigned int i; 384 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 385 struct hdmi_codec_priv *hcp = info->private_data; 386 387 map = info->chmap[hcp->chmap_idx].map; 388 389 for (i = 0; i < info->max_channels; i++) { 390 if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN) 391 ucontrol->value.integer.value[i] = 0; 392 else 393 ucontrol->value.integer.value[i] = map[i]; 394 } 395 396 return 0; 397 } 398 399 static int hdmi_codec_new_stream(struct snd_pcm_substream *substream, 400 struct snd_soc_dai *dai) 401 { 402 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 403 int ret = 0; 404 405 mutex_lock(&hcp->current_stream_lock); 406 if (!hcp->current_stream) { 407 hcp->current_stream = substream; 408 } else if (hcp->current_stream != substream) { 409 dev_err(dai->dev, "Only one simultaneous stream supported!\n"); 410 ret = -EINVAL; 411 } 412 mutex_unlock(&hcp->current_stream_lock); 413 414 return ret; 415 } 416 417 static int hdmi_codec_startup(struct snd_pcm_substream *substream, 418 struct snd_soc_dai *dai) 419 { 420 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 421 int ret = 0; 422 423 dev_dbg(dai->dev, "%s()\n", __func__); 424 425 ret = hdmi_codec_new_stream(substream, dai); 426 if (ret) 427 return ret; 428 429 if (hcp->hcd.ops->audio_startup) { 430 ret = hcp->hcd.ops->audio_startup(dai->dev->parent, hcp->hcd.data); 431 if (ret) { 432 mutex_lock(&hcp->current_stream_lock); 433 hcp->current_stream = NULL; 434 mutex_unlock(&hcp->current_stream_lock); 435 return ret; 436 } 437 } 438 439 if (hcp->hcd.ops->get_eld) { 440 ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->hcd.data, 441 hcp->eld, sizeof(hcp->eld)); 442 443 if (!ret) { 444 ret = snd_pcm_hw_constraint_eld(substream->runtime, 445 hcp->eld); 446 if (ret) 447 return ret; 448 } 449 /* Select chmap supported */ 450 hdmi_codec_eld_chmap(hcp); 451 } 452 return 0; 453 } 454 455 static void hdmi_codec_shutdown(struct snd_pcm_substream *substream, 456 struct snd_soc_dai *dai) 457 { 458 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 459 460 dev_dbg(dai->dev, "%s()\n", __func__); 461 462 WARN_ON(hcp->current_stream != substream); 463 464 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 465 hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data); 466 467 mutex_lock(&hcp->current_stream_lock); 468 hcp->current_stream = NULL; 469 mutex_unlock(&hcp->current_stream_lock); 470 } 471 472 static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, 473 struct snd_pcm_hw_params *params, 474 struct snd_soc_dai *dai) 475 { 476 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 477 struct hdmi_codec_params hp = { 478 .iec = { 479 .status = { 0 }, 480 .subcode = { 0 }, 481 .pad = 0, 482 .dig_subframe = { 0 }, 483 } 484 }; 485 int ret, idx; 486 487 dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__, 488 params_width(params), params_rate(params), 489 params_channels(params)); 490 491 if (params_width(params) > 24) 492 params->msbits = 24; 493 494 ret = snd_pcm_create_iec958_consumer_hw_params(params, hp.iec.status, 495 sizeof(hp.iec.status)); 496 if (ret < 0) { 497 dev_err(dai->dev, "Creating IEC958 channel status failed %d\n", 498 ret); 499 return ret; 500 } 501 502 ret = hdmi_codec_new_stream(substream, dai); 503 if (ret) 504 return ret; 505 506 hdmi_audio_infoframe_init(&hp.cea); 507 hp.cea.channels = params_channels(params); 508 hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; 509 hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; 510 hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; 511 512 /* Select a channel allocation that matches with ELD and pcm channels */ 513 idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels); 514 if (idx < 0) { 515 dev_err(dai->dev, "Not able to map channels to speakers (%d)\n", 516 idx); 517 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 518 return idx; 519 } 520 hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id; 521 hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id; 522 523 hp.sample_width = params_width(params); 524 hp.sample_rate = params_rate(params); 525 hp.channels = params_channels(params); 526 527 return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data, 528 &hcp->daifmt[dai->id], &hp); 529 } 530 531 static int hdmi_codec_set_fmt(struct snd_soc_dai *dai, 532 unsigned int fmt) 533 { 534 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 535 struct hdmi_codec_daifmt cf = { 0 }; 536 int ret = 0; 537 538 dev_dbg(dai->dev, "%s()\n", __func__); 539 540 if (dai->id == DAI_ID_SPDIF) { 541 cf.fmt = HDMI_SPDIF; 542 } else { 543 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 544 case SND_SOC_DAIFMT_CBM_CFM: 545 cf.bit_clk_master = 1; 546 cf.frame_clk_master = 1; 547 break; 548 case SND_SOC_DAIFMT_CBS_CFM: 549 cf.frame_clk_master = 1; 550 break; 551 case SND_SOC_DAIFMT_CBM_CFS: 552 cf.bit_clk_master = 1; 553 break; 554 case SND_SOC_DAIFMT_CBS_CFS: 555 break; 556 default: 557 return -EINVAL; 558 } 559 560 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 561 case SND_SOC_DAIFMT_NB_NF: 562 break; 563 case SND_SOC_DAIFMT_NB_IF: 564 cf.frame_clk_inv = 1; 565 break; 566 case SND_SOC_DAIFMT_IB_NF: 567 cf.bit_clk_inv = 1; 568 break; 569 case SND_SOC_DAIFMT_IB_IF: 570 cf.frame_clk_inv = 1; 571 cf.bit_clk_inv = 1; 572 break; 573 } 574 575 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 576 case SND_SOC_DAIFMT_I2S: 577 cf.fmt = HDMI_I2S; 578 break; 579 case SND_SOC_DAIFMT_DSP_A: 580 cf.fmt = HDMI_DSP_A; 581 break; 582 case SND_SOC_DAIFMT_DSP_B: 583 cf.fmt = HDMI_DSP_B; 584 break; 585 case SND_SOC_DAIFMT_RIGHT_J: 586 cf.fmt = HDMI_RIGHT_J; 587 break; 588 case SND_SOC_DAIFMT_LEFT_J: 589 cf.fmt = HDMI_LEFT_J; 590 break; 591 case SND_SOC_DAIFMT_AC97: 592 cf.fmt = HDMI_AC97; 593 break; 594 default: 595 dev_err(dai->dev, "Invalid DAI interface format\n"); 596 return -EINVAL; 597 } 598 } 599 600 hcp->daifmt[dai->id] = cf; 601 602 return ret; 603 } 604 605 static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute) 606 { 607 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 608 609 dev_dbg(dai->dev, "%s()\n", __func__); 610 611 if (hcp->hcd.ops->digital_mute) 612 return hcp->hcd.ops->digital_mute(dai->dev->parent, 613 hcp->hcd.data, mute); 614 615 return 0; 616 } 617 618 static const struct snd_soc_dai_ops hdmi_dai_ops = { 619 .startup = hdmi_codec_startup, 620 .shutdown = hdmi_codec_shutdown, 621 .hw_params = hdmi_codec_hw_params, 622 .set_fmt = hdmi_codec_set_fmt, 623 .digital_mute = hdmi_codec_digital_mute, 624 }; 625 626 627 #define HDMI_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ 628 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\ 629 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 630 SNDRV_PCM_RATE_192000) 631 632 #define SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\ 633 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\ 634 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\ 635 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE) 636 637 /* 638 * This list is only for formats allowed on the I2S bus. So there is 639 * some formats listed that are not supported by HDMI interface. For 640 * instance allowing the 32-bit formats enables 24-precision with CPU 641 * DAIs that do not support 24-bit formats. If the extra formats cause 642 * problems, we should add the video side driver an option to disable 643 * them. 644 */ 645 #define I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\ 646 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\ 647 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\ 648 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\ 649 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE) 650 651 static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd, 652 struct snd_soc_dai *dai) 653 { 654 struct snd_soc_dai_driver *drv = dai->driver; 655 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 656 struct snd_kcontrol *kctl; 657 struct snd_kcontrol_new hdmi_eld_ctl = { 658 .access = SNDRV_CTL_ELEM_ACCESS_READ | 659 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 660 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 661 .name = "ELD", 662 .info = hdmi_eld_ctl_info, 663 .get = hdmi_eld_ctl_get, 664 .device = rtd->pcm->device, 665 }; 666 int ret; 667 668 dev_dbg(dai->dev, "%s()\n", __func__); 669 670 ret = snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK, 671 NULL, drv->playback.channels_max, 0, 672 &hcp->chmap_info); 673 if (ret < 0) 674 return ret; 675 676 /* override handlers */ 677 hcp->chmap_info->private_data = hcp; 678 hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get; 679 680 /* default chmap supported is stereo */ 681 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps; 682 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 683 684 /* add ELD ctl with the device number corresponding to the PCM stream */ 685 kctl = snd_ctl_new1(&hdmi_eld_ctl, dai->component); 686 if (!kctl) 687 return -ENOMEM; 688 689 return snd_ctl_add(rtd->card->snd_card, kctl); 690 } 691 692 static const struct snd_soc_dai_driver hdmi_i2s_dai = { 693 .name = "i2s-hifi", 694 .id = DAI_ID_I2S, 695 .playback = { 696 .stream_name = "I2S Playback", 697 .channels_min = 2, 698 .channels_max = 8, 699 .rates = HDMI_RATES, 700 .formats = I2S_FORMATS, 701 .sig_bits = 24, 702 }, 703 .ops = &hdmi_dai_ops, 704 .pcm_new = hdmi_codec_pcm_new, 705 }; 706 707 static const struct snd_soc_dai_driver hdmi_spdif_dai = { 708 .name = "spdif-hifi", 709 .id = DAI_ID_SPDIF, 710 .playback = { 711 .stream_name = "SPDIF Playback", 712 .channels_min = 2, 713 .channels_max = 2, 714 .rates = HDMI_RATES, 715 .formats = SPDIF_FORMATS, 716 }, 717 .ops = &hdmi_dai_ops, 718 .pcm_new = hdmi_codec_pcm_new, 719 }; 720 721 static int hdmi_of_xlate_dai_id(struct snd_soc_component *component, 722 struct device_node *endpoint) 723 { 724 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component); 725 int ret = -ENOTSUPP; /* see snd_soc_get_dai_id() */ 726 727 if (hcp->hcd.ops->get_dai_id) 728 ret = hcp->hcd.ops->get_dai_id(component, endpoint); 729 730 return ret; 731 } 732 733 static const struct snd_soc_component_driver hdmi_driver = { 734 .dapm_widgets = hdmi_widgets, 735 .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets), 736 .dapm_routes = hdmi_routes, 737 .num_dapm_routes = ARRAY_SIZE(hdmi_routes), 738 .of_xlate_dai_id = hdmi_of_xlate_dai_id, 739 .idle_bias_on = 1, 740 .use_pmdown_time = 1, 741 .endianness = 1, 742 .non_legacy_dai_naming = 1, 743 }; 744 745 static int hdmi_codec_probe(struct platform_device *pdev) 746 { 747 struct hdmi_codec_pdata *hcd = pdev->dev.platform_data; 748 struct device *dev = &pdev->dev; 749 struct hdmi_codec_priv *hcp; 750 int dai_count, i = 0; 751 int ret; 752 753 dev_dbg(dev, "%s()\n", __func__); 754 755 if (!hcd) { 756 dev_err(dev, "%s: No plalform data\n", __func__); 757 return -EINVAL; 758 } 759 760 dai_count = hcd->i2s + hcd->spdif; 761 if (dai_count < 1 || !hcd->ops || !hcd->ops->hw_params || 762 !hcd->ops->audio_shutdown) { 763 dev_err(dev, "%s: Invalid parameters\n", __func__); 764 return -EINVAL; 765 } 766 767 hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL); 768 if (!hcp) 769 return -ENOMEM; 770 771 hcp->hcd = *hcd; 772 mutex_init(&hcp->current_stream_lock); 773 774 hcp->daidrv = devm_kcalloc(dev, dai_count, sizeof(*hcp->daidrv), 775 GFP_KERNEL); 776 if (!hcp->daidrv) 777 return -ENOMEM; 778 779 if (hcd->i2s) { 780 hcp->daidrv[i] = hdmi_i2s_dai; 781 hcp->daidrv[i].playback.channels_max = 782 hcd->max_i2s_channels; 783 i++; 784 } 785 786 if (hcd->spdif) 787 hcp->daidrv[i] = hdmi_spdif_dai; 788 789 ret = devm_snd_soc_register_component(dev, &hdmi_driver, hcp->daidrv, 790 dai_count); 791 if (ret) { 792 dev_err(dev, "%s: snd_soc_register_component() failed (%d)\n", 793 __func__, ret); 794 return ret; 795 } 796 797 dev_set_drvdata(dev, hcp); 798 return 0; 799 } 800 801 static struct platform_driver hdmi_codec_driver = { 802 .driver = { 803 .name = HDMI_CODEC_DRV_NAME, 804 }, 805 .probe = hdmi_codec_probe, 806 }; 807 808 module_platform_driver(hdmi_codec_driver); 809 810 MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>"); 811 MODULE_DESCRIPTION("HDMI Audio Codec Driver"); 812 MODULE_LICENSE("GPL"); 813 MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME); 814