1 /* 2 * ALSA SoC codec for HDMI encoder drivers 3 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 4 * Author: Jyri Sarha <jsarha@ti.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 */ 15 #include <linux/module.h> 16 #include <linux/string.h> 17 #include <sound/core.h> 18 #include <sound/pcm.h> 19 #include <sound/pcm_params.h> 20 #include <sound/soc.h> 21 #include <sound/tlv.h> 22 #include <sound/pcm_drm_eld.h> 23 #include <sound/hdmi-codec.h> 24 #include <sound/pcm_iec958.h> 25 26 #include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */ 27 28 #define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1 29 30 struct hdmi_codec_channel_map_table { 31 unsigned char map; /* ALSA API channel map position */ 32 unsigned long spk_mask; /* speaker position bit mask */ 33 }; 34 35 /* 36 * CEA speaker placement for HDMI 1.4: 37 * 38 * FL FLC FC FRC FR FRW 39 * 40 * LFE 41 * 42 * RL RLC RC RRC RR 43 * 44 * Speaker placement has to be extended to support HDMI 2.0 45 */ 46 enum hdmi_codec_cea_spk_placement { 47 FL = BIT(0), /* Front Left */ 48 FC = BIT(1), /* Front Center */ 49 FR = BIT(2), /* Front Right */ 50 FLC = BIT(3), /* Front Left Center */ 51 FRC = BIT(4), /* Front Right Center */ 52 RL = BIT(5), /* Rear Left */ 53 RC = BIT(6), /* Rear Center */ 54 RR = BIT(7), /* Rear Right */ 55 RLC = BIT(8), /* Rear Left Center */ 56 RRC = BIT(9), /* Rear Right Center */ 57 LFE = BIT(10), /* Low Frequency Effect */ 58 }; 59 60 /* 61 * cea Speaker allocation structure 62 */ 63 struct hdmi_codec_cea_spk_alloc { 64 const int ca_id; 65 unsigned int n_ch; 66 unsigned long mask; 67 }; 68 69 /* Channel maps stereo HDMI */ 70 static const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = { 71 { .channels = 2, 72 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, 73 { } 74 }; 75 76 /* Channel maps for multi-channel playbacks, up to 8 n_ch */ 77 static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = { 78 { .channels = 2, /* CA_ID 0x00 */ 79 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, 80 { .channels = 4, /* CA_ID 0x01 */ 81 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 82 SNDRV_CHMAP_NA } }, 83 { .channels = 4, /* CA_ID 0x02 */ 84 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 85 SNDRV_CHMAP_FC } }, 86 { .channels = 4, /* CA_ID 0x03 */ 87 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 88 SNDRV_CHMAP_FC } }, 89 { .channels = 6, /* CA_ID 0x04 */ 90 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 91 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 92 { .channels = 6, /* CA_ID 0x05 */ 93 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 94 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 95 { .channels = 6, /* CA_ID 0x06 */ 96 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 97 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 98 { .channels = 6, /* CA_ID 0x07 */ 99 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 100 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 101 { .channels = 6, /* CA_ID 0x08 */ 102 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 103 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 104 { .channels = 6, /* CA_ID 0x09 */ 105 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 106 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 107 { .channels = 6, /* CA_ID 0x0A */ 108 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 109 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 110 { .channels = 6, /* CA_ID 0x0B */ 111 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 112 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 113 { .channels = 8, /* CA_ID 0x0C */ 114 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 115 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 116 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 117 { .channels = 8, /* CA_ID 0x0D */ 118 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 119 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 120 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 121 { .channels = 8, /* CA_ID 0x0E */ 122 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 123 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 124 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 125 { .channels = 8, /* CA_ID 0x0F */ 126 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 127 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 128 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 129 { .channels = 8, /* CA_ID 0x10 */ 130 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 131 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 132 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 133 { .channels = 8, /* CA_ID 0x11 */ 134 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 135 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 136 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 137 { .channels = 8, /* CA_ID 0x12 */ 138 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 139 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 140 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 141 { .channels = 8, /* CA_ID 0x13 */ 142 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 143 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 144 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 145 { .channels = 8, /* CA_ID 0x14 */ 146 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 147 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 148 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 149 { .channels = 8, /* CA_ID 0x15 */ 150 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 151 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 152 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 153 { .channels = 8, /* CA_ID 0x16 */ 154 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 155 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 156 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 157 { .channels = 8, /* CA_ID 0x17 */ 158 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 159 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 160 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 161 { .channels = 8, /* CA_ID 0x18 */ 162 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 163 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 164 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 165 { .channels = 8, /* CA_ID 0x19 */ 166 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 167 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 168 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 169 { .channels = 8, /* CA_ID 0x1A */ 170 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 171 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 172 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 173 { .channels = 8, /* CA_ID 0x1B */ 174 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 175 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 176 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 177 { .channels = 8, /* CA_ID 0x1C */ 178 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 179 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 180 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 181 { .channels = 8, /* CA_ID 0x1D */ 182 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 183 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 184 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 185 { .channels = 8, /* CA_ID 0x1E */ 186 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 187 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 188 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 189 { .channels = 8, /* CA_ID 0x1F */ 190 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 191 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 192 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 193 { } 194 }; 195 196 /* 197 * hdmi_codec_channel_alloc: speaker configuration available for CEA 198 * 199 * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct 200 * The preceding ones have better chances to be selected by 201 * hdmi_codec_get_ch_alloc_table_idx(). 202 */ 203 static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = { 204 { .ca_id = 0x00, .n_ch = 2, 205 .mask = FL | FR}, 206 /* 2.1 */ 207 { .ca_id = 0x01, .n_ch = 4, 208 .mask = FL | FR | LFE}, 209 /* Dolby Surround */ 210 { .ca_id = 0x02, .n_ch = 4, 211 .mask = FL | FR | FC }, 212 /* surround51 */ 213 { .ca_id = 0x0b, .n_ch = 6, 214 .mask = FL | FR | LFE | FC | RL | RR}, 215 /* surround40 */ 216 { .ca_id = 0x08, .n_ch = 6, 217 .mask = FL | FR | RL | RR }, 218 /* surround41 */ 219 { .ca_id = 0x09, .n_ch = 6, 220 .mask = FL | FR | LFE | RL | RR }, 221 /* surround50 */ 222 { .ca_id = 0x0a, .n_ch = 6, 223 .mask = FL | FR | FC | RL | RR }, 224 /* 6.1 */ 225 { .ca_id = 0x0f, .n_ch = 8, 226 .mask = FL | FR | LFE | FC | RL | RR | RC }, 227 /* surround71 */ 228 { .ca_id = 0x13, .n_ch = 8, 229 .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC }, 230 /* others */ 231 { .ca_id = 0x03, .n_ch = 8, 232 .mask = FL | FR | LFE | FC }, 233 { .ca_id = 0x04, .n_ch = 8, 234 .mask = FL | FR | RC}, 235 { .ca_id = 0x05, .n_ch = 8, 236 .mask = FL | FR | LFE | RC }, 237 { .ca_id = 0x06, .n_ch = 8, 238 .mask = FL | FR | FC | RC }, 239 { .ca_id = 0x07, .n_ch = 8, 240 .mask = FL | FR | LFE | FC | RC }, 241 { .ca_id = 0x0c, .n_ch = 8, 242 .mask = FL | FR | RC | RL | RR }, 243 { .ca_id = 0x0d, .n_ch = 8, 244 .mask = FL | FR | LFE | RL | RR | RC }, 245 { .ca_id = 0x0e, .n_ch = 8, 246 .mask = FL | FR | FC | RL | RR | RC }, 247 { .ca_id = 0x10, .n_ch = 8, 248 .mask = FL | FR | RL | RR | RLC | RRC }, 249 { .ca_id = 0x11, .n_ch = 8, 250 .mask = FL | FR | LFE | RL | RR | RLC | RRC }, 251 { .ca_id = 0x12, .n_ch = 8, 252 .mask = FL | FR | FC | RL | RR | RLC | RRC }, 253 { .ca_id = 0x14, .n_ch = 8, 254 .mask = FL | FR | FLC | FRC }, 255 { .ca_id = 0x15, .n_ch = 8, 256 .mask = FL | FR | LFE | FLC | FRC }, 257 { .ca_id = 0x16, .n_ch = 8, 258 .mask = FL | FR | FC | FLC | FRC }, 259 { .ca_id = 0x17, .n_ch = 8, 260 .mask = FL | FR | LFE | FC | FLC | FRC }, 261 { .ca_id = 0x18, .n_ch = 8, 262 .mask = FL | FR | RC | FLC | FRC }, 263 { .ca_id = 0x19, .n_ch = 8, 264 .mask = FL | FR | LFE | RC | FLC | FRC }, 265 { .ca_id = 0x1a, .n_ch = 8, 266 .mask = FL | FR | RC | FC | FLC | FRC }, 267 { .ca_id = 0x1b, .n_ch = 8, 268 .mask = FL | FR | LFE | RC | FC | FLC | FRC }, 269 { .ca_id = 0x1c, .n_ch = 8, 270 .mask = FL | FR | RL | RR | FLC | FRC }, 271 { .ca_id = 0x1d, .n_ch = 8, 272 .mask = FL | FR | LFE | RL | RR | FLC | FRC }, 273 { .ca_id = 0x1e, .n_ch = 8, 274 .mask = FL | FR | FC | RL | RR | FLC | FRC }, 275 { .ca_id = 0x1f, .n_ch = 8, 276 .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, 277 }; 278 279 struct hdmi_codec_priv { 280 struct hdmi_codec_pdata hcd; 281 struct snd_soc_dai_driver *daidrv; 282 struct hdmi_codec_daifmt daifmt[2]; 283 struct mutex current_stream_lock; 284 struct snd_pcm_substream *current_stream; 285 uint8_t eld[MAX_ELD_BYTES]; 286 struct snd_pcm_chmap *chmap_info; 287 unsigned int chmap_idx; 288 }; 289 290 static const struct snd_soc_dapm_widget hdmi_widgets[] = { 291 SND_SOC_DAPM_OUTPUT("TX"), 292 }; 293 294 enum { 295 DAI_ID_I2S = 0, 296 DAI_ID_SPDIF, 297 }; 298 299 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 300 struct snd_ctl_elem_info *uinfo) 301 { 302 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 303 uinfo->count = FIELD_SIZEOF(struct hdmi_codec_priv, eld); 304 305 return 0; 306 } 307 308 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 309 struct snd_ctl_elem_value *ucontrol) 310 { 311 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 312 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component); 313 314 memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld)); 315 316 return 0; 317 } 318 319 static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc) 320 { 321 int i; 322 static const unsigned long hdmi_codec_eld_spk_alloc_bits[] = { 323 [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR, 324 [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC, 325 }; 326 unsigned long spk_mask = 0; 327 328 for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) { 329 if (spk_alloc & (1 << i)) 330 spk_mask |= hdmi_codec_eld_spk_alloc_bits[i]; 331 } 332 333 return spk_mask; 334 } 335 336 static void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp) 337 { 338 u8 spk_alloc; 339 unsigned long spk_mask; 340 341 spk_alloc = drm_eld_get_spk_alloc(hcp->eld); 342 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc); 343 344 /* Detect if only stereo supported, else return 8 channels mappings */ 345 if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2) 346 hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps; 347 else 348 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps; 349 } 350 351 static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp, 352 unsigned char channels) 353 { 354 int i; 355 u8 spk_alloc; 356 unsigned long spk_mask; 357 const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc; 358 359 spk_alloc = drm_eld_get_spk_alloc(hcp->eld); 360 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc); 361 362 for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) { 363 /* If spk_alloc == 0, HDMI is unplugged return stereo config*/ 364 if (!spk_alloc && cap->ca_id == 0) 365 return i; 366 if (cap->n_ch != channels) 367 continue; 368 if (!(cap->mask == (spk_mask & cap->mask))) 369 continue; 370 return i; 371 } 372 373 return -EINVAL; 374 } 375 static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol, 376 struct snd_ctl_elem_value *ucontrol) 377 { 378 unsigned const char *map; 379 unsigned int i; 380 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 381 struct hdmi_codec_priv *hcp = info->private_data; 382 383 map = info->chmap[hcp->chmap_idx].map; 384 385 for (i = 0; i < info->max_channels; i++) { 386 if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN) 387 ucontrol->value.integer.value[i] = 0; 388 else 389 ucontrol->value.integer.value[i] = map[i]; 390 } 391 392 return 0; 393 } 394 395 static int hdmi_codec_new_stream(struct snd_pcm_substream *substream, 396 struct snd_soc_dai *dai) 397 { 398 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 399 int ret = 0; 400 401 mutex_lock(&hcp->current_stream_lock); 402 if (!hcp->current_stream) { 403 hcp->current_stream = substream; 404 } else if (hcp->current_stream != substream) { 405 dev_err(dai->dev, "Only one simultaneous stream supported!\n"); 406 ret = -EINVAL; 407 } 408 mutex_unlock(&hcp->current_stream_lock); 409 410 return ret; 411 } 412 413 static int hdmi_codec_startup(struct snd_pcm_substream *substream, 414 struct snd_soc_dai *dai) 415 { 416 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 417 int ret = 0; 418 419 dev_dbg(dai->dev, "%s()\n", __func__); 420 421 ret = hdmi_codec_new_stream(substream, dai); 422 if (ret) 423 return ret; 424 425 if (hcp->hcd.ops->audio_startup) { 426 ret = hcp->hcd.ops->audio_startup(dai->dev->parent, hcp->hcd.data); 427 if (ret) { 428 mutex_lock(&hcp->current_stream_lock); 429 hcp->current_stream = NULL; 430 mutex_unlock(&hcp->current_stream_lock); 431 return ret; 432 } 433 } 434 435 if (hcp->hcd.ops->get_eld) { 436 ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->hcd.data, 437 hcp->eld, sizeof(hcp->eld)); 438 439 if (!ret) { 440 ret = snd_pcm_hw_constraint_eld(substream->runtime, 441 hcp->eld); 442 if (ret) 443 return ret; 444 } 445 /* Select chmap supported */ 446 hdmi_codec_eld_chmap(hcp); 447 } 448 return 0; 449 } 450 451 static void hdmi_codec_shutdown(struct snd_pcm_substream *substream, 452 struct snd_soc_dai *dai) 453 { 454 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 455 456 dev_dbg(dai->dev, "%s()\n", __func__); 457 458 WARN_ON(hcp->current_stream != substream); 459 460 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 461 hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data); 462 463 mutex_lock(&hcp->current_stream_lock); 464 hcp->current_stream = NULL; 465 mutex_unlock(&hcp->current_stream_lock); 466 } 467 468 static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, 469 struct snd_pcm_hw_params *params, 470 struct snd_soc_dai *dai) 471 { 472 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 473 struct hdmi_codec_params hp = { 474 .iec = { 475 .status = { 0 }, 476 .subcode = { 0 }, 477 .pad = 0, 478 .dig_subframe = { 0 }, 479 } 480 }; 481 int ret, idx; 482 483 dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__, 484 params_width(params), params_rate(params), 485 params_channels(params)); 486 487 if (params_width(params) > 24) 488 params->msbits = 24; 489 490 ret = snd_pcm_create_iec958_consumer_hw_params(params, hp.iec.status, 491 sizeof(hp.iec.status)); 492 if (ret < 0) { 493 dev_err(dai->dev, "Creating IEC958 channel status failed %d\n", 494 ret); 495 return ret; 496 } 497 498 ret = hdmi_codec_new_stream(substream, dai); 499 if (ret) 500 return ret; 501 502 hdmi_audio_infoframe_init(&hp.cea); 503 hp.cea.channels = params_channels(params); 504 hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; 505 hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; 506 hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; 507 508 /* Select a channel allocation that matches with ELD and pcm channels */ 509 idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels); 510 if (idx < 0) { 511 dev_err(dai->dev, "Not able to map channels to speakers (%d)\n", 512 idx); 513 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 514 return idx; 515 } 516 hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id; 517 hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id; 518 519 hp.sample_width = params_width(params); 520 hp.sample_rate = params_rate(params); 521 hp.channels = params_channels(params); 522 523 return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data, 524 &hcp->daifmt[dai->id], &hp); 525 } 526 527 static int hdmi_codec_set_fmt(struct snd_soc_dai *dai, 528 unsigned int fmt) 529 { 530 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 531 struct hdmi_codec_daifmt cf = { 0 }; 532 int ret = 0; 533 534 dev_dbg(dai->dev, "%s()\n", __func__); 535 536 if (dai->id == DAI_ID_SPDIF) { 537 cf.fmt = HDMI_SPDIF; 538 } else { 539 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 540 case SND_SOC_DAIFMT_CBM_CFM: 541 cf.bit_clk_master = 1; 542 cf.frame_clk_master = 1; 543 break; 544 case SND_SOC_DAIFMT_CBS_CFM: 545 cf.frame_clk_master = 1; 546 break; 547 case SND_SOC_DAIFMT_CBM_CFS: 548 cf.bit_clk_master = 1; 549 break; 550 case SND_SOC_DAIFMT_CBS_CFS: 551 break; 552 default: 553 return -EINVAL; 554 } 555 556 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 557 case SND_SOC_DAIFMT_NB_NF: 558 break; 559 case SND_SOC_DAIFMT_NB_IF: 560 cf.frame_clk_inv = 1; 561 break; 562 case SND_SOC_DAIFMT_IB_NF: 563 cf.bit_clk_inv = 1; 564 break; 565 case SND_SOC_DAIFMT_IB_IF: 566 cf.frame_clk_inv = 1; 567 cf.bit_clk_inv = 1; 568 break; 569 } 570 571 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 572 case SND_SOC_DAIFMT_I2S: 573 cf.fmt = HDMI_I2S; 574 break; 575 case SND_SOC_DAIFMT_DSP_A: 576 cf.fmt = HDMI_DSP_A; 577 break; 578 case SND_SOC_DAIFMT_DSP_B: 579 cf.fmt = HDMI_DSP_B; 580 break; 581 case SND_SOC_DAIFMT_RIGHT_J: 582 cf.fmt = HDMI_RIGHT_J; 583 break; 584 case SND_SOC_DAIFMT_LEFT_J: 585 cf.fmt = HDMI_LEFT_J; 586 break; 587 case SND_SOC_DAIFMT_AC97: 588 cf.fmt = HDMI_AC97; 589 break; 590 default: 591 dev_err(dai->dev, "Invalid DAI interface format\n"); 592 return -EINVAL; 593 } 594 } 595 596 hcp->daifmt[dai->id] = cf; 597 598 return ret; 599 } 600 601 static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute) 602 { 603 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 604 605 dev_dbg(dai->dev, "%s()\n", __func__); 606 607 if (hcp->hcd.ops->digital_mute) 608 return hcp->hcd.ops->digital_mute(dai->dev->parent, 609 hcp->hcd.data, mute); 610 611 return 0; 612 } 613 614 static const struct snd_soc_dai_ops hdmi_dai_ops = { 615 .startup = hdmi_codec_startup, 616 .shutdown = hdmi_codec_shutdown, 617 .hw_params = hdmi_codec_hw_params, 618 .set_fmt = hdmi_codec_set_fmt, 619 .digital_mute = hdmi_codec_digital_mute, 620 }; 621 622 623 #define HDMI_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ 624 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\ 625 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 626 SNDRV_PCM_RATE_192000) 627 628 #define SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\ 629 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\ 630 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\ 631 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE) 632 633 /* 634 * This list is only for formats allowed on the I2S bus. So there is 635 * some formats listed that are not supported by HDMI interface. For 636 * instance allowing the 32-bit formats enables 24-precision with CPU 637 * DAIs that do not support 24-bit formats. If the extra formats cause 638 * problems, we should add the video side driver an option to disable 639 * them. 640 */ 641 #define I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\ 642 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\ 643 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\ 644 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\ 645 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE) 646 647 static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd, 648 struct snd_soc_dai *dai) 649 { 650 struct snd_soc_dai_driver *drv = dai->driver; 651 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 652 struct snd_kcontrol *kctl; 653 struct snd_kcontrol_new hdmi_eld_ctl = { 654 .access = SNDRV_CTL_ELEM_ACCESS_READ | 655 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 656 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 657 .name = "ELD", 658 .info = hdmi_eld_ctl_info, 659 .get = hdmi_eld_ctl_get, 660 .device = rtd->pcm->device, 661 }; 662 int ret; 663 664 dev_dbg(dai->dev, "%s()\n", __func__); 665 666 ret = snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK, 667 NULL, drv->playback.channels_max, 0, 668 &hcp->chmap_info); 669 if (ret < 0) 670 return ret; 671 672 /* override handlers */ 673 hcp->chmap_info->private_data = hcp; 674 hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get; 675 676 /* default chmap supported is stereo */ 677 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps; 678 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 679 680 /* add ELD ctl with the device number corresponding to the PCM stream */ 681 kctl = snd_ctl_new1(&hdmi_eld_ctl, dai->component); 682 if (!kctl) 683 return -ENOMEM; 684 685 return snd_ctl_add(rtd->card->snd_card, kctl); 686 } 687 688 static int hdmi_dai_probe(struct snd_soc_dai *dai) 689 { 690 struct snd_soc_dapm_context *dapm; 691 struct snd_soc_dapm_route route = { 692 .sink = "TX", 693 .source = dai->driver->playback.stream_name, 694 }; 695 696 dapm = snd_soc_component_get_dapm(dai->component); 697 698 return snd_soc_dapm_add_routes(dapm, &route, 1); 699 } 700 701 static const struct snd_soc_dai_driver hdmi_i2s_dai = { 702 .name = "i2s-hifi", 703 .id = DAI_ID_I2S, 704 .probe = hdmi_dai_probe, 705 .playback = { 706 .stream_name = "I2S Playback", 707 .channels_min = 2, 708 .channels_max = 8, 709 .rates = HDMI_RATES, 710 .formats = I2S_FORMATS, 711 .sig_bits = 24, 712 }, 713 .ops = &hdmi_dai_ops, 714 .pcm_new = hdmi_codec_pcm_new, 715 }; 716 717 static const struct snd_soc_dai_driver hdmi_spdif_dai = { 718 .name = "spdif-hifi", 719 .id = DAI_ID_SPDIF, 720 .probe = hdmi_dai_probe, 721 .playback = { 722 .stream_name = "SPDIF Playback", 723 .channels_min = 2, 724 .channels_max = 2, 725 .rates = HDMI_RATES, 726 .formats = SPDIF_FORMATS, 727 }, 728 .ops = &hdmi_dai_ops, 729 .pcm_new = hdmi_codec_pcm_new, 730 }; 731 732 static int hdmi_of_xlate_dai_id(struct snd_soc_component *component, 733 struct device_node *endpoint) 734 { 735 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component); 736 int ret = -ENOTSUPP; /* see snd_soc_get_dai_id() */ 737 738 if (hcp->hcd.ops->get_dai_id) 739 ret = hcp->hcd.ops->get_dai_id(component, endpoint); 740 741 return ret; 742 } 743 744 static const struct snd_soc_component_driver hdmi_driver = { 745 .dapm_widgets = hdmi_widgets, 746 .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets), 747 .of_xlate_dai_id = hdmi_of_xlate_dai_id, 748 .idle_bias_on = 1, 749 .use_pmdown_time = 1, 750 .endianness = 1, 751 .non_legacy_dai_naming = 1, 752 }; 753 754 static int hdmi_codec_probe(struct platform_device *pdev) 755 { 756 struct hdmi_codec_pdata *hcd = pdev->dev.platform_data; 757 struct device *dev = &pdev->dev; 758 struct hdmi_codec_priv *hcp; 759 int dai_count, i = 0; 760 int ret; 761 762 dev_dbg(dev, "%s()\n", __func__); 763 764 if (!hcd) { 765 dev_err(dev, "%s: No plalform data\n", __func__); 766 return -EINVAL; 767 } 768 769 dai_count = hcd->i2s + hcd->spdif; 770 if (dai_count < 1 || !hcd->ops || !hcd->ops->hw_params || 771 !hcd->ops->audio_shutdown) { 772 dev_err(dev, "%s: Invalid parameters\n", __func__); 773 return -EINVAL; 774 } 775 776 hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL); 777 if (!hcp) 778 return -ENOMEM; 779 780 hcp->hcd = *hcd; 781 mutex_init(&hcp->current_stream_lock); 782 783 hcp->daidrv = devm_kcalloc(dev, dai_count, sizeof(*hcp->daidrv), 784 GFP_KERNEL); 785 if (!hcp->daidrv) 786 return -ENOMEM; 787 788 if (hcd->i2s) { 789 hcp->daidrv[i] = hdmi_i2s_dai; 790 hcp->daidrv[i].playback.channels_max = 791 hcd->max_i2s_channels; 792 i++; 793 } 794 795 if (hcd->spdif) 796 hcp->daidrv[i] = hdmi_spdif_dai; 797 798 ret = devm_snd_soc_register_component(dev, &hdmi_driver, hcp->daidrv, 799 dai_count); 800 if (ret) { 801 dev_err(dev, "%s: snd_soc_register_component() failed (%d)\n", 802 __func__, ret); 803 return ret; 804 } 805 806 dev_set_drvdata(dev, hcp); 807 return 0; 808 } 809 810 static struct platform_driver hdmi_codec_driver = { 811 .driver = { 812 .name = HDMI_CODEC_DRV_NAME, 813 }, 814 .probe = hdmi_codec_probe, 815 }; 816 817 module_platform_driver(hdmi_codec_driver); 818 819 MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>"); 820 MODULE_DESCRIPTION("HDMI Audio Codec Driver"); 821 MODULE_LICENSE("GPL"); 822 MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME); 823