1 /* 2 * ALSA SoC codec for HDMI encoder drivers 3 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 4 * Author: Jyri Sarha <jsarha@ti.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 */ 15 #include <linux/module.h> 16 #include <linux/string.h> 17 #include <sound/core.h> 18 #include <sound/pcm.h> 19 #include <sound/pcm_params.h> 20 #include <sound/soc.h> 21 #include <sound/tlv.h> 22 #include <sound/pcm_drm_eld.h> 23 #include <sound/hdmi-codec.h> 24 #include <sound/pcm_iec958.h> 25 26 #include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */ 27 28 struct hdmi_device { 29 struct device *dev; 30 struct list_head list; 31 int cnt; 32 }; 33 #define pos_to_hdmi_device(pos) container_of((pos), struct hdmi_device, list) 34 LIST_HEAD(hdmi_device_list); 35 static DEFINE_MUTEX(hdmi_mutex); 36 37 #define DAI_NAME_SIZE 16 38 39 #define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1 40 41 struct hdmi_codec_channel_map_table { 42 unsigned char map; /* ALSA API channel map position */ 43 unsigned long spk_mask; /* speaker position bit mask */ 44 }; 45 46 /* 47 * CEA speaker placement for HDMI 1.4: 48 * 49 * FL FLC FC FRC FR FRW 50 * 51 * LFE 52 * 53 * RL RLC RC RRC RR 54 * 55 * Speaker placement has to be extended to support HDMI 2.0 56 */ 57 enum hdmi_codec_cea_spk_placement { 58 FL = BIT(0), /* Front Left */ 59 FC = BIT(1), /* Front Center */ 60 FR = BIT(2), /* Front Right */ 61 FLC = BIT(3), /* Front Left Center */ 62 FRC = BIT(4), /* Front Right Center */ 63 RL = BIT(5), /* Rear Left */ 64 RC = BIT(6), /* Rear Center */ 65 RR = BIT(7), /* Rear Right */ 66 RLC = BIT(8), /* Rear Left Center */ 67 RRC = BIT(9), /* Rear Right Center */ 68 LFE = BIT(10), /* Low Frequency Effect */ 69 }; 70 71 /* 72 * cea Speaker allocation structure 73 */ 74 struct hdmi_codec_cea_spk_alloc { 75 const int ca_id; 76 unsigned int n_ch; 77 unsigned long mask; 78 }; 79 80 /* Channel maps stereo HDMI */ 81 const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = { 82 { .channels = 2, 83 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, 84 { } 85 }; 86 87 /* Channel maps for multi-channel playbacks, up to 8 n_ch */ 88 const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = { 89 { .channels = 2, /* CA_ID 0x00 */ 90 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, 91 { .channels = 4, /* CA_ID 0x01 */ 92 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 93 SNDRV_CHMAP_NA } }, 94 { .channels = 4, /* CA_ID 0x02 */ 95 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 96 SNDRV_CHMAP_FC } }, 97 { .channels = 4, /* CA_ID 0x03 */ 98 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 99 SNDRV_CHMAP_FC } }, 100 { .channels = 6, /* CA_ID 0x04 */ 101 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 102 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 103 { .channels = 6, /* CA_ID 0x05 */ 104 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 105 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 106 { .channels = 6, /* CA_ID 0x06 */ 107 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 108 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 109 { .channels = 6, /* CA_ID 0x07 */ 110 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 111 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 112 { .channels = 6, /* CA_ID 0x08 */ 113 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 114 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 115 { .channels = 6, /* CA_ID 0x09 */ 116 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 117 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 118 { .channels = 6, /* CA_ID 0x0A */ 119 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 120 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 121 { .channels = 6, /* CA_ID 0x0B */ 122 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 123 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 124 { .channels = 8, /* CA_ID 0x0C */ 125 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 126 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 127 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 128 { .channels = 8, /* CA_ID 0x0D */ 129 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 130 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 131 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 132 { .channels = 8, /* CA_ID 0x0E */ 133 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 134 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 135 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 136 { .channels = 8, /* CA_ID 0x0F */ 137 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 138 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 139 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } }, 140 { .channels = 8, /* CA_ID 0x10 */ 141 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 142 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 143 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 144 { .channels = 8, /* CA_ID 0x11 */ 145 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 146 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 147 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 148 { .channels = 8, /* CA_ID 0x12 */ 149 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 150 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 151 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 152 { .channels = 8, /* CA_ID 0x13 */ 153 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 154 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR, 155 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } }, 156 { .channels = 8, /* CA_ID 0x14 */ 157 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 158 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 159 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 160 { .channels = 8, /* CA_ID 0x15 */ 161 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 162 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 163 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 164 { .channels = 8, /* CA_ID 0x16 */ 165 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 166 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 167 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 168 { .channels = 8, /* CA_ID 0x17 */ 169 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 170 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 171 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 172 { .channels = 8, /* CA_ID 0x18 */ 173 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 174 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 175 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 176 { .channels = 8, /* CA_ID 0x19 */ 177 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 178 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 179 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 180 { .channels = 8, /* CA_ID 0x1A */ 181 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 182 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 183 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 184 { .channels = 8, /* CA_ID 0x1B */ 185 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 186 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 187 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 188 { .channels = 8, /* CA_ID 0x1C */ 189 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 190 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 191 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 192 { .channels = 8, /* CA_ID 0x1D */ 193 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 194 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 195 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 196 { .channels = 8, /* CA_ID 0x1E */ 197 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA, 198 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 199 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 200 { .channels = 8, /* CA_ID 0x1F */ 201 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE, 202 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, 203 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } }, 204 { } 205 }; 206 207 /* 208 * hdmi_codec_channel_alloc: speaker configuration available for CEA 209 * 210 * This is an ordered list that must match with hdmi_codec_8ch_chmaps struct 211 * The preceding ones have better chances to be selected by 212 * hdmi_codec_get_ch_alloc_table_idx(). 213 */ 214 static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = { 215 { .ca_id = 0x00, .n_ch = 2, 216 .mask = FL | FR}, 217 /* 2.1 */ 218 { .ca_id = 0x01, .n_ch = 4, 219 .mask = FL | FR | LFE}, 220 /* Dolby Surround */ 221 { .ca_id = 0x02, .n_ch = 4, 222 .mask = FL | FR | FC }, 223 /* surround51 */ 224 { .ca_id = 0x0b, .n_ch = 6, 225 .mask = FL | FR | LFE | FC | RL | RR}, 226 /* surround40 */ 227 { .ca_id = 0x08, .n_ch = 6, 228 .mask = FL | FR | RL | RR }, 229 /* surround41 */ 230 { .ca_id = 0x09, .n_ch = 6, 231 .mask = FL | FR | LFE | RL | RR }, 232 /* surround50 */ 233 { .ca_id = 0x0a, .n_ch = 6, 234 .mask = FL | FR | FC | RL | RR }, 235 /* 6.1 */ 236 { .ca_id = 0x0f, .n_ch = 8, 237 .mask = FL | FR | LFE | FC | RL | RR | RC }, 238 /* surround71 */ 239 { .ca_id = 0x13, .n_ch = 8, 240 .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC }, 241 /* others */ 242 { .ca_id = 0x03, .n_ch = 8, 243 .mask = FL | FR | LFE | FC }, 244 { .ca_id = 0x04, .n_ch = 8, 245 .mask = FL | FR | RC}, 246 { .ca_id = 0x05, .n_ch = 8, 247 .mask = FL | FR | LFE | RC }, 248 { .ca_id = 0x06, .n_ch = 8, 249 .mask = FL | FR | FC | RC }, 250 { .ca_id = 0x07, .n_ch = 8, 251 .mask = FL | FR | LFE | FC | RC }, 252 { .ca_id = 0x0c, .n_ch = 8, 253 .mask = FL | FR | RC | RL | RR }, 254 { .ca_id = 0x0d, .n_ch = 8, 255 .mask = FL | FR | LFE | RL | RR | RC }, 256 { .ca_id = 0x0e, .n_ch = 8, 257 .mask = FL | FR | FC | RL | RR | RC }, 258 { .ca_id = 0x10, .n_ch = 8, 259 .mask = FL | FR | RL | RR | RLC | RRC }, 260 { .ca_id = 0x11, .n_ch = 8, 261 .mask = FL | FR | LFE | RL | RR | RLC | RRC }, 262 { .ca_id = 0x12, .n_ch = 8, 263 .mask = FL | FR | FC | RL | RR | RLC | RRC }, 264 { .ca_id = 0x14, .n_ch = 8, 265 .mask = FL | FR | FLC | FRC }, 266 { .ca_id = 0x15, .n_ch = 8, 267 .mask = FL | FR | LFE | FLC | FRC }, 268 { .ca_id = 0x16, .n_ch = 8, 269 .mask = FL | FR | FC | FLC | FRC }, 270 { .ca_id = 0x17, .n_ch = 8, 271 .mask = FL | FR | LFE | FC | FLC | FRC }, 272 { .ca_id = 0x18, .n_ch = 8, 273 .mask = FL | FR | RC | FLC | FRC }, 274 { .ca_id = 0x19, .n_ch = 8, 275 .mask = FL | FR | LFE | RC | FLC | FRC }, 276 { .ca_id = 0x1a, .n_ch = 8, 277 .mask = FL | FR | RC | FC | FLC | FRC }, 278 { .ca_id = 0x1b, .n_ch = 8, 279 .mask = FL | FR | LFE | RC | FC | FLC | FRC }, 280 { .ca_id = 0x1c, .n_ch = 8, 281 .mask = FL | FR | RL | RR | FLC | FRC }, 282 { .ca_id = 0x1d, .n_ch = 8, 283 .mask = FL | FR | LFE | RL | RR | FLC | FRC }, 284 { .ca_id = 0x1e, .n_ch = 8, 285 .mask = FL | FR | FC | RL | RR | FLC | FRC }, 286 { .ca_id = 0x1f, .n_ch = 8, 287 .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC }, 288 }; 289 290 struct hdmi_codec_priv { 291 struct hdmi_codec_pdata hcd; 292 struct snd_soc_dai_driver *daidrv; 293 struct hdmi_codec_daifmt daifmt[2]; 294 struct mutex current_stream_lock; 295 struct snd_pcm_substream *current_stream; 296 struct snd_pcm_hw_constraint_list ratec; 297 uint8_t eld[MAX_ELD_BYTES]; 298 struct snd_pcm_chmap *chmap_info; 299 unsigned int chmap_idx; 300 }; 301 302 static const struct snd_soc_dapm_widget hdmi_widgets[] = { 303 SND_SOC_DAPM_OUTPUT("TX"), 304 }; 305 306 static const struct snd_soc_dapm_route hdmi_routes[] = { 307 { "TX", NULL, "Playback" }, 308 }; 309 310 enum { 311 DAI_ID_I2S = 0, 312 DAI_ID_SPDIF, 313 }; 314 315 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 316 struct snd_ctl_elem_info *uinfo) 317 { 318 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 319 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component); 320 321 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 322 uinfo->count = sizeof(hcp->eld); 323 324 return 0; 325 } 326 327 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 328 struct snd_ctl_elem_value *ucontrol) 329 { 330 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); 331 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component); 332 333 memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld)); 334 335 return 0; 336 } 337 338 static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc) 339 { 340 int i; 341 const unsigned long hdmi_codec_eld_spk_alloc_bits[] = { 342 [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR, 343 [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC, 344 }; 345 unsigned long spk_mask = 0; 346 347 for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) { 348 if (spk_alloc & (1 << i)) 349 spk_mask |= hdmi_codec_eld_spk_alloc_bits[i]; 350 } 351 352 return spk_mask; 353 } 354 355 void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp) 356 { 357 u8 spk_alloc; 358 unsigned long spk_mask; 359 360 spk_alloc = drm_eld_get_spk_alloc(hcp->eld); 361 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc); 362 363 /* Detect if only stereo supported, else return 8 channels mappings */ 364 if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2) 365 hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps; 366 else 367 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps; 368 } 369 370 static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp, 371 unsigned char channels) 372 { 373 int i; 374 u8 spk_alloc; 375 unsigned long spk_mask; 376 const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc; 377 378 spk_alloc = drm_eld_get_spk_alloc(hcp->eld); 379 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc); 380 381 for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) { 382 /* If spk_alloc == 0, HDMI is unplugged return stereo config*/ 383 if (!spk_alloc && cap->ca_id == 0) 384 return i; 385 if (cap->n_ch != channels) 386 continue; 387 if (!(cap->mask == (spk_mask & cap->mask))) 388 continue; 389 return i; 390 } 391 392 return -EINVAL; 393 } 394 static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol, 395 struct snd_ctl_elem_value *ucontrol) 396 { 397 unsigned const char *map; 398 unsigned int i; 399 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 400 struct hdmi_codec_priv *hcp = info->private_data; 401 402 map = info->chmap[hcp->chmap_idx].map; 403 404 for (i = 0; i < info->max_channels; i++) { 405 if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN) 406 ucontrol->value.integer.value[i] = 0; 407 else 408 ucontrol->value.integer.value[i] = map[i]; 409 } 410 411 return 0; 412 } 413 414 415 static const struct snd_kcontrol_new hdmi_controls[] = { 416 { 417 .access = SNDRV_CTL_ELEM_ACCESS_READ | 418 SNDRV_CTL_ELEM_ACCESS_VOLATILE, 419 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 420 .name = "ELD", 421 .info = hdmi_eld_ctl_info, 422 .get = hdmi_eld_ctl_get, 423 }, 424 }; 425 426 static int hdmi_codec_new_stream(struct snd_pcm_substream *substream, 427 struct snd_soc_dai *dai) 428 { 429 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 430 int ret = 0; 431 432 mutex_lock(&hcp->current_stream_lock); 433 if (!hcp->current_stream) { 434 hcp->current_stream = substream; 435 } else if (hcp->current_stream != substream) { 436 dev_err(dai->dev, "Only one simultaneous stream supported!\n"); 437 ret = -EINVAL; 438 } 439 mutex_unlock(&hcp->current_stream_lock); 440 441 return ret; 442 } 443 444 static int hdmi_codec_startup(struct snd_pcm_substream *substream, 445 struct snd_soc_dai *dai) 446 { 447 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 448 int ret = 0; 449 450 dev_dbg(dai->dev, "%s()\n", __func__); 451 452 ret = hdmi_codec_new_stream(substream, dai); 453 if (ret) 454 return ret; 455 456 if (hcp->hcd.ops->audio_startup) { 457 ret = hcp->hcd.ops->audio_startup(dai->dev->parent, hcp->hcd.data); 458 if (ret) { 459 mutex_lock(&hcp->current_stream_lock); 460 hcp->current_stream = NULL; 461 mutex_unlock(&hcp->current_stream_lock); 462 return ret; 463 } 464 } 465 466 if (hcp->hcd.ops->get_eld) { 467 ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->hcd.data, 468 hcp->eld, sizeof(hcp->eld)); 469 470 if (!ret) { 471 ret = snd_pcm_hw_constraint_eld(substream->runtime, 472 hcp->eld); 473 if (ret) 474 return ret; 475 } 476 /* Select chmap supported */ 477 hdmi_codec_eld_chmap(hcp); 478 } 479 return 0; 480 } 481 482 static void hdmi_codec_shutdown(struct snd_pcm_substream *substream, 483 struct snd_soc_dai *dai) 484 { 485 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 486 487 dev_dbg(dai->dev, "%s()\n", __func__); 488 489 WARN_ON(hcp->current_stream != substream); 490 491 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 492 hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data); 493 494 mutex_lock(&hcp->current_stream_lock); 495 hcp->current_stream = NULL; 496 mutex_unlock(&hcp->current_stream_lock); 497 } 498 499 static int hdmi_codec_hw_params(struct snd_pcm_substream *substream, 500 struct snd_pcm_hw_params *params, 501 struct snd_soc_dai *dai) 502 { 503 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 504 struct hdmi_codec_params hp = { 505 .iec = { 506 .status = { 0 }, 507 .subcode = { 0 }, 508 .pad = 0, 509 .dig_subframe = { 0 }, 510 } 511 }; 512 int ret, idx; 513 514 dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__, 515 params_width(params), params_rate(params), 516 params_channels(params)); 517 518 if (params_width(params) > 24) 519 params->msbits = 24; 520 521 ret = snd_pcm_create_iec958_consumer_hw_params(params, hp.iec.status, 522 sizeof(hp.iec.status)); 523 if (ret < 0) { 524 dev_err(dai->dev, "Creating IEC958 channel status failed %d\n", 525 ret); 526 return ret; 527 } 528 529 ret = hdmi_codec_new_stream(substream, dai); 530 if (ret) 531 return ret; 532 533 hdmi_audio_infoframe_init(&hp.cea); 534 hp.cea.channels = params_channels(params); 535 hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; 536 hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; 537 hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; 538 539 /* Select a channel allocation that matches with ELD and pcm channels */ 540 idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels); 541 if (idx < 0) { 542 dev_err(dai->dev, "Not able to map channels to speakers (%d)\n", 543 idx); 544 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 545 return idx; 546 } 547 hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id; 548 hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id; 549 550 hp.sample_width = params_width(params); 551 hp.sample_rate = params_rate(params); 552 hp.channels = params_channels(params); 553 554 return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data, 555 &hcp->daifmt[dai->id], &hp); 556 } 557 558 static int hdmi_codec_set_fmt(struct snd_soc_dai *dai, 559 unsigned int fmt) 560 { 561 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 562 struct hdmi_codec_daifmt cf = { 0 }; 563 int ret = 0; 564 565 dev_dbg(dai->dev, "%s()\n", __func__); 566 567 if (dai->id == DAI_ID_SPDIF) { 568 cf.fmt = HDMI_SPDIF; 569 } else { 570 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 571 case SND_SOC_DAIFMT_CBM_CFM: 572 cf.bit_clk_master = 1; 573 cf.frame_clk_master = 1; 574 break; 575 case SND_SOC_DAIFMT_CBS_CFM: 576 cf.frame_clk_master = 1; 577 break; 578 case SND_SOC_DAIFMT_CBM_CFS: 579 cf.bit_clk_master = 1; 580 break; 581 case SND_SOC_DAIFMT_CBS_CFS: 582 break; 583 default: 584 return -EINVAL; 585 } 586 587 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 588 case SND_SOC_DAIFMT_NB_NF: 589 break; 590 case SND_SOC_DAIFMT_NB_IF: 591 cf.frame_clk_inv = 1; 592 break; 593 case SND_SOC_DAIFMT_IB_NF: 594 cf.bit_clk_inv = 1; 595 break; 596 case SND_SOC_DAIFMT_IB_IF: 597 cf.frame_clk_inv = 1; 598 cf.bit_clk_inv = 1; 599 break; 600 } 601 602 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 603 case SND_SOC_DAIFMT_I2S: 604 cf.fmt = HDMI_I2S; 605 break; 606 case SND_SOC_DAIFMT_DSP_A: 607 cf.fmt = HDMI_DSP_A; 608 break; 609 case SND_SOC_DAIFMT_DSP_B: 610 cf.fmt = HDMI_DSP_B; 611 break; 612 case SND_SOC_DAIFMT_RIGHT_J: 613 cf.fmt = HDMI_RIGHT_J; 614 break; 615 case SND_SOC_DAIFMT_LEFT_J: 616 cf.fmt = HDMI_LEFT_J; 617 break; 618 case SND_SOC_DAIFMT_AC97: 619 cf.fmt = HDMI_AC97; 620 break; 621 default: 622 dev_err(dai->dev, "Invalid DAI interface format\n"); 623 return -EINVAL; 624 } 625 } 626 627 hcp->daifmt[dai->id] = cf; 628 629 return ret; 630 } 631 632 static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute) 633 { 634 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 635 636 dev_dbg(dai->dev, "%s()\n", __func__); 637 638 if (hcp->hcd.ops->digital_mute) 639 return hcp->hcd.ops->digital_mute(dai->dev->parent, 640 hcp->hcd.data, mute); 641 642 return 0; 643 } 644 645 static const struct snd_soc_dai_ops hdmi_dai_ops = { 646 .startup = hdmi_codec_startup, 647 .shutdown = hdmi_codec_shutdown, 648 .hw_params = hdmi_codec_hw_params, 649 .set_fmt = hdmi_codec_set_fmt, 650 .digital_mute = hdmi_codec_digital_mute, 651 }; 652 653 654 #define HDMI_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ 655 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\ 656 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 657 SNDRV_PCM_RATE_192000) 658 659 #define SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\ 660 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\ 661 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\ 662 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE) 663 664 /* 665 * This list is only for formats allowed on the I2S bus. So there is 666 * some formats listed that are not supported by HDMI interface. For 667 * instance allowing the 32-bit formats enables 24-precision with CPU 668 * DAIs that do not support 24-bit formats. If the extra formats cause 669 * problems, we should add the video side driver an option to disable 670 * them. 671 */ 672 #define I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\ 673 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\ 674 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\ 675 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\ 676 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE) 677 678 static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd, 679 struct snd_soc_dai *dai) 680 { 681 struct snd_soc_dai_driver *drv = dai->driver; 682 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai); 683 int ret; 684 685 dev_dbg(dai->dev, "%s()\n", __func__); 686 687 ret = snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK, 688 NULL, drv->playback.channels_max, 0, 689 &hcp->chmap_info); 690 if (ret < 0) 691 return ret; 692 693 /* override handlers */ 694 hcp->chmap_info->private_data = hcp; 695 hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get; 696 697 /* default chmap supported is stereo */ 698 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps; 699 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN; 700 701 return 0; 702 } 703 704 static struct snd_soc_dai_driver hdmi_i2s_dai = { 705 .id = DAI_ID_I2S, 706 .playback = { 707 .stream_name = "Playback", 708 .channels_min = 2, 709 .channels_max = 8, 710 .rates = HDMI_RATES, 711 .formats = I2S_FORMATS, 712 .sig_bits = 24, 713 }, 714 .ops = &hdmi_dai_ops, 715 .pcm_new = hdmi_codec_pcm_new, 716 }; 717 718 static const struct snd_soc_dai_driver hdmi_spdif_dai = { 719 .id = DAI_ID_SPDIF, 720 .playback = { 721 .stream_name = "Playback", 722 .channels_min = 2, 723 .channels_max = 2, 724 .rates = HDMI_RATES, 725 .formats = SPDIF_FORMATS, 726 }, 727 .ops = &hdmi_dai_ops, 728 .pcm_new = hdmi_codec_pcm_new, 729 }; 730 731 static char hdmi_dai_name[][DAI_NAME_SIZE] = { 732 "hdmi-hifi.0", 733 "hdmi-hifi.1", 734 "hdmi-hifi.2", 735 "hdmi-hifi.3", 736 }; 737 738 static int hdmi_of_xlate_dai_name(struct snd_soc_component *component, 739 struct of_phandle_args *args, 740 const char **dai_name) 741 { 742 int id; 743 744 if (args->args_count) 745 id = args->args[0]; 746 else 747 id = 0; 748 749 if (id < ARRAY_SIZE(hdmi_dai_name)) { 750 *dai_name = hdmi_dai_name[id]; 751 return 0; 752 } 753 754 return -EAGAIN; 755 } 756 757 static struct snd_soc_codec_driver hdmi_codec = { 758 .component_driver = { 759 .controls = hdmi_controls, 760 .num_controls = ARRAY_SIZE(hdmi_controls), 761 .dapm_widgets = hdmi_widgets, 762 .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets), 763 .dapm_routes = hdmi_routes, 764 .num_dapm_routes = ARRAY_SIZE(hdmi_routes), 765 .of_xlate_dai_name = hdmi_of_xlate_dai_name, 766 }, 767 }; 768 769 static int hdmi_codec_probe(struct platform_device *pdev) 770 { 771 struct hdmi_codec_pdata *hcd = pdev->dev.platform_data; 772 struct device *dev = &pdev->dev; 773 struct hdmi_codec_priv *hcp; 774 struct hdmi_device *hd; 775 struct list_head *pos; 776 int dai_count, i = 0; 777 int ret; 778 779 dev_dbg(dev, "%s()\n", __func__); 780 781 if (!hcd) { 782 dev_err(dev, "%s: No plalform data\n", __func__); 783 return -EINVAL; 784 } 785 786 dai_count = hcd->i2s + hcd->spdif; 787 if (dai_count < 1 || !hcd->ops || !hcd->ops->hw_params || 788 !hcd->ops->audio_shutdown) { 789 dev_err(dev, "%s: Invalid parameters\n", __func__); 790 return -EINVAL; 791 } 792 793 hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL); 794 if (!hcp) 795 return -ENOMEM; 796 797 hd = NULL; 798 mutex_lock(&hdmi_mutex); 799 list_for_each(pos, &hdmi_device_list) { 800 struct hdmi_device *tmp = pos_to_hdmi_device(pos); 801 802 if (tmp->dev == dev->parent) { 803 hd = tmp; 804 break; 805 } 806 } 807 808 if (!hd) { 809 hd = devm_kzalloc(dev, sizeof(*hd), GFP_KERNEL); 810 if (!hd) { 811 mutex_unlock(&hdmi_mutex); 812 return -ENOMEM; 813 } 814 815 hd->dev = dev->parent; 816 817 list_add_tail(&hd->list, &hdmi_device_list); 818 } 819 mutex_unlock(&hdmi_mutex); 820 821 if (hd->cnt >= ARRAY_SIZE(hdmi_dai_name)) { 822 dev_err(dev, "too many hdmi codec are deteced\n"); 823 return -EINVAL; 824 } 825 826 hcp->hcd = *hcd; 827 mutex_init(&hcp->current_stream_lock); 828 829 hcp->daidrv = devm_kzalloc(dev, dai_count * sizeof(*hcp->daidrv), 830 GFP_KERNEL); 831 if (!hcp->daidrv) 832 return -ENOMEM; 833 834 if (hcd->i2s) { 835 hcp->daidrv[i] = hdmi_i2s_dai; 836 hcp->daidrv[i].playback.channels_max = 837 hcd->max_i2s_channels; 838 hcp->daidrv[i].name = hdmi_dai_name[hd->cnt++]; 839 i++; 840 } 841 842 if (hcd->spdif) { 843 hcp->daidrv[i] = hdmi_spdif_dai; 844 hcp->daidrv[i].name = hdmi_dai_name[hd->cnt++]; 845 } 846 847 ret = snd_soc_register_codec(dev, &hdmi_codec, hcp->daidrv, 848 dai_count); 849 if (ret) { 850 dev_err(dev, "%s: snd_soc_register_codec() failed (%d)\n", 851 __func__, ret); 852 return ret; 853 } 854 855 dev_set_drvdata(dev, hcp); 856 return 0; 857 } 858 859 static int hdmi_codec_remove(struct platform_device *pdev) 860 { 861 struct device *dev = &pdev->dev; 862 struct list_head *pos; 863 struct hdmi_codec_priv *hcp; 864 865 mutex_lock(&hdmi_mutex); 866 list_for_each(pos, &hdmi_device_list) { 867 struct hdmi_device *tmp = pos_to_hdmi_device(pos); 868 869 if (tmp->dev == dev->parent) { 870 list_del(pos); 871 break; 872 } 873 } 874 mutex_unlock(&hdmi_mutex); 875 876 hcp = dev_get_drvdata(dev); 877 kfree(hcp->chmap_info); 878 snd_soc_unregister_codec(dev); 879 880 return 0; 881 } 882 883 static struct platform_driver hdmi_codec_driver = { 884 .driver = { 885 .name = HDMI_CODEC_DRV_NAME, 886 }, 887 .probe = hdmi_codec_probe, 888 .remove = hdmi_codec_remove, 889 }; 890 891 module_platform_driver(hdmi_codec_driver); 892 893 MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>"); 894 MODULE_DESCRIPTION("HDMI Audio Codec Driver"); 895 MODULE_LICENSE("GPL"); 896 MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME); 897