1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // es8326.c -- es8326 ALSA SoC audio driver 4 // Copyright Everest Semiconductor Co., Ltd 5 // 6 // Authors: David Yang <yangxiaohua@everest-semi.com> 7 // 8 9 #include <linux/clk.h> 10 #include <linux/i2c.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/module.h> 14 #include <sound/jack.h> 15 #include <sound/pcm_params.h> 16 #include <sound/soc.h> 17 #include <sound/soc-dapm.h> 18 #include <sound/tlv.h> 19 #include "es8326.h" 20 21 struct es8326_priv { 22 struct clk *mclk; 23 struct i2c_client *i2c; 24 struct regmap *regmap; 25 struct snd_soc_component *component; 26 struct delayed_work jack_detect_work; 27 struct delayed_work button_press_work; 28 struct snd_soc_jack *jack; 29 int irq; 30 /* The lock protects the situation that an irq is generated 31 * while enabling or disabling or during an irq. 32 */ 33 struct mutex lock; 34 u8 mic1_src; 35 u8 mic2_src; 36 u8 jack_pol; 37 u8 interrupt_src; 38 u8 interrupt_clk; 39 bool jd_inverted; 40 unsigned int sysclk; 41 42 bool calibrated; 43 int version; 44 }; 45 46 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 47 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 48 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0); 49 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0); 50 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0); 51 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0); 52 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0); 53 54 static const char *const winsize[] = { 55 "0.25db/2 LRCK", 56 "0.25db/4 LRCK", 57 "0.25db/8 LRCK", 58 "0.25db/16 LRCK", 59 "0.25db/32 LRCK", 60 "0.25db/64 LRCK", 61 "0.25db/128 LRCK", 62 "0.25db/256 LRCK", 63 "0.25db/512 LRCK", 64 "0.25db/1024 LRCK", 65 "0.25db/2048 LRCK", 66 "0.25db/4096 LRCK", 67 "0.25db/8192 LRCK", 68 "0.25db/16384 LRCK", 69 "0.25db/32768 LRCK", 70 "0.25db/65536 LRCK", 71 }; 72 73 static const char *const dacpol_txt[] = { 74 "Normal", "R Invert", "L Invert", "L + R Invert" }; 75 76 static const struct soc_enum dacpol = 77 SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt); 78 static const struct soc_enum alc_winsize = 79 SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize); 80 static const struct soc_enum drc_winsize = 81 SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize); 82 83 static const struct snd_kcontrol_new es8326_snd_controls[] = { 84 SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DAC_VOL, 0, 0xbf, 0, dac_vol_tlv), 85 SOC_ENUM("Playback Polarity", dacpol), 86 SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 87 SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv), 88 SOC_ENUM("DRC Winsize", drc_winsize), 89 SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv), 90 91 SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0, 92 adc_vol_tlv), 93 SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv), 94 SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv), 95 SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 96 SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0), 97 SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL, 98 0, 4, 0, drc_recovery_tlv), 99 SOC_ENUM("ALC Capture Winsize", alc_winsize), 100 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL, 101 0, 0x0f, 0, drc_target_tlv), 102 103 }; 104 105 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { 106 SND_SOC_DAPM_INPUT("MIC1"), 107 SND_SOC_DAPM_INPUT("MIC2"), 108 SND_SOC_DAPM_INPUT("MIC3"), 109 SND_SOC_DAPM_INPUT("MIC4"), 110 111 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 112 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 113 114 /* Digital Interface */ 115 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0), 116 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0), 117 118 /* ADC Digital Mute */ 119 SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0), 120 SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0), 121 SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0), 122 SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0), 123 124 /* Analog Power Supply*/ 125 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1), 126 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1), 127 SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0), 128 SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0), 129 130 SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0), 131 SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0), 132 133 SND_SOC_DAPM_OUTPUT("HPOL"), 134 SND_SOC_DAPM_OUTPUT("HPOR"), 135 }; 136 137 static const struct snd_soc_dapm_route es8326_dapm_routes[] = { 138 {"ADC L1", NULL, "MIC1"}, 139 {"ADC R1", NULL, "MIC2"}, 140 {"ADC L2", NULL, "MIC3"}, 141 {"ADC R2", NULL, "MIC4"}, 142 143 {"ADC L", NULL, "ADC L1"}, 144 {"ADC R", NULL, "ADC R1"}, 145 {"ADC L", NULL, "ADC L2"}, 146 {"ADC R", NULL, "ADC R2"}, 147 148 {"I2S OUT", NULL, "ADC L"}, 149 {"I2S OUT", NULL, "ADC R"}, 150 151 {"Right DAC", NULL, "I2S IN"}, 152 {"Left DAC", NULL, "I2S IN"}, 153 154 {"LHPMIX", NULL, "Left DAC"}, 155 {"RHPMIX", NULL, "Right DAC"}, 156 157 {"HPOL", NULL, "LHPMIX"}, 158 {"HPOR", NULL, "RHPMIX"}, 159 }; 160 161 static bool es8326_volatile_register(struct device *dev, unsigned int reg) 162 { 163 switch (reg) { 164 case ES8326_HPL_OFFSET_INI: 165 case ES8326_HPR_OFFSET_INI: 166 case ES8326_HPDET_STA: 167 case ES8326_CTIA_OMTP_STA: 168 case ES8326_CSM_MUTE_STA: 169 return true; 170 default: 171 return false; 172 } 173 } 174 175 static const struct regmap_config es8326_regmap_config = { 176 .reg_bits = 8, 177 .val_bits = 8, 178 .max_register = 0xff, 179 .volatile_reg = es8326_volatile_register, 180 .cache_type = REGCACHE_RBTREE, 181 }; 182 183 struct _coeff_div { 184 u16 fs; 185 u32 rate; 186 u32 mclk; 187 u8 reg4; 188 u8 reg5; 189 u8 reg6; 190 u8 reg7; 191 u8 reg8; 192 u8 reg9; 193 u8 rega; 194 u8 regb; 195 }; 196 197 /* codec hifi mclk clock divider coefficients */ 198 /* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */ 199 static const struct _coeff_div coeff_div[] = { 200 {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 201 {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 202 {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 203 {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 204 {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 205 {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 206 {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 207 {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 208 {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 209 {64, 8000, 512000, 0x60, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 210 {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 211 212 {64, 44100, 2822400, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 213 {64, 48000, 3072000, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 214 {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 215 {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 216 {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 217 {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 218 {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0x38, 0x08, 0x4f, 0x1f}, 219 {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 220 {128, 8000, 1024000, 0x60, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 221 {128, 16000, 2048000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 222 223 {128, 44100, 5644800, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 224 {128, 48000, 6144000, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 225 {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 226 {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 227 {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 228 {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 229 {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 230 {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 231 {256, 8000, 2048000, 0x60, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 232 {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 233 234 {256, 44100, 11289600, 0x00, 0x00, 0x10, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 235 {256, 48000, 12288000, 0x00, 0x00, 0x30, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 236 {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 237 {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 238 {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 239 {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 240 {400, 48000, 19200000, 0x09, 0x04, 0x0f, 0x6d, 0x3a, 0x0A, 0x4F, 0x1F}, 241 {500, 48000, 24000000, 0x18, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 242 {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 243 {512, 16000, 8192000, 0x20, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 244 245 {512, 44100, 22579200, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 246 {512, 48000, 24576000, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 247 {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 248 {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 249 {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 250 {1024, 8000, 8192000, 0x60, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 251 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 252 {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 253 {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 254 255 {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 256 {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 257 {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 258 {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 259 {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x5F}, 260 {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 261 {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 262 263 }; 264 265 static inline int get_coeff(int mclk, int rate) 266 { 267 int i; 268 269 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 270 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 271 return i; 272 } 273 274 return -EINVAL; 275 } 276 277 static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai, 278 int clk_id, unsigned int freq, int dir) 279 { 280 struct snd_soc_component *codec = codec_dai->component; 281 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 282 283 es8326->sysclk = freq; 284 285 return 0; 286 } 287 288 static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 289 { 290 struct snd_soc_component *component = codec_dai->component; 291 u8 iface = 0; 292 293 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 294 case SND_SOC_DAIFMT_CBC_CFP: 295 snd_soc_component_update_bits(component, ES8326_RESET, 296 ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN); 297 break; 298 case SND_SOC_DAIFMT_CBC_CFC: 299 break; 300 default: 301 return -EINVAL; 302 } 303 304 /* interface format */ 305 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 306 case SND_SOC_DAIFMT_I2S: 307 break; 308 case SND_SOC_DAIFMT_RIGHT_J: 309 dev_err(component->dev, "Codec driver does not support right justified\n"); 310 return -EINVAL; 311 case SND_SOC_DAIFMT_LEFT_J: 312 iface |= ES8326_DAIFMT_LEFT_J; 313 break; 314 case SND_SOC_DAIFMT_DSP_A: 315 iface |= ES8326_DAIFMT_DSP_A; 316 break; 317 case SND_SOC_DAIFMT_DSP_B: 318 iface |= ES8326_DAIFMT_DSP_B; 319 break; 320 default: 321 return -EINVAL; 322 } 323 324 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface); 325 326 return 0; 327 } 328 329 static int es8326_pcm_hw_params(struct snd_pcm_substream *substream, 330 struct snd_pcm_hw_params *params, 331 struct snd_soc_dai *dai) 332 { 333 struct snd_soc_component *component = dai->component; 334 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 335 u8 srate = 0; 336 int coeff; 337 338 coeff = get_coeff(es8326->sysclk, params_rate(params)); 339 /* bit size */ 340 switch (params_format(params)) { 341 case SNDRV_PCM_FORMAT_S16_LE: 342 srate |= ES8326_S16_LE; 343 break; 344 case SNDRV_PCM_FORMAT_S20_3LE: 345 srate |= ES8326_S20_3_LE; 346 break; 347 case SNDRV_PCM_FORMAT_S18_3LE: 348 srate |= ES8326_S18_LE; 349 break; 350 case SNDRV_PCM_FORMAT_S24_LE: 351 srate |= ES8326_S24_LE; 352 break; 353 case SNDRV_PCM_FORMAT_S32_LE: 354 srate |= ES8326_S32_LE; 355 break; 356 default: 357 return -EINVAL; 358 } 359 360 /* set iface & srate */ 361 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate); 362 363 if (coeff >= 0) { 364 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 365 coeff_div[coeff].reg4); 366 regmap_write(es8326->regmap, ES8326_CLK_DIV2, 367 coeff_div[coeff].reg5); 368 regmap_write(es8326->regmap, ES8326_CLK_DLL, 369 coeff_div[coeff].reg6); 370 regmap_write(es8326->regmap, ES8326_CLK_MUX, 371 coeff_div[coeff].reg7); 372 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL, 373 coeff_div[coeff].reg8); 374 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 375 coeff_div[coeff].reg9); 376 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR, 377 coeff_div[coeff].rega); 378 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR, 379 coeff_div[coeff].regb); 380 } else { 381 dev_warn(component->dev, "Clock coefficients do not match"); 382 } 383 384 return 0; 385 } 386 387 static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction) 388 { 389 struct snd_soc_component *component = dai->component; 390 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 391 392 if (mute) { 393 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 394 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 395 ES8326_MUTE_MASK, ES8326_MUTE); 396 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0); 397 } else { 398 if (!es8326->calibrated) { 399 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL); 400 msleep(30); 401 es8326->calibrated = true; 402 } 403 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa0); 404 regmap_write(es8326->regmap, ES8326_HP_VOL, 0x00); 405 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON); 406 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 407 ES8326_MUTE_MASK, ~(ES8326_MUTE)); 408 } 409 return 0; 410 } 411 412 static int es8326_set_bias_level(struct snd_soc_component *codec, 413 enum snd_soc_bias_level level) 414 { 415 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 416 int ret; 417 418 switch (level) { 419 case SND_SOC_BIAS_ON: 420 ret = clk_prepare_enable(es8326->mclk); 421 if (ret) 422 return ret; 423 regmap_write(es8326->regmap, ES8326_RESET, ES8326_PWRUP_SEQ_EN); 424 regmap_write(es8326->regmap, ES8326_INTOUT_IO, 0x45); 425 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 426 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 427 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 428 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05); 429 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x02); 430 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40); 431 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0xAA); 432 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 433 break; 434 case SND_SOC_BIAS_PREPARE: 435 break; 436 case SND_SOC_BIAS_STANDBY: 437 break; 438 case SND_SOC_BIAS_OFF: 439 clk_disable_unprepare(es8326->mclk); 440 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x11); 441 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_OFF); 442 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0xF8); 443 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00); 444 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x08); 445 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT); 446 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 447 regmap_write(es8326->regmap, ES8326_RESET, 448 ES8326_CODEC_RESET | ES8326_PWRUP_SEQ_EN); 449 break; 450 } 451 452 return 0; 453 } 454 455 #define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 456 SNDRV_PCM_FMTBIT_S24_LE) 457 458 static const struct snd_soc_dai_ops es8326_ops = { 459 .hw_params = es8326_pcm_hw_params, 460 .set_fmt = es8326_set_dai_fmt, 461 .set_sysclk = es8326_set_dai_sysclk, 462 .mute_stream = es8326_mute, 463 .no_capture_mute = 1, 464 }; 465 466 static struct snd_soc_dai_driver es8326_dai = { 467 .name = "ES8326 HiFi", 468 .playback = { 469 .stream_name = "Playback", 470 .channels_min = 1, 471 .channels_max = 2, 472 .rates = SNDRV_PCM_RATE_8000_48000, 473 .formats = es8326_FORMATS, 474 }, 475 .capture = { 476 .stream_name = "Capture", 477 .channels_min = 1, 478 .channels_max = 2, 479 .rates = SNDRV_PCM_RATE_8000_48000, 480 .formats = es8326_FORMATS, 481 }, 482 .ops = &es8326_ops, 483 .symmetric_rate = 1, 484 }; 485 486 static void es8326_enable_micbias(struct snd_soc_component *component) 487 { 488 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 489 490 snd_soc_dapm_mutex_lock(dapm); 491 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1"); 492 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2"); 493 snd_soc_dapm_sync_unlocked(dapm); 494 snd_soc_dapm_mutex_unlock(dapm); 495 } 496 497 static void es8326_disable_micbias(struct snd_soc_component *component) 498 { 499 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 500 501 snd_soc_dapm_mutex_lock(dapm); 502 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1"); 503 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2"); 504 snd_soc_dapm_sync_unlocked(dapm); 505 snd_soc_dapm_mutex_unlock(dapm); 506 } 507 508 /* 509 * For button detection, set the following in soundcard 510 * snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 511 * snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP); 512 * snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); 513 */ 514 static void es8326_jack_button_handler(struct work_struct *work) 515 { 516 struct es8326_priv *es8326 = 517 container_of(work, struct es8326_priv, button_press_work.work); 518 struct snd_soc_component *comp = es8326->component; 519 unsigned int iface; 520 static int button_to_report, press_count; 521 static int prev_button, cur_button; 522 523 if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */ 524 return; 525 526 mutex_lock(&es8326->lock); 527 iface = snd_soc_component_read(comp, ES8326_HPDET_STA); 528 switch (iface) { 529 case 0x93: 530 /* pause button detected */ 531 cur_button = SND_JACK_BTN_0; 532 break; 533 case 0x6f: 534 /* button volume up */ 535 cur_button = SND_JACK_BTN_1; 536 break; 537 case 0x27: 538 /* button volume down */ 539 cur_button = SND_JACK_BTN_2; 540 break; 541 case 0x1e: 542 /* button released or not pressed */ 543 cur_button = 0; 544 break; 545 default: 546 break; 547 } 548 549 if ((prev_button == cur_button) && (cur_button != 0)) { 550 press_count++; 551 if (press_count > 10) { 552 /* report a press every 500ms */ 553 snd_soc_jack_report(es8326->jack, cur_button, 554 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 555 press_count = 0; 556 } 557 button_to_report = cur_button; 558 queue_delayed_work(system_wq, &es8326->button_press_work, 559 msecs_to_jiffies(50)); 560 } else if (prev_button != cur_button) { 561 /* mismatch, detect again */ 562 prev_button = cur_button; 563 queue_delayed_work(system_wq, &es8326->button_press_work, 564 msecs_to_jiffies(50)); 565 } else { 566 /* released or no pressed */ 567 if (button_to_report != 0) { 568 snd_soc_jack_report(es8326->jack, button_to_report, 569 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 570 snd_soc_jack_report(es8326->jack, 0, 571 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 572 button_to_report = 0; 573 } 574 } 575 mutex_unlock(&es8326->lock); 576 } 577 578 static void es8326_jack_detect_handler(struct work_struct *work) 579 { 580 struct es8326_priv *es8326 = 581 container_of(work, struct es8326_priv, jack_detect_work.work); 582 struct snd_soc_component *comp = es8326->component; 583 unsigned int iface; 584 585 mutex_lock(&es8326->lock); 586 iface = snd_soc_component_read(comp, ES8326_HPDET_STA); 587 dev_dbg(comp->dev, "gpio flag %#04x", iface); 588 if ((iface & ES8326_HPINSERT_FLAG) == 0) { 589 /* Jack unplugged or spurious IRQ */ 590 dev_dbg(comp->dev, "No headset detected"); 591 if (es8326->jack->status & SND_JACK_HEADPHONE) { 592 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 593 snd_soc_component_write(comp, ES8326_ADC1_SRC, es8326->mic2_src); 594 es8326_disable_micbias(comp); 595 } 596 } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) { 597 if (es8326->jack->status & SND_JACK_HEADSET) { 598 /* detect button */ 599 queue_delayed_work(system_wq, &es8326->button_press_work, 10); 600 } else { 601 if ((iface & ES8326_HPBUTTON_FLAG) == 0x00) { 602 dev_dbg(comp->dev, "Headset detected"); 603 snd_soc_jack_report(es8326->jack, 604 SND_JACK_HEADSET, SND_JACK_HEADSET); 605 snd_soc_component_write(comp, 606 ES8326_ADC1_SRC, es8326->mic1_src); 607 } else { 608 dev_dbg(comp->dev, "Headphone detected"); 609 snd_soc_jack_report(es8326->jack, 610 SND_JACK_HEADPHONE, SND_JACK_HEADSET); 611 } 612 } 613 } 614 mutex_unlock(&es8326->lock); 615 } 616 617 static irqreturn_t es8326_irq(int irq, void *dev_id) 618 { 619 struct es8326_priv *es8326 = dev_id; 620 struct snd_soc_component *comp = es8326->component; 621 622 if (!es8326->jack) 623 goto out; 624 625 es8326_enable_micbias(comp); 626 627 if (es8326->jack->status & SND_JACK_HEADSET) 628 queue_delayed_work(system_wq, &es8326->jack_detect_work, 629 msecs_to_jiffies(10)); 630 else 631 queue_delayed_work(system_wq, &es8326->jack_detect_work, 632 msecs_to_jiffies(300)); 633 634 out: 635 return IRQ_HANDLED; 636 } 637 638 static int es8326_resume(struct snd_soc_component *component) 639 { 640 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 641 unsigned int reg; 642 643 regcache_cache_only(es8326->regmap, false); 644 regcache_sync(es8326->regmap); 645 646 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON); 647 /* Two channel ADC */ 648 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x02); 649 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); 650 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x1F); 651 regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xC8); 652 regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x88); 653 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x20); 654 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x08); 655 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x22); 656 regmap_write(es8326->regmap, ES8326_ADC1_SRC, es8326->mic1_src); 657 regmap_write(es8326->regmap, ES8326_ADC2_SRC, es8326->mic2_src); 658 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0x88); 659 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 660 ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol); 661 regmap_write(es8326->regmap, ES8326_INT_SOURCE, es8326->interrupt_src); 662 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk); 663 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 664 snd_soc_component_update_bits(component, ES8326_PGAGAIN, 665 ES8326_MIC_SEL_MASK, ES8326_MIC1_SEL); 666 667 regmap_read(es8326->regmap, ES8326_CHIP_VERSION, ®); 668 if ((reg & ES8326_VERSION_B) == 1) { 669 regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xDD); 670 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F); 671 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x0F); 672 /* enable button detect */ 673 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xA0); 674 } 675 676 es8326_irq(es8326->irq, es8326); 677 return 0; 678 } 679 680 static int es8326_suspend(struct snd_soc_component *component) 681 { 682 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 683 684 cancel_delayed_work_sync(&es8326->jack_detect_work); 685 es8326_disable_micbias(component); 686 es8326->calibrated = false; 687 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF); 688 regcache_cache_only(es8326->regmap, true); 689 regcache_mark_dirty(es8326->regmap); 690 691 return 0; 692 } 693 694 static int es8326_probe(struct snd_soc_component *component) 695 { 696 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 697 int ret; 698 699 es8326->component = component; 700 es8326->jd_inverted = device_property_read_bool(component->dev, 701 "everest,jack-detect-inverted"); 702 703 ret = device_property_read_u8(component->dev, "everest,mic1-src", &es8326->mic1_src); 704 if (ret != 0) { 705 dev_dbg(component->dev, "mic1-src return %d", ret); 706 es8326->mic1_src = ES8326_ADC_AMIC; 707 } 708 dev_dbg(component->dev, "mic1-src %x", es8326->mic1_src); 709 710 ret = device_property_read_u8(component->dev, "everest,mic2-src", &es8326->mic2_src); 711 if (ret != 0) { 712 dev_dbg(component->dev, "mic2-src return %d", ret); 713 es8326->mic2_src = ES8326_ADC_DMIC; 714 } 715 dev_dbg(component->dev, "mic2-src %x", es8326->mic2_src); 716 717 ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol); 718 if (ret != 0) { 719 dev_dbg(component->dev, "jack-pol return %d", ret); 720 es8326->jack_pol = ES8326_HP_DET_BUTTON_POL | ES8326_HP_TYPE_OMTP; 721 } 722 dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol); 723 724 ret = device_property_read_u8(component->dev, "everest,interrupt-src", 725 &es8326->interrupt_src); 726 if (ret != 0) { 727 dev_dbg(component->dev, "interrupt-src return %d", ret); 728 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9; 729 } 730 dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src); 731 732 ret = device_property_read_u8(component->dev, "everest,interrupt-clk", 733 &es8326->interrupt_clk); 734 if (ret != 0) { 735 dev_dbg(component->dev, "interrupt-clk return %d", ret); 736 es8326->interrupt_clk = 0x45; 737 } 738 dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk); 739 740 es8326_resume(component); 741 return 0; 742 } 743 744 static void es8326_enable_jack_detect(struct snd_soc_component *component, 745 struct snd_soc_jack *jack) 746 { 747 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 748 749 mutex_lock(&es8326->lock); 750 if (es8326->jd_inverted) 751 snd_soc_component_update_bits(component, ES8326_HPDET_TYPE, 752 ES8326_HP_DET_JACK_POL, ~es8326->jack_pol); 753 es8326->jack = jack; 754 755 mutex_unlock(&es8326->lock); 756 es8326_irq(es8326->irq, es8326); 757 } 758 759 static void es8326_disable_jack_detect(struct snd_soc_component *component) 760 { 761 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 762 763 dev_dbg(component->dev, "Enter into %s\n", __func__); 764 if (!es8326->jack) 765 return; /* Already disabled (or never enabled) */ 766 cancel_delayed_work_sync(&es8326->jack_detect_work); 767 768 mutex_lock(&es8326->lock); 769 if (es8326->jack->status & SND_JACK_MICROPHONE) { 770 es8326_disable_micbias(component); 771 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 772 } 773 es8326->jack = NULL; 774 mutex_unlock(&es8326->lock); 775 } 776 777 static int es8326_set_jack(struct snd_soc_component *component, 778 struct snd_soc_jack *jack, void *data) 779 { 780 if (jack) 781 es8326_enable_jack_detect(component, jack); 782 else 783 es8326_disable_jack_detect(component); 784 785 return 0; 786 } 787 788 static void es8326_remove(struct snd_soc_component *component) 789 { 790 es8326_disable_jack_detect(component); 791 es8326_set_bias_level(component, SND_SOC_BIAS_OFF); 792 } 793 794 static const struct snd_soc_component_driver soc_component_dev_es8326 = { 795 .probe = es8326_probe, 796 .remove = es8326_remove, 797 .resume = es8326_resume, 798 .suspend = es8326_suspend, 799 .set_bias_level = es8326_set_bias_level, 800 .set_jack = es8326_set_jack, 801 .dapm_widgets = es8326_dapm_widgets, 802 .num_dapm_widgets = ARRAY_SIZE(es8326_dapm_widgets), 803 .dapm_routes = es8326_dapm_routes, 804 .num_dapm_routes = ARRAY_SIZE(es8326_dapm_routes), 805 .controls = es8326_snd_controls, 806 .num_controls = ARRAY_SIZE(es8326_snd_controls), 807 .use_pmdown_time = 1, 808 .endianness = 1, 809 }; 810 811 static int es8326_i2c_probe(struct i2c_client *i2c) 812 { 813 struct es8326_priv *es8326; 814 int ret; 815 816 es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL); 817 if (!es8326) 818 return -ENOMEM; 819 820 i2c_set_clientdata(i2c, es8326); 821 es8326->i2c = i2c; 822 mutex_init(&es8326->lock); 823 es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config); 824 if (IS_ERR(es8326->regmap)) { 825 ret = PTR_ERR(es8326->regmap); 826 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret); 827 return ret; 828 } 829 830 es8326->irq = i2c->irq; 831 INIT_DELAYED_WORK(&es8326->jack_detect_work, 832 es8326_jack_detect_handler); 833 INIT_DELAYED_WORK(&es8326->button_press_work, 834 es8326_jack_button_handler); 835 /* ES8316 is level-based while ES8326 is edge-based */ 836 ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq, 837 IRQF_TRIGGER_RISING | IRQF_ONESHOT, 838 "es8326", es8326); 839 if (ret) { 840 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n", 841 es8326->irq, ret); 842 es8326->irq = -ENXIO; 843 } 844 845 es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk"); 846 if (IS_ERR(es8326->mclk)) { 847 dev_err(&i2c->dev, "unable to get mclk\n"); 848 return PTR_ERR(es8326->mclk); 849 } 850 if (!es8326->mclk) 851 dev_warn(&i2c->dev, "assuming static mclk\n"); 852 853 ret = clk_prepare_enable(es8326->mclk); 854 if (ret) { 855 dev_err(&i2c->dev, "unable to enable mclk\n"); 856 return ret; 857 } 858 return devm_snd_soc_register_component(&i2c->dev, 859 &soc_component_dev_es8326, 860 &es8326_dai, 1); 861 } 862 863 static const struct i2c_device_id es8326_i2c_id[] = { 864 {"es8326", 0 }, 865 {} 866 }; 867 MODULE_DEVICE_TABLE(i2c, es8326_i2c_id); 868 869 #ifdef CONFIG_OF 870 static const struct of_device_id es8326_of_match[] = { 871 { .compatible = "everest,es8326", }, 872 {} 873 }; 874 MODULE_DEVICE_TABLE(of, es8326_of_match); 875 #endif 876 877 #ifdef CONFIG_ACPI 878 static const struct acpi_device_id es8326_acpi_match[] = { 879 {"ESSX8326", 0}, 880 {}, 881 }; 882 MODULE_DEVICE_TABLE(acpi, es8326_acpi_match); 883 #endif 884 885 static struct i2c_driver es8326_i2c_driver = { 886 .driver = { 887 .name = "es8326", 888 .acpi_match_table = ACPI_PTR(es8326_acpi_match), 889 .of_match_table = of_match_ptr(es8326_of_match), 890 }, 891 .probe = es8326_i2c_probe, 892 .id_table = es8326_i2c_id, 893 }; 894 module_i2c_driver(es8326_i2c_driver); 895 896 MODULE_DESCRIPTION("ASoC es8326 driver"); 897 MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>"); 898 MODULE_LICENSE("GPL"); 899