1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // es8326.c -- es8326 ALSA SoC audio driver 4 // Copyright Everest Semiconductor Co., Ltd 5 // 6 // Authors: David Yang <yangxiaohua@everest-semi.com> 7 // 8 9 #include <linux/clk.h> 10 #include <linux/i2c.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/module.h> 14 #include <sound/jack.h> 15 #include <sound/pcm_params.h> 16 #include <sound/soc.h> 17 #include <sound/soc-dapm.h> 18 #include <sound/tlv.h> 19 #include "es8326.h" 20 21 struct es8326_priv { 22 struct clk *mclk; 23 struct i2c_client *i2c; 24 struct regmap *regmap; 25 struct snd_soc_component *component; 26 struct delayed_work jack_detect_work; 27 struct delayed_work button_press_work; 28 struct snd_soc_jack *jack; 29 int irq; 30 /* The lock protects the situation that an irq is generated 31 * while enabling or disabling or during an irq. 32 */ 33 struct mutex lock; 34 u8 mic1_src; 35 u8 mic2_src; 36 u8 jack_pol; 37 u8 interrupt_src; 38 u8 interrupt_clk; 39 bool jd_inverted; 40 unsigned int sysclk; 41 42 bool calibrated; 43 int version; 44 }; 45 46 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0); 47 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0); 48 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0); 49 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0); 50 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0); 51 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0); 52 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0); 53 54 static const char *const winsize[] = { 55 "0.25db/2 LRCK", 56 "0.25db/4 LRCK", 57 "0.25db/8 LRCK", 58 "0.25db/16 LRCK", 59 "0.25db/32 LRCK", 60 "0.25db/64 LRCK", 61 "0.25db/128 LRCK", 62 "0.25db/256 LRCK", 63 "0.25db/512 LRCK", 64 "0.25db/1024 LRCK", 65 "0.25db/2048 LRCK", 66 "0.25db/4096 LRCK", 67 "0.25db/8192 LRCK", 68 "0.25db/16384 LRCK", 69 "0.25db/32768 LRCK", 70 "0.25db/65536 LRCK", 71 }; 72 73 static const char *const dacpol_txt[] = { 74 "Normal", "R Invert", "L Invert", "L + R Invert" }; 75 76 static const struct soc_enum dacpol = 77 SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt); 78 static const struct soc_enum alc_winsize = 79 SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize); 80 static const struct soc_enum drc_winsize = 81 SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize); 82 83 static const struct snd_kcontrol_new es8326_snd_controls[] = { 84 SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DAC_VOL, 0, 0xbf, 0, dac_vol_tlv), 85 SOC_ENUM("Playback Polarity", dacpol), 86 SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 87 SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv), 88 SOC_ENUM("DRC Winsize", drc_winsize), 89 SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv), 90 91 SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0, 92 adc_vol_tlv), 93 SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv), 94 SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv), 95 SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate), 96 SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0), 97 SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL, 98 0, 4, 0, drc_recovery_tlv), 99 SOC_ENUM("ALC Capture Winsize", alc_winsize), 100 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL, 101 0, 0x0f, 0, drc_target_tlv), 102 103 }; 104 105 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { 106 SND_SOC_DAPM_INPUT("MIC1"), 107 SND_SOC_DAPM_INPUT("MIC2"), 108 SND_SOC_DAPM_INPUT("MIC3"), 109 SND_SOC_DAPM_INPUT("MIC4"), 110 111 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), 112 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), 113 114 /* Digital Interface */ 115 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0), 116 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0), 117 118 /* ADC Digital Mute */ 119 SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0), 120 SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0), 121 SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0), 122 SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0), 123 124 /* Analog Power Supply*/ 125 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1), 126 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1), 127 SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0), 128 SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0), 129 130 SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0), 131 SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0), 132 133 SND_SOC_DAPM_OUTPUT("HPOL"), 134 SND_SOC_DAPM_OUTPUT("HPOR"), 135 }; 136 137 static const struct snd_soc_dapm_route es8326_dapm_routes[] = { 138 {"ADC L1", NULL, "MIC1"}, 139 {"ADC R1", NULL, "MIC2"}, 140 {"ADC L2", NULL, "MIC3"}, 141 {"ADC R2", NULL, "MIC4"}, 142 143 {"ADC L", NULL, "ADC L1"}, 144 {"ADC R", NULL, "ADC R1"}, 145 {"ADC L", NULL, "ADC L2"}, 146 {"ADC R", NULL, "ADC R2"}, 147 148 {"I2S OUT", NULL, "ADC L"}, 149 {"I2S OUT", NULL, "ADC R"}, 150 151 {"Right DAC", NULL, "I2S IN"}, 152 {"Left DAC", NULL, "I2S IN"}, 153 154 {"LHPMIX", NULL, "Left DAC"}, 155 {"RHPMIX", NULL, "Right DAC"}, 156 157 {"HPOL", NULL, "LHPMIX"}, 158 {"HPOR", NULL, "RHPMIX"}, 159 }; 160 161 static const struct regmap_range es8326_volatile_ranges[] = { 162 regmap_reg_range(ES8326_HP_DETECT, ES8326_HP_DETECT), 163 }; 164 165 static const struct regmap_access_table es8326_volatile_table = { 166 .yes_ranges = es8326_volatile_ranges, 167 .n_yes_ranges = ARRAY_SIZE(es8326_volatile_ranges), 168 }; 169 170 static const struct regmap_config es8326_regmap_config = { 171 .reg_bits = 8, 172 .val_bits = 8, 173 .max_register = 0xff, 174 .volatile_table = &es8326_volatile_table, 175 .cache_type = REGCACHE_RBTREE, 176 }; 177 178 struct _coeff_div { 179 u16 fs; 180 u32 rate; 181 u32 mclk; 182 u8 reg4; 183 u8 reg5; 184 u8 reg6; 185 u8 reg7; 186 u8 reg8; 187 u8 reg9; 188 u8 rega; 189 u8 regb; 190 }; 191 192 /* codec hifi mclk clock divider coefficients */ 193 /* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */ 194 static const struct _coeff_div coeff_div[] = { 195 {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 196 {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 197 {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 198 {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 199 {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 200 {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 201 {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 202 {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 203 {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 204 {64, 8000, 512000, 0x60, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 205 {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 206 207 {64, 44100, 2822400, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 208 {64, 48000, 3072000, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 209 {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 210 {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x23, 0x47}, 211 {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 212 {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 213 {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0x38, 0x08, 0x4f, 0x1f}, 214 {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 215 {128, 8000, 1024000, 0x60, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 216 {128, 16000, 2048000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 217 218 {128, 44100, 5644800, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 219 {128, 48000, 6144000, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 220 {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 221 {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 222 {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 223 {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F}, 224 {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 225 {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 226 {256, 8000, 2048000, 0x60, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 227 {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 228 229 {256, 44100, 11289600, 0x00, 0x00, 0x10, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 230 {256, 48000, 12288000, 0x00, 0x00, 0x30, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 231 {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x23, 0x47}, 232 {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x7F}, 233 {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 234 {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 235 {400, 48000, 19200000, 0x09, 0x04, 0x0f, 0x6d, 0x3a, 0x0A, 0x4F, 0x1F}, 236 {500, 48000, 24000000, 0x18, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 237 {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 238 {512, 16000, 8192000, 0x20, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 239 240 {512, 44100, 22579200, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 241 {512, 48000, 24576000, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 242 {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 243 {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 244 {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F}, 245 {1024, 8000, 8192000, 0x60, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 246 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 247 {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 248 {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 249 250 {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F}, 251 {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 252 {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 253 {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 254 {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x5F}, 255 {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F}, 256 {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27}, 257 258 }; 259 260 static inline int get_coeff(int mclk, int rate) 261 { 262 int i; 263 264 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 265 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 266 return i; 267 } 268 269 return -EINVAL; 270 } 271 272 static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai, 273 int clk_id, unsigned int freq, int dir) 274 { 275 struct snd_soc_component *codec = codec_dai->component; 276 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 277 278 es8326->sysclk = freq; 279 280 return 0; 281 } 282 283 static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 284 { 285 struct snd_soc_component *component = codec_dai->component; 286 u8 iface = 0; 287 288 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 289 case SND_SOC_DAIFMT_CBC_CFP: 290 snd_soc_component_update_bits(component, ES8326_RESET, 291 ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN); 292 break; 293 case SND_SOC_DAIFMT_CBC_CFC: 294 break; 295 default: 296 return -EINVAL; 297 } 298 299 /* interface format */ 300 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 301 case SND_SOC_DAIFMT_I2S: 302 break; 303 case SND_SOC_DAIFMT_RIGHT_J: 304 dev_err(component->dev, "Codec driver does not support right justified\n"); 305 return -EINVAL; 306 case SND_SOC_DAIFMT_LEFT_J: 307 iface |= ES8326_DAIFMT_LEFT_J; 308 break; 309 case SND_SOC_DAIFMT_DSP_A: 310 iface |= ES8326_DAIFMT_DSP_A; 311 break; 312 case SND_SOC_DAIFMT_DSP_B: 313 iface |= ES8326_DAIFMT_DSP_B; 314 break; 315 default: 316 return -EINVAL; 317 } 318 319 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface); 320 321 return 0; 322 } 323 324 static int es8326_pcm_hw_params(struct snd_pcm_substream *substream, 325 struct snd_pcm_hw_params *params, 326 struct snd_soc_dai *dai) 327 { 328 struct snd_soc_component *component = dai->component; 329 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 330 u8 srate = 0; 331 int coeff; 332 333 coeff = get_coeff(es8326->sysclk, params_rate(params)); 334 /* bit size */ 335 switch (params_format(params)) { 336 case SNDRV_PCM_FORMAT_S16_LE: 337 srate |= ES8326_S16_LE; 338 break; 339 case SNDRV_PCM_FORMAT_S20_3LE: 340 srate |= ES8326_S20_3_LE; 341 break; 342 case SNDRV_PCM_FORMAT_S18_3LE: 343 srate |= ES8326_S18_LE; 344 break; 345 case SNDRV_PCM_FORMAT_S24_LE: 346 srate |= ES8326_S24_LE; 347 break; 348 case SNDRV_PCM_FORMAT_S32_LE: 349 srate |= ES8326_S32_LE; 350 break; 351 default: 352 return -EINVAL; 353 } 354 355 /* set iface & srate */ 356 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate); 357 358 if (coeff >= 0) { 359 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 360 coeff_div[coeff].reg4); 361 regmap_write(es8326->regmap, ES8326_CLK_DIV2, 362 coeff_div[coeff].reg5); 363 regmap_write(es8326->regmap, ES8326_CLK_DLL, 364 coeff_div[coeff].reg6); 365 regmap_write(es8326->regmap, ES8326_CLK_MUX, 366 coeff_div[coeff].reg7); 367 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL, 368 coeff_div[coeff].reg8); 369 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 370 coeff_div[coeff].reg9); 371 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR, 372 coeff_div[coeff].rega); 373 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR, 374 coeff_div[coeff].regb); 375 } else { 376 dev_warn(component->dev, "Clock coefficients do not match"); 377 } 378 379 return 0; 380 } 381 382 static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction) 383 { 384 struct snd_soc_component *component = dai->component; 385 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 386 387 if (mute) { 388 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF); 389 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 390 ES8326_MUTE_MASK, ES8326_MUTE); 391 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0); 392 } else { 393 if (!es8326->calibrated) { 394 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL); 395 msleep(30); 396 es8326->calibrated = true; 397 } 398 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa0); 399 regmap_write(es8326->regmap, ES8326_HP_VOL, 0x00); 400 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON); 401 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, 402 ES8326_MUTE_MASK, ~(ES8326_MUTE)); 403 } 404 return 0; 405 } 406 407 static int es8326_set_bias_level(struct snd_soc_component *codec, 408 enum snd_soc_bias_level level) 409 { 410 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec); 411 int ret; 412 413 switch (level) { 414 case SND_SOC_BIAS_ON: 415 ret = clk_prepare_enable(es8326->mclk); 416 if (ret) 417 return ret; 418 regmap_write(es8326->regmap, ES8326_RESET, ES8326_PWRUP_SEQ_EN); 419 regmap_write(es8326->regmap, ES8326_INTOUT_IO, 0x45); 420 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, 421 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT)); 422 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 423 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05); 424 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x02); 425 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40); 426 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0xAA); 427 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 428 break; 429 case SND_SOC_BIAS_PREPARE: 430 break; 431 case SND_SOC_BIAS_STANDBY: 432 break; 433 case SND_SOC_BIAS_OFF: 434 clk_disable_unprepare(es8326->mclk); 435 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x11); 436 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_OFF); 437 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0xF8); 438 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00); 439 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x08); 440 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT); 441 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT); 442 regmap_write(es8326->regmap, ES8326_RESET, 443 ES8326_CODEC_RESET | ES8326_PWRUP_SEQ_EN); 444 break; 445 } 446 447 return 0; 448 } 449 450 #define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 451 SNDRV_PCM_FMTBIT_S24_LE) 452 453 static const struct snd_soc_dai_ops es8326_ops = { 454 .hw_params = es8326_pcm_hw_params, 455 .set_fmt = es8326_set_dai_fmt, 456 .set_sysclk = es8326_set_dai_sysclk, 457 .mute_stream = es8326_mute, 458 .no_capture_mute = 1, 459 }; 460 461 static struct snd_soc_dai_driver es8326_dai = { 462 .name = "ES8326 HiFi", 463 .playback = { 464 .stream_name = "Playback", 465 .channels_min = 1, 466 .channels_max = 2, 467 .rates = SNDRV_PCM_RATE_8000_48000, 468 .formats = es8326_FORMATS, 469 }, 470 .capture = { 471 .stream_name = "Capture", 472 .channels_min = 1, 473 .channels_max = 2, 474 .rates = SNDRV_PCM_RATE_8000_48000, 475 .formats = es8326_FORMATS, 476 }, 477 .ops = &es8326_ops, 478 .symmetric_rate = 1, 479 }; 480 481 static void es8326_enable_micbias(struct snd_soc_component *component) 482 { 483 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 484 485 snd_soc_dapm_mutex_lock(dapm); 486 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1"); 487 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2"); 488 snd_soc_dapm_sync_unlocked(dapm); 489 snd_soc_dapm_mutex_unlock(dapm); 490 } 491 492 static void es8326_disable_micbias(struct snd_soc_component *component) 493 { 494 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 495 496 snd_soc_dapm_mutex_lock(dapm); 497 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1"); 498 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2"); 499 snd_soc_dapm_sync_unlocked(dapm); 500 snd_soc_dapm_mutex_unlock(dapm); 501 } 502 503 /* 504 * For button detection, set the following in soundcard 505 * snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); 506 * snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP); 507 * snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); 508 */ 509 static void es8326_jack_button_handler(struct work_struct *work) 510 { 511 struct es8326_priv *es8326 = 512 container_of(work, struct es8326_priv, button_press_work.work); 513 struct snd_soc_component *comp = es8326->component; 514 unsigned int iface; 515 static int button_to_report, press_count; 516 static int prev_button, cur_button; 517 518 if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */ 519 return; 520 521 mutex_lock(&es8326->lock); 522 iface = snd_soc_component_read(comp, ES8326_HP_DETECT); 523 switch (iface) { 524 case 0x93: 525 /* pause button detected */ 526 cur_button = SND_JACK_BTN_0; 527 break; 528 case 0x6f: 529 /* button volume up */ 530 cur_button = SND_JACK_BTN_1; 531 break; 532 case 0x27: 533 /* button volume down */ 534 cur_button = SND_JACK_BTN_2; 535 break; 536 case 0x1e: 537 /* button released or not pressed */ 538 cur_button = 0; 539 break; 540 default: 541 break; 542 } 543 544 if ((prev_button == cur_button) && (cur_button != 0)) { 545 press_count++; 546 if (press_count > 10) { 547 /* report a press every 500ms */ 548 snd_soc_jack_report(es8326->jack, cur_button, 549 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 550 press_count = 0; 551 } 552 button_to_report = cur_button; 553 queue_delayed_work(system_wq, &es8326->button_press_work, 554 msecs_to_jiffies(50)); 555 } else if (prev_button != cur_button) { 556 /* mismatch, detect again */ 557 prev_button = cur_button; 558 queue_delayed_work(system_wq, &es8326->button_press_work, 559 msecs_to_jiffies(50)); 560 } else { 561 /* released or no pressed */ 562 if (button_to_report != 0) { 563 snd_soc_jack_report(es8326->jack, button_to_report, 564 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 565 snd_soc_jack_report(es8326->jack, 0, 566 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2); 567 button_to_report = 0; 568 } 569 } 570 mutex_unlock(&es8326->lock); 571 } 572 573 static void es8326_jack_detect_handler(struct work_struct *work) 574 { 575 struct es8326_priv *es8326 = 576 container_of(work, struct es8326_priv, jack_detect_work.work); 577 struct snd_soc_component *comp = es8326->component; 578 unsigned int iface; 579 580 mutex_lock(&es8326->lock); 581 iface = snd_soc_component_read(comp, ES8326_HP_DETECT); 582 dev_dbg(comp->dev, "gpio flag %#04x", iface); 583 if ((iface & ES8326_HPINSERT_FLAG) == 0) { 584 /* Jack unplugged or spurious IRQ */ 585 dev_dbg(comp->dev, "No headset detected"); 586 if (es8326->jack->status & SND_JACK_HEADPHONE) { 587 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 588 snd_soc_component_write(comp, ES8326_ADC1_SRC, es8326->mic2_src); 589 es8326_disable_micbias(comp); 590 } 591 } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) { 592 if (es8326->jack->status & SND_JACK_HEADSET) { 593 /* detect button */ 594 queue_delayed_work(system_wq, &es8326->button_press_work, 10); 595 } else { 596 if ((iface & ES8326_HPBUTTON_FLAG) == 0x00) { 597 dev_dbg(comp->dev, "Headset detected"); 598 snd_soc_jack_report(es8326->jack, 599 SND_JACK_HEADSET, SND_JACK_HEADSET); 600 snd_soc_component_write(comp, 601 ES8326_ADC1_SRC, es8326->mic1_src); 602 } else { 603 dev_dbg(comp->dev, "Headphone detected"); 604 snd_soc_jack_report(es8326->jack, 605 SND_JACK_HEADPHONE, SND_JACK_HEADSET); 606 } 607 } 608 } 609 mutex_unlock(&es8326->lock); 610 } 611 612 static irqreturn_t es8326_irq(int irq, void *dev_id) 613 { 614 struct es8326_priv *es8326 = dev_id; 615 struct snd_soc_component *comp = es8326->component; 616 617 if (!es8326->jack) 618 goto out; 619 620 es8326_enable_micbias(comp); 621 622 if (es8326->jack->status & SND_JACK_HEADSET) 623 queue_delayed_work(system_wq, &es8326->jack_detect_work, 624 msecs_to_jiffies(10)); 625 else 626 queue_delayed_work(system_wq, &es8326->jack_detect_work, 627 msecs_to_jiffies(300)); 628 629 out: 630 return IRQ_HANDLED; 631 } 632 633 static int es8326_resume(struct snd_soc_component *component) 634 { 635 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 636 unsigned int reg; 637 638 regcache_cache_only(es8326->regmap, false); 639 regcache_sync(es8326->regmap); 640 641 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON); 642 /* Two channel ADC */ 643 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x02); 644 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00); 645 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x1F); 646 regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xC8); 647 regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x88); 648 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x20); 649 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x08); 650 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x22); 651 regmap_write(es8326->regmap, ES8326_ADC1_SRC, es8326->mic1_src); 652 regmap_write(es8326->regmap, ES8326_ADC2_SRC, es8326->mic2_src); 653 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0x88); 654 regmap_write(es8326->regmap, ES8326_HP_DET, 655 ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol); 656 regmap_write(es8326->regmap, ES8326_INT_SOURCE, es8326->interrupt_src); 657 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk); 658 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON); 659 snd_soc_component_update_bits(component, ES8326_PGAGAIN, 660 ES8326_MIC_SEL_MASK, ES8326_MIC1_SEL); 661 662 regmap_read(es8326->regmap, ES8326_CHIP_VERSION, ®); 663 if ((reg & ES8326_VERSION_B) == 1) { 664 regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xDD); 665 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F); 666 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x0F); 667 /* enable button detect */ 668 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xA0); 669 } 670 671 es8326_irq(es8326->irq, es8326); 672 return 0; 673 } 674 675 static int es8326_suspend(struct snd_soc_component *component) 676 { 677 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 678 679 cancel_delayed_work_sync(&es8326->jack_detect_work); 680 es8326_disable_micbias(component); 681 es8326->calibrated = false; 682 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF); 683 regcache_cache_only(es8326->regmap, true); 684 regcache_mark_dirty(es8326->regmap); 685 686 return 0; 687 } 688 689 static int es8326_probe(struct snd_soc_component *component) 690 { 691 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 692 int ret; 693 694 es8326->component = component; 695 es8326->jd_inverted = device_property_read_bool(component->dev, 696 "everest,jack-detect-inverted"); 697 698 ret = device_property_read_u8(component->dev, "everest,mic1-src", &es8326->mic1_src); 699 if (ret != 0) { 700 dev_dbg(component->dev, "mic1-src return %d", ret); 701 es8326->mic1_src = ES8326_ADC_AMIC; 702 } 703 dev_dbg(component->dev, "mic1-src %x", es8326->mic1_src); 704 705 ret = device_property_read_u8(component->dev, "everest,mic2-src", &es8326->mic2_src); 706 if (ret != 0) { 707 dev_dbg(component->dev, "mic2-src return %d", ret); 708 es8326->mic2_src = ES8326_ADC_DMIC; 709 } 710 dev_dbg(component->dev, "mic2-src %x", es8326->mic2_src); 711 712 ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol); 713 if (ret != 0) { 714 dev_dbg(component->dev, "jack-pol return %d", ret); 715 es8326->jack_pol = ES8326_HP_DET_BUTTON_POL | ES8326_HP_TYPE_OMTP; 716 } 717 dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol); 718 719 ret = device_property_read_u8(component->dev, "everest,interrupt-src", 720 &es8326->interrupt_src); 721 if (ret != 0) { 722 dev_dbg(component->dev, "interrupt-src return %d", ret); 723 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9; 724 } 725 dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src); 726 727 ret = device_property_read_u8(component->dev, "everest,interrupt-clk", 728 &es8326->interrupt_clk); 729 if (ret != 0) { 730 dev_dbg(component->dev, "interrupt-clk return %d", ret); 731 es8326->interrupt_clk = 0x45; 732 } 733 dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk); 734 735 es8326_resume(component); 736 return 0; 737 } 738 739 static void es8326_enable_jack_detect(struct snd_soc_component *component, 740 struct snd_soc_jack *jack) 741 { 742 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 743 744 mutex_lock(&es8326->lock); 745 if (es8326->jd_inverted) 746 snd_soc_component_update_bits(component, ES8326_HP_DET, 747 ES8326_HP_DET_JACK_POL, ~es8326->jack_pol); 748 es8326->jack = jack; 749 750 mutex_unlock(&es8326->lock); 751 es8326_irq(es8326->irq, es8326); 752 } 753 754 static void es8326_disable_jack_detect(struct snd_soc_component *component) 755 { 756 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component); 757 758 dev_dbg(component->dev, "Enter into %s\n", __func__); 759 if (!es8326->jack) 760 return; /* Already disabled (or never enabled) */ 761 cancel_delayed_work_sync(&es8326->jack_detect_work); 762 763 mutex_lock(&es8326->lock); 764 if (es8326->jack->status & SND_JACK_MICROPHONE) { 765 es8326_disable_micbias(component); 766 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET); 767 } 768 es8326->jack = NULL; 769 mutex_unlock(&es8326->lock); 770 } 771 772 static int es8326_set_jack(struct snd_soc_component *component, 773 struct snd_soc_jack *jack, void *data) 774 { 775 if (jack) 776 es8326_enable_jack_detect(component, jack); 777 else 778 es8326_disable_jack_detect(component); 779 780 return 0; 781 } 782 783 static void es8326_remove(struct snd_soc_component *component) 784 { 785 es8326_disable_jack_detect(component); 786 es8326_set_bias_level(component, SND_SOC_BIAS_OFF); 787 } 788 789 static const struct snd_soc_component_driver soc_component_dev_es8326 = { 790 .probe = es8326_probe, 791 .remove = es8326_remove, 792 .resume = es8326_resume, 793 .suspend = es8326_suspend, 794 .set_bias_level = es8326_set_bias_level, 795 .set_jack = es8326_set_jack, 796 .dapm_widgets = es8326_dapm_widgets, 797 .num_dapm_widgets = ARRAY_SIZE(es8326_dapm_widgets), 798 .dapm_routes = es8326_dapm_routes, 799 .num_dapm_routes = ARRAY_SIZE(es8326_dapm_routes), 800 .controls = es8326_snd_controls, 801 .num_controls = ARRAY_SIZE(es8326_snd_controls), 802 .use_pmdown_time = 1, 803 .endianness = 1, 804 }; 805 806 static int es8326_i2c_probe(struct i2c_client *i2c) 807 { 808 struct es8326_priv *es8326; 809 int ret; 810 811 es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL); 812 if (!es8326) 813 return -ENOMEM; 814 815 i2c_set_clientdata(i2c, es8326); 816 es8326->i2c = i2c; 817 mutex_init(&es8326->lock); 818 es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config); 819 if (IS_ERR(es8326->regmap)) { 820 ret = PTR_ERR(es8326->regmap); 821 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret); 822 return ret; 823 } 824 825 es8326->irq = i2c->irq; 826 INIT_DELAYED_WORK(&es8326->jack_detect_work, 827 es8326_jack_detect_handler); 828 INIT_DELAYED_WORK(&es8326->button_press_work, 829 es8326_jack_button_handler); 830 /* ES8316 is level-based while ES8326 is edge-based */ 831 ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq, 832 IRQF_TRIGGER_RISING | IRQF_ONESHOT, 833 "es8326", es8326); 834 if (ret) { 835 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n", 836 es8326->irq, ret); 837 es8326->irq = -ENXIO; 838 } 839 840 es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk"); 841 if (IS_ERR(es8326->mclk)) { 842 dev_err(&i2c->dev, "unable to get mclk\n"); 843 return PTR_ERR(es8326->mclk); 844 } 845 if (!es8326->mclk) 846 dev_warn(&i2c->dev, "assuming static mclk\n"); 847 848 ret = clk_prepare_enable(es8326->mclk); 849 if (ret) { 850 dev_err(&i2c->dev, "unable to enable mclk\n"); 851 return ret; 852 } 853 return devm_snd_soc_register_component(&i2c->dev, 854 &soc_component_dev_es8326, 855 &es8326_dai, 1); 856 } 857 858 static const struct i2c_device_id es8326_i2c_id[] = { 859 {"es8326", 0 }, 860 {} 861 }; 862 MODULE_DEVICE_TABLE(i2c, es8326_i2c_id); 863 864 #ifdef CONFIG_OF 865 static const struct of_device_id es8326_of_match[] = { 866 { .compatible = "everest,es8326", }, 867 {} 868 }; 869 MODULE_DEVICE_TABLE(of, es8326_of_match); 870 #endif 871 872 #ifdef CONFIG_ACPI 873 static const struct acpi_device_id es8326_acpi_match[] = { 874 {"ESSX8326", 0}, 875 {}, 876 }; 877 MODULE_DEVICE_TABLE(acpi, es8326_acpi_match); 878 #endif 879 880 static struct i2c_driver es8326_i2c_driver = { 881 .driver = { 882 .name = "es8326", 883 .acpi_match_table = ACPI_PTR(es8326_acpi_match), 884 .of_match_table = of_match_ptr(es8326_of_match), 885 }, 886 .probe = es8326_i2c_probe, 887 .id_table = es8326_i2c_id, 888 }; 889 module_i2c_driver(es8326_i2c_driver); 890 891 MODULE_DESCRIPTION("ASoC es8326 driver"); 892 MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>"); 893 MODULE_LICENSE("GPL"); 894