xref: /openbmc/linux/sound/soc/codecs/da7219.c (revision fb574682)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * da7219.c - DA7219 ALSA SoC Codec Driver
4  *
5  * Copyright (c) 2015 Dialog Semiconductor
6  *
7  * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
8  */
9 
10 #include <linux/acpi.h>
11 #include <linux/clk.h>
12 #include <linux/clkdev.h>
13 #include <linux/clk-provider.h>
14 #include <linux/i2c.h>
15 #include <linux/of_device.h>
16 #include <linux/property.h>
17 #include <linux/regmap.h>
18 #include <linux/slab.h>
19 #include <linux/pm.h>
20 #include <linux/module.h>
21 #include <linux/delay.h>
22 #include <linux/regulator/consumer.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <asm/div64.h>
30 
31 #include <sound/da7219.h>
32 #include "da7219.h"
33 #include "da7219-aad.h"
34 
35 
36 /*
37  * TLVs and Enums
38  */
39 
40 /* Input TLVs */
41 static const DECLARE_TLV_DB_SCALE(da7219_mic_gain_tlv, -600, 600, 0);
42 static const DECLARE_TLV_DB_SCALE(da7219_mixin_gain_tlv, -450, 150, 0);
43 static const DECLARE_TLV_DB_SCALE(da7219_adc_dig_gain_tlv, -8325, 75, 0);
44 static const DECLARE_TLV_DB_SCALE(da7219_alc_threshold_tlv, -9450, 150, 0);
45 static const DECLARE_TLV_DB_SCALE(da7219_alc_gain_tlv, 0, 600, 0);
46 static const DECLARE_TLV_DB_SCALE(da7219_alc_ana_gain_tlv, 0, 600, 0);
47 static const DECLARE_TLV_DB_SCALE(da7219_sidetone_gain_tlv, -4200, 300, 0);
48 static const DECLARE_TLV_DB_SCALE(da7219_tonegen_gain_tlv, -4500, 300, 0);
49 
50 /* Output TLVs */
51 static const DECLARE_TLV_DB_SCALE(da7219_dac_eq_band_tlv, -1050, 150, 0);
52 
53 static const DECLARE_TLV_DB_RANGE(da7219_dac_dig_gain_tlv,
54 	0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
55 	/* -77.25dB to 12dB */
56 	0x08, 0x7f, TLV_DB_SCALE_ITEM(-7725, 75, 0)
57 );
58 
59 static const DECLARE_TLV_DB_SCALE(da7219_dac_ng_threshold_tlv, -10200, 600, 0);
60 static const DECLARE_TLV_DB_SCALE(da7219_hp_gain_tlv, -5700, 100, 0);
61 
62 /* Input Enums */
63 static const char * const da7219_alc_attack_rate_txt[] = {
64 	"7.33/fs", "14.66/fs", "29.32/fs", "58.64/fs", "117.3/fs", "234.6/fs",
65 	"469.1/fs", "938.2/fs", "1876/fs", "3753/fs", "7506/fs", "15012/fs",
66 	"30024/fs"
67 };
68 
69 static const struct soc_enum da7219_alc_attack_rate =
70 	SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_ATTACK_SHIFT,
71 			DA7219_ALC_ATTACK_MAX, da7219_alc_attack_rate_txt);
72 
73 static const char * const da7219_alc_release_rate_txt[] = {
74 	"28.66/fs", "57.33/fs", "114.6/fs", "229.3/fs", "458.6/fs", "917.1/fs",
75 	"1834/fs", "3668/fs", "7337/fs", "14674/fs", "29348/fs"
76 };
77 
78 static const struct soc_enum da7219_alc_release_rate =
79 	SOC_ENUM_SINGLE(DA7219_ALC_CTRL2, DA7219_ALC_RELEASE_SHIFT,
80 			DA7219_ALC_RELEASE_MAX, da7219_alc_release_rate_txt);
81 
82 static const char * const da7219_alc_hold_time_txt[] = {
83 	"62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
84 	"7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
85 	"253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
86 };
87 
88 static const struct soc_enum da7219_alc_hold_time =
89 	SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_HOLD_SHIFT,
90 			DA7219_ALC_HOLD_MAX, da7219_alc_hold_time_txt);
91 
92 static const char * const da7219_alc_env_rate_txt[] = {
93 	"1/4", "1/16", "1/256", "1/65536"
94 };
95 
96 static const struct soc_enum da7219_alc_env_attack_rate =
97 	SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_ATTACK_SHIFT,
98 			DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt);
99 
100 static const struct soc_enum da7219_alc_env_release_rate =
101 	SOC_ENUM_SINGLE(DA7219_ALC_CTRL3, DA7219_ALC_INTEG_RELEASE_SHIFT,
102 			DA7219_ALC_INTEG_MAX, da7219_alc_env_rate_txt);
103 
104 static const char * const da7219_alc_anticlip_step_txt[] = {
105 	"0.034dB/fs", "0.068dB/fs", "0.136dB/fs", "0.272dB/fs"
106 };
107 
108 static const struct soc_enum da7219_alc_anticlip_step =
109 	SOC_ENUM_SINGLE(DA7219_ALC_ANTICLIP_CTRL,
110 			DA7219_ALC_ANTICLIP_STEP_SHIFT,
111 			DA7219_ALC_ANTICLIP_STEP_MAX,
112 			da7219_alc_anticlip_step_txt);
113 
114 /* Input/Output Enums */
115 static const char * const da7219_gain_ramp_rate_txt[] = {
116 	"Nominal Rate * 8", "Nominal Rate", "Nominal Rate / 8",
117 	"Nominal Rate / 16"
118 };
119 
120 static const struct soc_enum da7219_gain_ramp_rate =
121 	SOC_ENUM_SINGLE(DA7219_GAIN_RAMP_CTRL, DA7219_GAIN_RAMP_RATE_SHIFT,
122 			DA7219_GAIN_RAMP_RATE_MAX, da7219_gain_ramp_rate_txt);
123 
124 static const char * const da7219_hpf_mode_txt[] = {
125 	"Disabled", "Audio", "Voice"
126 };
127 
128 static const unsigned int da7219_hpf_mode_val[] = {
129 	DA7219_HPF_DISABLED, DA7219_HPF_AUDIO_EN, DA7219_HPF_VOICE_EN,
130 };
131 
132 static const struct soc_enum da7219_adc_hpf_mode =
133 	SOC_VALUE_ENUM_SINGLE(DA7219_ADC_FILTERS1, DA7219_HPF_MODE_SHIFT,
134 			      DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX,
135 			      da7219_hpf_mode_txt, da7219_hpf_mode_val);
136 
137 static const struct soc_enum da7219_dac_hpf_mode =
138 	SOC_VALUE_ENUM_SINGLE(DA7219_DAC_FILTERS1, DA7219_HPF_MODE_SHIFT,
139 			      DA7219_HPF_MODE_MASK, DA7219_HPF_MODE_MAX,
140 			      da7219_hpf_mode_txt, da7219_hpf_mode_val);
141 
142 static const char * const da7219_audio_hpf_corner_txt[] = {
143 	"2Hz", "4Hz", "8Hz", "16Hz"
144 };
145 
146 static const struct soc_enum da7219_adc_audio_hpf_corner =
147 	SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1,
148 			DA7219_ADC_AUDIO_HPF_CORNER_SHIFT,
149 			DA7219_AUDIO_HPF_CORNER_MAX,
150 			da7219_audio_hpf_corner_txt);
151 
152 static const struct soc_enum da7219_dac_audio_hpf_corner =
153 	SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1,
154 			DA7219_DAC_AUDIO_HPF_CORNER_SHIFT,
155 			DA7219_AUDIO_HPF_CORNER_MAX,
156 			da7219_audio_hpf_corner_txt);
157 
158 static const char * const da7219_voice_hpf_corner_txt[] = {
159 	"2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
160 };
161 
162 static const struct soc_enum da7219_adc_voice_hpf_corner =
163 	SOC_ENUM_SINGLE(DA7219_ADC_FILTERS1,
164 			DA7219_ADC_VOICE_HPF_CORNER_SHIFT,
165 			DA7219_VOICE_HPF_CORNER_MAX,
166 			da7219_voice_hpf_corner_txt);
167 
168 static const struct soc_enum da7219_dac_voice_hpf_corner =
169 	SOC_ENUM_SINGLE(DA7219_DAC_FILTERS1,
170 			DA7219_DAC_VOICE_HPF_CORNER_SHIFT,
171 			DA7219_VOICE_HPF_CORNER_MAX,
172 			da7219_voice_hpf_corner_txt);
173 
174 static const char * const da7219_tonegen_dtmf_key_txt[] = {
175 	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "A", "B", "C", "D",
176 	"*", "#"
177 };
178 
179 static const struct soc_enum da7219_tonegen_dtmf_key =
180 	SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG1, DA7219_DTMF_REG_SHIFT,
181 			DA7219_DTMF_REG_MAX, da7219_tonegen_dtmf_key_txt);
182 
183 static const char * const da7219_tonegen_swg_sel_txt[] = {
184 	"Sum", "SWG1", "SWG2", "SWG1_1-Cos"
185 };
186 
187 static const struct soc_enum da7219_tonegen_swg_sel =
188 	SOC_ENUM_SINGLE(DA7219_TONE_GEN_CFG2, DA7219_SWG_SEL_SHIFT,
189 			DA7219_SWG_SEL_MAX, da7219_tonegen_swg_sel_txt);
190 
191 /* Output Enums */
192 static const char * const da7219_dac_softmute_rate_txt[] = {
193 	"1 Sample", "2 Samples", "4 Samples", "8 Samples", "16 Samples",
194 	"32 Samples", "64 Samples"
195 };
196 
197 static const struct soc_enum da7219_dac_softmute_rate =
198 	SOC_ENUM_SINGLE(DA7219_DAC_FILTERS5, DA7219_DAC_SOFTMUTE_RATE_SHIFT,
199 			DA7219_DAC_SOFTMUTE_RATE_MAX,
200 			da7219_dac_softmute_rate_txt);
201 
202 static const char * const da7219_dac_ng_setup_time_txt[] = {
203 	"256 Samples", "512 Samples", "1024 Samples", "2048 Samples"
204 };
205 
206 static const struct soc_enum da7219_dac_ng_setup_time =
207 	SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
208 			DA7219_DAC_NG_SETUP_TIME_SHIFT,
209 			DA7219_DAC_NG_SETUP_TIME_MAX,
210 			da7219_dac_ng_setup_time_txt);
211 
212 static const char * const da7219_dac_ng_rampup_txt[] = {
213 	"0.22ms/dB", "0.0138ms/dB"
214 };
215 
216 static const struct soc_enum da7219_dac_ng_rampup_rate =
217 	SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
218 			DA7219_DAC_NG_RAMPUP_RATE_SHIFT,
219 			DA7219_DAC_NG_RAMP_RATE_MAX,
220 			da7219_dac_ng_rampup_txt);
221 
222 static const char * const da7219_dac_ng_rampdown_txt[] = {
223 	"0.88ms/dB", "14.08ms/dB"
224 };
225 
226 static const struct soc_enum da7219_dac_ng_rampdown_rate =
227 	SOC_ENUM_SINGLE(DA7219_DAC_NG_SETUP_TIME,
228 			DA7219_DAC_NG_RAMPDN_RATE_SHIFT,
229 			DA7219_DAC_NG_RAMP_RATE_MAX,
230 			da7219_dac_ng_rampdown_txt);
231 
232 
233 static const char * const da7219_cp_track_mode_txt[] = {
234 	"Largest Volume", "DAC Volume", "Signal Magnitude"
235 };
236 
237 static const unsigned int da7219_cp_track_mode_val[] = {
238 	DA7219_CP_MCHANGE_LARGEST_VOL, DA7219_CP_MCHANGE_DAC_VOL,
239 	DA7219_CP_MCHANGE_SIG_MAG
240 };
241 
242 static const struct soc_enum da7219_cp_track_mode =
243 	SOC_VALUE_ENUM_SINGLE(DA7219_CP_CTRL, DA7219_CP_MCHANGE_SHIFT,
244 			      DA7219_CP_MCHANGE_REL_MASK, DA7219_CP_MCHANGE_MAX,
245 			      da7219_cp_track_mode_txt,
246 			      da7219_cp_track_mode_val);
247 
248 
249 /*
250  * Control Functions
251  */
252 
253 /* Locked Kcontrol calls */
254 static int da7219_volsw_locked_get(struct snd_kcontrol *kcontrol,
255 				   struct snd_ctl_elem_value *ucontrol)
256 {
257 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
258 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
259 	int ret;
260 
261 	mutex_lock(&da7219->ctrl_lock);
262 	ret = snd_soc_get_volsw(kcontrol, ucontrol);
263 	mutex_unlock(&da7219->ctrl_lock);
264 
265 	return ret;
266 }
267 
268 static int da7219_volsw_locked_put(struct snd_kcontrol *kcontrol,
269 				   struct snd_ctl_elem_value *ucontrol)
270 {
271 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
272 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
273 	int ret;
274 
275 	mutex_lock(&da7219->ctrl_lock);
276 	ret = snd_soc_put_volsw(kcontrol, ucontrol);
277 	mutex_unlock(&da7219->ctrl_lock);
278 
279 	return ret;
280 }
281 
282 static int da7219_enum_locked_get(struct snd_kcontrol *kcontrol,
283 				struct snd_ctl_elem_value *ucontrol)
284 {
285 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
286 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
287 	int ret;
288 
289 	mutex_lock(&da7219->ctrl_lock);
290 	ret = snd_soc_get_enum_double(kcontrol, ucontrol);
291 	mutex_unlock(&da7219->ctrl_lock);
292 
293 	return ret;
294 }
295 
296 static int da7219_enum_locked_put(struct snd_kcontrol *kcontrol,
297 				struct snd_ctl_elem_value *ucontrol)
298 {
299 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
300 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
301 	int ret;
302 
303 	mutex_lock(&da7219->ctrl_lock);
304 	ret = snd_soc_put_enum_double(kcontrol, ucontrol);
305 	mutex_unlock(&da7219->ctrl_lock);
306 
307 	return ret;
308 }
309 
310 /* ALC */
311 static void da7219_alc_calib(struct snd_soc_component *component)
312 {
313 	u8 mic_ctrl, mixin_ctrl, adc_ctrl, calib_ctrl;
314 
315 	/* Save current state of mic control register */
316 	mic_ctrl = snd_soc_component_read32(component, DA7219_MIC_1_CTRL);
317 
318 	/* Save current state of input mixer control register */
319 	mixin_ctrl = snd_soc_component_read32(component, DA7219_MIXIN_L_CTRL);
320 
321 	/* Save current state of input ADC control register */
322 	adc_ctrl = snd_soc_component_read32(component, DA7219_ADC_L_CTRL);
323 
324 	/* Enable then Mute MIC PGAs */
325 	snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, DA7219_MIC_1_AMP_EN_MASK,
326 			    DA7219_MIC_1_AMP_EN_MASK);
327 	snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL,
328 			    DA7219_MIC_1_AMP_MUTE_EN_MASK,
329 			    DA7219_MIC_1_AMP_MUTE_EN_MASK);
330 
331 	/* Enable input mixers unmuted */
332 	snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL,
333 			    DA7219_MIXIN_L_AMP_EN_MASK |
334 			    DA7219_MIXIN_L_AMP_MUTE_EN_MASK,
335 			    DA7219_MIXIN_L_AMP_EN_MASK);
336 
337 	/* Enable input filters unmuted */
338 	snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL,
339 			    DA7219_ADC_L_MUTE_EN_MASK | DA7219_ADC_L_EN_MASK,
340 			    DA7219_ADC_L_EN_MASK);
341 
342 	/* Perform auto calibration */
343 	snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
344 			    DA7219_ALC_AUTO_CALIB_EN_MASK,
345 			    DA7219_ALC_AUTO_CALIB_EN_MASK);
346 	do {
347 		calib_ctrl = snd_soc_component_read32(component, DA7219_ALC_CTRL1);
348 	} while (calib_ctrl & DA7219_ALC_AUTO_CALIB_EN_MASK);
349 
350 	/* If auto calibration fails, disable DC offset, hybrid ALC */
351 	if (calib_ctrl & DA7219_ALC_CALIB_OVERFLOW_MASK) {
352 		dev_warn(component->dev,
353 			 "ALC auto calibration failed with overflow\n");
354 		snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
355 				    DA7219_ALC_OFFSET_EN_MASK |
356 				    DA7219_ALC_SYNC_MODE_MASK, 0);
357 	} else {
358 		/* Enable DC offset cancellation, hybrid mode */
359 		snd_soc_component_update_bits(component, DA7219_ALC_CTRL1,
360 				    DA7219_ALC_OFFSET_EN_MASK |
361 				    DA7219_ALC_SYNC_MODE_MASK,
362 				    DA7219_ALC_OFFSET_EN_MASK |
363 				    DA7219_ALC_SYNC_MODE_MASK);
364 	}
365 
366 	/* Restore input filter control register to original state */
367 	snd_soc_component_write(component, DA7219_ADC_L_CTRL, adc_ctrl);
368 
369 	/* Restore input mixer control registers to original state */
370 	snd_soc_component_write(component, DA7219_MIXIN_L_CTRL, mixin_ctrl);
371 
372 	/* Restore MIC control registers to original states */
373 	snd_soc_component_write(component, DA7219_MIC_1_CTRL, mic_ctrl);
374 }
375 
376 static int da7219_mixin_gain_put(struct snd_kcontrol *kcontrol,
377 				 struct snd_ctl_elem_value *ucontrol)
378 {
379 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
380 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
381 	int ret;
382 
383 	ret = snd_soc_put_volsw(kcontrol, ucontrol);
384 
385 	/*
386 	 * If ALC in operation and value of control has been updated,
387 	 * make sure calibrated offsets are updated.
388 	 */
389 	if ((ret == 1) && (da7219->alc_en))
390 		da7219_alc_calib(component);
391 
392 	return ret;
393 }
394 
395 static int da7219_alc_sw_put(struct snd_kcontrol *kcontrol,
396 			     struct snd_ctl_elem_value *ucontrol)
397 {
398 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
399 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
400 
401 
402 	/* Force ALC offset calibration if enabling ALC */
403 	if ((ucontrol->value.integer.value[0]) && (!da7219->alc_en)) {
404 		da7219_alc_calib(component);
405 		da7219->alc_en = true;
406 	} else {
407 		da7219->alc_en = false;
408 	}
409 
410 	return snd_soc_put_volsw(kcontrol, ucontrol);
411 }
412 
413 /* ToneGen */
414 static int da7219_tonegen_freq_get(struct snd_kcontrol *kcontrol,
415 				   struct snd_ctl_elem_value *ucontrol)
416 {
417 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
418 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
419 	struct soc_mixer_control *mixer_ctrl =
420 		(struct soc_mixer_control *) kcontrol->private_value;
421 	unsigned int reg = mixer_ctrl->reg;
422 	__le16 val;
423 	int ret;
424 
425 	mutex_lock(&da7219->ctrl_lock);
426 	ret = regmap_raw_read(da7219->regmap, reg, &val, sizeof(val));
427 	mutex_unlock(&da7219->ctrl_lock);
428 
429 	if (ret)
430 		return ret;
431 
432 	/*
433 	 * Frequency value spans two 8-bit registers, lower then upper byte.
434 	 * Therefore we need to convert to host endianness here.
435 	 */
436 	ucontrol->value.integer.value[0] = le16_to_cpu(val);
437 
438 	return 0;
439 }
440 
441 static int da7219_tonegen_freq_put(struct snd_kcontrol *kcontrol,
442 				   struct snd_ctl_elem_value *ucontrol)
443 {
444 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
445 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
446 	struct soc_mixer_control *mixer_ctrl =
447 		(struct soc_mixer_control *) kcontrol->private_value;
448 	unsigned int reg = mixer_ctrl->reg;
449 	__le16 val;
450 	int ret;
451 
452 	/*
453 	 * Frequency value spans two 8-bit registers, lower then upper byte.
454 	 * Therefore we need to convert to little endian here to align with
455 	 * HW registers.
456 	 */
457 	val = cpu_to_le16(ucontrol->value.integer.value[0]);
458 
459 	mutex_lock(&da7219->ctrl_lock);
460 	ret = regmap_raw_write(da7219->regmap, reg, &val, sizeof(val));
461 	mutex_unlock(&da7219->ctrl_lock);
462 
463 	return ret;
464 }
465 
466 
467 /*
468  * KControls
469  */
470 
471 static const struct snd_kcontrol_new da7219_snd_controls[] = {
472 	/* Mics */
473 	SOC_SINGLE_TLV("Mic Volume", DA7219_MIC_1_GAIN,
474 		       DA7219_MIC_1_AMP_GAIN_SHIFT, DA7219_MIC_1_AMP_GAIN_MAX,
475 		       DA7219_NO_INVERT, da7219_mic_gain_tlv),
476 	SOC_SINGLE("Mic Switch", DA7219_MIC_1_CTRL,
477 		   DA7219_MIC_1_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
478 		   DA7219_INVERT),
479 
480 	/* Mixer Input */
481 	SOC_SINGLE_EXT_TLV("Mixin Volume", DA7219_MIXIN_L_GAIN,
482 			   DA7219_MIXIN_L_AMP_GAIN_SHIFT,
483 			   DA7219_MIXIN_L_AMP_GAIN_MAX, DA7219_NO_INVERT,
484 			   snd_soc_get_volsw, da7219_mixin_gain_put,
485 			   da7219_mixin_gain_tlv),
486 	SOC_SINGLE("Mixin Switch", DA7219_MIXIN_L_CTRL,
487 		   DA7219_MIXIN_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
488 		   DA7219_INVERT),
489 	SOC_SINGLE("Mixin Gain Ramp Switch", DA7219_MIXIN_L_CTRL,
490 		   DA7219_MIXIN_L_AMP_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
491 		   DA7219_NO_INVERT),
492 	SOC_SINGLE("Mixin ZC Gain Switch", DA7219_MIXIN_L_CTRL,
493 		   DA7219_MIXIN_L_AMP_ZC_EN_SHIFT, DA7219_SWITCH_EN_MAX,
494 		   DA7219_NO_INVERT),
495 
496 	/* ADC */
497 	SOC_SINGLE_TLV("Capture Digital Volume", DA7219_ADC_L_GAIN,
498 		       DA7219_ADC_L_DIGITAL_GAIN_SHIFT,
499 		       DA7219_ADC_L_DIGITAL_GAIN_MAX, DA7219_NO_INVERT,
500 		       da7219_adc_dig_gain_tlv),
501 	SOC_SINGLE("Capture Digital Switch", DA7219_ADC_L_CTRL,
502 		   DA7219_ADC_L_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
503 		   DA7219_INVERT),
504 	SOC_SINGLE("Capture Digital Gain Ramp Switch", DA7219_ADC_L_CTRL,
505 		   DA7219_ADC_L_RAMP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
506 		   DA7219_NO_INVERT),
507 
508 	/* ALC */
509 	SOC_ENUM("ALC Attack Rate", da7219_alc_attack_rate),
510 	SOC_ENUM("ALC Release Rate", da7219_alc_release_rate),
511 	SOC_ENUM("ALC Hold Time", da7219_alc_hold_time),
512 	SOC_ENUM("ALC Envelope Attack Rate", da7219_alc_env_attack_rate),
513 	SOC_ENUM("ALC Envelope Release Rate", da7219_alc_env_release_rate),
514 	SOC_SINGLE_TLV("ALC Noise Threshold", DA7219_ALC_NOISE,
515 		       DA7219_ALC_NOISE_SHIFT, DA7219_ALC_THRESHOLD_MAX,
516 		       DA7219_INVERT, da7219_alc_threshold_tlv),
517 	SOC_SINGLE_TLV("ALC Min Threshold", DA7219_ALC_TARGET_MIN,
518 		       DA7219_ALC_THRESHOLD_MIN_SHIFT, DA7219_ALC_THRESHOLD_MAX,
519 		       DA7219_INVERT, da7219_alc_threshold_tlv),
520 	SOC_SINGLE_TLV("ALC Max Threshold", DA7219_ALC_TARGET_MAX,
521 		       DA7219_ALC_THRESHOLD_MAX_SHIFT, DA7219_ALC_THRESHOLD_MAX,
522 		       DA7219_INVERT, da7219_alc_threshold_tlv),
523 	SOC_SINGLE_TLV("ALC Max Attenuation", DA7219_ALC_GAIN_LIMITS,
524 		       DA7219_ALC_ATTEN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX,
525 		       DA7219_NO_INVERT, da7219_alc_gain_tlv),
526 	SOC_SINGLE_TLV("ALC Max Volume", DA7219_ALC_GAIN_LIMITS,
527 		       DA7219_ALC_GAIN_MAX_SHIFT, DA7219_ALC_ATTEN_GAIN_MAX,
528 		       DA7219_NO_INVERT, da7219_alc_gain_tlv),
529 	SOC_SINGLE_RANGE_TLV("ALC Min Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS,
530 			     DA7219_ALC_ANA_GAIN_MIN_SHIFT,
531 			     DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX,
532 			     DA7219_NO_INVERT, da7219_alc_ana_gain_tlv),
533 	SOC_SINGLE_RANGE_TLV("ALC Max Analog Volume", DA7219_ALC_ANA_GAIN_LIMITS,
534 			     DA7219_ALC_ANA_GAIN_MAX_SHIFT,
535 			     DA7219_ALC_ANA_GAIN_MIN, DA7219_ALC_ANA_GAIN_MAX,
536 			     DA7219_NO_INVERT, da7219_alc_ana_gain_tlv),
537 	SOC_ENUM("ALC Anticlip Step", da7219_alc_anticlip_step),
538 	SOC_SINGLE("ALC Anticlip Switch", DA7219_ALC_ANTICLIP_CTRL,
539 		   DA7219_ALC_ANTIPCLIP_EN_SHIFT, DA7219_SWITCH_EN_MAX,
540 		   DA7219_NO_INVERT),
541 	SOC_SINGLE_EXT("ALC Switch", DA7219_ALC_CTRL1, DA7219_ALC_EN_SHIFT,
542 		       DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT,
543 		       snd_soc_get_volsw, da7219_alc_sw_put),
544 
545 	/* Input High-Pass Filters */
546 	SOC_ENUM("ADC HPF Mode", da7219_adc_hpf_mode),
547 	SOC_ENUM("ADC HPF Corner Audio", da7219_adc_audio_hpf_corner),
548 	SOC_ENUM("ADC HPF Corner Voice", da7219_adc_voice_hpf_corner),
549 
550 	/* Sidetone Filter */
551 	SOC_SINGLE_TLV("Sidetone Volume", DA7219_SIDETONE_GAIN,
552 		       DA7219_SIDETONE_GAIN_SHIFT, DA7219_SIDETONE_GAIN_MAX,
553 		       DA7219_NO_INVERT, da7219_sidetone_gain_tlv),
554 	SOC_SINGLE("Sidetone Switch", DA7219_SIDETONE_CTRL,
555 		   DA7219_SIDETONE_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
556 		   DA7219_INVERT),
557 
558 	/* Tone Generator */
559 	SOC_SINGLE_EXT_TLV("ToneGen Volume", DA7219_TONE_GEN_CFG2,
560 			   DA7219_TONE_GEN_GAIN_SHIFT, DA7219_TONE_GEN_GAIN_MAX,
561 			   DA7219_NO_INVERT, da7219_volsw_locked_get,
562 			   da7219_volsw_locked_put, da7219_tonegen_gain_tlv),
563 	SOC_ENUM_EXT("ToneGen DTMF Key", da7219_tonegen_dtmf_key,
564 		     da7219_enum_locked_get, da7219_enum_locked_put),
565 	SOC_SINGLE_EXT("ToneGen DTMF Switch", DA7219_TONE_GEN_CFG1,
566 		       DA7219_DTMF_EN_SHIFT, DA7219_SWITCH_EN_MAX,
567 		       DA7219_NO_INVERT, da7219_volsw_locked_get,
568 		       da7219_volsw_locked_put),
569 	SOC_ENUM_EXT("ToneGen Sinewave Gen Type", da7219_tonegen_swg_sel,
570 		     da7219_enum_locked_get, da7219_enum_locked_put),
571 	SOC_SINGLE_EXT("ToneGen Sinewave1 Freq", DA7219_TONE_GEN_FREQ1_L,
572 		       DA7219_FREQ1_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT,
573 		       da7219_tonegen_freq_get, da7219_tonegen_freq_put),
574 	SOC_SINGLE_EXT("ToneGen Sinewave2 Freq", DA7219_TONE_GEN_FREQ2_L,
575 		       DA7219_FREQ2_L_SHIFT, DA7219_FREQ_MAX, DA7219_NO_INVERT,
576 		       da7219_tonegen_freq_get, da7219_tonegen_freq_put),
577 	SOC_SINGLE_EXT("ToneGen On Time", DA7219_TONE_GEN_ON_PER,
578 		       DA7219_BEEP_ON_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX,
579 		       DA7219_NO_INVERT, da7219_volsw_locked_get,
580 		       da7219_volsw_locked_put),
581 	SOC_SINGLE("ToneGen Off Time", DA7219_TONE_GEN_OFF_PER,
582 		   DA7219_BEEP_OFF_PER_SHIFT, DA7219_BEEP_ON_OFF_MAX,
583 		   DA7219_NO_INVERT),
584 
585 	/* Gain ramping */
586 	SOC_ENUM("Gain Ramp Rate", da7219_gain_ramp_rate),
587 
588 	/* DAC High-Pass Filter */
589 	SOC_ENUM_EXT("DAC HPF Mode", da7219_dac_hpf_mode,
590 		     da7219_enum_locked_get, da7219_enum_locked_put),
591 	SOC_ENUM("DAC HPF Corner Audio", da7219_dac_audio_hpf_corner),
592 	SOC_ENUM("DAC HPF Corner Voice", da7219_dac_voice_hpf_corner),
593 
594 	/* DAC 5-Band Equaliser */
595 	SOC_SINGLE_TLV("DAC EQ Band1 Volume", DA7219_DAC_FILTERS2,
596 		       DA7219_DAC_EQ_BAND1_SHIFT, DA7219_DAC_EQ_BAND_MAX,
597 		       DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
598 	SOC_SINGLE_TLV("DAC EQ Band2 Volume", DA7219_DAC_FILTERS2,
599 		       DA7219_DAC_EQ_BAND2_SHIFT, DA7219_DAC_EQ_BAND_MAX,
600 		       DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
601 	SOC_SINGLE_TLV("DAC EQ Band3 Volume", DA7219_DAC_FILTERS3,
602 		       DA7219_DAC_EQ_BAND3_SHIFT, DA7219_DAC_EQ_BAND_MAX,
603 		       DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
604 	SOC_SINGLE_TLV("DAC EQ Band4 Volume", DA7219_DAC_FILTERS3,
605 		       DA7219_DAC_EQ_BAND4_SHIFT, DA7219_DAC_EQ_BAND_MAX,
606 		       DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
607 	SOC_SINGLE_TLV("DAC EQ Band5 Volume", DA7219_DAC_FILTERS4,
608 		       DA7219_DAC_EQ_BAND5_SHIFT, DA7219_DAC_EQ_BAND_MAX,
609 		       DA7219_NO_INVERT, da7219_dac_eq_band_tlv),
610 	SOC_SINGLE_EXT("DAC EQ Switch", DA7219_DAC_FILTERS4,
611 		       DA7219_DAC_EQ_EN_SHIFT, DA7219_SWITCH_EN_MAX,
612 		       DA7219_NO_INVERT, da7219_volsw_locked_get,
613 		       da7219_volsw_locked_put),
614 
615 	/* DAC Softmute */
616 	SOC_ENUM("DAC Soft Mute Rate", da7219_dac_softmute_rate),
617 	SOC_SINGLE_EXT("DAC Soft Mute Switch", DA7219_DAC_FILTERS5,
618 		       DA7219_DAC_SOFTMUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
619 		       DA7219_NO_INVERT, da7219_volsw_locked_get,
620 		       da7219_volsw_locked_put),
621 
622 	/* DAC Noise Gate */
623 	SOC_ENUM("DAC NG Setup Time", da7219_dac_ng_setup_time),
624 	SOC_ENUM("DAC NG Rampup Rate", da7219_dac_ng_rampup_rate),
625 	SOC_ENUM("DAC NG Rampdown Rate", da7219_dac_ng_rampdown_rate),
626 	SOC_SINGLE_TLV("DAC NG Off Threshold", DA7219_DAC_NG_OFF_THRESH,
627 		       DA7219_DAC_NG_OFF_THRESHOLD_SHIFT,
628 		       DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT,
629 		       da7219_dac_ng_threshold_tlv),
630 	SOC_SINGLE_TLV("DAC NG On Threshold", DA7219_DAC_NG_ON_THRESH,
631 		       DA7219_DAC_NG_ON_THRESHOLD_SHIFT,
632 		       DA7219_DAC_NG_THRESHOLD_MAX, DA7219_NO_INVERT,
633 		       da7219_dac_ng_threshold_tlv),
634 	SOC_SINGLE("DAC NG Switch", DA7219_DAC_NG_CTRL, DA7219_DAC_NG_EN_SHIFT,
635 		   DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
636 
637 	/* DACs */
638 	SOC_DOUBLE_R_EXT_TLV("Playback Digital Volume", DA7219_DAC_L_GAIN,
639 			     DA7219_DAC_R_GAIN, DA7219_DAC_L_DIGITAL_GAIN_SHIFT,
640 			     DA7219_DAC_DIGITAL_GAIN_MAX, DA7219_NO_INVERT,
641 			     da7219_volsw_locked_get, da7219_volsw_locked_put,
642 			     da7219_dac_dig_gain_tlv),
643 	SOC_DOUBLE_R_EXT("Playback Digital Switch", DA7219_DAC_L_CTRL,
644 			 DA7219_DAC_R_CTRL, DA7219_DAC_L_MUTE_EN_SHIFT,
645 			 DA7219_SWITCH_EN_MAX, DA7219_INVERT,
646 			 da7219_volsw_locked_get, da7219_volsw_locked_put),
647 	SOC_DOUBLE_R("Playback Digital Gain Ramp Switch", DA7219_DAC_L_CTRL,
648 		     DA7219_DAC_R_CTRL, DA7219_DAC_L_RAMP_EN_SHIFT,
649 		     DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
650 
651 	/* CP */
652 	SOC_ENUM("Charge Pump Track Mode", da7219_cp_track_mode),
653 	SOC_SINGLE("Charge Pump Threshold", DA7219_CP_VOL_THRESHOLD1,
654 		   DA7219_CP_THRESH_VDD2_SHIFT, DA7219_CP_THRESH_VDD2_MAX,
655 		   DA7219_NO_INVERT),
656 
657 	/* Headphones */
658 	SOC_DOUBLE_R_EXT_TLV("Headphone Volume", DA7219_HP_L_GAIN,
659 			     DA7219_HP_R_GAIN, DA7219_HP_L_AMP_GAIN_SHIFT,
660 			     DA7219_HP_AMP_GAIN_MAX, DA7219_NO_INVERT,
661 			     da7219_volsw_locked_get, da7219_volsw_locked_put,
662 			     da7219_hp_gain_tlv),
663 	SOC_DOUBLE_R_EXT("Headphone Switch", DA7219_HP_L_CTRL, DA7219_HP_R_CTRL,
664 			 DA7219_HP_L_AMP_MUTE_EN_SHIFT, DA7219_SWITCH_EN_MAX,
665 			 DA7219_INVERT, da7219_volsw_locked_get,
666 			 da7219_volsw_locked_put),
667 	SOC_DOUBLE_R("Headphone Gain Ramp Switch", DA7219_HP_L_CTRL,
668 		     DA7219_HP_R_CTRL, DA7219_HP_L_AMP_RAMP_EN_SHIFT,
669 		     DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
670 	SOC_DOUBLE_R("Headphone ZC Gain Switch", DA7219_HP_L_CTRL,
671 		     DA7219_HP_R_CTRL, DA7219_HP_L_AMP_ZC_EN_SHIFT,
672 		     DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
673 };
674 
675 
676 /*
677  * DAPM Mux Controls
678  */
679 
680 static const char * const da7219_out_sel_txt[] = {
681 	"ADC", "Tone Generator", "DAIL", "DAIR"
682 };
683 
684 static const struct soc_enum da7219_out_dail_sel =
685 	SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI,
686 			DA7219_DAI_L_SRC_SHIFT,
687 			DA7219_OUT_SRC_MAX,
688 			da7219_out_sel_txt);
689 
690 static const struct snd_kcontrol_new da7219_out_dail_sel_mux =
691 	SOC_DAPM_ENUM("Out DAIL Mux", da7219_out_dail_sel);
692 
693 static const struct soc_enum da7219_out_dair_sel =
694 	SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAI,
695 			DA7219_DAI_R_SRC_SHIFT,
696 			DA7219_OUT_SRC_MAX,
697 			da7219_out_sel_txt);
698 
699 static const struct snd_kcontrol_new da7219_out_dair_sel_mux =
700 	SOC_DAPM_ENUM("Out DAIR Mux", da7219_out_dair_sel);
701 
702 static const struct soc_enum da7219_out_dacl_sel =
703 	SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC,
704 			DA7219_DAC_L_SRC_SHIFT,
705 			DA7219_OUT_SRC_MAX,
706 			da7219_out_sel_txt);
707 
708 static const struct snd_kcontrol_new da7219_out_dacl_sel_mux =
709 	SOC_DAPM_ENUM("Out DACL Mux", da7219_out_dacl_sel);
710 
711 static const struct soc_enum da7219_out_dacr_sel =
712 	SOC_ENUM_SINGLE(DA7219_DIG_ROUTING_DAC,
713 			DA7219_DAC_R_SRC_SHIFT,
714 			DA7219_OUT_SRC_MAX,
715 			da7219_out_sel_txt);
716 
717 static const struct snd_kcontrol_new da7219_out_dacr_sel_mux =
718 	SOC_DAPM_ENUM("Out DACR Mux", da7219_out_dacr_sel);
719 
720 
721 /*
722  * DAPM Mixer Controls
723  */
724 
725 static const struct snd_kcontrol_new da7219_mixin_controls[] = {
726 	SOC_DAPM_SINGLE("Mic Switch", DA7219_MIXIN_L_SELECT,
727 			DA7219_MIXIN_L_MIX_SELECT_SHIFT,
728 			DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
729 };
730 
731 static const struct snd_kcontrol_new da7219_mixout_l_controls[] = {
732 	SOC_DAPM_SINGLE("DACL Switch", DA7219_MIXOUT_L_SELECT,
733 			DA7219_MIXOUT_L_MIX_SELECT_SHIFT,
734 			DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
735 };
736 
737 static const struct snd_kcontrol_new da7219_mixout_r_controls[] = {
738 	SOC_DAPM_SINGLE("DACR Switch", DA7219_MIXOUT_R_SELECT,
739 			DA7219_MIXOUT_R_MIX_SELECT_SHIFT,
740 			DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),
741 };
742 
743 #define DA7219_DMIX_ST_CTRLS(reg)					\
744 	SOC_DAPM_SINGLE("Out FilterL Switch", reg,			\
745 			DA7219_DMIX_ST_SRC_OUTFILT1L_SHIFT,		\
746 			DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),	\
747 	SOC_DAPM_SINGLE("Out FilterR Switch", reg,			\
748 			DA7219_DMIX_ST_SRC_OUTFILT1R_SHIFT,		\
749 			DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT),	\
750 	SOC_DAPM_SINGLE("Sidetone Switch", reg,				\
751 			DA7219_DMIX_ST_SRC_SIDETONE_SHIFT,		\
752 			DA7219_SWITCH_EN_MAX, DA7219_NO_INVERT)		\
753 
754 static const struct snd_kcontrol_new da7219_st_out_filtl_mix_controls[] = {
755 	DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1L),
756 };
757 
758 static const struct snd_kcontrol_new da7219_st_out_filtr_mix_controls[] = {
759 	DA7219_DMIX_ST_CTRLS(DA7219_DROUTING_ST_OUTFILT_1R),
760 };
761 
762 
763 /*
764  * DAPM Events
765  */
766 
767 static int da7219_mic_pga_event(struct snd_soc_dapm_widget *w,
768 				struct snd_kcontrol *kcontrol, int event)
769 {
770 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
771 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
772 
773 	switch (event) {
774 	case SND_SOC_DAPM_POST_PMU:
775 		if (da7219->micbias_on_event) {
776 			/*
777 			 * Delay only for first capture after bias enabled to
778 			 * avoid possible DC offset related noise.
779 			 */
780 			da7219->micbias_on_event = false;
781 			msleep(da7219->mic_pga_delay);
782 		}
783 		break;
784 	default:
785 		break;
786 	}
787 
788 	return 0;
789 }
790 
791 static int da7219_dai_event(struct snd_soc_dapm_widget *w,
792 			    struct snd_kcontrol *kcontrol, int event)
793 {
794 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
795 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
796 	struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
797 	u8 pll_ctrl, pll_status;
798 	int i = 0, ret;
799 	bool srm_lock = false;
800 
801 	switch (event) {
802 	case SND_SOC_DAPM_PRE_PMU:
803 		if (da7219->master) {
804 			/* Enable DAI clks for master mode */
805 			if (bclk) {
806 				ret = clk_prepare_enable(bclk);
807 				if (ret) {
808 					dev_err(component->dev,
809 						"Failed to enable DAI clks\n");
810 					return ret;
811 				}
812 			} else {
813 				snd_soc_component_update_bits(component,
814 							      DA7219_DAI_CLK_MODE,
815 							      DA7219_DAI_CLK_EN_MASK,
816 							      DA7219_DAI_CLK_EN_MASK);
817 			}
818 		}
819 
820 		/* PC synchronised to DAI */
821 		snd_soc_component_update_bits(component, DA7219_PC_COUNT,
822 				    DA7219_PC_FREERUN_MASK, 0);
823 
824 		/* Slave mode, if SRM not enabled no need for status checks */
825 		pll_ctrl = snd_soc_component_read32(component, DA7219_PLL_CTRL);
826 		if ((pll_ctrl & DA7219_PLL_MODE_MASK) != DA7219_PLL_MODE_SRM)
827 			return 0;
828 
829 		/* Check SRM has locked */
830 		do {
831 			pll_status = snd_soc_component_read32(component, DA7219_PLL_SRM_STS);
832 			if (pll_status & DA7219_PLL_SRM_STS_SRM_LOCK) {
833 				srm_lock = true;
834 			} else {
835 				++i;
836 				msleep(50);
837 			}
838 		} while ((i < DA7219_SRM_CHECK_RETRIES) && (!srm_lock));
839 
840 		if (!srm_lock)
841 			dev_warn(component->dev, "SRM failed to lock\n");
842 
843 		return 0;
844 	case SND_SOC_DAPM_POST_PMD:
845 		/* PC free-running */
846 		snd_soc_component_update_bits(component, DA7219_PC_COUNT,
847 				    DA7219_PC_FREERUN_MASK,
848 				    DA7219_PC_FREERUN_MASK);
849 
850 		/* Disable DAI clks if in master mode */
851 		if (da7219->master) {
852 			if (bclk)
853 				clk_disable_unprepare(bclk);
854 			else
855 				snd_soc_component_update_bits(component,
856 							      DA7219_DAI_CLK_MODE,
857 							      DA7219_DAI_CLK_EN_MASK,
858 							      0);
859 		}
860 
861 		return 0;
862 	default:
863 		return -EINVAL;
864 	}
865 }
866 
867 static int da7219_settling_event(struct snd_soc_dapm_widget *w,
868 				 struct snd_kcontrol *kcontrol, int event)
869 {
870 	switch (event) {
871 	case SND_SOC_DAPM_POST_PMU:
872 	case SND_SOC_DAPM_POST_PMD:
873 		msleep(DA7219_SETTLING_DELAY);
874 		break;
875 	default:
876 		break;
877 	}
878 
879 	return 0;
880 }
881 
882 static int da7219_mixout_event(struct snd_soc_dapm_widget *w,
883 			       struct snd_kcontrol *kcontrol, int event)
884 {
885 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
886 	u8 hp_ctrl, min_gain_mask;
887 
888 	switch (w->reg) {
889 	case DA7219_MIXOUT_L_CTRL:
890 		hp_ctrl = DA7219_HP_L_CTRL;
891 		min_gain_mask = DA7219_HP_L_AMP_MIN_GAIN_EN_MASK;
892 		break;
893 	case DA7219_MIXOUT_R_CTRL:
894 		hp_ctrl = DA7219_HP_R_CTRL;
895 		min_gain_mask = DA7219_HP_R_AMP_MIN_GAIN_EN_MASK;
896 		break;
897 	default:
898 		return -EINVAL;
899 	}
900 
901 	switch (event) {
902 	case SND_SOC_DAPM_PRE_PMD:
903 		/* Enable minimum gain on HP to avoid pops */
904 		snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask,
905 				    min_gain_mask);
906 
907 		msleep(DA7219_MIN_GAIN_DELAY);
908 
909 		break;
910 	case SND_SOC_DAPM_POST_PMU:
911 		/* Remove minimum gain on HP */
912 		snd_soc_component_update_bits(component, hp_ctrl, min_gain_mask, 0);
913 
914 		break;
915 	}
916 
917 	return 0;
918 }
919 
920 static int da7219_gain_ramp_event(struct snd_soc_dapm_widget *w,
921 				  struct snd_kcontrol *kcontrol, int event)
922 {
923 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
924 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
925 
926 	switch (event) {
927 	case SND_SOC_DAPM_PRE_PMU:
928 	case SND_SOC_DAPM_PRE_PMD:
929 		/* Ensure nominal gain ramping for DAPM sequence */
930 		da7219->gain_ramp_ctrl =
931 			snd_soc_component_read32(component, DA7219_GAIN_RAMP_CTRL);
932 		snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL,
933 			      DA7219_GAIN_RAMP_RATE_NOMINAL);
934 		break;
935 	case SND_SOC_DAPM_POST_PMU:
936 	case SND_SOC_DAPM_POST_PMD:
937 		/* Restore previous gain ramp settings */
938 		snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL,
939 			      da7219->gain_ramp_ctrl);
940 		break;
941 	}
942 
943 	return 0;
944 }
945 
946 
947 /*
948  * DAPM Widgets
949  */
950 
951 static const struct snd_soc_dapm_widget da7219_dapm_widgets[] = {
952 	/* Input Supplies */
953 	SND_SOC_DAPM_SUPPLY("Mic Bias", DA7219_MICBIAS_CTRL,
954 			    DA7219_MICBIAS1_EN_SHIFT, DA7219_NO_INVERT,
955 			    NULL, 0),
956 
957 	/* Inputs */
958 	SND_SOC_DAPM_INPUT("MIC"),
959 
960 	/* Input PGAs */
961 	SND_SOC_DAPM_PGA_E("Mic PGA", DA7219_MIC_1_CTRL,
962 			   DA7219_MIC_1_AMP_EN_SHIFT, DA7219_NO_INVERT,
963 			   NULL, 0, da7219_mic_pga_event, SND_SOC_DAPM_POST_PMU),
964 	SND_SOC_DAPM_PGA_E("Mixin PGA", DA7219_MIXIN_L_CTRL,
965 			   DA7219_MIXIN_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
966 			   NULL, 0, da7219_settling_event, SND_SOC_DAPM_POST_PMU),
967 
968 	/* Input Filters */
969 	SND_SOC_DAPM_ADC("ADC", NULL, DA7219_ADC_L_CTRL, DA7219_ADC_L_EN_SHIFT,
970 			 DA7219_NO_INVERT),
971 
972 	/* Tone Generator */
973 	SND_SOC_DAPM_SIGGEN("TONE"),
974 	SND_SOC_DAPM_PGA("Tone Generator", DA7219_TONE_GEN_CFG1,
975 			 DA7219_START_STOPN_SHIFT, DA7219_NO_INVERT, NULL, 0),
976 
977 	/* Sidetone Input */
978 	SND_SOC_DAPM_ADC("Sidetone Filter", NULL, DA7219_SIDETONE_CTRL,
979 			 DA7219_SIDETONE_EN_SHIFT, DA7219_NO_INVERT),
980 
981 	/* Input Mixer Supply */
982 	SND_SOC_DAPM_SUPPLY("Mixer In Supply", DA7219_MIXIN_L_CTRL,
983 			    DA7219_MIXIN_L_MIX_EN_SHIFT, DA7219_NO_INVERT,
984 			    NULL, 0),
985 
986 	/* Input Mixer */
987 	SND_SOC_DAPM_MIXER("Mixer In", SND_SOC_NOPM, 0, 0,
988 			   da7219_mixin_controls,
989 			   ARRAY_SIZE(da7219_mixin_controls)),
990 
991 	/* Input Muxes */
992 	SND_SOC_DAPM_MUX("Out DAIL Mux", SND_SOC_NOPM, 0, 0,
993 			 &da7219_out_dail_sel_mux),
994 	SND_SOC_DAPM_MUX("Out DAIR Mux", SND_SOC_NOPM, 0, 0,
995 			 &da7219_out_dair_sel_mux),
996 
997 	/* DAI Supply */
998 	SND_SOC_DAPM_SUPPLY("DAI", DA7219_DAI_CTRL, DA7219_DAI_EN_SHIFT,
999 			    DA7219_NO_INVERT, da7219_dai_event,
1000 			    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1001 
1002 	/* DAI */
1003 	SND_SOC_DAPM_AIF_OUT("DAIOUT", "Capture", 0, DA7219_DAI_TDM_CTRL,
1004 			     DA7219_DAI_OE_SHIFT, DA7219_NO_INVERT),
1005 	SND_SOC_DAPM_AIF_IN("DAIIN", "Playback", 0, SND_SOC_NOPM, 0, 0),
1006 
1007 	/* Output Muxes */
1008 	SND_SOC_DAPM_MUX("Out DACL Mux", SND_SOC_NOPM, 0, 0,
1009 			 &da7219_out_dacl_sel_mux),
1010 	SND_SOC_DAPM_MUX("Out DACR Mux", SND_SOC_NOPM, 0, 0,
1011 			 &da7219_out_dacr_sel_mux),
1012 
1013 	/* Output Mixers */
1014 	SND_SOC_DAPM_MIXER("Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1015 			   da7219_mixout_l_controls,
1016 			   ARRAY_SIZE(da7219_mixout_l_controls)),
1017 	SND_SOC_DAPM_MIXER("Mixer Out FilterR", SND_SOC_NOPM, 0, 0,
1018 			   da7219_mixout_r_controls,
1019 			   ARRAY_SIZE(da7219_mixout_r_controls)),
1020 
1021 	/* Sidetone Mixers */
1022 	SND_SOC_DAPM_MIXER("ST Mixer Out FilterL", SND_SOC_NOPM, 0, 0,
1023 			   da7219_st_out_filtl_mix_controls,
1024 			   ARRAY_SIZE(da7219_st_out_filtl_mix_controls)),
1025 	SND_SOC_DAPM_MIXER("ST Mixer Out FilterR", SND_SOC_NOPM, 0,
1026 			   0, da7219_st_out_filtr_mix_controls,
1027 			   ARRAY_SIZE(da7219_st_out_filtr_mix_controls)),
1028 
1029 	/* DACs */
1030 	SND_SOC_DAPM_DAC_E("DACL", NULL, DA7219_DAC_L_CTRL,
1031 			   DA7219_DAC_L_EN_SHIFT, DA7219_NO_INVERT,
1032 			   da7219_settling_event,
1033 			   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1034 	SND_SOC_DAPM_DAC_E("DACR", NULL, DA7219_DAC_R_CTRL,
1035 			   DA7219_DAC_R_EN_SHIFT, DA7219_NO_INVERT,
1036 			   da7219_settling_event,
1037 			   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1038 
1039 	/* Output PGAs */
1040 	SND_SOC_DAPM_PGA_E("Mixout Left PGA", DA7219_MIXOUT_L_CTRL,
1041 			   DA7219_MIXOUT_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
1042 			   NULL, 0, da7219_mixout_event,
1043 			   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1044 	SND_SOC_DAPM_PGA_E("Mixout Right PGA", DA7219_MIXOUT_R_CTRL,
1045 			   DA7219_MIXOUT_R_AMP_EN_SHIFT, DA7219_NO_INVERT,
1046 			   NULL, 0, da7219_mixout_event,
1047 			   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1048 	SND_SOC_DAPM_SUPPLY_S("Headphone Left PGA", 1, DA7219_HP_L_CTRL,
1049 			      DA7219_HP_L_AMP_EN_SHIFT, DA7219_NO_INVERT,
1050 			      da7219_settling_event,
1051 			      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1052 	SND_SOC_DAPM_SUPPLY_S("Headphone Right PGA", 1, DA7219_HP_R_CTRL,
1053 			      DA7219_HP_R_AMP_EN_SHIFT, DA7219_NO_INVERT,
1054 			      da7219_settling_event,
1055 			      SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1056 
1057 	/* Output Supplies */
1058 	SND_SOC_DAPM_SUPPLY_S("Charge Pump", 0, DA7219_CP_CTRL,
1059 			      DA7219_CP_EN_SHIFT, DA7219_NO_INVERT,
1060 			      da7219_settling_event,
1061 			      SND_SOC_DAPM_POST_PMU),
1062 
1063 	/* Outputs */
1064 	SND_SOC_DAPM_OUTPUT("HPL"),
1065 	SND_SOC_DAPM_OUTPUT("HPR"),
1066 
1067 	/* Pre/Post Power */
1068 	SND_SOC_DAPM_PRE("Pre Power Gain Ramp", da7219_gain_ramp_event),
1069 	SND_SOC_DAPM_POST("Post Power Gain Ramp", da7219_gain_ramp_event),
1070 };
1071 
1072 
1073 /*
1074  * DAPM Mux Routes
1075  */
1076 
1077 #define DA7219_OUT_DAI_MUX_ROUTES(name)			\
1078 	{name, "ADC", "Mixer In"},			\
1079 	{name, "Tone Generator", "Tone Generator"},	\
1080 	{name, "DAIL", "DAIOUT"},			\
1081 	{name, "DAIR", "DAIOUT"}
1082 
1083 #define DA7219_OUT_DAC_MUX_ROUTES(name)			\
1084 	{name, "ADC", "Mixer In"},			\
1085 	{name, "Tone Generator", "Tone Generator"},		\
1086 	{name, "DAIL", "DAIIN"},			\
1087 	{name, "DAIR", "DAIIN"}
1088 
1089 /*
1090  * DAPM Mixer Routes
1091  */
1092 
1093 #define DA7219_DMIX_ST_ROUTES(name)				\
1094 	{name, "Out FilterL Switch", "Mixer Out FilterL"},	\
1095 	{name, "Out FilterR Switch", "Mixer Out FilterR"},	\
1096 	{name, "Sidetone Switch", "Sidetone Filter"}
1097 
1098 
1099 /*
1100  * DAPM audio route definition
1101  */
1102 
1103 static const struct snd_soc_dapm_route da7219_audio_map[] = {
1104 	/* Input paths */
1105 	{"MIC", NULL, "Mic Bias"},
1106 	{"Mic PGA", NULL, "MIC"},
1107 	{"Mixin PGA", NULL, "Mic PGA"},
1108 	{"ADC", NULL, "Mixin PGA"},
1109 
1110 	{"Mixer In", NULL, "Mixer In Supply"},
1111 	{"Mixer In", "Mic Switch", "ADC"},
1112 
1113 	{"Sidetone Filter", NULL, "Mixer In"},
1114 
1115 	{"Tone Generator", NULL, "TONE"},
1116 
1117 	DA7219_OUT_DAI_MUX_ROUTES("Out DAIL Mux"),
1118 	DA7219_OUT_DAI_MUX_ROUTES("Out DAIR Mux"),
1119 
1120 	{"DAIOUT", NULL, "Out DAIL Mux"},
1121 	{"DAIOUT", NULL, "Out DAIR Mux"},
1122 	{"DAIOUT", NULL, "DAI"},
1123 
1124 	/* Output paths */
1125 	{"DAIIN", NULL, "DAI"},
1126 
1127 	DA7219_OUT_DAC_MUX_ROUTES("Out DACL Mux"),
1128 	DA7219_OUT_DAC_MUX_ROUTES("Out DACR Mux"),
1129 
1130 	{"Mixer Out FilterL", "DACL Switch", "Out DACL Mux"},
1131 	{"Mixer Out FilterR", "DACR Switch", "Out DACR Mux"},
1132 
1133 	DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterL"),
1134 	DA7219_DMIX_ST_ROUTES("ST Mixer Out FilterR"),
1135 
1136 	{"DACL", NULL, "ST Mixer Out FilterL"},
1137 	{"DACR", NULL, "ST Mixer Out FilterR"},
1138 
1139 	{"Mixout Left PGA", NULL, "DACL"},
1140 	{"Mixout Right PGA", NULL, "DACR"},
1141 
1142 	{"HPL", NULL, "Mixout Left PGA"},
1143 	{"HPR", NULL, "Mixout Right PGA"},
1144 
1145 	{"HPL", NULL, "Headphone Left PGA"},
1146 	{"HPR", NULL, "Headphone Right PGA"},
1147 
1148 	{"HPL", NULL, "Charge Pump"},
1149 	{"HPR", NULL, "Charge Pump"},
1150 };
1151 
1152 
1153 /*
1154  * DAI operations
1155  */
1156 
1157 static int da7219_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1158 				 int clk_id, unsigned int freq, int dir)
1159 {
1160 	struct snd_soc_component *component = codec_dai->component;
1161 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1162 	int ret = 0;
1163 
1164 	if ((da7219->clk_src == clk_id) && (da7219->mclk_rate == freq))
1165 		return 0;
1166 
1167 	if ((freq < 2000000) || (freq > 54000000)) {
1168 		dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1169 			freq);
1170 		return -EINVAL;
1171 	}
1172 
1173 	mutex_lock(&da7219->pll_lock);
1174 
1175 	switch (clk_id) {
1176 	case DA7219_CLKSRC_MCLK_SQR:
1177 		snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
1178 				    DA7219_PLL_MCLK_SQR_EN_MASK,
1179 				    DA7219_PLL_MCLK_SQR_EN_MASK);
1180 		break;
1181 	case DA7219_CLKSRC_MCLK:
1182 		snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
1183 				    DA7219_PLL_MCLK_SQR_EN_MASK, 0);
1184 		break;
1185 	default:
1186 		dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
1187 		mutex_unlock(&da7219->pll_lock);
1188 		return -EINVAL;
1189 	}
1190 
1191 	da7219->clk_src = clk_id;
1192 
1193 	if (da7219->mclk) {
1194 		freq = clk_round_rate(da7219->mclk, freq);
1195 		ret = clk_set_rate(da7219->mclk, freq);
1196 		if (ret) {
1197 			dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1198 				freq);
1199 			mutex_unlock(&da7219->pll_lock);
1200 			return ret;
1201 		}
1202 	}
1203 
1204 	da7219->mclk_rate = freq;
1205 
1206 	mutex_unlock(&da7219->pll_lock);
1207 
1208 	return 0;
1209 }
1210 
1211 int da7219_set_pll(struct snd_soc_component *component, int source, unsigned int fout)
1212 {
1213 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1214 
1215 	u8 pll_ctrl, indiv_bits, indiv;
1216 	u8 pll_frac_top, pll_frac_bot, pll_integer;
1217 	u32 freq_ref;
1218 	u64 frac_div;
1219 
1220 	/* Verify 2MHz - 54MHz MCLK provided, and set input divider */
1221 	if (da7219->mclk_rate < 2000000) {
1222 		dev_err(component->dev, "PLL input clock %d below valid range\n",
1223 			da7219->mclk_rate);
1224 		return -EINVAL;
1225 	} else if (da7219->mclk_rate <= 4500000) {
1226 		indiv_bits = DA7219_PLL_INDIV_2_TO_4_5_MHZ;
1227 		indiv = DA7219_PLL_INDIV_2_TO_4_5_MHZ_VAL;
1228 	} else if (da7219->mclk_rate <= 9000000) {
1229 		indiv_bits = DA7219_PLL_INDIV_4_5_TO_9_MHZ;
1230 		indiv = DA7219_PLL_INDIV_4_5_TO_9_MHZ_VAL;
1231 	} else if (da7219->mclk_rate <= 18000000) {
1232 		indiv_bits = DA7219_PLL_INDIV_9_TO_18_MHZ;
1233 		indiv = DA7219_PLL_INDIV_9_TO_18_MHZ_VAL;
1234 	} else if (da7219->mclk_rate <= 36000000) {
1235 		indiv_bits = DA7219_PLL_INDIV_18_TO_36_MHZ;
1236 		indiv = DA7219_PLL_INDIV_18_TO_36_MHZ_VAL;
1237 	} else if (da7219->mclk_rate <= 54000000) {
1238 		indiv_bits = DA7219_PLL_INDIV_36_TO_54_MHZ;
1239 		indiv = DA7219_PLL_INDIV_36_TO_54_MHZ_VAL;
1240 	} else {
1241 		dev_err(component->dev, "PLL input clock %d above valid range\n",
1242 			da7219->mclk_rate);
1243 		return -EINVAL;
1244 	}
1245 	freq_ref = (da7219->mclk_rate / indiv);
1246 	pll_ctrl = indiv_bits;
1247 
1248 	/* Configure PLL */
1249 	switch (source) {
1250 	case DA7219_SYSCLK_MCLK:
1251 		pll_ctrl |= DA7219_PLL_MODE_BYPASS;
1252 		snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
1253 				    DA7219_PLL_INDIV_MASK |
1254 				    DA7219_PLL_MODE_MASK, pll_ctrl);
1255 		return 0;
1256 	case DA7219_SYSCLK_PLL:
1257 		pll_ctrl |= DA7219_PLL_MODE_NORMAL;
1258 		break;
1259 	case DA7219_SYSCLK_PLL_SRM:
1260 		pll_ctrl |= DA7219_PLL_MODE_SRM;
1261 		break;
1262 	default:
1263 		dev_err(component->dev, "Invalid PLL config\n");
1264 		return -EINVAL;
1265 	}
1266 
1267 	/* Calculate dividers for PLL */
1268 	pll_integer = fout / freq_ref;
1269 	frac_div = (u64)(fout % freq_ref) * 8192ULL;
1270 	do_div(frac_div, freq_ref);
1271 	pll_frac_top = (frac_div >> DA7219_BYTE_SHIFT) & DA7219_BYTE_MASK;
1272 	pll_frac_bot = (frac_div) & DA7219_BYTE_MASK;
1273 
1274 	/* Write PLL config & dividers */
1275 	snd_soc_component_write(component, DA7219_PLL_FRAC_TOP, pll_frac_top);
1276 	snd_soc_component_write(component, DA7219_PLL_FRAC_BOT, pll_frac_bot);
1277 	snd_soc_component_write(component, DA7219_PLL_INTEGER, pll_integer);
1278 	snd_soc_component_update_bits(component, DA7219_PLL_CTRL,
1279 			    DA7219_PLL_INDIV_MASK | DA7219_PLL_MODE_MASK,
1280 			    pll_ctrl);
1281 
1282 	return 0;
1283 }
1284 
1285 static int da7219_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1286 			      int source, unsigned int fref, unsigned int fout)
1287 {
1288 	struct snd_soc_component *component = codec_dai->component;
1289 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1290 	int ret;
1291 
1292 	mutex_lock(&da7219->pll_lock);
1293 	ret = da7219_set_pll(component, source, fout);
1294 	mutex_unlock(&da7219->pll_lock);
1295 
1296 	return ret;
1297 }
1298 
1299 static int da7219_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1300 {
1301 	struct snd_soc_component *component = codec_dai->component;
1302 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1303 	u8 dai_clk_mode = 0, dai_ctrl = 0;
1304 
1305 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1306 	case SND_SOC_DAIFMT_CBM_CFM:
1307 		da7219->master = true;
1308 		break;
1309 	case SND_SOC_DAIFMT_CBS_CFS:
1310 		da7219->master = false;
1311 		break;
1312 	default:
1313 		return -EINVAL;
1314 	}
1315 
1316 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1317 	case SND_SOC_DAIFMT_I2S:
1318 	case SND_SOC_DAIFMT_LEFT_J:
1319 	case SND_SOC_DAIFMT_RIGHT_J:
1320 		switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1321 		case SND_SOC_DAIFMT_NB_NF:
1322 			break;
1323 		case SND_SOC_DAIFMT_NB_IF:
1324 			dai_clk_mode |= DA7219_DAI_WCLK_POL_INV;
1325 			break;
1326 		case SND_SOC_DAIFMT_IB_NF:
1327 			dai_clk_mode |= DA7219_DAI_CLK_POL_INV;
1328 			break;
1329 		case SND_SOC_DAIFMT_IB_IF:
1330 			dai_clk_mode |= DA7219_DAI_WCLK_POL_INV |
1331 					DA7219_DAI_CLK_POL_INV;
1332 			break;
1333 		default:
1334 			return -EINVAL;
1335 		}
1336 		break;
1337 	case SND_SOC_DAIFMT_DSP_B:
1338 		switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1339 		case SND_SOC_DAIFMT_NB_NF:
1340 			dai_clk_mode |= DA7219_DAI_CLK_POL_INV;
1341 			break;
1342 		case SND_SOC_DAIFMT_NB_IF:
1343 			dai_clk_mode |= DA7219_DAI_WCLK_POL_INV |
1344 					DA7219_DAI_CLK_POL_INV;
1345 			break;
1346 		case SND_SOC_DAIFMT_IB_NF:
1347 			break;
1348 		case SND_SOC_DAIFMT_IB_IF:
1349 			dai_clk_mode |= DA7219_DAI_WCLK_POL_INV;
1350 			break;
1351 		default:
1352 			return -EINVAL;
1353 		}
1354 		break;
1355 	default:
1356 		return -EINVAL;
1357 	}
1358 
1359 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1360 	case SND_SOC_DAIFMT_I2S:
1361 		dai_ctrl |= DA7219_DAI_FORMAT_I2S;
1362 		break;
1363 	case SND_SOC_DAIFMT_LEFT_J:
1364 		dai_ctrl |= DA7219_DAI_FORMAT_LEFT_J;
1365 		break;
1366 	case SND_SOC_DAIFMT_RIGHT_J:
1367 		dai_ctrl |= DA7219_DAI_FORMAT_RIGHT_J;
1368 		break;
1369 	case SND_SOC_DAIFMT_DSP_B:
1370 		dai_ctrl |= DA7219_DAI_FORMAT_DSP;
1371 		break;
1372 	default:
1373 		return -EINVAL;
1374 	}
1375 
1376 	snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1377 			    DA7219_DAI_CLK_POL_MASK | DA7219_DAI_WCLK_POL_MASK,
1378 			    dai_clk_mode);
1379 	snd_soc_component_update_bits(component, DA7219_DAI_CTRL, DA7219_DAI_FORMAT_MASK,
1380 			    dai_ctrl);
1381 
1382 	return 0;
1383 }
1384 
1385 static int da7219_set_bclks_per_wclk(struct snd_soc_component *component,
1386 				     unsigned long factor)
1387 {
1388 	u8 bclks_per_wclk;
1389 
1390 	switch (factor) {
1391 	case 32:
1392 		bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_32;
1393 		break;
1394 	case 64:
1395 		bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_64;
1396 		break;
1397 	case 128:
1398 		bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_128;
1399 		break;
1400 	case 256:
1401 		bclks_per_wclk = DA7219_DAI_BCLKS_PER_WCLK_256;
1402 		break;
1403 	default:
1404 		return -EINVAL;
1405 	}
1406 
1407 	snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1408 				      DA7219_DAI_BCLKS_PER_WCLK_MASK,
1409 				      bclks_per_wclk);
1410 
1411 	return 0;
1412 }
1413 
1414 static int da7219_set_dai_tdm_slot(struct snd_soc_dai *dai,
1415 				   unsigned int tx_mask, unsigned int rx_mask,
1416 				   int slots, int slot_width)
1417 {
1418 	struct snd_soc_component *component = dai->component;
1419 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1420 	struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX];
1421 	struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
1422 	unsigned int ch_mask;
1423 	unsigned long sr, bclk_rate;
1424 	u8 slot_offset;
1425 	u16 offset;
1426 	__le16 dai_offset;
1427 	u32 frame_size;
1428 	int ret;
1429 
1430 	/* No channels enabled so disable TDM */
1431 	if (!tx_mask) {
1432 		snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL,
1433 				    DA7219_DAI_TDM_CH_EN_MASK |
1434 				    DA7219_DAI_TDM_MODE_EN_MASK, 0);
1435 		da7219->tdm_en = false;
1436 		return 0;
1437 	}
1438 
1439 	/* Check we have valid slots */
1440 	slot_offset = ffs(tx_mask) - 1;
1441 	ch_mask = (tx_mask >> slot_offset);
1442 	if (fls(ch_mask) > DA7219_DAI_TDM_MAX_SLOTS) {
1443 		dev_err(component->dev,
1444 			"Invalid number of slots, max = %d\n",
1445 			DA7219_DAI_TDM_MAX_SLOTS);
1446 		return -EINVAL;
1447 	}
1448 
1449 	/*
1450 	 * Ensure we have a valid offset into the frame, based on slot width
1451 	 * and slot offset of first slot we're interested in.
1452 	 */
1453 	offset = slot_offset * slot_width;
1454 	if (offset > DA7219_DAI_OFFSET_MAX) {
1455 		dev_err(component->dev, "Invalid frame offset %d\n", offset);
1456 		return -EINVAL;
1457 	}
1458 
1459 	/*
1460 	 * If we're master, calculate & validate frame size based on slot info
1461 	 * provided as we have a limited set of rates available.
1462 	 */
1463 	if (da7219->master) {
1464 		frame_size = slots * slot_width;
1465 
1466 		if (bclk) {
1467 			sr = clk_get_rate(wclk);
1468 			bclk_rate = sr * frame_size;
1469 			ret = clk_set_rate(bclk, bclk_rate);
1470 			if (ret) {
1471 				dev_err(component->dev,
1472 					"Failed to set TDM BCLK rate %lu: %d\n",
1473 					bclk_rate, ret);
1474 				return ret;
1475 			}
1476 		} else {
1477 			ret = da7219_set_bclks_per_wclk(component, frame_size);
1478 			if (ret) {
1479 				dev_err(component->dev,
1480 					"Failed to set TDM BCLKs per WCLK %d: %d\n",
1481 					frame_size, ret);
1482 				return ret;
1483 			}
1484 		}
1485 	}
1486 
1487 	dai_offset = cpu_to_le16(offset);
1488 	regmap_bulk_write(da7219->regmap, DA7219_DAI_OFFSET_LOWER,
1489 			  &dai_offset, sizeof(dai_offset));
1490 
1491 	snd_soc_component_update_bits(component, DA7219_DAI_TDM_CTRL,
1492 			    DA7219_DAI_TDM_CH_EN_MASK |
1493 			    DA7219_DAI_TDM_MODE_EN_MASK,
1494 			    (ch_mask << DA7219_DAI_TDM_CH_EN_SHIFT) |
1495 			    DA7219_DAI_TDM_MODE_EN_MASK);
1496 
1497 	da7219->tdm_en = true;
1498 
1499 	return 0;
1500 }
1501 
1502 static int da7219_set_sr(struct snd_soc_component *component,
1503 			 unsigned long rate)
1504 {
1505 	u8 fs;
1506 
1507 	switch (rate) {
1508 	case 8000:
1509 		fs = DA7219_SR_8000;
1510 		break;
1511 	case 11025:
1512 		fs = DA7219_SR_11025;
1513 		break;
1514 	case 12000:
1515 		fs = DA7219_SR_12000;
1516 		break;
1517 	case 16000:
1518 		fs = DA7219_SR_16000;
1519 		break;
1520 	case 22050:
1521 		fs = DA7219_SR_22050;
1522 		break;
1523 	case 24000:
1524 		fs = DA7219_SR_24000;
1525 		break;
1526 	case 32000:
1527 		fs = DA7219_SR_32000;
1528 		break;
1529 	case 44100:
1530 		fs = DA7219_SR_44100;
1531 		break;
1532 	case 48000:
1533 		fs = DA7219_SR_48000;
1534 		break;
1535 	case 88200:
1536 		fs = DA7219_SR_88200;
1537 		break;
1538 	case 96000:
1539 		fs = DA7219_SR_96000;
1540 		break;
1541 	default:
1542 		return -EINVAL;
1543 	}
1544 
1545 	snd_soc_component_write(component, DA7219_SR, fs);
1546 
1547 	return 0;
1548 }
1549 
1550 static int da7219_hw_params(struct snd_pcm_substream *substream,
1551 			    struct snd_pcm_hw_params *params,
1552 			    struct snd_soc_dai *dai)
1553 {
1554 	struct snd_soc_component *component = dai->component;
1555 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1556 	struct clk *wclk = da7219->dai_clks[DA7219_DAI_WCLK_IDX];
1557 	struct clk *bclk = da7219->dai_clks[DA7219_DAI_BCLK_IDX];
1558 	u8 dai_ctrl = 0;
1559 	unsigned int channels;
1560 	unsigned long sr, bclk_rate;
1561 	int word_len = params_width(params);
1562 	int frame_size, ret;
1563 
1564 	switch (word_len) {
1565 	case 16:
1566 		dai_ctrl |= DA7219_DAI_WORD_LENGTH_S16_LE;
1567 		break;
1568 	case 20:
1569 		dai_ctrl |= DA7219_DAI_WORD_LENGTH_S20_LE;
1570 		break;
1571 	case 24:
1572 		dai_ctrl |= DA7219_DAI_WORD_LENGTH_S24_LE;
1573 		break;
1574 	case 32:
1575 		dai_ctrl |= DA7219_DAI_WORD_LENGTH_S32_LE;
1576 		break;
1577 	default:
1578 		return -EINVAL;
1579 	}
1580 
1581 	channels = params_channels(params);
1582 	if ((channels < 1) || (channels > DA7219_DAI_CH_NUM_MAX)) {
1583 		dev_err(component->dev,
1584 			"Invalid number of channels, only 1 to %d supported\n",
1585 			DA7219_DAI_CH_NUM_MAX);
1586 		return -EINVAL;
1587 	}
1588 	dai_ctrl |= channels << DA7219_DAI_CH_NUM_SHIFT;
1589 
1590 	sr = params_rate(params);
1591 	if (da7219->master && wclk) {
1592 		ret = clk_set_rate(wclk, sr);
1593 		if (ret) {
1594 			dev_err(component->dev,
1595 				"Failed to set WCLK SR %lu: %d\n", sr, ret);
1596 			return ret;
1597 		}
1598 	} else {
1599 		ret = da7219_set_sr(component, sr);
1600 		if (ret) {
1601 			dev_err(component->dev,
1602 				"Failed to set SR %lu: %d\n", sr, ret);
1603 			return ret;
1604 		}
1605 	}
1606 
1607 	/*
1608 	 * If we're master, then we have a limited set of BCLK rates we
1609 	 * support. For slave mode this isn't the case and the codec can detect
1610 	 * the BCLK rate automatically.
1611 	 */
1612 	if (da7219->master && !da7219->tdm_en) {
1613 		if ((word_len * DA7219_DAI_CH_NUM_MAX) <= 32)
1614 			frame_size = 32;
1615 		else
1616 			frame_size = 64;
1617 
1618 		if (bclk) {
1619 			bclk_rate = frame_size * sr;
1620 			/*
1621 			 * Rounding the rate here avoids failure trying to set a
1622 			 * new rate on an already enabled bclk. In that
1623 			 * instance this will just set the same rate as is
1624 			 * currently in use, and so should continue without
1625 			 * problem, as long as the BCLK rate is suitable for the
1626 			 * desired frame size.
1627 			 */
1628 			bclk_rate = clk_round_rate(bclk, bclk_rate);
1629 			if ((bclk_rate / sr) < frame_size) {
1630 				dev_err(component->dev,
1631 					"BCLK rate mismatch against frame size");
1632 				return -EINVAL;
1633 			}
1634 
1635 			ret = clk_set_rate(bclk, bclk_rate);
1636 			if (ret) {
1637 				dev_err(component->dev,
1638 					"Failed to set BCLK rate %lu: %d\n",
1639 					bclk_rate, ret);
1640 				return ret;
1641 			}
1642 		} else {
1643 			ret = da7219_set_bclks_per_wclk(component, frame_size);
1644 			if (ret) {
1645 				dev_err(component->dev,
1646 					"Failed to set BCLKs per WCLK %d: %d\n",
1647 					frame_size, ret);
1648 				return ret;
1649 			}
1650 		}
1651 	}
1652 
1653 	snd_soc_component_update_bits(component, DA7219_DAI_CTRL,
1654 			    DA7219_DAI_WORD_LENGTH_MASK |
1655 			    DA7219_DAI_CH_NUM_MASK,
1656 			    dai_ctrl);
1657 
1658 	return 0;
1659 }
1660 
1661 static const struct snd_soc_dai_ops da7219_dai_ops = {
1662 	.hw_params	= da7219_hw_params,
1663 	.set_sysclk	= da7219_set_dai_sysclk,
1664 	.set_pll	= da7219_set_dai_pll,
1665 	.set_fmt	= da7219_set_dai_fmt,
1666 	.set_tdm_slot	= da7219_set_dai_tdm_slot,
1667 };
1668 
1669 #define DA7219_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1670 			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1671 
1672 #define DA7219_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
1673 		      SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1674 		      SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
1675 		      SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
1676 		      SNDRV_PCM_RATE_96000)
1677 
1678 static struct snd_soc_dai_driver da7219_dai = {
1679 	.name = "da7219-hifi",
1680 	.playback = {
1681 		.stream_name = "Playback",
1682 		.channels_min = 1,
1683 		.channels_max = DA7219_DAI_CH_NUM_MAX,
1684 		.rates = DA7219_RATES,
1685 		.formats = DA7219_FORMATS,
1686 	},
1687 	.capture = {
1688 		.stream_name = "Capture",
1689 		.channels_min = 1,
1690 		.channels_max = DA7219_DAI_CH_NUM_MAX,
1691 		.rates = DA7219_RATES,
1692 		.formats = DA7219_FORMATS,
1693 	},
1694 	.ops = &da7219_dai_ops,
1695 	.symmetric_rates = 1,
1696 	.symmetric_channels = 1,
1697 	.symmetric_samplebits = 1,
1698 };
1699 
1700 
1701 /*
1702  * DT/ACPI
1703  */
1704 
1705 static const struct of_device_id da7219_of_match[] = {
1706 	{ .compatible = "dlg,da7219", },
1707 	{ }
1708 };
1709 MODULE_DEVICE_TABLE(of, da7219_of_match);
1710 
1711 static const struct acpi_device_id da7219_acpi_match[] = {
1712 	{ .id = "DLGS7219", },
1713 	{ }
1714 };
1715 MODULE_DEVICE_TABLE(acpi, da7219_acpi_match);
1716 
1717 static enum da7219_micbias_voltage
1718 	da7219_fw_micbias_lvl(struct device *dev, u32 val)
1719 {
1720 	switch (val) {
1721 	case 1600:
1722 		return DA7219_MICBIAS_1_6V;
1723 	case 1800:
1724 		return DA7219_MICBIAS_1_8V;
1725 	case 2000:
1726 		return DA7219_MICBIAS_2_0V;
1727 	case 2200:
1728 		return DA7219_MICBIAS_2_2V;
1729 	case 2400:
1730 		return DA7219_MICBIAS_2_4V;
1731 	case 2600:
1732 		return DA7219_MICBIAS_2_6V;
1733 	default:
1734 		dev_warn(dev, "Invalid micbias level");
1735 		return DA7219_MICBIAS_2_2V;
1736 	}
1737 }
1738 
1739 static enum da7219_mic_amp_in_sel
1740 	da7219_fw_mic_amp_in_sel(struct device *dev, const char *str)
1741 {
1742 	if (!strcmp(str, "diff")) {
1743 		return DA7219_MIC_AMP_IN_SEL_DIFF;
1744 	} else if (!strcmp(str, "se_p")) {
1745 		return DA7219_MIC_AMP_IN_SEL_SE_P;
1746 	} else if (!strcmp(str, "se_n")) {
1747 		return DA7219_MIC_AMP_IN_SEL_SE_N;
1748 	} else {
1749 		dev_warn(dev, "Invalid mic input type selection");
1750 		return DA7219_MIC_AMP_IN_SEL_DIFF;
1751 	}
1752 }
1753 
1754 static struct da7219_pdata *da7219_fw_to_pdata(struct snd_soc_component *component)
1755 {
1756 	struct device *dev = component->dev;
1757 	struct da7219_pdata *pdata;
1758 	const char *of_str;
1759 	u32 of_val32;
1760 
1761 	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
1762 	if (!pdata)
1763 		return NULL;
1764 
1765 	pdata->wakeup_source = device_property_read_bool(dev, "wakeup-source");
1766 
1767 	pdata->dai_clk_names[DA7219_DAI_WCLK_IDX] = "da7219-dai-wclk";
1768 	pdata->dai_clk_names[DA7219_DAI_BCLK_IDX] = "da7219-dai-bclk";
1769 	if (device_property_read_string_array(dev, "clock-output-names",
1770 					      pdata->dai_clk_names,
1771 					      DA7219_DAI_NUM_CLKS) < 0)
1772 		dev_warn(dev, "Using default DAI clk names: %s, %s\n",
1773 			 pdata->dai_clk_names[DA7219_DAI_WCLK_IDX],
1774 			 pdata->dai_clk_names[DA7219_DAI_BCLK_IDX]);
1775 
1776 	if (device_property_read_u32(dev, "dlg,micbias-lvl", &of_val32) >= 0)
1777 		pdata->micbias_lvl = da7219_fw_micbias_lvl(dev, of_val32);
1778 	else
1779 		pdata->micbias_lvl = DA7219_MICBIAS_2_2V;
1780 
1781 	if (!device_property_read_string(dev, "dlg,mic-amp-in-sel", &of_str))
1782 		pdata->mic_amp_in_sel = da7219_fw_mic_amp_in_sel(dev, of_str);
1783 	else
1784 		pdata->mic_amp_in_sel = DA7219_MIC_AMP_IN_SEL_DIFF;
1785 
1786 	return pdata;
1787 }
1788 
1789 
1790 /*
1791  * Codec driver functions
1792  */
1793 
1794 static int da7219_set_bias_level(struct snd_soc_component *component,
1795 				 enum snd_soc_bias_level level)
1796 {
1797 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1798 	int ret;
1799 
1800 	switch (level) {
1801 	case SND_SOC_BIAS_ON:
1802 		break;
1803 	case SND_SOC_BIAS_PREPARE:
1804 		/* Enable MCLK for transition to ON state */
1805 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
1806 			if (da7219->mclk) {
1807 				ret = clk_prepare_enable(da7219->mclk);
1808 				if (ret) {
1809 					dev_err(component->dev,
1810 						"Failed to enable mclk\n");
1811 					return ret;
1812 				}
1813 			}
1814 		}
1815 
1816 		break;
1817 	case SND_SOC_BIAS_STANDBY:
1818 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
1819 			/* Master bias */
1820 			snd_soc_component_update_bits(component, DA7219_REFERENCES,
1821 					    DA7219_BIAS_EN_MASK,
1822 					    DA7219_BIAS_EN_MASK);
1823 
1824 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE) {
1825 			/* Remove MCLK */
1826 			if (da7219->mclk)
1827 				clk_disable_unprepare(da7219->mclk);
1828 		}
1829 		break;
1830 	case SND_SOC_BIAS_OFF:
1831 		/* Only disable master bias if we're not a wake-up source */
1832 		if (!da7219->wakeup_source)
1833 			snd_soc_component_update_bits(component, DA7219_REFERENCES,
1834 					    DA7219_BIAS_EN_MASK, 0);
1835 
1836 		break;
1837 	}
1838 
1839 	return 0;
1840 }
1841 
1842 static const char *da7219_supply_names[DA7219_NUM_SUPPLIES] = {
1843 	[DA7219_SUPPLY_VDD] = "VDD",
1844 	[DA7219_SUPPLY_VDDMIC] = "VDDMIC",
1845 	[DA7219_SUPPLY_VDDIO] = "VDDIO",
1846 };
1847 
1848 static int da7219_handle_supplies(struct snd_soc_component *component)
1849 {
1850 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
1851 	struct regulator *vddio;
1852 	u8 io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_2_5V_3_6V;
1853 	int i, ret;
1854 
1855 	/* Get required supplies */
1856 	for (i = 0; i < DA7219_NUM_SUPPLIES; ++i)
1857 		da7219->supplies[i].supply = da7219_supply_names[i];
1858 
1859 	ret = devm_regulator_bulk_get(component->dev, DA7219_NUM_SUPPLIES,
1860 				      da7219->supplies);
1861 	if (ret) {
1862 		dev_err(component->dev, "Failed to get supplies");
1863 		return ret;
1864 	}
1865 
1866 	/* Determine VDDIO voltage provided */
1867 	vddio = da7219->supplies[DA7219_SUPPLY_VDDIO].consumer;
1868 	ret = regulator_get_voltage(vddio);
1869 	if (ret < 1200000)
1870 		dev_warn(component->dev, "Invalid VDDIO voltage\n");
1871 	else if (ret < 2800000)
1872 		io_voltage_lvl = DA7219_IO_VOLTAGE_LEVEL_1_2V_2_8V;
1873 
1874 	/* Enable main supplies */
1875 	ret = regulator_bulk_enable(DA7219_NUM_SUPPLIES, da7219->supplies);
1876 	if (ret) {
1877 		dev_err(component->dev, "Failed to enable supplies");
1878 		return ret;
1879 	}
1880 
1881 	/* Ensure device in active mode */
1882 	snd_soc_component_write(component, DA7219_SYSTEM_ACTIVE, DA7219_SYSTEM_ACTIVE_MASK);
1883 
1884 	/* Update IO voltage level range */
1885 	snd_soc_component_write(component, DA7219_IO_CTRL, io_voltage_lvl);
1886 
1887 	return 0;
1888 }
1889 
1890 #ifdef CONFIG_COMMON_CLK
1891 static int da7219_wclk_prepare(struct clk_hw *hw)
1892 {
1893 	struct da7219_priv *da7219 =
1894 		container_of(hw, struct da7219_priv,
1895 			     dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1896 	struct snd_soc_component *component = da7219->component;
1897 
1898 	if (!da7219->master)
1899 		return -EINVAL;
1900 
1901 	snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1902 				      DA7219_DAI_CLK_EN_MASK,
1903 				      DA7219_DAI_CLK_EN_MASK);
1904 
1905 	return 0;
1906 }
1907 
1908 static void da7219_wclk_unprepare(struct clk_hw *hw)
1909 {
1910 	struct da7219_priv *da7219 =
1911 		container_of(hw, struct da7219_priv,
1912 			     dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1913 	struct snd_soc_component *component = da7219->component;
1914 
1915 	if (!da7219->master)
1916 		return;
1917 
1918 	snd_soc_component_update_bits(component, DA7219_DAI_CLK_MODE,
1919 				      DA7219_DAI_CLK_EN_MASK, 0);
1920 }
1921 
1922 static int da7219_wclk_is_prepared(struct clk_hw *hw)
1923 {
1924 	struct da7219_priv *da7219 =
1925 		container_of(hw, struct da7219_priv,
1926 			     dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1927 	struct snd_soc_component *component = da7219->component;
1928 	u8 clk_reg;
1929 
1930 	if (!da7219->master)
1931 		return -EINVAL;
1932 
1933 	clk_reg = snd_soc_component_read32(component, DA7219_DAI_CLK_MODE);
1934 
1935 	return !!(clk_reg & DA7219_DAI_CLK_EN_MASK);
1936 }
1937 
1938 static unsigned long da7219_wclk_recalc_rate(struct clk_hw *hw,
1939 					     unsigned long parent_rate)
1940 {
1941 	struct da7219_priv *da7219 =
1942 		container_of(hw, struct da7219_priv,
1943 			     dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1944 	struct snd_soc_component *component = da7219->component;
1945 	u8 fs = snd_soc_component_read32(component, DA7219_SR);
1946 
1947 	switch (fs & DA7219_SR_MASK) {
1948 	case DA7219_SR_8000:
1949 		return 8000;
1950 	case DA7219_SR_11025:
1951 		return 11025;
1952 	case DA7219_SR_12000:
1953 		return 12000;
1954 	case DA7219_SR_16000:
1955 		return 16000;
1956 	case DA7219_SR_22050:
1957 		return 22050;
1958 	case DA7219_SR_24000:
1959 		return 24000;
1960 	case DA7219_SR_32000:
1961 		return 32000;
1962 	case DA7219_SR_44100:
1963 		return 44100;
1964 	case DA7219_SR_48000:
1965 		return 48000;
1966 	case DA7219_SR_88200:
1967 		return 88200;
1968 	case DA7219_SR_96000:
1969 		return 96000;
1970 	default:
1971 		return 0;
1972 	}
1973 }
1974 
1975 static long da7219_wclk_round_rate(struct clk_hw *hw, unsigned long rate,
1976 				   unsigned long *parent_rate)
1977 {
1978 	struct da7219_priv *da7219 =
1979 		container_of(hw, struct da7219_priv,
1980 			     dai_clks_hw[DA7219_DAI_WCLK_IDX]);
1981 
1982 	if (!da7219->master)
1983 		return -EINVAL;
1984 
1985 	if (rate < 11025)
1986 		return 8000;
1987 	else if (rate < 12000)
1988 		return 11025;
1989 	else if (rate < 16000)
1990 		return 12000;
1991 	else if (rate < 22050)
1992 		return 16000;
1993 	else if (rate < 24000)
1994 		return 22050;
1995 	else if (rate < 32000)
1996 		return 24000;
1997 	else if (rate < 44100)
1998 		return 32000;
1999 	else if (rate < 48000)
2000 		return 44100;
2001 	else if (rate < 88200)
2002 		return 48000;
2003 	else if (rate < 96000)
2004 		return 88200;
2005 	else
2006 		return 96000;
2007 }
2008 
2009 static int da7219_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
2010 				unsigned long parent_rate)
2011 {
2012 	struct da7219_priv *da7219 =
2013 		container_of(hw, struct da7219_priv,
2014 			     dai_clks_hw[DA7219_DAI_WCLK_IDX]);
2015 	struct snd_soc_component *component = da7219->component;
2016 
2017 	if (!da7219->master)
2018 		return -EINVAL;
2019 
2020 	return da7219_set_sr(component, rate);
2021 }
2022 
2023 static unsigned long da7219_bclk_recalc_rate(struct clk_hw *hw,
2024 					     unsigned long parent_rate)
2025 {
2026 	struct da7219_priv *da7219 =
2027 		container_of(hw, struct da7219_priv,
2028 			     dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2029 	struct snd_soc_component *component = da7219->component;
2030 	u8 bclks_per_wclk = snd_soc_component_read32(component,
2031 						     DA7219_DAI_CLK_MODE);
2032 
2033 	switch (bclks_per_wclk & DA7219_DAI_BCLKS_PER_WCLK_MASK) {
2034 	case DA7219_DAI_BCLKS_PER_WCLK_32:
2035 		return parent_rate * 32;
2036 	case DA7219_DAI_BCLKS_PER_WCLK_64:
2037 		return parent_rate * 64;
2038 	case DA7219_DAI_BCLKS_PER_WCLK_128:
2039 		return parent_rate * 128;
2040 	case DA7219_DAI_BCLKS_PER_WCLK_256:
2041 		return parent_rate * 256;
2042 	default:
2043 		return 0;
2044 	}
2045 }
2046 
2047 static unsigned long da7219_bclk_get_factor(unsigned long rate,
2048 					    unsigned long parent_rate)
2049 {
2050 	unsigned long factor;
2051 
2052 	factor = rate / parent_rate;
2053 	if (factor < 64)
2054 		return 32;
2055 	else if (factor < 128)
2056 		return 64;
2057 	else if (factor < 256)
2058 		return 128;
2059 	else
2060 		return 256;
2061 }
2062 
2063 static long da7219_bclk_round_rate(struct clk_hw *hw, unsigned long rate,
2064 				   unsigned long *parent_rate)
2065 {
2066 	struct da7219_priv *da7219 =
2067 		container_of(hw, struct da7219_priv,
2068 			     dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2069 	unsigned long factor;
2070 
2071 	if (!*parent_rate || !da7219->master)
2072 		return -EINVAL;
2073 
2074 	/*
2075 	 * We don't allow changing the parent rate as some BCLK rates can be
2076 	 * derived from multiple parent WCLK rates (BCLK rates are set as a
2077 	 * multiplier of WCLK in HW). We just do some rounding down based on the
2078 	 * parent WCLK rate set and find the appropriate multiplier of BCLK to
2079 	 * get the rounded down BCLK value.
2080 	 */
2081 	factor = da7219_bclk_get_factor(rate, *parent_rate);
2082 
2083 	return *parent_rate * factor;
2084 }
2085 
2086 static int da7219_bclk_set_rate(struct clk_hw *hw, unsigned long rate,
2087 				unsigned long parent_rate)
2088 {
2089 	struct da7219_priv *da7219 =
2090 		container_of(hw, struct da7219_priv,
2091 			     dai_clks_hw[DA7219_DAI_BCLK_IDX]);
2092 	struct snd_soc_component *component = da7219->component;
2093 	unsigned long factor;
2094 
2095 	if (!da7219->master)
2096 		return -EINVAL;
2097 
2098 	factor = da7219_bclk_get_factor(rate, parent_rate);
2099 
2100 	return da7219_set_bclks_per_wclk(component, factor);
2101 }
2102 
2103 static const struct clk_ops da7219_dai_clk_ops[DA7219_DAI_NUM_CLKS] = {
2104 	[DA7219_DAI_WCLK_IDX] = {
2105 		.prepare = da7219_wclk_prepare,
2106 		.unprepare = da7219_wclk_unprepare,
2107 		.is_prepared = da7219_wclk_is_prepared,
2108 		.recalc_rate = da7219_wclk_recalc_rate,
2109 		.round_rate = da7219_wclk_round_rate,
2110 		.set_rate = da7219_wclk_set_rate,
2111 	},
2112 	[DA7219_DAI_BCLK_IDX] = {
2113 		.recalc_rate = da7219_bclk_recalc_rate,
2114 		.round_rate = da7219_bclk_round_rate,
2115 		.set_rate = da7219_bclk_set_rate,
2116 	},
2117 };
2118 
2119 static int da7219_register_dai_clks(struct snd_soc_component *component)
2120 {
2121 	struct device *dev = component->dev;
2122 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2123 	struct da7219_pdata *pdata = da7219->pdata;
2124 	const char *parent_name;
2125 	int i, ret;
2126 
2127 	for (i = 0; i < DA7219_DAI_NUM_CLKS; ++i) {
2128 		struct clk_init_data init = {};
2129 		struct clk *dai_clk;
2130 		struct clk_lookup *dai_clk_lookup;
2131 		struct clk_hw *dai_clk_hw = &da7219->dai_clks_hw[i];
2132 
2133 		switch (i) {
2134 		case DA7219_DAI_WCLK_IDX:
2135 			/*
2136 			 * If we can, make MCLK the parent of WCLK to ensure
2137 			 * it's enabled as required.
2138 			 */
2139 			if (da7219->mclk) {
2140 				parent_name = __clk_get_name(da7219->mclk);
2141 				init.parent_names = &parent_name;
2142 				init.num_parents = 1;
2143 			} else {
2144 				init.parent_names = NULL;
2145 				init.num_parents = 0;
2146 			}
2147 			break;
2148 		case DA7219_DAI_BCLK_IDX:
2149 			/* Make WCLK the parent of BCLK */
2150 			parent_name = __clk_get_name(da7219->dai_clks[DA7219_DAI_WCLK_IDX]);
2151 			init.parent_names = &parent_name;
2152 			init.num_parents = 1;
2153 			break;
2154 		default:
2155 			dev_err(dev, "Invalid clock index\n");
2156 			ret = -EINVAL;
2157 			goto err;
2158 		}
2159 
2160 		init.name = pdata->dai_clk_names[i];
2161 		init.ops = &da7219_dai_clk_ops[i];
2162 		init.flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_GATE;
2163 		dai_clk_hw->init = &init;
2164 
2165 		dai_clk = devm_clk_register(dev, dai_clk_hw);
2166 		if (IS_ERR(dai_clk)) {
2167 			dev_warn(dev, "Failed to register %s: %ld\n",
2168 				 init.name, PTR_ERR(dai_clk));
2169 			ret = PTR_ERR(dai_clk);
2170 			goto err;
2171 		}
2172 		da7219->dai_clks[i] = dai_clk;
2173 
2174 		/* If we're using DT, then register as provider accordingly */
2175 		if (dev->of_node) {
2176 			devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
2177 						    dai_clk_hw);
2178 		} else {
2179 			dai_clk_lookup = clkdev_create(dai_clk, init.name,
2180 						       "%s", dev_name(dev));
2181 			if (!dai_clk_lookup) {
2182 				ret = -ENOMEM;
2183 				goto err;
2184 			} else {
2185 				da7219->dai_clks_lookup[i] = dai_clk_lookup;
2186 			}
2187 		}
2188 	}
2189 
2190 	return 0;
2191 
2192 err:
2193 	do {
2194 		if (da7219->dai_clks_lookup[i])
2195 			clkdev_drop(da7219->dai_clks_lookup[i]);
2196 	} while (i-- > 0);
2197 
2198 	return ret;
2199 }
2200 #else
2201 static inline int da7219_register_dai_clks(struct snd_soc_component *component)
2202 {
2203 	return 0;
2204 }
2205 #endif /* CONFIG_COMMON_CLK */
2206 
2207 static void da7219_handle_pdata(struct snd_soc_component *component)
2208 {
2209 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2210 	struct da7219_pdata *pdata = da7219->pdata;
2211 
2212 	if (pdata) {
2213 		u8 micbias_lvl = 0;
2214 
2215 		da7219->wakeup_source = pdata->wakeup_source;
2216 
2217 		/* Mic Bias voltages */
2218 		switch (pdata->micbias_lvl) {
2219 		case DA7219_MICBIAS_1_6V:
2220 		case DA7219_MICBIAS_1_8V:
2221 		case DA7219_MICBIAS_2_0V:
2222 		case DA7219_MICBIAS_2_2V:
2223 		case DA7219_MICBIAS_2_4V:
2224 		case DA7219_MICBIAS_2_6V:
2225 			micbias_lvl |= (pdata->micbias_lvl <<
2226 					DA7219_MICBIAS1_LEVEL_SHIFT);
2227 			break;
2228 		}
2229 
2230 		snd_soc_component_write(component, DA7219_MICBIAS_CTRL, micbias_lvl);
2231 
2232 		/*
2233 		 * Calculate delay required to compensate for DC offset in
2234 		 * Mic PGA, based on Mic Bias voltage.
2235 		 */
2236 		da7219->mic_pga_delay =  DA7219_MIC_PGA_BASE_DELAY +
2237 					(pdata->micbias_lvl *
2238 					 DA7219_MIC_PGA_OFFSET_DELAY);
2239 
2240 		/* Mic */
2241 		switch (pdata->mic_amp_in_sel) {
2242 		case DA7219_MIC_AMP_IN_SEL_DIFF:
2243 		case DA7219_MIC_AMP_IN_SEL_SE_P:
2244 		case DA7219_MIC_AMP_IN_SEL_SE_N:
2245 			snd_soc_component_write(component, DA7219_MIC_1_SELECT,
2246 				      pdata->mic_amp_in_sel);
2247 			break;
2248 		}
2249 	}
2250 }
2251 
2252 static struct reg_sequence da7219_rev_aa_patch[] = {
2253 	{ DA7219_REFERENCES, 0x08 },
2254 };
2255 
2256 static int da7219_probe(struct snd_soc_component *component)
2257 {
2258 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2259 	unsigned int rev;
2260 	int ret;
2261 
2262 	da7219->component = component;
2263 	mutex_init(&da7219->ctrl_lock);
2264 	mutex_init(&da7219->pll_lock);
2265 
2266 	/* Regulator configuration */
2267 	ret = da7219_handle_supplies(component);
2268 	if (ret)
2269 		return ret;
2270 
2271 	ret = regmap_read(da7219->regmap, DA7219_CHIP_REVISION, &rev);
2272 	if (ret) {
2273 		dev_err(component->dev, "Failed to read chip revision: %d\n", ret);
2274 		goto err_disable_reg;
2275 	}
2276 
2277 	switch (rev & DA7219_CHIP_MINOR_MASK) {
2278 	case 0:
2279 		ret = regmap_register_patch(da7219->regmap, da7219_rev_aa_patch,
2280 					    ARRAY_SIZE(da7219_rev_aa_patch));
2281 		if (ret) {
2282 			dev_err(component->dev, "Failed to register AA patch: %d\n",
2283 				ret);
2284 			goto err_disable_reg;
2285 		}
2286 		break;
2287 	default:
2288 		break;
2289 	}
2290 
2291 	/* Handle DT/ACPI/Platform data */
2292 	da7219->pdata = dev_get_platdata(component->dev);
2293 	if (!da7219->pdata)
2294 		da7219->pdata = da7219_fw_to_pdata(component);
2295 
2296 	da7219_handle_pdata(component);
2297 
2298 	/* Check if MCLK provided */
2299 	da7219->mclk = devm_clk_get(component->dev, "mclk");
2300 	if (IS_ERR(da7219->mclk)) {
2301 		if (PTR_ERR(da7219->mclk) != -ENOENT) {
2302 			ret = PTR_ERR(da7219->mclk);
2303 			goto err_disable_reg;
2304 		} else {
2305 			da7219->mclk = NULL;
2306 		}
2307 	}
2308 
2309 	/* Register CCF DAI clock control */
2310 	ret = da7219_register_dai_clks(component);
2311 	if (ret)
2312 		return ret;
2313 
2314 	/* Default PC counter to free-running */
2315 	snd_soc_component_update_bits(component, DA7219_PC_COUNT, DA7219_PC_FREERUN_MASK,
2316 			    DA7219_PC_FREERUN_MASK);
2317 
2318 	/* Default gain ramping */
2319 	snd_soc_component_update_bits(component, DA7219_MIXIN_L_CTRL,
2320 			    DA7219_MIXIN_L_AMP_RAMP_EN_MASK,
2321 			    DA7219_MIXIN_L_AMP_RAMP_EN_MASK);
2322 	snd_soc_component_update_bits(component, DA7219_ADC_L_CTRL, DA7219_ADC_L_RAMP_EN_MASK,
2323 			    DA7219_ADC_L_RAMP_EN_MASK);
2324 	snd_soc_component_update_bits(component, DA7219_DAC_L_CTRL, DA7219_DAC_L_RAMP_EN_MASK,
2325 			    DA7219_DAC_L_RAMP_EN_MASK);
2326 	snd_soc_component_update_bits(component, DA7219_DAC_R_CTRL, DA7219_DAC_R_RAMP_EN_MASK,
2327 			    DA7219_DAC_R_RAMP_EN_MASK);
2328 	snd_soc_component_update_bits(component, DA7219_HP_L_CTRL,
2329 			    DA7219_HP_L_AMP_RAMP_EN_MASK,
2330 			    DA7219_HP_L_AMP_RAMP_EN_MASK);
2331 	snd_soc_component_update_bits(component, DA7219_HP_R_CTRL,
2332 			    DA7219_HP_R_AMP_RAMP_EN_MASK,
2333 			    DA7219_HP_R_AMP_RAMP_EN_MASK);
2334 
2335 	/* Default minimum gain on HP to avoid pops during DAPM sequencing */
2336 	snd_soc_component_update_bits(component, DA7219_HP_L_CTRL,
2337 			    DA7219_HP_L_AMP_MIN_GAIN_EN_MASK,
2338 			    DA7219_HP_L_AMP_MIN_GAIN_EN_MASK);
2339 	snd_soc_component_update_bits(component, DA7219_HP_R_CTRL,
2340 			    DA7219_HP_R_AMP_MIN_GAIN_EN_MASK,
2341 			    DA7219_HP_R_AMP_MIN_GAIN_EN_MASK);
2342 
2343 	/* Default infinite tone gen, start/stop by Kcontrol */
2344 	snd_soc_component_write(component, DA7219_TONE_GEN_CYCLES, DA7219_BEEP_CYCLES_MASK);
2345 
2346 	/* Initialise AAD block */
2347 	ret = da7219_aad_init(component);
2348 	if (ret)
2349 		goto err_disable_reg;
2350 
2351 	return 0;
2352 
2353 err_disable_reg:
2354 	regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies);
2355 
2356 	return ret;
2357 }
2358 
2359 static void da7219_remove(struct snd_soc_component *component)
2360 {
2361 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2362 #ifdef CONFIG_COMMON_CLK
2363 	int i;
2364 #endif
2365 
2366 	da7219_aad_exit(component);
2367 
2368 #ifdef CONFIG_COMMON_CLK
2369 	for (i = DA7219_DAI_NUM_CLKS - 1; i >= 0; --i) {
2370 		if (da7219->dai_clks_lookup[i])
2371 			clkdev_drop(da7219->dai_clks_lookup[i]);
2372 	}
2373 #endif
2374 
2375 	/* Supplies */
2376 	regulator_bulk_disable(DA7219_NUM_SUPPLIES, da7219->supplies);
2377 }
2378 
2379 #ifdef CONFIG_PM
2380 static int da7219_suspend(struct snd_soc_component *component)
2381 {
2382 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2383 
2384 	/* Suspend AAD if we're not a wake-up source */
2385 	if (!da7219->wakeup_source)
2386 		da7219_aad_suspend(component);
2387 
2388 	snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
2389 
2390 	return 0;
2391 }
2392 
2393 static int da7219_resume(struct snd_soc_component *component)
2394 {
2395 	struct da7219_priv *da7219 = snd_soc_component_get_drvdata(component);
2396 
2397 	snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
2398 
2399 	/* Resume AAD if previously suspended */
2400 	if (!da7219->wakeup_source)
2401 		da7219_aad_resume(component);
2402 
2403 	return 0;
2404 }
2405 #else
2406 #define da7219_suspend NULL
2407 #define da7219_resume NULL
2408 #endif
2409 
2410 static const struct snd_soc_component_driver soc_component_dev_da7219 = {
2411 	.probe			= da7219_probe,
2412 	.remove			= da7219_remove,
2413 	.suspend		= da7219_suspend,
2414 	.resume			= da7219_resume,
2415 	.set_bias_level		= da7219_set_bias_level,
2416 	.controls		= da7219_snd_controls,
2417 	.num_controls		= ARRAY_SIZE(da7219_snd_controls),
2418 	.dapm_widgets		= da7219_dapm_widgets,
2419 	.num_dapm_widgets	= ARRAY_SIZE(da7219_dapm_widgets),
2420 	.dapm_routes		= da7219_audio_map,
2421 	.num_dapm_routes	= ARRAY_SIZE(da7219_audio_map),
2422 	.idle_bias_on		= 1,
2423 	.use_pmdown_time	= 1,
2424 	.endianness		= 1,
2425 	.non_legacy_dai_naming	= 1,
2426 };
2427 
2428 
2429 /*
2430  * Regmap configs
2431  */
2432 
2433 static struct reg_default da7219_reg_defaults[] = {
2434 	{ DA7219_MIC_1_SELECT, 0x00 },
2435 	{ DA7219_CIF_TIMEOUT_CTRL, 0x01 },
2436 	{ DA7219_SR_24_48, 0x00 },
2437 	{ DA7219_SR, 0x0A },
2438 	{ DA7219_CIF_I2C_ADDR_CFG, 0x02 },
2439 	{ DA7219_PLL_CTRL, 0x10 },
2440 	{ DA7219_PLL_FRAC_TOP, 0x00 },
2441 	{ DA7219_PLL_FRAC_BOT, 0x00 },
2442 	{ DA7219_PLL_INTEGER, 0x20 },
2443 	{ DA7219_DIG_ROUTING_DAI, 0x10 },
2444 	{ DA7219_DAI_CLK_MODE, 0x01 },
2445 	{ DA7219_DAI_CTRL, 0x28 },
2446 	{ DA7219_DAI_TDM_CTRL, 0x40 },
2447 	{ DA7219_DIG_ROUTING_DAC, 0x32 },
2448 	{ DA7219_DAI_OFFSET_LOWER, 0x00 },
2449 	{ DA7219_DAI_OFFSET_UPPER, 0x00 },
2450 	{ DA7219_REFERENCES, 0x08 },
2451 	{ DA7219_MIXIN_L_SELECT, 0x00 },
2452 	{ DA7219_MIXIN_L_GAIN, 0x03 },
2453 	{ DA7219_ADC_L_GAIN, 0x6F },
2454 	{ DA7219_ADC_FILTERS1, 0x80 },
2455 	{ DA7219_MIC_1_GAIN, 0x01 },
2456 	{ DA7219_SIDETONE_CTRL, 0x40 },
2457 	{ DA7219_SIDETONE_GAIN, 0x0E },
2458 	{ DA7219_DROUTING_ST_OUTFILT_1L, 0x01 },
2459 	{ DA7219_DROUTING_ST_OUTFILT_1R, 0x02 },
2460 	{ DA7219_DAC_FILTERS5, 0x00 },
2461 	{ DA7219_DAC_FILTERS2, 0x88 },
2462 	{ DA7219_DAC_FILTERS3, 0x88 },
2463 	{ DA7219_DAC_FILTERS4, 0x08 },
2464 	{ DA7219_DAC_FILTERS1, 0x80 },
2465 	{ DA7219_DAC_L_GAIN, 0x6F },
2466 	{ DA7219_DAC_R_GAIN, 0x6F },
2467 	{ DA7219_CP_CTRL, 0x20 },
2468 	{ DA7219_HP_L_GAIN, 0x39 },
2469 	{ DA7219_HP_R_GAIN, 0x39 },
2470 	{ DA7219_MIXOUT_L_SELECT, 0x00 },
2471 	{ DA7219_MIXOUT_R_SELECT, 0x00 },
2472 	{ DA7219_MICBIAS_CTRL, 0x03 },
2473 	{ DA7219_MIC_1_CTRL, 0x40 },
2474 	{ DA7219_MIXIN_L_CTRL, 0x40 },
2475 	{ DA7219_ADC_L_CTRL, 0x40 },
2476 	{ DA7219_DAC_L_CTRL, 0x40 },
2477 	{ DA7219_DAC_R_CTRL, 0x40 },
2478 	{ DA7219_HP_L_CTRL, 0x40 },
2479 	{ DA7219_HP_R_CTRL, 0x40 },
2480 	{ DA7219_MIXOUT_L_CTRL, 0x10 },
2481 	{ DA7219_MIXOUT_R_CTRL, 0x10 },
2482 	{ DA7219_CHIP_ID1, 0x23 },
2483 	{ DA7219_CHIP_ID2, 0x93 },
2484 	{ DA7219_IO_CTRL, 0x00 },
2485 	{ DA7219_GAIN_RAMP_CTRL, 0x00 },
2486 	{ DA7219_PC_COUNT, 0x02 },
2487 	{ DA7219_CP_VOL_THRESHOLD1, 0x0E },
2488 	{ DA7219_DIG_CTRL, 0x00 },
2489 	{ DA7219_ALC_CTRL2, 0x00 },
2490 	{ DA7219_ALC_CTRL3, 0x00 },
2491 	{ DA7219_ALC_NOISE, 0x3F },
2492 	{ DA7219_ALC_TARGET_MIN, 0x3F },
2493 	{ DA7219_ALC_TARGET_MAX, 0x00 },
2494 	{ DA7219_ALC_GAIN_LIMITS, 0xFF },
2495 	{ DA7219_ALC_ANA_GAIN_LIMITS, 0x71 },
2496 	{ DA7219_ALC_ANTICLIP_CTRL, 0x00 },
2497 	{ DA7219_ALC_ANTICLIP_LEVEL, 0x00 },
2498 	{ DA7219_DAC_NG_SETUP_TIME, 0x00 },
2499 	{ DA7219_DAC_NG_OFF_THRESH, 0x00 },
2500 	{ DA7219_DAC_NG_ON_THRESH, 0x00 },
2501 	{ DA7219_DAC_NG_CTRL, 0x00 },
2502 	{ DA7219_TONE_GEN_CFG1, 0x00 },
2503 	{ DA7219_TONE_GEN_CFG2, 0x00 },
2504 	{ DA7219_TONE_GEN_CYCLES, 0x00 },
2505 	{ DA7219_TONE_GEN_FREQ1_L, 0x55 },
2506 	{ DA7219_TONE_GEN_FREQ1_U, 0x15 },
2507 	{ DA7219_TONE_GEN_FREQ2_L, 0x00 },
2508 	{ DA7219_TONE_GEN_FREQ2_U, 0x40 },
2509 	{ DA7219_TONE_GEN_ON_PER, 0x02 },
2510 	{ DA7219_TONE_GEN_OFF_PER, 0x01 },
2511 	{ DA7219_ACCDET_IRQ_MASK_A, 0x00 },
2512 	{ DA7219_ACCDET_IRQ_MASK_B, 0x00 },
2513 	{ DA7219_ACCDET_CONFIG_1, 0xD6 },
2514 	{ DA7219_ACCDET_CONFIG_2, 0x34 },
2515 	{ DA7219_ACCDET_CONFIG_3, 0x0A },
2516 	{ DA7219_ACCDET_CONFIG_4, 0x16 },
2517 	{ DA7219_ACCDET_CONFIG_5, 0x21 },
2518 	{ DA7219_ACCDET_CONFIG_6, 0x3E },
2519 	{ DA7219_ACCDET_CONFIG_7, 0x01 },
2520 	{ DA7219_SYSTEM_ACTIVE, 0x00 },
2521 };
2522 
2523 static bool da7219_volatile_register(struct device *dev, unsigned int reg)
2524 {
2525 	switch (reg) {
2526 	case DA7219_MIC_1_GAIN_STATUS:
2527 	case DA7219_MIXIN_L_GAIN_STATUS:
2528 	case DA7219_ADC_L_GAIN_STATUS:
2529 	case DA7219_DAC_L_GAIN_STATUS:
2530 	case DA7219_DAC_R_GAIN_STATUS:
2531 	case DA7219_HP_L_GAIN_STATUS:
2532 	case DA7219_HP_R_GAIN_STATUS:
2533 	case DA7219_CIF_CTRL:
2534 	case DA7219_PLL_SRM_STS:
2535 	case DA7219_ALC_CTRL1:
2536 	case DA7219_SYSTEM_MODES_INPUT:
2537 	case DA7219_SYSTEM_MODES_OUTPUT:
2538 	case DA7219_ALC_OFFSET_AUTO_M_L:
2539 	case DA7219_ALC_OFFSET_AUTO_U_L:
2540 	case DA7219_TONE_GEN_CFG1:
2541 	case DA7219_ACCDET_STATUS_A:
2542 	case DA7219_ACCDET_STATUS_B:
2543 	case DA7219_ACCDET_IRQ_EVENT_A:
2544 	case DA7219_ACCDET_IRQ_EVENT_B:
2545 	case DA7219_ACCDET_CONFIG_8:
2546 	case DA7219_SYSTEM_STATUS:
2547 		return true;
2548 	default:
2549 		return false;
2550 	}
2551 }
2552 
2553 static const struct regmap_config da7219_regmap_config = {
2554 	.reg_bits = 8,
2555 	.val_bits = 8,
2556 
2557 	.max_register = DA7219_SYSTEM_ACTIVE,
2558 	.reg_defaults = da7219_reg_defaults,
2559 	.num_reg_defaults = ARRAY_SIZE(da7219_reg_defaults),
2560 	.volatile_reg = da7219_volatile_register,
2561 	.cache_type = REGCACHE_RBTREE,
2562 };
2563 
2564 
2565 /*
2566  * I2C layer
2567  */
2568 
2569 static int da7219_i2c_probe(struct i2c_client *i2c,
2570 			    const struct i2c_device_id *id)
2571 {
2572 	struct da7219_priv *da7219;
2573 	unsigned int system_active, system_status;
2574 	int i, ret;
2575 
2576 	da7219 = devm_kzalloc(&i2c->dev, sizeof(struct da7219_priv),
2577 			      GFP_KERNEL);
2578 	if (!da7219)
2579 		return -ENOMEM;
2580 
2581 	i2c_set_clientdata(i2c, da7219);
2582 
2583 	da7219->regmap = devm_regmap_init_i2c(i2c, &da7219_regmap_config);
2584 	if (IS_ERR(da7219->regmap)) {
2585 		ret = PTR_ERR(da7219->regmap);
2586 		dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
2587 		return ret;
2588 	}
2589 
2590 	regcache_cache_bypass(da7219->regmap, true);
2591 
2592 	/* Disable audio paths if still active from previous start */
2593 	regmap_read(da7219->regmap, DA7219_SYSTEM_ACTIVE, &system_active);
2594 	if (system_active) {
2595 		regmap_write(da7219->regmap, DA7219_GAIN_RAMP_CTRL,
2596 			     DA7219_GAIN_RAMP_RATE_NOMINAL);
2597 		regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_INPUT, 0x00);
2598 		regmap_write(da7219->regmap, DA7219_SYSTEM_MODES_OUTPUT, 0x01);
2599 
2600 		for (i = 0; i < DA7219_SYS_STAT_CHECK_RETRIES; ++i) {
2601 			regmap_read(da7219->regmap, DA7219_SYSTEM_STATUS,
2602 				    &system_status);
2603 			if (!system_status)
2604 				break;
2605 
2606 			msleep(DA7219_SYS_STAT_CHECK_DELAY);
2607 		}
2608 	}
2609 
2610 	/* Soft reset component */
2611 	regmap_write_bits(da7219->regmap, DA7219_ACCDET_CONFIG_1,
2612 			  DA7219_ACCDET_EN_MASK, 0);
2613 	regmap_write_bits(da7219->regmap, DA7219_CIF_CTRL,
2614 			  DA7219_CIF_REG_SOFT_RESET_MASK,
2615 			  DA7219_CIF_REG_SOFT_RESET_MASK);
2616 	regmap_write_bits(da7219->regmap, DA7219_SYSTEM_ACTIVE,
2617 			  DA7219_SYSTEM_ACTIVE_MASK, 0);
2618 
2619 	regcache_cache_bypass(da7219->regmap, false);
2620 
2621 	ret = devm_snd_soc_register_component(&i2c->dev,
2622 				     &soc_component_dev_da7219,
2623 				     &da7219_dai, 1);
2624 	if (ret < 0) {
2625 		dev_err(&i2c->dev, "Failed to register da7219 component: %d\n",
2626 			ret);
2627 	}
2628 	return ret;
2629 }
2630 
2631 static int da7219_i2c_remove(struct i2c_client *client)
2632 {
2633 	return 0;
2634 }
2635 
2636 static const struct i2c_device_id da7219_i2c_id[] = {
2637 	{ "da7219", },
2638 	{ }
2639 };
2640 MODULE_DEVICE_TABLE(i2c, da7219_i2c_id);
2641 
2642 static struct i2c_driver da7219_i2c_driver = {
2643 	.driver = {
2644 		.name = "da7219",
2645 		.of_match_table = of_match_ptr(da7219_of_match),
2646 		.acpi_match_table = ACPI_PTR(da7219_acpi_match),
2647 	},
2648 	.probe		= da7219_i2c_probe,
2649 	.remove		= da7219_i2c_remove,
2650 	.id_table	= da7219_i2c_id,
2651 };
2652 
2653 module_i2c_driver(da7219_i2c_driver);
2654 
2655 MODULE_DESCRIPTION("ASoC DA7219 Codec Driver");
2656 MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
2657 MODULE_LICENSE("GPL");
2658