1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * DA7213 ALSA SoC Codec Driver 4 * 5 * Copyright (c) 2013 Dialog Semiconductor 6 * 7 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> 8 * Based on DA9055 ALSA SoC codec driver. 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/of_device.h> 13 #include <linux/property.h> 14 #include <linux/clk.h> 15 #include <linux/delay.h> 16 #include <linux/i2c.h> 17 #include <linux/regmap.h> 18 #include <linux/slab.h> 19 #include <linux/module.h> 20 #include <sound/pcm.h> 21 #include <sound/pcm_params.h> 22 #include <linux/pm_runtime.h> 23 #include <sound/soc.h> 24 #include <sound/initval.h> 25 #include <sound/tlv.h> 26 27 #include <sound/da7213.h> 28 #include "da7213.h" 29 30 31 /* Gain and Volume */ 32 static const DECLARE_TLV_DB_RANGE(aux_vol_tlv, 33 /* -54dB */ 34 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0), 35 /* -52.5dB to 15dB */ 36 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0) 37 ); 38 39 static const DECLARE_TLV_DB_RANGE(digital_gain_tlv, 40 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 41 /* -78dB to 12dB */ 42 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0) 43 ); 44 45 static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv, 46 0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 47 /* 0dB to 36dB */ 48 0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0) 49 ); 50 51 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0); 52 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0); 53 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0); 54 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0); 55 static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0); 56 static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0); 57 static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0); 58 59 /* ADC and DAC voice mode (8kHz) high pass cutoff value */ 60 static const char * const da7213_voice_hpf_corner_txt[] = { 61 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" 62 }; 63 64 static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner, 65 DA7213_DAC_FILTERS1, 66 DA7213_VOICE_HPF_CORNER_SHIFT, 67 da7213_voice_hpf_corner_txt); 68 69 static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner, 70 DA7213_ADC_FILTERS1, 71 DA7213_VOICE_HPF_CORNER_SHIFT, 72 da7213_voice_hpf_corner_txt); 73 74 /* ADC and DAC high pass filter cutoff value */ 75 static const char * const da7213_audio_hpf_corner_txt[] = { 76 "Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000" 77 }; 78 79 static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner, 80 DA7213_DAC_FILTERS1 81 , DA7213_AUDIO_HPF_CORNER_SHIFT, 82 da7213_audio_hpf_corner_txt); 83 84 static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner, 85 DA7213_ADC_FILTERS1, 86 DA7213_AUDIO_HPF_CORNER_SHIFT, 87 da7213_audio_hpf_corner_txt); 88 89 /* Gain ramping rate value */ 90 static const char * const da7213_gain_ramp_rate_txt[] = { 91 "nominal rate * 8", "nominal rate * 16", "nominal rate / 16", 92 "nominal rate / 32" 93 }; 94 95 static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate, 96 DA7213_GAIN_RAMP_CTRL, 97 DA7213_GAIN_RAMP_RATE_SHIFT, 98 da7213_gain_ramp_rate_txt); 99 100 /* DAC noise gate setup time value */ 101 static const char * const da7213_dac_ng_setup_time_txt[] = { 102 "256 samples", "512 samples", "1024 samples", "2048 samples" 103 }; 104 105 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time, 106 DA7213_DAC_NG_SETUP_TIME, 107 DA7213_DAC_NG_SETUP_TIME_SHIFT, 108 da7213_dac_ng_setup_time_txt); 109 110 /* DAC noise gate rampup rate value */ 111 static const char * const da7213_dac_ng_rampup_txt[] = { 112 "0.02 ms/dB", "0.16 ms/dB" 113 }; 114 115 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate, 116 DA7213_DAC_NG_SETUP_TIME, 117 DA7213_DAC_NG_RAMPUP_RATE_SHIFT, 118 da7213_dac_ng_rampup_txt); 119 120 /* DAC noise gate rampdown rate value */ 121 static const char * const da7213_dac_ng_rampdown_txt[] = { 122 "0.64 ms/dB", "20.48 ms/dB" 123 }; 124 125 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate, 126 DA7213_DAC_NG_SETUP_TIME, 127 DA7213_DAC_NG_RAMPDN_RATE_SHIFT, 128 da7213_dac_ng_rampdown_txt); 129 130 /* DAC soft mute rate value */ 131 static const char * const da7213_dac_soft_mute_rate_txt[] = { 132 "1", "2", "4", "8", "16", "32", "64" 133 }; 134 135 static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate, 136 DA7213_DAC_FILTERS5, 137 DA7213_DAC_SOFTMUTE_RATE_SHIFT, 138 da7213_dac_soft_mute_rate_txt); 139 140 /* ALC Attack Rate select */ 141 static const char * const da7213_alc_attack_rate_txt[] = { 142 "44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", 143 "5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs" 144 }; 145 146 static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate, 147 DA7213_ALC_CTRL2, 148 DA7213_ALC_ATTACK_SHIFT, 149 da7213_alc_attack_rate_txt); 150 151 /* ALC Release Rate select */ 152 static const char * const da7213_alc_release_rate_txt[] = { 153 "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs", 154 "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs" 155 }; 156 157 static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate, 158 DA7213_ALC_CTRL2, 159 DA7213_ALC_RELEASE_SHIFT, 160 da7213_alc_release_rate_txt); 161 162 /* ALC Hold Time select */ 163 static const char * const da7213_alc_hold_time_txt[] = { 164 "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs", 165 "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs", 166 "253952/fs", "507904/fs", "1015808/fs", "2031616/fs" 167 }; 168 169 static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time, 170 DA7213_ALC_CTRL3, 171 DA7213_ALC_HOLD_SHIFT, 172 da7213_alc_hold_time_txt); 173 174 /* ALC Input Signal Tracking rate select */ 175 static const char * const da7213_alc_integ_rate_txt[] = { 176 "1/4", "1/16", "1/256", "1/65536" 177 }; 178 179 static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate, 180 DA7213_ALC_CTRL3, 181 DA7213_ALC_INTEG_ATTACK_SHIFT, 182 da7213_alc_integ_rate_txt); 183 184 static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate, 185 DA7213_ALC_CTRL3, 186 DA7213_ALC_INTEG_RELEASE_SHIFT, 187 da7213_alc_integ_rate_txt); 188 189 190 /* 191 * Control Functions 192 */ 193 194 static int da7213_get_alc_data(struct snd_soc_component *component, u8 reg_val) 195 { 196 int mid_data, top_data; 197 int sum = 0; 198 u8 iteration; 199 200 for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS; 201 iteration++) { 202 /* Select the left or right channel and capture data */ 203 snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val); 204 205 /* Select middle 8 bits for read back from data register */ 206 snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, 207 reg_val | DA7213_ALC_DATA_MIDDLE); 208 mid_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA); 209 210 /* Select top 8 bits for read back from data register */ 211 snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, 212 reg_val | DA7213_ALC_DATA_TOP); 213 top_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA); 214 215 sum += ((mid_data << 8) | (top_data << 16)); 216 } 217 218 return sum / DA7213_ALC_AVG_ITERATIONS; 219 } 220 221 static void da7213_alc_calib_man(struct snd_soc_component *component) 222 { 223 u8 reg_val; 224 int avg_left_data, avg_right_data, offset_l, offset_r; 225 226 /* Calculate average for Left and Right data */ 227 /* Left Data */ 228 avg_left_data = da7213_get_alc_data(component, 229 DA7213_ALC_CIC_OP_CHANNEL_LEFT); 230 /* Right Data */ 231 avg_right_data = da7213_get_alc_data(component, 232 DA7213_ALC_CIC_OP_CHANNEL_RIGHT); 233 234 /* Calculate DC offset */ 235 offset_l = -avg_left_data; 236 offset_r = -avg_right_data; 237 238 reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8; 239 snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_L, reg_val); 240 reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16; 241 snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_L, reg_val); 242 243 reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8; 244 snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_R, reg_val); 245 reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16; 246 snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_R, reg_val); 247 248 /* Enable analog/digital gain mode & offset cancellation */ 249 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, 250 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, 251 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE); 252 } 253 254 static void da7213_alc_calib_auto(struct snd_soc_component *component) 255 { 256 u8 alc_ctrl1; 257 258 /* Begin auto calibration and wait for completion */ 259 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN, 260 DA7213_ALC_AUTO_CALIB_EN); 261 do { 262 alc_ctrl1 = snd_soc_component_read(component, DA7213_ALC_CTRL1); 263 } while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN); 264 265 /* If auto calibration fails, fall back to digital gain only mode */ 266 if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) { 267 dev_warn(component->dev, 268 "ALC auto calibration failed with overflow\n"); 269 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, 270 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, 271 0); 272 } else { 273 /* Enable analog/digital gain mode & offset cancellation */ 274 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, 275 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE, 276 DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE); 277 } 278 279 } 280 281 static void da7213_alc_calib(struct snd_soc_component *component) 282 { 283 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 284 u8 adc_l_ctrl, adc_r_ctrl; 285 u8 mixin_l_sel, mixin_r_sel; 286 u8 mic_1_ctrl, mic_2_ctrl; 287 288 /* Save current values from ADC control registers */ 289 adc_l_ctrl = snd_soc_component_read(component, DA7213_ADC_L_CTRL); 290 adc_r_ctrl = snd_soc_component_read(component, DA7213_ADC_R_CTRL); 291 292 /* Save current values from MIXIN_L/R_SELECT registers */ 293 mixin_l_sel = snd_soc_component_read(component, DA7213_MIXIN_L_SELECT); 294 mixin_r_sel = snd_soc_component_read(component, DA7213_MIXIN_R_SELECT); 295 296 /* Save current values from MIC control registers */ 297 mic_1_ctrl = snd_soc_component_read(component, DA7213_MIC_1_CTRL); 298 mic_2_ctrl = snd_soc_component_read(component, DA7213_MIC_2_CTRL); 299 300 /* Enable ADC Left and Right */ 301 snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, DA7213_ADC_EN, 302 DA7213_ADC_EN); 303 snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, DA7213_ADC_EN, 304 DA7213_ADC_EN); 305 306 /* Enable MIC paths */ 307 snd_soc_component_update_bits(component, DA7213_MIXIN_L_SELECT, 308 DA7213_MIXIN_L_MIX_SELECT_MIC_1 | 309 DA7213_MIXIN_L_MIX_SELECT_MIC_2, 310 DA7213_MIXIN_L_MIX_SELECT_MIC_1 | 311 DA7213_MIXIN_L_MIX_SELECT_MIC_2); 312 snd_soc_component_update_bits(component, DA7213_MIXIN_R_SELECT, 313 DA7213_MIXIN_R_MIX_SELECT_MIC_2 | 314 DA7213_MIXIN_R_MIX_SELECT_MIC_1, 315 DA7213_MIXIN_R_MIX_SELECT_MIC_2 | 316 DA7213_MIXIN_R_MIX_SELECT_MIC_1); 317 318 /* Mute MIC PGAs */ 319 snd_soc_component_update_bits(component, DA7213_MIC_1_CTRL, DA7213_MUTE_EN, 320 DA7213_MUTE_EN); 321 snd_soc_component_update_bits(component, DA7213_MIC_2_CTRL, DA7213_MUTE_EN, 322 DA7213_MUTE_EN); 323 324 /* Perform calibration */ 325 if (da7213->alc_calib_auto) 326 da7213_alc_calib_auto(component); 327 else 328 da7213_alc_calib_man(component); 329 330 /* Restore MIXIN_L/R_SELECT registers to their original states */ 331 snd_soc_component_write(component, DA7213_MIXIN_L_SELECT, mixin_l_sel); 332 snd_soc_component_write(component, DA7213_MIXIN_R_SELECT, mixin_r_sel); 333 334 /* Restore ADC control registers to their original states */ 335 snd_soc_component_write(component, DA7213_ADC_L_CTRL, adc_l_ctrl); 336 snd_soc_component_write(component, DA7213_ADC_R_CTRL, adc_r_ctrl); 337 338 /* Restore original values of MIC control registers */ 339 snd_soc_component_write(component, DA7213_MIC_1_CTRL, mic_1_ctrl); 340 snd_soc_component_write(component, DA7213_MIC_2_CTRL, mic_2_ctrl); 341 } 342 343 static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol, 344 struct snd_ctl_elem_value *ucontrol) 345 { 346 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 347 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 348 int ret; 349 350 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol); 351 352 /* If ALC in operation, make sure calibrated offsets are updated */ 353 if ((!ret) && (da7213->alc_en)) 354 da7213_alc_calib(component); 355 356 return ret; 357 } 358 359 static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol, 360 struct snd_ctl_elem_value *ucontrol) 361 { 362 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 363 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 364 365 /* Force ALC offset calibration if enabling ALC */ 366 if (ucontrol->value.integer.value[0] || 367 ucontrol->value.integer.value[1]) { 368 if (!da7213->alc_en) { 369 da7213_alc_calib(component); 370 da7213->alc_en = true; 371 } 372 } else { 373 da7213->alc_en = false; 374 } 375 376 return snd_soc_put_volsw(kcontrol, ucontrol); 377 } 378 379 380 /* 381 * KControls 382 */ 383 384 static const struct snd_kcontrol_new da7213_snd_controls[] = { 385 386 /* Volume controls */ 387 SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN, 388 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX, 389 DA7213_NO_INVERT, mic_vol_tlv), 390 SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN, 391 DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX, 392 DA7213_NO_INVERT, mic_vol_tlv), 393 SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN, 394 DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX, 395 DA7213_NO_INVERT, aux_vol_tlv), 396 SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN, 397 DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT, 398 DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT, 399 snd_soc_get_volsw_2r, da7213_put_mixin_gain, 400 mixin_gain_tlv), 401 SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN, 402 DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX, 403 DA7213_NO_INVERT, digital_gain_tlv), 404 SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN, 405 DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX, 406 DA7213_NO_INVERT, digital_gain_tlv), 407 SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN, 408 DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX, 409 DA7213_NO_INVERT, hp_vol_tlv), 410 SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN, 411 DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX, 412 DA7213_NO_INVERT, lineout_vol_tlv), 413 414 /* DAC Equalizer controls */ 415 SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT, 416 DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT), 417 SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2, 418 DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX, 419 DA7213_NO_INVERT, eq_gain_tlv), 420 SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2, 421 DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX, 422 DA7213_NO_INVERT, eq_gain_tlv), 423 SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3, 424 DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX, 425 DA7213_NO_INVERT, eq_gain_tlv), 426 SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3, 427 DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX, 428 DA7213_NO_INVERT, eq_gain_tlv), 429 SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4, 430 DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX, 431 DA7213_NO_INVERT, eq_gain_tlv), 432 433 /* High Pass Filter and Voice Mode controls */ 434 SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT, 435 DA7213_HPF_EN_MAX, DA7213_NO_INVERT), 436 SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner), 437 SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1, 438 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX, 439 DA7213_NO_INVERT), 440 SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner), 441 442 SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT, 443 DA7213_HPF_EN_MAX, DA7213_NO_INVERT), 444 SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner), 445 SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1, 446 DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX, 447 DA7213_NO_INVERT), 448 SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner), 449 450 /* Mute controls */ 451 SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT, 452 DA7213_MUTE_EN_MAX, DA7213_INVERT), 453 SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT, 454 DA7213_MUTE_EN_MAX, DA7213_INVERT), 455 SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL, 456 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), 457 SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL, 458 DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT, 459 DA7213_MUTE_EN_MAX, DA7213_INVERT), 460 SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL, 461 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), 462 SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL, 463 DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT), 464 SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT, 465 DA7213_MUTE_EN_MAX, DA7213_INVERT), 466 SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5, 467 DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX, 468 DA7213_NO_INVERT), 469 SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate), 470 471 /* Zero Cross controls */ 472 SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL, 473 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT), 474 SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL, 475 DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, 476 DA7213_NO_INVERT), 477 SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL, 478 DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT), 479 480 /* Gain Ramping controls */ 481 SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL, 482 DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 483 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 484 SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL, 485 DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 486 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 487 SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL, 488 DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 489 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 490 SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL, 491 DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 492 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 493 SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL, 494 DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT, 495 DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT), 496 SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL, 497 DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX, 498 DA7213_NO_INVERT), 499 SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate), 500 501 /* DAC Noise Gate controls */ 502 SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT, 503 DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT), 504 SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time), 505 SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate), 506 SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate), 507 SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD, 508 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX, 509 DA7213_NO_INVERT), 510 SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD, 511 DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX, 512 DA7213_NO_INVERT), 513 514 /* DAC Routing & Inversion */ 515 SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC, 516 DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT, 517 DA7213_DAC_MONO_MAX, DA7213_NO_INVERT), 518 SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT, 519 DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX, 520 DA7213_NO_INVERT), 521 522 /* DMIC controls */ 523 SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT, 524 DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT, 525 DA7213_DMIC_EN_MAX, DA7213_NO_INVERT), 526 527 /* ALC Controls */ 528 SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT, 529 DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX, 530 DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw), 531 SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate), 532 SOC_ENUM("ALC Release Rate", da7213_alc_release_rate), 533 SOC_ENUM("ALC Hold Time", da7213_alc_hold_time), 534 /* 535 * Rate at which input signal envelope is tracked as the signal gets 536 * larger 537 */ 538 SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate), 539 /* 540 * Rate at which input signal envelope is tracked as the signal gets 541 * smaller 542 */ 543 SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate), 544 SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE, 545 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, 546 DA7213_INVERT, alc_threshold_tlv), 547 SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN, 548 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, 549 DA7213_INVERT, alc_threshold_tlv), 550 SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX, 551 DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX, 552 DA7213_INVERT, alc_threshold_tlv), 553 SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS, 554 DA7213_ALC_ATTEN_MAX_SHIFT, 555 DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT, 556 alc_gain_tlv), 557 SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS, 558 DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX, 559 DA7213_NO_INVERT, alc_gain_tlv), 560 SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS, 561 DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX, 562 DA7213_NO_INVERT, alc_analog_gain_tlv), 563 SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS, 564 DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX, 565 DA7213_NO_INVERT, alc_analog_gain_tlv), 566 SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL, 567 DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX, 568 DA7213_NO_INVERT), 569 SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL, 570 DA7213_ALC_ANTICLIP_LEVEL_SHIFT, 571 DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT), 572 }; 573 574 575 /* 576 * DAPM 577 */ 578 579 /* 580 * Enums 581 */ 582 583 /* MIC PGA source select */ 584 static const char * const da7213_mic_amp_in_sel_txt[] = { 585 "Differential", "MIC_P", "MIC_N" 586 }; 587 588 static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel, 589 DA7213_MIC_1_CTRL, 590 DA7213_MIC_AMP_IN_SEL_SHIFT, 591 da7213_mic_amp_in_sel_txt); 592 static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux = 593 SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel); 594 595 static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel, 596 DA7213_MIC_2_CTRL, 597 DA7213_MIC_AMP_IN_SEL_SHIFT, 598 da7213_mic_amp_in_sel_txt); 599 static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux = 600 SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel); 601 602 /* DAI routing select */ 603 static const char * const da7213_dai_src_txt[] = { 604 "ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right" 605 }; 606 607 static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src, 608 DA7213_DIG_ROUTING_DAI, 609 DA7213_DAI_L_SRC_SHIFT, 610 da7213_dai_src_txt); 611 static const struct snd_kcontrol_new da7213_dai_l_src_mux = 612 SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src); 613 614 static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src, 615 DA7213_DIG_ROUTING_DAI, 616 DA7213_DAI_R_SRC_SHIFT, 617 da7213_dai_src_txt); 618 static const struct snd_kcontrol_new da7213_dai_r_src_mux = 619 SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src); 620 621 /* DAC routing select */ 622 static const char * const da7213_dac_src_txt[] = { 623 "ADC Output Left", "ADC Output Right", "DAI Input Left", 624 "DAI Input Right" 625 }; 626 627 static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src, 628 DA7213_DIG_ROUTING_DAC, 629 DA7213_DAC_L_SRC_SHIFT, 630 da7213_dac_src_txt); 631 static const struct snd_kcontrol_new da7213_dac_l_src_mux = 632 SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src); 633 634 static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src, 635 DA7213_DIG_ROUTING_DAC, 636 DA7213_DAC_R_SRC_SHIFT, 637 da7213_dac_src_txt); 638 static const struct snd_kcontrol_new da7213_dac_r_src_mux = 639 SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src); 640 641 /* 642 * Mixer Controls 643 */ 644 645 /* Mixin Left */ 646 static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = { 647 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT, 648 DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT, 649 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 650 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT, 651 DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT, 652 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 653 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT, 654 DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT, 655 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 656 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT, 657 DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT, 658 DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 659 }; 660 661 /* Mixin Right */ 662 static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = { 663 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT, 664 DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT, 665 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 666 SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT, 667 DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT, 668 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 669 SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT, 670 DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT, 671 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 672 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT, 673 DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT, 674 DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 675 }; 676 677 /* Mixout Left */ 678 static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = { 679 SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT, 680 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT, 681 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 682 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT, 683 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT, 684 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 685 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT, 686 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT, 687 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 688 SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT, 689 DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT, 690 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 691 SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT, 692 DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT, 693 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 694 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT, 695 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT, 696 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 697 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT, 698 DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT, 699 DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT), 700 }; 701 702 /* Mixout Right */ 703 static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = { 704 SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT, 705 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT, 706 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 707 SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT, 708 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT, 709 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 710 SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT, 711 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT, 712 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 713 SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT, 714 DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT, 715 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 716 SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT, 717 DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT, 718 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 719 SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT, 720 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT, 721 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 722 SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT, 723 DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT, 724 DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT), 725 }; 726 727 728 /* 729 * DAPM Events 730 */ 731 732 static int da7213_dai_event(struct snd_soc_dapm_widget *w, 733 struct snd_kcontrol *kcontrol, int event) 734 { 735 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 736 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 737 u8 pll_ctrl, pll_status; 738 int i = 0; 739 bool srm_lock = false; 740 741 switch (event) { 742 case SND_SOC_DAPM_PRE_PMU: 743 /* Enable DAI clks for master mode */ 744 if (da7213->master) 745 snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, 746 DA7213_DAI_CLK_EN_MASK, 747 DA7213_DAI_CLK_EN_MASK); 748 749 /* PC synchronised to DAI */ 750 snd_soc_component_update_bits(component, DA7213_PC_COUNT, 751 DA7213_PC_FREERUN_MASK, 0); 752 753 /* If SRM not enabled then nothing more to do */ 754 pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL); 755 if (!(pll_ctrl & DA7213_PLL_SRM_EN)) 756 return 0; 757 758 /* Assist 32KHz mode PLL lock */ 759 if (pll_ctrl & DA7213_PLL_32K_MODE) { 760 snd_soc_component_write(component, 0xF0, 0x8B); 761 snd_soc_component_write(component, 0xF2, 0x03); 762 snd_soc_component_write(component, 0xF0, 0x00); 763 } 764 765 /* Check SRM has locked */ 766 do { 767 pll_status = snd_soc_component_read(component, DA7213_PLL_STATUS); 768 if (pll_status & DA7219_PLL_SRM_LOCK) { 769 srm_lock = true; 770 } else { 771 ++i; 772 msleep(50); 773 } 774 } while ((i < DA7213_SRM_CHECK_RETRIES) && (!srm_lock)); 775 776 if (!srm_lock) 777 dev_warn(component->dev, "SRM failed to lock\n"); 778 779 return 0; 780 case SND_SOC_DAPM_POST_PMD: 781 /* Revert 32KHz PLL lock udpates if applied previously */ 782 pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL); 783 if (pll_ctrl & DA7213_PLL_32K_MODE) { 784 snd_soc_component_write(component, 0xF0, 0x8B); 785 snd_soc_component_write(component, 0xF2, 0x01); 786 snd_soc_component_write(component, 0xF0, 0x00); 787 } 788 789 /* PC free-running */ 790 snd_soc_component_update_bits(component, DA7213_PC_COUNT, 791 DA7213_PC_FREERUN_MASK, 792 DA7213_PC_FREERUN_MASK); 793 794 /* Disable DAI clks if in master mode */ 795 if (da7213->master) 796 snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, 797 DA7213_DAI_CLK_EN_MASK, 0); 798 return 0; 799 default: 800 return -EINVAL; 801 } 802 } 803 804 805 /* 806 * DAPM widgets 807 */ 808 809 static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = { 810 /* 811 * Power Supply 812 */ 813 SND_SOC_DAPM_REGULATOR_SUPPLY("VDDMIC", 0, 0), 814 815 /* 816 * Input & Output 817 */ 818 819 /* Use a supply here as this controls both input & output DAIs */ 820 SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT, 821 DA7213_NO_INVERT, da7213_dai_event, 822 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 823 824 /* 825 * Input 826 */ 827 828 /* Input Lines */ 829 SND_SOC_DAPM_INPUT("MIC1"), 830 SND_SOC_DAPM_INPUT("MIC2"), 831 SND_SOC_DAPM_INPUT("AUXL"), 832 SND_SOC_DAPM_INPUT("AUXR"), 833 834 /* MUXs for Mic PGA source selection */ 835 SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0, 836 &da7213_mic_1_amp_in_sel_mux), 837 SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0, 838 &da7213_mic_2_amp_in_sel_mux), 839 840 /* Input PGAs */ 841 SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT, 842 DA7213_NO_INVERT, NULL, 0), 843 SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT, 844 DA7213_NO_INVERT, NULL, 0), 845 SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT, 846 DA7213_NO_INVERT, NULL, 0), 847 SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL, 848 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 849 SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL, 850 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 851 SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL, 852 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 853 854 /* Mic Biases */ 855 SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL, 856 DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT, 857 NULL, 0), 858 SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL, 859 DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT, 860 NULL, 0), 861 862 /* Input Mixers */ 863 SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0, 864 &da7213_dapm_mixinl_controls[0], 865 ARRAY_SIZE(da7213_dapm_mixinl_controls)), 866 SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0, 867 &da7213_dapm_mixinr_controls[0], 868 ARRAY_SIZE(da7213_dapm_mixinr_controls)), 869 870 /* ADCs */ 871 SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL, 872 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT), 873 SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL, 874 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT), 875 876 /* DAI */ 877 SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0, 878 &da7213_dai_l_src_mux), 879 SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0, 880 &da7213_dai_r_src_mux), 881 SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), 882 SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), 883 884 /* 885 * Output 886 */ 887 888 /* DAI */ 889 SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0), 890 SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0), 891 SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0, 892 &da7213_dac_l_src_mux), 893 SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0, 894 &da7213_dac_r_src_mux), 895 896 /* DACs */ 897 SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL, 898 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT), 899 SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL, 900 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT), 901 902 /* Output Mixers */ 903 SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0, 904 &da7213_dapm_mixoutl_controls[0], 905 ARRAY_SIZE(da7213_dapm_mixoutl_controls)), 906 SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0, 907 &da7213_dapm_mixoutr_controls[0], 908 ARRAY_SIZE(da7213_dapm_mixoutr_controls)), 909 910 /* Output PGAs */ 911 SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL, 912 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 913 SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL, 914 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 915 SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT, 916 DA7213_NO_INVERT, NULL, 0), 917 SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL, 918 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 919 SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL, 920 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0), 921 922 /* Charge Pump */ 923 SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT, 924 DA7213_NO_INVERT, NULL, 0), 925 926 /* Output Lines */ 927 SND_SOC_DAPM_OUTPUT("HPL"), 928 SND_SOC_DAPM_OUTPUT("HPR"), 929 SND_SOC_DAPM_OUTPUT("LINE"), 930 }; 931 932 933 /* 934 * DAPM audio route definition 935 */ 936 937 static const struct snd_soc_dapm_route da7213_audio_map[] = { 938 /* Dest Connecting Widget source */ 939 940 /* Input path */ 941 {"Mic Bias 1", NULL, "VDDMIC"}, 942 {"Mic Bias 2", NULL, "VDDMIC"}, 943 944 {"MIC1", NULL, "Mic Bias 1"}, 945 {"MIC2", NULL, "Mic Bias 2"}, 946 947 {"Mic 1 Amp Source MUX", "Differential", "MIC1"}, 948 {"Mic 1 Amp Source MUX", "MIC_P", "MIC1"}, 949 {"Mic 1 Amp Source MUX", "MIC_N", "MIC1"}, 950 951 {"Mic 2 Amp Source MUX", "Differential", "MIC2"}, 952 {"Mic 2 Amp Source MUX", "MIC_P", "MIC2"}, 953 {"Mic 2 Amp Source MUX", "MIC_N", "MIC2"}, 954 955 {"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"}, 956 {"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"}, 957 958 {"Aux Left PGA", NULL, "AUXL"}, 959 {"Aux Right PGA", NULL, "AUXR"}, 960 961 {"Mixin Left", "Aux Left Switch", "Aux Left PGA"}, 962 {"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"}, 963 {"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"}, 964 {"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"}, 965 966 {"Mixin Right", "Aux Right Switch", "Aux Right PGA"}, 967 {"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"}, 968 {"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"}, 969 {"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"}, 970 971 {"Mixin Left PGA", NULL, "Mixin Left"}, 972 {"ADC Left", NULL, "Mixin Left PGA"}, 973 974 {"Mixin Right PGA", NULL, "Mixin Right"}, 975 {"ADC Right", NULL, "Mixin Right PGA"}, 976 977 {"DAI Left Source MUX", "ADC Left", "ADC Left"}, 978 {"DAI Left Source MUX", "ADC Right", "ADC Right"}, 979 {"DAI Left Source MUX", "DAI Input Left", "DAIINL"}, 980 {"DAI Left Source MUX", "DAI Input Right", "DAIINR"}, 981 982 {"DAI Right Source MUX", "ADC Left", "ADC Left"}, 983 {"DAI Right Source MUX", "ADC Right", "ADC Right"}, 984 {"DAI Right Source MUX", "DAI Input Left", "DAIINL"}, 985 {"DAI Right Source MUX", "DAI Input Right", "DAIINR"}, 986 987 {"DAIOUTL", NULL, "DAI Left Source MUX"}, 988 {"DAIOUTR", NULL, "DAI Right Source MUX"}, 989 990 {"DAIOUTL", NULL, "DAI"}, 991 {"DAIOUTR", NULL, "DAI"}, 992 993 /* Output path */ 994 {"DAIINL", NULL, "DAI"}, 995 {"DAIINR", NULL, "DAI"}, 996 997 {"DAC Left Source MUX", "ADC Output Left", "ADC Left"}, 998 {"DAC Left Source MUX", "ADC Output Right", "ADC Right"}, 999 {"DAC Left Source MUX", "DAI Input Left", "DAIINL"}, 1000 {"DAC Left Source MUX", "DAI Input Right", "DAIINR"}, 1001 1002 {"DAC Right Source MUX", "ADC Output Left", "ADC Left"}, 1003 {"DAC Right Source MUX", "ADC Output Right", "ADC Right"}, 1004 {"DAC Right Source MUX", "DAI Input Left", "DAIINL"}, 1005 {"DAC Right Source MUX", "DAI Input Right", "DAIINR"}, 1006 1007 {"DAC Left", NULL, "DAC Left Source MUX"}, 1008 {"DAC Right", NULL, "DAC Right Source MUX"}, 1009 1010 {"Mixout Left", "Aux Left Switch", "Aux Left PGA"}, 1011 {"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"}, 1012 {"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"}, 1013 {"Mixout Left", "DAC Left Switch", "DAC Left"}, 1014 {"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"}, 1015 {"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"}, 1016 {"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"}, 1017 1018 {"Mixout Right", "Aux Right Switch", "Aux Right PGA"}, 1019 {"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"}, 1020 {"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"}, 1021 {"Mixout Right", "DAC Right Switch", "DAC Right"}, 1022 {"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"}, 1023 {"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"}, 1024 {"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"}, 1025 1026 {"Mixout Left PGA", NULL, "Mixout Left"}, 1027 {"Mixout Right PGA", NULL, "Mixout Right"}, 1028 1029 {"Headphone Left PGA", NULL, "Mixout Left PGA"}, 1030 {"Headphone Left PGA", NULL, "Charge Pump"}, 1031 {"HPL", NULL, "Headphone Left PGA"}, 1032 1033 {"Headphone Right PGA", NULL, "Mixout Right PGA"}, 1034 {"Headphone Right PGA", NULL, "Charge Pump"}, 1035 {"HPR", NULL, "Headphone Right PGA"}, 1036 1037 {"Lineout PGA", NULL, "Mixout Right PGA"}, 1038 {"LINE", NULL, "Lineout PGA"}, 1039 }; 1040 1041 static const struct reg_default da7213_reg_defaults[] = { 1042 { DA7213_DIG_ROUTING_DAI, 0x10 }, 1043 { DA7213_SR, 0x0A }, 1044 { DA7213_REFERENCES, 0x80 }, 1045 { DA7213_PLL_FRAC_TOP, 0x00 }, 1046 { DA7213_PLL_FRAC_BOT, 0x00 }, 1047 { DA7213_PLL_INTEGER, 0x20 }, 1048 { DA7213_PLL_CTRL, 0x0C }, 1049 { DA7213_DAI_CLK_MODE, 0x01 }, 1050 { DA7213_DAI_CTRL, 0x08 }, 1051 { DA7213_DIG_ROUTING_DAC, 0x32 }, 1052 { DA7213_AUX_L_GAIN, 0x35 }, 1053 { DA7213_AUX_R_GAIN, 0x35 }, 1054 { DA7213_MIXIN_L_SELECT, 0x00 }, 1055 { DA7213_MIXIN_R_SELECT, 0x00 }, 1056 { DA7213_MIXIN_L_GAIN, 0x03 }, 1057 { DA7213_MIXIN_R_GAIN, 0x03 }, 1058 { DA7213_ADC_L_GAIN, 0x6F }, 1059 { DA7213_ADC_R_GAIN, 0x6F }, 1060 { DA7213_ADC_FILTERS1, 0x80 }, 1061 { DA7213_MIC_1_GAIN, 0x01 }, 1062 { DA7213_MIC_2_GAIN, 0x01 }, 1063 { DA7213_DAC_FILTERS5, 0x00 }, 1064 { DA7213_DAC_FILTERS2, 0x88 }, 1065 { DA7213_DAC_FILTERS3, 0x88 }, 1066 { DA7213_DAC_FILTERS4, 0x08 }, 1067 { DA7213_DAC_FILTERS1, 0x80 }, 1068 { DA7213_DAC_L_GAIN, 0x6F }, 1069 { DA7213_DAC_R_GAIN, 0x6F }, 1070 { DA7213_CP_CTRL, 0x61 }, 1071 { DA7213_HP_L_GAIN, 0x39 }, 1072 { DA7213_HP_R_GAIN, 0x39 }, 1073 { DA7213_LINE_GAIN, 0x30 }, 1074 { DA7213_MIXOUT_L_SELECT, 0x00 }, 1075 { DA7213_MIXOUT_R_SELECT, 0x00 }, 1076 { DA7213_SYSTEM_MODES_INPUT, 0x00 }, 1077 { DA7213_SYSTEM_MODES_OUTPUT, 0x00 }, 1078 { DA7213_AUX_L_CTRL, 0x44 }, 1079 { DA7213_AUX_R_CTRL, 0x44 }, 1080 { DA7213_MICBIAS_CTRL, 0x11 }, 1081 { DA7213_MIC_1_CTRL, 0x40 }, 1082 { DA7213_MIC_2_CTRL, 0x40 }, 1083 { DA7213_MIXIN_L_CTRL, 0x40 }, 1084 { DA7213_MIXIN_R_CTRL, 0x40 }, 1085 { DA7213_ADC_L_CTRL, 0x40 }, 1086 { DA7213_ADC_R_CTRL, 0x40 }, 1087 { DA7213_DAC_L_CTRL, 0x48 }, 1088 { DA7213_DAC_R_CTRL, 0x40 }, 1089 { DA7213_HP_L_CTRL, 0x41 }, 1090 { DA7213_HP_R_CTRL, 0x40 }, 1091 { DA7213_LINE_CTRL, 0x40 }, 1092 { DA7213_MIXOUT_L_CTRL, 0x10 }, 1093 { DA7213_MIXOUT_R_CTRL, 0x10 }, 1094 { DA7213_LDO_CTRL, 0x00 }, 1095 { DA7213_IO_CTRL, 0x00 }, 1096 { DA7213_GAIN_RAMP_CTRL, 0x00}, 1097 { DA7213_MIC_CONFIG, 0x00 }, 1098 { DA7213_PC_COUNT, 0x00 }, 1099 { DA7213_CP_VOL_THRESHOLD1, 0x32 }, 1100 { DA7213_CP_DELAY, 0x95 }, 1101 { DA7213_CP_DETECTOR, 0x00 }, 1102 { DA7213_DAI_OFFSET, 0x00 }, 1103 { DA7213_DIG_CTRL, 0x00 }, 1104 { DA7213_ALC_CTRL2, 0x00 }, 1105 { DA7213_ALC_CTRL3, 0x00 }, 1106 { DA7213_ALC_NOISE, 0x3F }, 1107 { DA7213_ALC_TARGET_MIN, 0x3F }, 1108 { DA7213_ALC_TARGET_MAX, 0x00 }, 1109 { DA7213_ALC_GAIN_LIMITS, 0xFF }, 1110 { DA7213_ALC_ANA_GAIN_LIMITS, 0x71 }, 1111 { DA7213_ALC_ANTICLIP_CTRL, 0x00 }, 1112 { DA7213_ALC_ANTICLIP_LEVEL, 0x00 }, 1113 { DA7213_ALC_OFFSET_MAN_M_L, 0x00 }, 1114 { DA7213_ALC_OFFSET_MAN_U_L, 0x00 }, 1115 { DA7213_ALC_OFFSET_MAN_M_R, 0x00 }, 1116 { DA7213_ALC_OFFSET_MAN_U_R, 0x00 }, 1117 { DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 }, 1118 { DA7213_DAC_NG_SETUP_TIME, 0x00 }, 1119 { DA7213_DAC_NG_OFF_THRESHOLD, 0x00 }, 1120 { DA7213_DAC_NG_ON_THRESHOLD, 0x00 }, 1121 { DA7213_DAC_NG_CTRL, 0x00 }, 1122 }; 1123 1124 static bool da7213_volatile_register(struct device *dev, unsigned int reg) 1125 { 1126 switch (reg) { 1127 case DA7213_STATUS1: 1128 case DA7213_PLL_STATUS: 1129 case DA7213_AUX_L_GAIN_STATUS: 1130 case DA7213_AUX_R_GAIN_STATUS: 1131 case DA7213_MIC_1_GAIN_STATUS: 1132 case DA7213_MIC_2_GAIN_STATUS: 1133 case DA7213_MIXIN_L_GAIN_STATUS: 1134 case DA7213_MIXIN_R_GAIN_STATUS: 1135 case DA7213_ADC_L_GAIN_STATUS: 1136 case DA7213_ADC_R_GAIN_STATUS: 1137 case DA7213_DAC_L_GAIN_STATUS: 1138 case DA7213_DAC_R_GAIN_STATUS: 1139 case DA7213_HP_L_GAIN_STATUS: 1140 case DA7213_HP_R_GAIN_STATUS: 1141 case DA7213_LINE_GAIN_STATUS: 1142 case DA7213_ALC_CTRL1: 1143 case DA7213_ALC_OFFSET_AUTO_M_L: 1144 case DA7213_ALC_OFFSET_AUTO_U_L: 1145 case DA7213_ALC_OFFSET_AUTO_M_R: 1146 case DA7213_ALC_OFFSET_AUTO_U_R: 1147 case DA7213_ALC_CIC_OP_LVL_DATA: 1148 return true; 1149 default: 1150 return false; 1151 } 1152 } 1153 1154 static int da7213_hw_params(struct snd_pcm_substream *substream, 1155 struct snd_pcm_hw_params *params, 1156 struct snd_soc_dai *dai) 1157 { 1158 struct snd_soc_component *component = dai->component; 1159 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1160 u8 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_64; 1161 u8 dai_ctrl = 0; 1162 u8 fs; 1163 1164 /* Set channels */ 1165 switch (params_channels(params)) { 1166 case 1: 1167 if (da7213->fmt != DA7213_DAI_FORMAT_DSP) { 1168 dev_err(component->dev, "Mono supported only in DSP mode\n"); 1169 return -EINVAL; 1170 } 1171 dai_ctrl |= DA7213_DAI_MONO_MODE_EN; 1172 break; 1173 case 2: 1174 dai_ctrl &= ~(DA7213_DAI_MONO_MODE_EN); 1175 break; 1176 default: 1177 return -EINVAL; 1178 } 1179 1180 /* Set DAI format */ 1181 switch (params_width(params)) { 1182 case 16: 1183 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE; 1184 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_32; /* 32bit for 1ch and 2ch */ 1185 break; 1186 case 20: 1187 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE; 1188 break; 1189 case 24: 1190 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE; 1191 break; 1192 case 32: 1193 dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE; 1194 break; 1195 default: 1196 return -EINVAL; 1197 } 1198 1199 /* Set sampling rate */ 1200 switch (params_rate(params)) { 1201 case 8000: 1202 fs = DA7213_SR_8000; 1203 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1204 break; 1205 case 11025: 1206 fs = DA7213_SR_11025; 1207 da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800; 1208 break; 1209 case 12000: 1210 fs = DA7213_SR_12000; 1211 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1212 break; 1213 case 16000: 1214 fs = DA7213_SR_16000; 1215 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1216 break; 1217 case 22050: 1218 fs = DA7213_SR_22050; 1219 da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800; 1220 break; 1221 case 32000: 1222 fs = DA7213_SR_32000; 1223 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1224 break; 1225 case 44100: 1226 fs = DA7213_SR_44100; 1227 da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800; 1228 break; 1229 case 48000: 1230 fs = DA7213_SR_48000; 1231 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1232 break; 1233 case 88200: 1234 fs = DA7213_SR_88200; 1235 da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800; 1236 break; 1237 case 96000: 1238 fs = DA7213_SR_96000; 1239 da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000; 1240 break; 1241 default: 1242 return -EINVAL; 1243 } 1244 1245 snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, 1246 DA7213_DAI_BCLKS_PER_WCLK_MASK, dai_clk_mode); 1247 1248 snd_soc_component_update_bits(component, DA7213_DAI_CTRL, 1249 DA7213_DAI_WORD_LENGTH_MASK | DA7213_DAI_MONO_MODE_MASK, dai_ctrl); 1250 snd_soc_component_write(component, DA7213_SR, fs); 1251 1252 return 0; 1253 } 1254 1255 static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 1256 { 1257 struct snd_soc_component *component = codec_dai->component; 1258 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1259 u8 dai_clk_mode = 0, dai_ctrl = 0; 1260 u8 dai_offset = 0; 1261 1262 /* Set master/slave mode */ 1263 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1264 case SND_SOC_DAIFMT_CBM_CFM: 1265 da7213->master = true; 1266 break; 1267 case SND_SOC_DAIFMT_CBS_CFS: 1268 da7213->master = false; 1269 break; 1270 default: 1271 return -EINVAL; 1272 } 1273 1274 /* Set clock normal/inverted */ 1275 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1276 case SND_SOC_DAIFMT_I2S: 1277 case SND_SOC_DAIFMT_LEFT_J: 1278 case SND_SOC_DAIFMT_RIGHT_J: 1279 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1280 case SND_SOC_DAIFMT_NB_NF: 1281 break; 1282 case SND_SOC_DAIFMT_NB_IF: 1283 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV; 1284 break; 1285 case SND_SOC_DAIFMT_IB_NF: 1286 dai_clk_mode |= DA7213_DAI_CLK_POL_INV; 1287 break; 1288 case SND_SOC_DAIFMT_IB_IF: 1289 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | 1290 DA7213_DAI_CLK_POL_INV; 1291 break; 1292 default: 1293 return -EINVAL; 1294 } 1295 break; 1296 case SND_SOC_DAI_FORMAT_DSP_A: 1297 case SND_SOC_DAI_FORMAT_DSP_B: 1298 /* The bclk is inverted wrt ASoC conventions */ 1299 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1300 case SND_SOC_DAIFMT_NB_NF: 1301 dai_clk_mode |= DA7213_DAI_CLK_POL_INV; 1302 break; 1303 case SND_SOC_DAIFMT_NB_IF: 1304 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | 1305 DA7213_DAI_CLK_POL_INV; 1306 break; 1307 case SND_SOC_DAIFMT_IB_NF: 1308 break; 1309 case SND_SOC_DAIFMT_IB_IF: 1310 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV; 1311 break; 1312 default: 1313 return -EINVAL; 1314 } 1315 break; 1316 default: 1317 return -EINVAL; 1318 } 1319 1320 /* Only I2S is supported */ 1321 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1322 case SND_SOC_DAIFMT_I2S: 1323 dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE; 1324 da7213->fmt = DA7213_DAI_FORMAT_I2S_MODE; 1325 break; 1326 case SND_SOC_DAIFMT_LEFT_J: 1327 dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J; 1328 da7213->fmt = DA7213_DAI_FORMAT_LEFT_J; 1329 break; 1330 case SND_SOC_DAIFMT_RIGHT_J: 1331 dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J; 1332 da7213->fmt = DA7213_DAI_FORMAT_RIGHT_J; 1333 break; 1334 case SND_SOC_DAI_FORMAT_DSP_A: /* L data MSB after FRM LRC */ 1335 dai_ctrl |= DA7213_DAI_FORMAT_DSP; 1336 dai_offset = 1; 1337 da7213->fmt = DA7213_DAI_FORMAT_DSP; 1338 break; 1339 case SND_SOC_DAI_FORMAT_DSP_B: /* L data MSB during FRM LRC */ 1340 dai_ctrl |= DA7213_DAI_FORMAT_DSP; 1341 da7213->fmt = DA7213_DAI_FORMAT_DSP; 1342 break; 1343 default: 1344 return -EINVAL; 1345 } 1346 1347 /* By default only 64 BCLK per WCLK is supported */ 1348 dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64; 1349 1350 snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE, 1351 DA7213_DAI_BCLKS_PER_WCLK_MASK | 1352 DA7213_DAI_CLK_POL_MASK | DA7213_DAI_WCLK_POL_MASK, 1353 dai_clk_mode); 1354 snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK, 1355 dai_ctrl); 1356 snd_soc_component_write(component, DA7213_DAI_OFFSET, dai_offset); 1357 1358 return 0; 1359 } 1360 1361 static int da7213_mute(struct snd_soc_dai *dai, int mute, int direction) 1362 { 1363 struct snd_soc_component *component = dai->component; 1364 1365 if (mute) { 1366 snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, 1367 DA7213_MUTE_EN, DA7213_MUTE_EN); 1368 snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, 1369 DA7213_MUTE_EN, DA7213_MUTE_EN); 1370 } else { 1371 snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, 1372 DA7213_MUTE_EN, 0); 1373 snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, 1374 DA7213_MUTE_EN, 0); 1375 } 1376 1377 return 0; 1378 } 1379 1380 #define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1381 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1382 1383 static int da7213_set_component_sysclk(struct snd_soc_component *component, 1384 int clk_id, int source, 1385 unsigned int freq, int dir) 1386 { 1387 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1388 int ret = 0; 1389 1390 if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq)) 1391 return 0; 1392 1393 if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) { 1394 dev_err(component->dev, "Unsupported MCLK value %d\n", 1395 freq); 1396 return -EINVAL; 1397 } 1398 1399 switch (clk_id) { 1400 case DA7213_CLKSRC_MCLK: 1401 snd_soc_component_update_bits(component, DA7213_PLL_CTRL, 1402 DA7213_PLL_MCLK_SQR_EN, 0); 1403 break; 1404 case DA7213_CLKSRC_MCLK_SQR: 1405 snd_soc_component_update_bits(component, DA7213_PLL_CTRL, 1406 DA7213_PLL_MCLK_SQR_EN, 1407 DA7213_PLL_MCLK_SQR_EN); 1408 break; 1409 default: 1410 dev_err(component->dev, "Unknown clock source %d\n", clk_id); 1411 return -EINVAL; 1412 } 1413 1414 da7213->clk_src = clk_id; 1415 1416 if (da7213->mclk) { 1417 freq = clk_round_rate(da7213->mclk, freq); 1418 ret = clk_set_rate(da7213->mclk, freq); 1419 if (ret) { 1420 dev_err(component->dev, "Failed to set clock rate %d\n", 1421 freq); 1422 return ret; 1423 } 1424 } 1425 1426 da7213->mclk_rate = freq; 1427 1428 return 0; 1429 } 1430 1431 /* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */ 1432 static int _da7213_set_component_pll(struct snd_soc_component *component, 1433 int pll_id, int source, 1434 unsigned int fref, unsigned int fout) 1435 { 1436 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1437 1438 u8 pll_ctrl, indiv_bits, indiv; 1439 u8 pll_frac_top, pll_frac_bot, pll_integer; 1440 u32 freq_ref; 1441 u64 frac_div; 1442 1443 /* Workout input divider based on MCLK rate */ 1444 if (da7213->mclk_rate == 32768) { 1445 if (!da7213->master) { 1446 dev_err(component->dev, 1447 "32KHz only valid if codec is clock master\n"); 1448 return -EINVAL; 1449 } 1450 1451 /* 32KHz PLL Mode */ 1452 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ; 1453 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL; 1454 source = DA7213_SYSCLK_PLL_32KHZ; 1455 freq_ref = 3750000; 1456 1457 } else { 1458 if (da7213->mclk_rate < 5000000) { 1459 dev_err(component->dev, 1460 "PLL input clock %d below valid range\n", 1461 da7213->mclk_rate); 1462 return -EINVAL; 1463 } else if (da7213->mclk_rate <= 9000000) { 1464 indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ; 1465 indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL; 1466 } else if (da7213->mclk_rate <= 18000000) { 1467 indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ; 1468 indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL; 1469 } else if (da7213->mclk_rate <= 36000000) { 1470 indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ; 1471 indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL; 1472 } else if (da7213->mclk_rate <= 54000000) { 1473 indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ; 1474 indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL; 1475 } else { 1476 dev_err(component->dev, 1477 "PLL input clock %d above valid range\n", 1478 da7213->mclk_rate); 1479 return -EINVAL; 1480 } 1481 freq_ref = (da7213->mclk_rate / indiv); 1482 } 1483 1484 pll_ctrl = indiv_bits; 1485 1486 /* Configure PLL */ 1487 switch (source) { 1488 case DA7213_SYSCLK_MCLK: 1489 snd_soc_component_update_bits(component, DA7213_PLL_CTRL, 1490 DA7213_PLL_INDIV_MASK | 1491 DA7213_PLL_MODE_MASK, pll_ctrl); 1492 return 0; 1493 case DA7213_SYSCLK_PLL: 1494 break; 1495 case DA7213_SYSCLK_PLL_SRM: 1496 pll_ctrl |= DA7213_PLL_SRM_EN; 1497 fout = DA7213_PLL_FREQ_OUT_94310400; 1498 break; 1499 case DA7213_SYSCLK_PLL_32KHZ: 1500 if (da7213->mclk_rate != 32768) { 1501 dev_err(component->dev, 1502 "32KHz mode only valid with 32KHz MCLK\n"); 1503 return -EINVAL; 1504 } 1505 1506 pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN; 1507 fout = DA7213_PLL_FREQ_OUT_94310400; 1508 break; 1509 default: 1510 dev_err(component->dev, "Invalid PLL config\n"); 1511 return -EINVAL; 1512 } 1513 1514 /* Calculate dividers for PLL */ 1515 pll_integer = fout / freq_ref; 1516 frac_div = (u64)(fout % freq_ref) * 8192ULL; 1517 do_div(frac_div, freq_ref); 1518 pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK; 1519 pll_frac_bot = (frac_div) & DA7213_BYTE_MASK; 1520 1521 /* Write PLL dividers */ 1522 snd_soc_component_write(component, DA7213_PLL_FRAC_TOP, pll_frac_top); 1523 snd_soc_component_write(component, DA7213_PLL_FRAC_BOT, pll_frac_bot); 1524 snd_soc_component_write(component, DA7213_PLL_INTEGER, pll_integer); 1525 1526 /* Enable PLL */ 1527 pll_ctrl |= DA7213_PLL_EN; 1528 snd_soc_component_update_bits(component, DA7213_PLL_CTRL, 1529 DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK, 1530 pll_ctrl); 1531 1532 /* Assist 32KHz mode PLL lock */ 1533 if (source == DA7213_SYSCLK_PLL_32KHZ) { 1534 snd_soc_component_write(component, 0xF0, 0x8B); 1535 snd_soc_component_write(component, 0xF1, 0x03); 1536 snd_soc_component_write(component, 0xF1, 0x01); 1537 snd_soc_component_write(component, 0xF0, 0x00); 1538 } 1539 1540 return 0; 1541 } 1542 1543 static int da7213_set_component_pll(struct snd_soc_component *component, 1544 int pll_id, int source, 1545 unsigned int fref, unsigned int fout) 1546 { 1547 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1548 da7213->fixed_clk_auto_pll = false; 1549 1550 return _da7213_set_component_pll(component, pll_id, source, fref, fout); 1551 } 1552 1553 /* DAI operations */ 1554 static const struct snd_soc_dai_ops da7213_dai_ops = { 1555 .hw_params = da7213_hw_params, 1556 .set_fmt = da7213_set_dai_fmt, 1557 .mute_stream = da7213_mute, 1558 .no_capture_mute = 1, 1559 }; 1560 1561 static struct snd_soc_dai_driver da7213_dai = { 1562 .name = "da7213-hifi", 1563 /* Playback Capabilities */ 1564 .playback = { 1565 .stream_name = "Playback", 1566 .channels_min = 1, 1567 .channels_max = 2, 1568 .rates = SNDRV_PCM_RATE_8000_96000, 1569 .formats = DA7213_FORMATS, 1570 }, 1571 /* Capture Capabilities */ 1572 .capture = { 1573 .stream_name = "Capture", 1574 .channels_min = 1, 1575 .channels_max = 2, 1576 .rates = SNDRV_PCM_RATE_8000_96000, 1577 .formats = DA7213_FORMATS, 1578 }, 1579 .ops = &da7213_dai_ops, 1580 .symmetric_rate = 1, 1581 }; 1582 1583 static int da7213_set_auto_pll(struct snd_soc_component *component, bool enable) 1584 { 1585 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1586 int mode; 1587 1588 if (!da7213->fixed_clk_auto_pll) 1589 return 0; 1590 1591 da7213->mclk_rate = clk_get_rate(da7213->mclk); 1592 1593 if (enable) { 1594 /* Slave mode needs SRM for non-harmonic frequencies */ 1595 if (da7213->master) 1596 mode = DA7213_SYSCLK_PLL; 1597 else 1598 mode = DA7213_SYSCLK_PLL_SRM; 1599 1600 /* PLL is not required for harmonic frequencies */ 1601 switch (da7213->out_rate) { 1602 case DA7213_PLL_FREQ_OUT_90316800: 1603 if (da7213->mclk_rate == 11289600 || 1604 da7213->mclk_rate == 22579200 || 1605 da7213->mclk_rate == 45158400) 1606 mode = DA7213_SYSCLK_MCLK; 1607 break; 1608 case DA7213_PLL_FREQ_OUT_98304000: 1609 if (da7213->mclk_rate == 12288000 || 1610 da7213->mclk_rate == 24576000 || 1611 da7213->mclk_rate == 49152000) 1612 mode = DA7213_SYSCLK_MCLK; 1613 1614 break; 1615 default: 1616 return -1; 1617 } 1618 } else { 1619 /* Disable PLL in standby */ 1620 mode = DA7213_SYSCLK_MCLK; 1621 } 1622 1623 return _da7213_set_component_pll(component, 0, mode, 1624 da7213->mclk_rate, da7213->out_rate); 1625 } 1626 1627 static int da7213_set_bias_level(struct snd_soc_component *component, 1628 enum snd_soc_bias_level level) 1629 { 1630 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1631 int ret; 1632 1633 switch (level) { 1634 case SND_SOC_BIAS_ON: 1635 break; 1636 case SND_SOC_BIAS_PREPARE: 1637 /* Enable MCLK for transition to ON state */ 1638 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) { 1639 if (da7213->mclk) { 1640 ret = clk_prepare_enable(da7213->mclk); 1641 if (ret) { 1642 dev_err(component->dev, 1643 "Failed to enable mclk\n"); 1644 return ret; 1645 } 1646 1647 da7213_set_auto_pll(component, true); 1648 } 1649 } 1650 break; 1651 case SND_SOC_BIAS_STANDBY: 1652 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { 1653 /* Enable VMID reference & master bias */ 1654 snd_soc_component_update_bits(component, DA7213_REFERENCES, 1655 DA7213_VMID_EN | DA7213_BIAS_EN, 1656 DA7213_VMID_EN | DA7213_BIAS_EN); 1657 } else { 1658 /* Remove MCLK */ 1659 if (da7213->mclk) { 1660 da7213_set_auto_pll(component, false); 1661 clk_disable_unprepare(da7213->mclk); 1662 } 1663 } 1664 break; 1665 case SND_SOC_BIAS_OFF: 1666 /* Disable VMID reference & master bias */ 1667 snd_soc_component_update_bits(component, DA7213_REFERENCES, 1668 DA7213_VMID_EN | DA7213_BIAS_EN, 0); 1669 break; 1670 } 1671 return 0; 1672 } 1673 1674 #if defined(CONFIG_OF) 1675 /* DT */ 1676 static const struct of_device_id da7213_of_match[] = { 1677 { .compatible = "dlg,da7212", }, 1678 { .compatible = "dlg,da7213", }, 1679 { } 1680 }; 1681 MODULE_DEVICE_TABLE(of, da7213_of_match); 1682 #endif 1683 1684 #ifdef CONFIG_ACPI 1685 static const struct acpi_device_id da7213_acpi_match[] = { 1686 { "DLGS7212", 0}, 1687 { "DLGS7213", 0}, 1688 { }, 1689 }; 1690 MODULE_DEVICE_TABLE(acpi, da7213_acpi_match); 1691 #endif 1692 1693 static enum da7213_micbias_voltage 1694 da7213_of_micbias_lvl(struct snd_soc_component *component, u32 val) 1695 { 1696 switch (val) { 1697 case 1600: 1698 return DA7213_MICBIAS_1_6V; 1699 case 2200: 1700 return DA7213_MICBIAS_2_2V; 1701 case 2500: 1702 return DA7213_MICBIAS_2_5V; 1703 case 3000: 1704 return DA7213_MICBIAS_3_0V; 1705 default: 1706 dev_warn(component->dev, "Invalid micbias level\n"); 1707 return DA7213_MICBIAS_2_2V; 1708 } 1709 } 1710 1711 static enum da7213_dmic_data_sel 1712 da7213_of_dmic_data_sel(struct snd_soc_component *component, const char *str) 1713 { 1714 if (!strcmp(str, "lrise_rfall")) { 1715 return DA7213_DMIC_DATA_LRISE_RFALL; 1716 } else if (!strcmp(str, "lfall_rrise")) { 1717 return DA7213_DMIC_DATA_LFALL_RRISE; 1718 } else { 1719 dev_warn(component->dev, "Invalid DMIC data select type\n"); 1720 return DA7213_DMIC_DATA_LRISE_RFALL; 1721 } 1722 } 1723 1724 static enum da7213_dmic_samplephase 1725 da7213_of_dmic_samplephase(struct snd_soc_component *component, const char *str) 1726 { 1727 if (!strcmp(str, "on_clkedge")) { 1728 return DA7213_DMIC_SAMPLE_ON_CLKEDGE; 1729 } else if (!strcmp(str, "between_clkedge")) { 1730 return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE; 1731 } else { 1732 dev_warn(component->dev, "Invalid DMIC sample phase\n"); 1733 return DA7213_DMIC_SAMPLE_ON_CLKEDGE; 1734 } 1735 } 1736 1737 static enum da7213_dmic_clk_rate 1738 da7213_of_dmic_clkrate(struct snd_soc_component *component, u32 val) 1739 { 1740 switch (val) { 1741 case 1500000: 1742 return DA7213_DMIC_CLK_1_5MHZ; 1743 case 3000000: 1744 return DA7213_DMIC_CLK_3_0MHZ; 1745 default: 1746 dev_warn(component->dev, "Invalid DMIC clock rate\n"); 1747 return DA7213_DMIC_CLK_1_5MHZ; 1748 } 1749 } 1750 1751 static struct da7213_platform_data 1752 *da7213_fw_to_pdata(struct snd_soc_component *component) 1753 { 1754 struct device *dev = component->dev; 1755 struct da7213_platform_data *pdata; 1756 const char *fw_str; 1757 u32 fw_val32; 1758 1759 pdata = devm_kzalloc(component->dev, sizeof(*pdata), GFP_KERNEL); 1760 if (!pdata) 1761 return NULL; 1762 1763 if (device_property_read_u32(dev, "dlg,micbias1-lvl", &fw_val32) >= 0) 1764 pdata->micbias1_lvl = da7213_of_micbias_lvl(component, fw_val32); 1765 else 1766 pdata->micbias1_lvl = DA7213_MICBIAS_2_2V; 1767 1768 if (device_property_read_u32(dev, "dlg,micbias2-lvl", &fw_val32) >= 0) 1769 pdata->micbias2_lvl = da7213_of_micbias_lvl(component, fw_val32); 1770 else 1771 pdata->micbias2_lvl = DA7213_MICBIAS_2_2V; 1772 1773 if (!device_property_read_string(dev, "dlg,dmic-data-sel", &fw_str)) 1774 pdata->dmic_data_sel = da7213_of_dmic_data_sel(component, fw_str); 1775 else 1776 pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL; 1777 1778 if (!device_property_read_string(dev, "dlg,dmic-samplephase", &fw_str)) 1779 pdata->dmic_samplephase = 1780 da7213_of_dmic_samplephase(component, fw_str); 1781 else 1782 pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE; 1783 1784 if (device_property_read_u32(dev, "dlg,dmic-clkrate", &fw_val32) >= 0) 1785 pdata->dmic_clk_rate = da7213_of_dmic_clkrate(component, fw_val32); 1786 else 1787 pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ; 1788 1789 return pdata; 1790 } 1791 1792 static int da7213_probe(struct snd_soc_component *component) 1793 { 1794 struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component); 1795 1796 pm_runtime_get_sync(component->dev); 1797 1798 /* Default to using ALC auto offset calibration mode. */ 1799 snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, 1800 DA7213_ALC_CALIB_MODE_MAN, 0); 1801 da7213->alc_calib_auto = true; 1802 1803 /* Default PC counter to free-running */ 1804 snd_soc_component_update_bits(component, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK, 1805 DA7213_PC_FREERUN_MASK); 1806 1807 /* Enable all Gain Ramps */ 1808 snd_soc_component_update_bits(component, DA7213_AUX_L_CTRL, 1809 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1810 snd_soc_component_update_bits(component, DA7213_AUX_R_CTRL, 1811 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1812 snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL, 1813 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1814 snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL, 1815 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1816 snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, 1817 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1818 snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, 1819 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1820 snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL, 1821 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1822 snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL, 1823 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1824 snd_soc_component_update_bits(component, DA7213_HP_L_CTRL, 1825 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1826 snd_soc_component_update_bits(component, DA7213_HP_R_CTRL, 1827 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1828 snd_soc_component_update_bits(component, DA7213_LINE_CTRL, 1829 DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN); 1830 1831 /* 1832 * There are two separate control bits for input and output mixers as 1833 * well as headphone and line outs. 1834 * One to enable corresponding amplifier and other to enable its 1835 * output. As amplifier bits are related to power control, they are 1836 * being managed by DAPM while other (non power related) bits are 1837 * enabled here 1838 */ 1839 snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL, 1840 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN); 1841 snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL, 1842 DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN); 1843 1844 snd_soc_component_update_bits(component, DA7213_MIXOUT_L_CTRL, 1845 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN); 1846 snd_soc_component_update_bits(component, DA7213_MIXOUT_R_CTRL, 1847 DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN); 1848 1849 snd_soc_component_update_bits(component, DA7213_HP_L_CTRL, 1850 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE); 1851 snd_soc_component_update_bits(component, DA7213_HP_R_CTRL, 1852 DA7213_HP_AMP_OE, DA7213_HP_AMP_OE); 1853 1854 snd_soc_component_update_bits(component, DA7213_LINE_CTRL, 1855 DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE); 1856 1857 /* Handle DT/Platform data */ 1858 da7213->pdata = dev_get_platdata(component->dev); 1859 if (!da7213->pdata) 1860 da7213->pdata = da7213_fw_to_pdata(component); 1861 1862 /* Set platform data values */ 1863 if (da7213->pdata) { 1864 struct da7213_platform_data *pdata = da7213->pdata; 1865 u8 micbias_lvl = 0, dmic_cfg = 0; 1866 1867 /* Set Mic Bias voltages */ 1868 switch (pdata->micbias1_lvl) { 1869 case DA7213_MICBIAS_1_6V: 1870 case DA7213_MICBIAS_2_2V: 1871 case DA7213_MICBIAS_2_5V: 1872 case DA7213_MICBIAS_3_0V: 1873 micbias_lvl |= (pdata->micbias1_lvl << 1874 DA7213_MICBIAS1_LEVEL_SHIFT); 1875 break; 1876 } 1877 switch (pdata->micbias2_lvl) { 1878 case DA7213_MICBIAS_1_6V: 1879 case DA7213_MICBIAS_2_2V: 1880 case DA7213_MICBIAS_2_5V: 1881 case DA7213_MICBIAS_3_0V: 1882 micbias_lvl |= (pdata->micbias2_lvl << 1883 DA7213_MICBIAS2_LEVEL_SHIFT); 1884 break; 1885 } 1886 snd_soc_component_update_bits(component, DA7213_MICBIAS_CTRL, 1887 DA7213_MICBIAS1_LEVEL_MASK | 1888 DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl); 1889 1890 /* Set DMIC configuration */ 1891 switch (pdata->dmic_data_sel) { 1892 case DA7213_DMIC_DATA_LFALL_RRISE: 1893 case DA7213_DMIC_DATA_LRISE_RFALL: 1894 dmic_cfg |= (pdata->dmic_data_sel << 1895 DA7213_DMIC_DATA_SEL_SHIFT); 1896 break; 1897 } 1898 switch (pdata->dmic_samplephase) { 1899 case DA7213_DMIC_SAMPLE_ON_CLKEDGE: 1900 case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE: 1901 dmic_cfg |= (pdata->dmic_samplephase << 1902 DA7213_DMIC_SAMPLEPHASE_SHIFT); 1903 break; 1904 } 1905 switch (pdata->dmic_clk_rate) { 1906 case DA7213_DMIC_CLK_3_0MHZ: 1907 case DA7213_DMIC_CLK_1_5MHZ: 1908 dmic_cfg |= (pdata->dmic_clk_rate << 1909 DA7213_DMIC_CLK_RATE_SHIFT); 1910 break; 1911 } 1912 snd_soc_component_update_bits(component, DA7213_MIC_CONFIG, 1913 DA7213_DMIC_DATA_SEL_MASK | 1914 DA7213_DMIC_SAMPLEPHASE_MASK | 1915 DA7213_DMIC_CLK_RATE_MASK, dmic_cfg); 1916 } 1917 1918 pm_runtime_put_sync(component->dev); 1919 1920 /* Check if MCLK provided */ 1921 da7213->mclk = devm_clk_get(component->dev, "mclk"); 1922 if (IS_ERR(da7213->mclk)) { 1923 if (PTR_ERR(da7213->mclk) != -ENOENT) 1924 return PTR_ERR(da7213->mclk); 1925 else 1926 da7213->mclk = NULL; 1927 } else { 1928 /* Do automatic PLL handling assuming fixed clock until 1929 * set_pll() has been called. This makes the codec usable 1930 * with the simple-audio-card driver. */ 1931 da7213->fixed_clk_auto_pll = true; 1932 } 1933 1934 return 0; 1935 } 1936 1937 static const struct snd_soc_component_driver soc_component_dev_da7213 = { 1938 .probe = da7213_probe, 1939 .set_bias_level = da7213_set_bias_level, 1940 .controls = da7213_snd_controls, 1941 .num_controls = ARRAY_SIZE(da7213_snd_controls), 1942 .dapm_widgets = da7213_dapm_widgets, 1943 .num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets), 1944 .dapm_routes = da7213_audio_map, 1945 .num_dapm_routes = ARRAY_SIZE(da7213_audio_map), 1946 .set_sysclk = da7213_set_component_sysclk, 1947 .set_pll = da7213_set_component_pll, 1948 .idle_bias_on = 1, 1949 .use_pmdown_time = 1, 1950 .endianness = 1, 1951 }; 1952 1953 static const struct regmap_config da7213_regmap_config = { 1954 .reg_bits = 8, 1955 .val_bits = 8, 1956 1957 .reg_defaults = da7213_reg_defaults, 1958 .num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults), 1959 .volatile_reg = da7213_volatile_register, 1960 .cache_type = REGCACHE_RBTREE, 1961 }; 1962 1963 static void da7213_power_off(void *data) 1964 { 1965 struct da7213_priv *da7213 = data; 1966 regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies); 1967 } 1968 1969 static const char *da7213_supply_names[DA7213_NUM_SUPPLIES] = { 1970 [DA7213_SUPPLY_VDDA] = "VDDA", 1971 [DA7213_SUPPLY_VDDIO] = "VDDIO", 1972 }; 1973 1974 static int da7213_i2c_probe(struct i2c_client *i2c) 1975 { 1976 struct da7213_priv *da7213; 1977 int i, ret; 1978 1979 da7213 = devm_kzalloc(&i2c->dev, sizeof(*da7213), GFP_KERNEL); 1980 if (!da7213) 1981 return -ENOMEM; 1982 1983 i2c_set_clientdata(i2c, da7213); 1984 1985 /* Get required supplies */ 1986 for (i = 0; i < DA7213_NUM_SUPPLIES; ++i) 1987 da7213->supplies[i].supply = da7213_supply_names[i]; 1988 1989 ret = devm_regulator_bulk_get(&i2c->dev, DA7213_NUM_SUPPLIES, 1990 da7213->supplies); 1991 if (ret) { 1992 dev_err(&i2c->dev, "Failed to get supplies: %d\n", ret); 1993 return ret; 1994 } 1995 1996 ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies); 1997 if (ret < 0) 1998 return ret; 1999 2000 ret = devm_add_action_or_reset(&i2c->dev, da7213_power_off, da7213); 2001 if (ret < 0) 2002 return ret; 2003 2004 da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config); 2005 if (IS_ERR(da7213->regmap)) { 2006 ret = PTR_ERR(da7213->regmap); 2007 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); 2008 return ret; 2009 } 2010 2011 pm_runtime_set_autosuspend_delay(&i2c->dev, 100); 2012 pm_runtime_use_autosuspend(&i2c->dev); 2013 pm_runtime_set_active(&i2c->dev); 2014 pm_runtime_enable(&i2c->dev); 2015 2016 ret = devm_snd_soc_register_component(&i2c->dev, 2017 &soc_component_dev_da7213, &da7213_dai, 1); 2018 if (ret < 0) { 2019 dev_err(&i2c->dev, "Failed to register da7213 component: %d\n", 2020 ret); 2021 } 2022 return ret; 2023 } 2024 2025 static void da7213_i2c_remove(struct i2c_client *i2c) 2026 { 2027 pm_runtime_disable(&i2c->dev); 2028 } 2029 2030 static int __maybe_unused da7213_runtime_suspend(struct device *dev) 2031 { 2032 struct da7213_priv *da7213 = dev_get_drvdata(dev); 2033 2034 regcache_cache_only(da7213->regmap, true); 2035 regcache_mark_dirty(da7213->regmap); 2036 regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies); 2037 2038 return 0; 2039 } 2040 2041 static int __maybe_unused da7213_runtime_resume(struct device *dev) 2042 { 2043 struct da7213_priv *da7213 = dev_get_drvdata(dev); 2044 int ret; 2045 2046 ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies); 2047 if (ret < 0) 2048 return ret; 2049 regcache_cache_only(da7213->regmap, false); 2050 regcache_sync(da7213->regmap); 2051 return 0; 2052 } 2053 2054 static const struct dev_pm_ops da7213_pm = { 2055 SET_RUNTIME_PM_OPS(da7213_runtime_suspend, da7213_runtime_resume, NULL) 2056 }; 2057 2058 static const struct i2c_device_id da7213_i2c_id[] = { 2059 { "da7213", 0 }, 2060 { } 2061 }; 2062 MODULE_DEVICE_TABLE(i2c, da7213_i2c_id); 2063 2064 /* I2C codec control layer */ 2065 static struct i2c_driver da7213_i2c_driver = { 2066 .driver = { 2067 .name = "da7213", 2068 .of_match_table = of_match_ptr(da7213_of_match), 2069 .acpi_match_table = ACPI_PTR(da7213_acpi_match), 2070 .pm = &da7213_pm, 2071 }, 2072 .probe_new = da7213_i2c_probe, 2073 .remove = da7213_i2c_remove, 2074 .id_table = da7213_i2c_id, 2075 }; 2076 2077 module_i2c_driver(da7213_i2c_driver); 2078 2079 MODULE_DESCRIPTION("ASoC DA7213 Codec driver"); 2080 MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>"); 2081 MODULE_LICENSE("GPL"); 2082