xref: /openbmc/linux/sound/soc/codecs/da7213.c (revision bb0eb050)
1 /*
2  * DA7213 ALSA SoC Codec Driver
3  *
4  * Copyright (c) 2013 Dialog Semiconductor
5  *
6  * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
7  * Based on DA9055 ALSA SoC codec driver.
8  *
9  * This program is free software; you can redistribute  it and/or modify it
10  * under  the terms of  the GNU General  Public License as published by the
11  * Free Software Foundation;  either version 2 of the  License, or (at your
12  * option) any later version.
13  */
14 
15 #include <linux/acpi.h>
16 #include <linux/clk.h>
17 #include <linux/delay.h>
18 #include <linux/i2c.h>
19 #include <linux/regmap.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/soc.h>
25 #include <sound/initval.h>
26 #include <sound/tlv.h>
27 
28 #include <sound/da7213.h>
29 #include "da7213.h"
30 
31 
32 /* Gain and Volume */
33 static const DECLARE_TLV_DB_RANGE(aux_vol_tlv,
34 	/* -54dB */
35 	0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
36 	/* -52.5dB to 15dB */
37 	0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
38 );
39 
40 static const DECLARE_TLV_DB_RANGE(digital_gain_tlv,
41 	0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
42 	/* -78dB to 12dB */
43 	0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
44 );
45 
46 static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv,
47 	0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
48 	/* 0dB to 36dB */
49 	0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0)
50 );
51 
52 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
53 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
54 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
55 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0);
56 static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0);
57 static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0);
58 static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0);
59 
60 /* ADC and DAC voice mode (8kHz) high pass cutoff value */
61 static const char * const da7213_voice_hpf_corner_txt[] = {
62 	"2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
63 };
64 
65 static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner,
66 			    DA7213_DAC_FILTERS1,
67 			    DA7213_VOICE_HPF_CORNER_SHIFT,
68 			    da7213_voice_hpf_corner_txt);
69 
70 static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner,
71 			    DA7213_ADC_FILTERS1,
72 			    DA7213_VOICE_HPF_CORNER_SHIFT,
73 			    da7213_voice_hpf_corner_txt);
74 
75 /* ADC and DAC high pass filter cutoff value */
76 static const char * const da7213_audio_hpf_corner_txt[] = {
77 	"Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000"
78 };
79 
80 static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner,
81 			    DA7213_DAC_FILTERS1
82 			    , DA7213_AUDIO_HPF_CORNER_SHIFT,
83 			    da7213_audio_hpf_corner_txt);
84 
85 static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner,
86 			    DA7213_ADC_FILTERS1,
87 			    DA7213_AUDIO_HPF_CORNER_SHIFT,
88 			    da7213_audio_hpf_corner_txt);
89 
90 /* Gain ramping rate value */
91 static const char * const da7213_gain_ramp_rate_txt[] = {
92 	"nominal rate * 8", "nominal rate * 16", "nominal rate / 16",
93 	"nominal rate / 32"
94 };
95 
96 static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate,
97 			    DA7213_GAIN_RAMP_CTRL,
98 			    DA7213_GAIN_RAMP_RATE_SHIFT,
99 			    da7213_gain_ramp_rate_txt);
100 
101 /* DAC noise gate setup time value */
102 static const char * const da7213_dac_ng_setup_time_txt[] = {
103 	"256 samples", "512 samples", "1024 samples", "2048 samples"
104 };
105 
106 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time,
107 			    DA7213_DAC_NG_SETUP_TIME,
108 			    DA7213_DAC_NG_SETUP_TIME_SHIFT,
109 			    da7213_dac_ng_setup_time_txt);
110 
111 /* DAC noise gate rampup rate value */
112 static const char * const da7213_dac_ng_rampup_txt[] = {
113 	"0.02 ms/dB", "0.16 ms/dB"
114 };
115 
116 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate,
117 			    DA7213_DAC_NG_SETUP_TIME,
118 			    DA7213_DAC_NG_RAMPUP_RATE_SHIFT,
119 			    da7213_dac_ng_rampup_txt);
120 
121 /* DAC noise gate rampdown rate value */
122 static const char * const da7213_dac_ng_rampdown_txt[] = {
123 	"0.64 ms/dB", "20.48 ms/dB"
124 };
125 
126 static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate,
127 			    DA7213_DAC_NG_SETUP_TIME,
128 			    DA7213_DAC_NG_RAMPDN_RATE_SHIFT,
129 			    da7213_dac_ng_rampdown_txt);
130 
131 /* DAC soft mute rate value */
132 static const char * const da7213_dac_soft_mute_rate_txt[] = {
133 	"1", "2", "4", "8", "16", "32", "64"
134 };
135 
136 static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate,
137 			    DA7213_DAC_FILTERS5,
138 			    DA7213_DAC_SOFTMUTE_RATE_SHIFT,
139 			    da7213_dac_soft_mute_rate_txt);
140 
141 /* ALC Attack Rate select */
142 static const char * const da7213_alc_attack_rate_txt[] = {
143 	"44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs",
144 	"5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
145 };
146 
147 static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate,
148 			    DA7213_ALC_CTRL2,
149 			    DA7213_ALC_ATTACK_SHIFT,
150 			    da7213_alc_attack_rate_txt);
151 
152 /* ALC Release Rate select */
153 static const char * const da7213_alc_release_rate_txt[] = {
154 	"176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs",
155 	"11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
156 };
157 
158 static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate,
159 			    DA7213_ALC_CTRL2,
160 			    DA7213_ALC_RELEASE_SHIFT,
161 			    da7213_alc_release_rate_txt);
162 
163 /* ALC Hold Time select */
164 static const char * const da7213_alc_hold_time_txt[] = {
165 	"62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
166 	"7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
167 	"253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
168 };
169 
170 static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time,
171 			    DA7213_ALC_CTRL3,
172 			    DA7213_ALC_HOLD_SHIFT,
173 			    da7213_alc_hold_time_txt);
174 
175 /* ALC Input Signal Tracking rate select */
176 static const char * const da7213_alc_integ_rate_txt[] = {
177 	"1/4", "1/16", "1/256", "1/65536"
178 };
179 
180 static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate,
181 			    DA7213_ALC_CTRL3,
182 			    DA7213_ALC_INTEG_ATTACK_SHIFT,
183 			    da7213_alc_integ_rate_txt);
184 
185 static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate,
186 			    DA7213_ALC_CTRL3,
187 			    DA7213_ALC_INTEG_RELEASE_SHIFT,
188 			    da7213_alc_integ_rate_txt);
189 
190 
191 /*
192  * Control Functions
193  */
194 
195 static int da7213_get_alc_data(struct snd_soc_codec *codec, u8 reg_val)
196 {
197 	int mid_data, top_data;
198 	int sum = 0;
199 	u8 iteration;
200 
201 	for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS;
202 	     iteration++) {
203 		/* Select the left or right channel and capture data */
204 		snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val);
205 
206 		/* Select middle 8 bits for read back from data register */
207 		snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL,
208 			      reg_val | DA7213_ALC_DATA_MIDDLE);
209 		mid_data = snd_soc_read(codec, DA7213_ALC_CIC_OP_LVL_DATA);
210 
211 		/* Select top 8 bits for read back from data register */
212 		snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL,
213 			      reg_val | DA7213_ALC_DATA_TOP);
214 		top_data = snd_soc_read(codec, DA7213_ALC_CIC_OP_LVL_DATA);
215 
216 		sum += ((mid_data << 8) | (top_data << 16));
217 	}
218 
219 	return sum / DA7213_ALC_AVG_ITERATIONS;
220 }
221 
222 static void da7213_alc_calib_man(struct snd_soc_codec *codec)
223 {
224 	u8 reg_val;
225 	int avg_left_data, avg_right_data, offset_l, offset_r;
226 
227 	/* Calculate average for Left and Right data */
228 	/* Left Data */
229 	avg_left_data = da7213_get_alc_data(codec,
230 			DA7213_ALC_CIC_OP_CHANNEL_LEFT);
231 	/* Right Data */
232 	avg_right_data = da7213_get_alc_data(codec,
233 			 DA7213_ALC_CIC_OP_CHANNEL_RIGHT);
234 
235 	/* Calculate DC offset */
236 	offset_l = -avg_left_data;
237 	offset_r = -avg_right_data;
238 
239 	reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8;
240 	snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_L, reg_val);
241 	reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16;
242 	snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_L, reg_val);
243 
244 	reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8;
245 	snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_R, reg_val);
246 	reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16;
247 	snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_R, reg_val);
248 
249 	/* Enable analog/digital gain mode & offset cancellation */
250 	snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
251 			    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
252 			    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
253 }
254 
255 static void da7213_alc_calib_auto(struct snd_soc_codec *codec)
256 {
257 	u8 alc_ctrl1;
258 
259 	/* Begin auto calibration and wait for completion */
260 	snd_soc_update_bits(codec, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
261 			    DA7213_ALC_AUTO_CALIB_EN);
262 	do {
263 		alc_ctrl1 = snd_soc_read(codec, DA7213_ALC_CTRL1);
264 	} while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);
265 
266 	/* If auto calibration fails, fall back to digital gain only mode */
267 	if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) {
268 		dev_warn(codec->dev,
269 			 "ALC auto calibration failed with overflow\n");
270 		snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
271 				    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
272 				    0);
273 	} else {
274 		/* Enable analog/digital gain mode & offset cancellation */
275 		snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
276 				    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
277 				    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
278 	}
279 
280 }
281 
282 static void da7213_alc_calib(struct snd_soc_codec *codec)
283 {
284 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
285 	u8 adc_l_ctrl, adc_r_ctrl;
286 	u8 mixin_l_sel, mixin_r_sel;
287 	u8 mic_1_ctrl, mic_2_ctrl;
288 
289 	/* Save current values from ADC control registers */
290 	adc_l_ctrl = snd_soc_read(codec, DA7213_ADC_L_CTRL);
291 	adc_r_ctrl = snd_soc_read(codec, DA7213_ADC_R_CTRL);
292 
293 	/* Save current values from MIXIN_L/R_SELECT registers */
294 	mixin_l_sel = snd_soc_read(codec, DA7213_MIXIN_L_SELECT);
295 	mixin_r_sel = snd_soc_read(codec, DA7213_MIXIN_R_SELECT);
296 
297 	/* Save current values from MIC control registers */
298 	mic_1_ctrl = snd_soc_read(codec, DA7213_MIC_1_CTRL);
299 	mic_2_ctrl = snd_soc_read(codec, DA7213_MIC_2_CTRL);
300 
301 	/* Enable ADC Left and Right */
302 	snd_soc_update_bits(codec, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
303 			    DA7213_ADC_EN);
304 	snd_soc_update_bits(codec, DA7213_ADC_R_CTRL, DA7213_ADC_EN,
305 			    DA7213_ADC_EN);
306 
307 	/* Enable MIC paths */
308 	snd_soc_update_bits(codec, DA7213_MIXIN_L_SELECT,
309 			    DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
310 			    DA7213_MIXIN_L_MIX_SELECT_MIC_2,
311 			    DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
312 			    DA7213_MIXIN_L_MIX_SELECT_MIC_2);
313 	snd_soc_update_bits(codec, DA7213_MIXIN_R_SELECT,
314 			    DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
315 			    DA7213_MIXIN_R_MIX_SELECT_MIC_1,
316 			    DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
317 			    DA7213_MIXIN_R_MIX_SELECT_MIC_1);
318 
319 	/* Mute MIC PGAs */
320 	snd_soc_update_bits(codec, DA7213_MIC_1_CTRL, DA7213_MUTE_EN,
321 			    DA7213_MUTE_EN);
322 	snd_soc_update_bits(codec, DA7213_MIC_2_CTRL, DA7213_MUTE_EN,
323 			    DA7213_MUTE_EN);
324 
325 	/* Perform calibration */
326 	if (da7213->alc_calib_auto)
327 		da7213_alc_calib_auto(codec);
328 	else
329 		da7213_alc_calib_man(codec);
330 
331 	/* Restore MIXIN_L/R_SELECT registers to their original states */
332 	snd_soc_write(codec, DA7213_MIXIN_L_SELECT, mixin_l_sel);
333 	snd_soc_write(codec, DA7213_MIXIN_R_SELECT, mixin_r_sel);
334 
335 	/* Restore ADC control registers to their original states */
336 	snd_soc_write(codec, DA7213_ADC_L_CTRL, adc_l_ctrl);
337 	snd_soc_write(codec, DA7213_ADC_R_CTRL, adc_r_ctrl);
338 
339 	/* Restore original values of MIC control registers */
340 	snd_soc_write(codec, DA7213_MIC_1_CTRL, mic_1_ctrl);
341 	snd_soc_write(codec, DA7213_MIC_2_CTRL, mic_2_ctrl);
342 }
343 
344 static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
345 				struct snd_ctl_elem_value *ucontrol)
346 {
347 	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
348 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
349 	int ret;
350 
351 	ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
352 
353 	/* If ALC in operation, make sure calibrated offsets are updated */
354 	if ((!ret) && (da7213->alc_en))
355 		da7213_alc_calib(codec);
356 
357 	return ret;
358 }
359 
360 static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol,
361 			    struct snd_ctl_elem_value *ucontrol)
362 {
363 	struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
364 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
365 
366 	/* Force ALC offset calibration if enabling ALC */
367 	if (ucontrol->value.integer.value[0] ||
368 	    ucontrol->value.integer.value[1]) {
369 		if (!da7213->alc_en) {
370 			da7213_alc_calib(codec);
371 			da7213->alc_en = true;
372 		}
373 	} else {
374 		da7213->alc_en = false;
375 	}
376 
377 	return snd_soc_put_volsw(kcontrol, ucontrol);
378 }
379 
380 
381 /*
382  * KControls
383  */
384 
385 static const struct snd_kcontrol_new da7213_snd_controls[] = {
386 
387 	/* Volume controls */
388 	SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN,
389 		       DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
390 		       DA7213_NO_INVERT, mic_vol_tlv),
391 	SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN,
392 		       DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
393 		       DA7213_NO_INVERT, mic_vol_tlv),
394 	SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN,
395 			 DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX,
396 			 DA7213_NO_INVERT, aux_vol_tlv),
397 	SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN,
398 			     DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT,
399 			     DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT,
400 			     snd_soc_get_volsw_2r, da7213_put_mixin_gain,
401 			     mixin_gain_tlv),
402 	SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN,
403 			 DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX,
404 			 DA7213_NO_INVERT, digital_gain_tlv),
405 	SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN,
406 			 DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX,
407 			 DA7213_NO_INVERT, digital_gain_tlv),
408 	SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN,
409 			 DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX,
410 			 DA7213_NO_INVERT, hp_vol_tlv),
411 	SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN,
412 		       DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX,
413 		       DA7213_NO_INVERT, lineout_vol_tlv),
414 
415 	/* DAC Equalizer controls */
416 	SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT,
417 		   DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT),
418 	SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2,
419 		       DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX,
420 		       DA7213_NO_INVERT, eq_gain_tlv),
421 	SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2,
422 		       DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX,
423 		       DA7213_NO_INVERT, eq_gain_tlv),
424 	SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3,
425 		       DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX,
426 		       DA7213_NO_INVERT, eq_gain_tlv),
427 	SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3,
428 		       DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX,
429 		       DA7213_NO_INVERT, eq_gain_tlv),
430 	SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4,
431 		       DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX,
432 		       DA7213_NO_INVERT, eq_gain_tlv),
433 
434 	/* High Pass Filter and Voice Mode controls */
435 	SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT,
436 		   DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
437 	SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner),
438 	SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1,
439 		   DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
440 		   DA7213_NO_INVERT),
441 	SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner),
442 
443 	SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT,
444 		   DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
445 	SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner),
446 	SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1,
447 		   DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
448 		   DA7213_NO_INVERT),
449 	SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner),
450 
451 	/* Mute controls */
452 	SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT,
453 		   DA7213_MUTE_EN_MAX, DA7213_INVERT),
454 	SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT,
455 		   DA7213_MUTE_EN_MAX, DA7213_INVERT),
456 	SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
457 		     DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
458 	SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL,
459 		     DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT,
460 		     DA7213_MUTE_EN_MAX, DA7213_INVERT),
461 	SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL,
462 		     DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
463 	SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
464 		     DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
465 	SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT,
466 		   DA7213_MUTE_EN_MAX, DA7213_INVERT),
467 	SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5,
468 		   DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX,
469 		   DA7213_NO_INVERT),
470 	SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate),
471 
472 	/* Zero Cross controls */
473 	SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
474 		     DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
475 	SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL,
476 		     DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX,
477 		     DA7213_NO_INVERT),
478 	SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
479 		     DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
480 
481 	/* Gain Ramping controls */
482 	SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL,
483 		     DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
484 		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
485 	SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL,
486 		     DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
487 		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
488 	SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL,
489 		     DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
490 		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
491 	SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL,
492 		     DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
493 		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
494 	SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL,
495 		     DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
496 		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
497 	SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL,
498 		   DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX,
499 		   DA7213_NO_INVERT),
500 	SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate),
501 
502 	/* DAC Noise Gate controls */
503 	SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT,
504 		   DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT),
505 	SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time),
506 	SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate),
507 	SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate),
508 	SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD,
509 		   DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
510 		   DA7213_NO_INVERT),
511 	SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD,
512 		   DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
513 		   DA7213_NO_INVERT),
514 
515 	/* DAC Routing & Inversion */
516 	SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC,
517 		   DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT,
518 		   DA7213_DAC_MONO_MAX, DA7213_NO_INVERT),
519 	SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT,
520 		   DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX,
521 		   DA7213_NO_INVERT),
522 
523 	/* DMIC controls */
524 	SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT,
525 		     DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT,
526 		     DA7213_DMIC_EN_MAX, DA7213_NO_INVERT),
527 
528 	/* ALC Controls */
529 	SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT,
530 		       DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX,
531 		       DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw),
532 	SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate),
533 	SOC_ENUM("ALC Release Rate", da7213_alc_release_rate),
534 	SOC_ENUM("ALC Hold Time", da7213_alc_hold_time),
535 	/*
536 	 * Rate at which input signal envelope is tracked as the signal gets
537 	 * larger
538 	 */
539 	SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate),
540 	/*
541 	 * Rate at which input signal envelope is tracked as the signal gets
542 	 * smaller
543 	 */
544 	SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate),
545 	SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE,
546 		       DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
547 		       DA7213_INVERT, alc_threshold_tlv),
548 	SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN,
549 		       DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
550 		       DA7213_INVERT, alc_threshold_tlv),
551 	SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX,
552 		       DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
553 		       DA7213_INVERT, alc_threshold_tlv),
554 	SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS,
555 		       DA7213_ALC_ATTEN_MAX_SHIFT,
556 		       DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT,
557 		       alc_gain_tlv),
558 	SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS,
559 		       DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX,
560 		       DA7213_NO_INVERT, alc_gain_tlv),
561 	SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
562 		       DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
563 		       DA7213_NO_INVERT, alc_analog_gain_tlv),
564 	SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
565 		       DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
566 		       DA7213_NO_INVERT, alc_analog_gain_tlv),
567 	SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL,
568 		   DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX,
569 		   DA7213_NO_INVERT),
570 	SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL,
571 		   DA7213_ALC_ANTICLIP_LEVEL_SHIFT,
572 		   DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT),
573 };
574 
575 
576 /*
577  * DAPM
578  */
579 
580 /*
581  * Enums
582  */
583 
584 /* MIC PGA source select */
585 static const char * const da7213_mic_amp_in_sel_txt[] = {
586 	"Differential", "MIC_P", "MIC_N"
587 };
588 
589 static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel,
590 			    DA7213_MIC_1_CTRL,
591 			    DA7213_MIC_AMP_IN_SEL_SHIFT,
592 			    da7213_mic_amp_in_sel_txt);
593 static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux =
594 	SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel);
595 
596 static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel,
597 			    DA7213_MIC_2_CTRL,
598 			    DA7213_MIC_AMP_IN_SEL_SHIFT,
599 			    da7213_mic_amp_in_sel_txt);
600 static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux =
601 	SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel);
602 
603 /* DAI routing select */
604 static const char * const da7213_dai_src_txt[] = {
605 	"ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right"
606 };
607 
608 static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src,
609 			    DA7213_DIG_ROUTING_DAI,
610 			    DA7213_DAI_L_SRC_SHIFT,
611 			    da7213_dai_src_txt);
612 static const struct snd_kcontrol_new da7213_dai_l_src_mux =
613 	SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src);
614 
615 static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src,
616 			    DA7213_DIG_ROUTING_DAI,
617 			    DA7213_DAI_R_SRC_SHIFT,
618 			    da7213_dai_src_txt);
619 static const struct snd_kcontrol_new da7213_dai_r_src_mux =
620 	SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src);
621 
622 /* DAC routing select */
623 static const char * const da7213_dac_src_txt[] = {
624 	"ADC Output Left", "ADC Output Right", "DAI Input Left",
625 	"DAI Input Right"
626 };
627 
628 static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src,
629 			    DA7213_DIG_ROUTING_DAC,
630 			    DA7213_DAC_L_SRC_SHIFT,
631 			    da7213_dac_src_txt);
632 static const struct snd_kcontrol_new da7213_dac_l_src_mux =
633 	SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src);
634 
635 static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src,
636 			    DA7213_DIG_ROUTING_DAC,
637 			    DA7213_DAC_R_SRC_SHIFT,
638 			    da7213_dac_src_txt);
639 static const struct snd_kcontrol_new da7213_dac_r_src_mux =
640 	SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src);
641 
642 /*
643  * Mixer Controls
644  */
645 
646 /* Mixin Left */
647 static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = {
648 	SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT,
649 			DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT,
650 			DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
651 	SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT,
652 			DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT,
653 			DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
654 	SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT,
655 			DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT,
656 			DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
657 	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT,
658 			DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT,
659 			DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
660 };
661 
662 /* Mixin Right */
663 static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = {
664 	SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT,
665 			DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT,
666 			DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
667 	SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT,
668 			DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT,
669 			DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
670 	SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT,
671 			DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT,
672 			DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
673 	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT,
674 			DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT,
675 			DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
676 };
677 
678 /* Mixout Left */
679 static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = {
680 	SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT,
681 			DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT,
682 			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
683 	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT,
684 			DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT,
685 			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
686 	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT,
687 			DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT,
688 			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
689 	SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT,
690 			DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT,
691 			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
692 	SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT,
693 			DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT,
694 			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
695 	SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT,
696 			DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
697 			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
698 	SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT,
699 			DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
700 			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
701 };
702 
703 /* Mixout Right */
704 static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = {
705 	SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT,
706 			DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT,
707 			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
708 	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT,
709 			DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT,
710 			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
711 	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT,
712 			DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT,
713 			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
714 	SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT,
715 			DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT,
716 			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
717 	SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT,
718 			DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT,
719 			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
720 	SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT,
721 			DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
722 			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
723 	SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT,
724 			DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
725 			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
726 };
727 
728 
729 /*
730  * DAPM Events
731  */
732 
733 static int da7213_dai_event(struct snd_soc_dapm_widget *w,
734 			    struct snd_kcontrol *kcontrol, int event)
735 {
736 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
737 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
738 	u8 pll_ctrl, pll_status;
739 	int i = 0;
740 	bool srm_lock = false;
741 
742 	switch (event) {
743 	case SND_SOC_DAPM_PRE_PMU:
744 		/* Enable DAI clks for master mode */
745 		if (da7213->master)
746 			snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
747 					    DA7213_DAI_CLK_EN_MASK,
748 					    DA7213_DAI_CLK_EN_MASK);
749 
750 		/* PC synchronised to DAI */
751 		snd_soc_update_bits(codec, DA7213_PC_COUNT,
752 				    DA7213_PC_FREERUN_MASK, 0);
753 
754 		/* If SRM not enabled then nothing more to do */
755 		pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
756 		if (!(pll_ctrl & DA7213_PLL_SRM_EN))
757 			return 0;
758 
759 		/* Assist 32KHz mode PLL lock */
760 		if (pll_ctrl & DA7213_PLL_32K_MODE) {
761 			snd_soc_write(codec, 0xF0, 0x8B);
762 			snd_soc_write(codec, 0xF2, 0x03);
763 			snd_soc_write(codec, 0xF0, 0x00);
764 		}
765 
766 		/* Check SRM has locked */
767 		do {
768 			pll_status = snd_soc_read(codec, DA7213_PLL_STATUS);
769 			if (pll_status & DA7219_PLL_SRM_LOCK) {
770 				srm_lock = true;
771 			} else {
772 				++i;
773 				msleep(50);
774 			}
775 		} while ((i < DA7213_SRM_CHECK_RETRIES) & (!srm_lock));
776 
777 		if (!srm_lock)
778 			dev_warn(codec->dev, "SRM failed to lock\n");
779 
780 		return 0;
781 	case SND_SOC_DAPM_POST_PMD:
782 		/* Revert 32KHz PLL lock udpates if applied previously */
783 		pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
784 		if (pll_ctrl & DA7213_PLL_32K_MODE) {
785 			snd_soc_write(codec, 0xF0, 0x8B);
786 			snd_soc_write(codec, 0xF2, 0x01);
787 			snd_soc_write(codec, 0xF0, 0x00);
788 		}
789 
790 		/* PC free-running */
791 		snd_soc_update_bits(codec, DA7213_PC_COUNT,
792 				    DA7213_PC_FREERUN_MASK,
793 				    DA7213_PC_FREERUN_MASK);
794 
795 		/* Disable DAI clks if in master mode */
796 		if (da7213->master)
797 			snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
798 					    DA7213_DAI_CLK_EN_MASK, 0);
799 		return 0;
800 	default:
801 		return -EINVAL;
802 	}
803 }
804 
805 
806 /*
807  * DAPM widgets
808  */
809 
810 static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = {
811 	/*
812 	 * Input & Output
813 	 */
814 
815 	/* Use a supply here as this controls both input & output DAIs */
816 	SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,
817 			    DA7213_NO_INVERT, da7213_dai_event,
818 			    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
819 
820 	/*
821 	 * Input
822 	 */
823 
824 	/* Input Lines */
825 	SND_SOC_DAPM_INPUT("MIC1"),
826 	SND_SOC_DAPM_INPUT("MIC2"),
827 	SND_SOC_DAPM_INPUT("AUXL"),
828 	SND_SOC_DAPM_INPUT("AUXR"),
829 
830 	/* MUXs for Mic PGA source selection */
831 	SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0,
832 			 &da7213_mic_1_amp_in_sel_mux),
833 	SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0,
834 			 &da7213_mic_2_amp_in_sel_mux),
835 
836 	/* Input PGAs */
837 	SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT,
838 			 DA7213_NO_INVERT, NULL, 0),
839 	SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT,
840 			 DA7213_NO_INVERT, NULL, 0),
841 	SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT,
842 			 DA7213_NO_INVERT, NULL, 0),
843 	SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL,
844 			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
845 	SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL,
846 			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
847 	SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL,
848 			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
849 
850 	/* Mic Biases */
851 	SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL,
852 			    DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT,
853 			    NULL, 0),
854 	SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL,
855 			    DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT,
856 			    NULL, 0),
857 
858 	/* Input Mixers */
859 	SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0,
860 			   &da7213_dapm_mixinl_controls[0],
861 			   ARRAY_SIZE(da7213_dapm_mixinl_controls)),
862 	SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0,
863 			   &da7213_dapm_mixinr_controls[0],
864 			   ARRAY_SIZE(da7213_dapm_mixinr_controls)),
865 
866 	/* ADCs */
867 	SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL,
868 			 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
869 	SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL,
870 			 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
871 
872 	/* DAI */
873 	SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0,
874 			 &da7213_dai_l_src_mux),
875 	SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0,
876 			 &da7213_dai_r_src_mux),
877 	SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
878 	SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
879 
880 	/*
881 	 * Output
882 	 */
883 
884 	/* DAI */
885 	SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
886 	SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
887 	SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0,
888 			 &da7213_dac_l_src_mux),
889 	SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0,
890 			 &da7213_dac_r_src_mux),
891 
892 	/* DACs */
893 	SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL,
894 			 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
895 	SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL,
896 			 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
897 
898 	/* Output Mixers */
899 	SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0,
900 			   &da7213_dapm_mixoutl_controls[0],
901 			   ARRAY_SIZE(da7213_dapm_mixoutl_controls)),
902 	SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0,
903 			   &da7213_dapm_mixoutr_controls[0],
904 			   ARRAY_SIZE(da7213_dapm_mixoutr_controls)),
905 
906 	/* Output PGAs */
907 	SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL,
908 			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
909 	SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL,
910 			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
911 	SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT,
912 			 DA7213_NO_INVERT, NULL, 0),
913 	SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL,
914 			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
915 	SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL,
916 			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
917 
918 	/* Charge Pump */
919 	SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT,
920 			    DA7213_NO_INVERT, NULL, 0),
921 
922 	/* Output Lines */
923 	SND_SOC_DAPM_OUTPUT("HPL"),
924 	SND_SOC_DAPM_OUTPUT("HPR"),
925 	SND_SOC_DAPM_OUTPUT("LINE"),
926 };
927 
928 
929 /*
930  * DAPM audio route definition
931  */
932 
933 static const struct snd_soc_dapm_route da7213_audio_map[] = {
934 	/* Dest       Connecting Widget    source */
935 
936 	/* Input path */
937 	{"MIC1", NULL, "Mic Bias 1"},
938 	{"MIC2", NULL, "Mic Bias 2"},
939 
940 	{"Mic 1 Amp Source MUX", "Differential", "MIC1"},
941 	{"Mic 1 Amp Source MUX", "MIC_P", "MIC1"},
942 	{"Mic 1 Amp Source MUX", "MIC_N", "MIC1"},
943 
944 	{"Mic 2 Amp Source MUX", "Differential", "MIC2"},
945 	{"Mic 2 Amp Source MUX", "MIC_P", "MIC2"},
946 	{"Mic 2 Amp Source MUX", "MIC_N", "MIC2"},
947 
948 	{"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"},
949 	{"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"},
950 
951 	{"Aux Left PGA", NULL, "AUXL"},
952 	{"Aux Right PGA", NULL, "AUXR"},
953 
954 	{"Mixin Left", "Aux Left Switch", "Aux Left PGA"},
955 	{"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"},
956 	{"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"},
957 	{"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"},
958 
959 	{"Mixin Right", "Aux Right Switch", "Aux Right PGA"},
960 	{"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"},
961 	{"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"},
962 	{"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"},
963 
964 	{"Mixin Left PGA", NULL, "Mixin Left"},
965 	{"ADC Left", NULL, "Mixin Left PGA"},
966 
967 	{"Mixin Right PGA", NULL, "Mixin Right"},
968 	{"ADC Right", NULL, "Mixin Right PGA"},
969 
970 	{"DAI Left Source MUX", "ADC Left", "ADC Left"},
971 	{"DAI Left Source MUX", "ADC Right", "ADC Right"},
972 	{"DAI Left Source MUX", "DAI Input Left", "DAIINL"},
973 	{"DAI Left Source MUX", "DAI Input Right", "DAIINR"},
974 
975 	{"DAI Right Source MUX", "ADC Left", "ADC Left"},
976 	{"DAI Right Source MUX", "ADC Right", "ADC Right"},
977 	{"DAI Right Source MUX", "DAI Input Left", "DAIINL"},
978 	{"DAI Right Source MUX", "DAI Input Right", "DAIINR"},
979 
980 	{"DAIOUTL", NULL, "DAI Left Source MUX"},
981 	{"DAIOUTR", NULL, "DAI Right Source MUX"},
982 
983 	{"DAIOUTL", NULL, "DAI"},
984 	{"DAIOUTR", NULL, "DAI"},
985 
986 	/* Output path */
987 	{"DAIINL", NULL, "DAI"},
988 	{"DAIINR", NULL, "DAI"},
989 
990 	{"DAC Left Source MUX", "ADC Output Left", "ADC Left"},
991 	{"DAC Left Source MUX", "ADC Output Right", "ADC Right"},
992 	{"DAC Left Source MUX", "DAI Input Left", "DAIINL"},
993 	{"DAC Left Source MUX", "DAI Input Right", "DAIINR"},
994 
995 	{"DAC Right Source MUX", "ADC Output Left", "ADC Left"},
996 	{"DAC Right Source MUX", "ADC Output Right", "ADC Right"},
997 	{"DAC Right Source MUX", "DAI Input Left", "DAIINL"},
998 	{"DAC Right Source MUX", "DAI Input Right", "DAIINR"},
999 
1000 	{"DAC Left", NULL, "DAC Left Source MUX"},
1001 	{"DAC Right", NULL, "DAC Right Source MUX"},
1002 
1003 	{"Mixout Left", "Aux Left Switch", "Aux Left PGA"},
1004 	{"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"},
1005 	{"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"},
1006 	{"Mixout Left", "DAC Left Switch", "DAC Left"},
1007 	{"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"},
1008 	{"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"},
1009 	{"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"},
1010 
1011 	{"Mixout Right", "Aux Right Switch", "Aux Right PGA"},
1012 	{"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"},
1013 	{"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"},
1014 	{"Mixout Right", "DAC Right Switch", "DAC Right"},
1015 	{"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"},
1016 	{"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"},
1017 	{"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"},
1018 
1019 	{"Mixout Left PGA", NULL, "Mixout Left"},
1020 	{"Mixout Right PGA", NULL, "Mixout Right"},
1021 
1022 	{"Headphone Left PGA", NULL, "Mixout Left PGA"},
1023 	{"Headphone Left PGA", NULL, "Charge Pump"},
1024 	{"HPL", NULL, "Headphone Left PGA"},
1025 
1026 	{"Headphone Right PGA", NULL, "Mixout Right PGA"},
1027 	{"Headphone Right PGA", NULL, "Charge Pump"},
1028 	{"HPR", NULL, "Headphone Right PGA"},
1029 
1030 	{"Lineout PGA", NULL, "Mixout Right PGA"},
1031 	{"LINE", NULL, "Lineout PGA"},
1032 };
1033 
1034 static const struct reg_default da7213_reg_defaults[] = {
1035 	{ DA7213_DIG_ROUTING_DAI, 0x10 },
1036 	{ DA7213_SR, 0x0A },
1037 	{ DA7213_REFERENCES, 0x80 },
1038 	{ DA7213_PLL_FRAC_TOP, 0x00 },
1039 	{ DA7213_PLL_FRAC_BOT, 0x00 },
1040 	{ DA7213_PLL_INTEGER, 0x20 },
1041 	{ DA7213_PLL_CTRL, 0x0C },
1042 	{ DA7213_DAI_CLK_MODE, 0x01 },
1043 	{ DA7213_DAI_CTRL, 0x08 },
1044 	{ DA7213_DIG_ROUTING_DAC, 0x32 },
1045 	{ DA7213_AUX_L_GAIN, 0x35 },
1046 	{ DA7213_AUX_R_GAIN, 0x35 },
1047 	{ DA7213_MIXIN_L_SELECT, 0x00 },
1048 	{ DA7213_MIXIN_R_SELECT, 0x00 },
1049 	{ DA7213_MIXIN_L_GAIN, 0x03 },
1050 	{ DA7213_MIXIN_R_GAIN, 0x03 },
1051 	{ DA7213_ADC_L_GAIN, 0x6F },
1052 	{ DA7213_ADC_R_GAIN, 0x6F },
1053 	{ DA7213_ADC_FILTERS1, 0x80 },
1054 	{ DA7213_MIC_1_GAIN, 0x01 },
1055 	{ DA7213_MIC_2_GAIN, 0x01 },
1056 	{ DA7213_DAC_FILTERS5, 0x00 },
1057 	{ DA7213_DAC_FILTERS2, 0x88 },
1058 	{ DA7213_DAC_FILTERS3, 0x88 },
1059 	{ DA7213_DAC_FILTERS4, 0x08 },
1060 	{ DA7213_DAC_FILTERS1, 0x80 },
1061 	{ DA7213_DAC_L_GAIN, 0x6F },
1062 	{ DA7213_DAC_R_GAIN, 0x6F },
1063 	{ DA7213_CP_CTRL, 0x61 },
1064 	{ DA7213_HP_L_GAIN, 0x39 },
1065 	{ DA7213_HP_R_GAIN, 0x39 },
1066 	{ DA7213_LINE_GAIN, 0x30 },
1067 	{ DA7213_MIXOUT_L_SELECT, 0x00 },
1068 	{ DA7213_MIXOUT_R_SELECT, 0x00 },
1069 	{ DA7213_SYSTEM_MODES_INPUT, 0x00 },
1070 	{ DA7213_SYSTEM_MODES_OUTPUT, 0x00 },
1071 	{ DA7213_AUX_L_CTRL, 0x44 },
1072 	{ DA7213_AUX_R_CTRL, 0x44 },
1073 	{ DA7213_MICBIAS_CTRL, 0x11 },
1074 	{ DA7213_MIC_1_CTRL, 0x40 },
1075 	{ DA7213_MIC_2_CTRL, 0x40 },
1076 	{ DA7213_MIXIN_L_CTRL, 0x40 },
1077 	{ DA7213_MIXIN_R_CTRL, 0x40 },
1078 	{ DA7213_ADC_L_CTRL, 0x40 },
1079 	{ DA7213_ADC_R_CTRL, 0x40 },
1080 	{ DA7213_DAC_L_CTRL, 0x48 },
1081 	{ DA7213_DAC_R_CTRL, 0x40 },
1082 	{ DA7213_HP_L_CTRL, 0x41 },
1083 	{ DA7213_HP_R_CTRL, 0x40 },
1084 	{ DA7213_LINE_CTRL, 0x40 },
1085 	{ DA7213_MIXOUT_L_CTRL, 0x10 },
1086 	{ DA7213_MIXOUT_R_CTRL, 0x10 },
1087 	{ DA7213_LDO_CTRL, 0x00 },
1088 	{ DA7213_IO_CTRL, 0x00 },
1089 	{ DA7213_GAIN_RAMP_CTRL, 0x00},
1090 	{ DA7213_MIC_CONFIG, 0x00 },
1091 	{ DA7213_PC_COUNT, 0x00 },
1092 	{ DA7213_CP_VOL_THRESHOLD1, 0x32 },
1093 	{ DA7213_CP_DELAY, 0x95 },
1094 	{ DA7213_CP_DETECTOR, 0x00 },
1095 	{ DA7213_DAI_OFFSET, 0x00 },
1096 	{ DA7213_DIG_CTRL, 0x00 },
1097 	{ DA7213_ALC_CTRL2, 0x00 },
1098 	{ DA7213_ALC_CTRL3, 0x00 },
1099 	{ DA7213_ALC_NOISE, 0x3F },
1100 	{ DA7213_ALC_TARGET_MIN, 0x3F },
1101 	{ DA7213_ALC_TARGET_MAX, 0x00 },
1102 	{ DA7213_ALC_GAIN_LIMITS, 0xFF },
1103 	{ DA7213_ALC_ANA_GAIN_LIMITS, 0x71 },
1104 	{ DA7213_ALC_ANTICLIP_CTRL, 0x00 },
1105 	{ DA7213_ALC_ANTICLIP_LEVEL, 0x00 },
1106 	{ DA7213_ALC_OFFSET_MAN_M_L, 0x00 },
1107 	{ DA7213_ALC_OFFSET_MAN_U_L, 0x00 },
1108 	{ DA7213_ALC_OFFSET_MAN_M_R, 0x00 },
1109 	{ DA7213_ALC_OFFSET_MAN_U_R, 0x00 },
1110 	{ DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 },
1111 	{ DA7213_DAC_NG_SETUP_TIME, 0x00 },
1112 	{ DA7213_DAC_NG_OFF_THRESHOLD, 0x00 },
1113 	{ DA7213_DAC_NG_ON_THRESHOLD, 0x00 },
1114 	{ DA7213_DAC_NG_CTRL, 0x00 },
1115 };
1116 
1117 static bool da7213_volatile_register(struct device *dev, unsigned int reg)
1118 {
1119 	switch (reg) {
1120 	case DA7213_STATUS1:
1121 	case DA7213_PLL_STATUS:
1122 	case DA7213_AUX_L_GAIN_STATUS:
1123 	case DA7213_AUX_R_GAIN_STATUS:
1124 	case DA7213_MIC_1_GAIN_STATUS:
1125 	case DA7213_MIC_2_GAIN_STATUS:
1126 	case DA7213_MIXIN_L_GAIN_STATUS:
1127 	case DA7213_MIXIN_R_GAIN_STATUS:
1128 	case DA7213_ADC_L_GAIN_STATUS:
1129 	case DA7213_ADC_R_GAIN_STATUS:
1130 	case DA7213_DAC_L_GAIN_STATUS:
1131 	case DA7213_DAC_R_GAIN_STATUS:
1132 	case DA7213_HP_L_GAIN_STATUS:
1133 	case DA7213_HP_R_GAIN_STATUS:
1134 	case DA7213_LINE_GAIN_STATUS:
1135 	case DA7213_ALC_CTRL1:
1136 	case DA7213_ALC_OFFSET_AUTO_M_L:
1137 	case DA7213_ALC_OFFSET_AUTO_U_L:
1138 	case DA7213_ALC_OFFSET_AUTO_M_R:
1139 	case DA7213_ALC_OFFSET_AUTO_U_R:
1140 	case DA7213_ALC_CIC_OP_LVL_DATA:
1141 		return 1;
1142 	default:
1143 		return 0;
1144 	}
1145 }
1146 
1147 static int da7213_hw_params(struct snd_pcm_substream *substream,
1148 			    struct snd_pcm_hw_params *params,
1149 			    struct snd_soc_dai *dai)
1150 {
1151 	struct snd_soc_codec *codec = dai->codec;
1152 	u8 dai_ctrl = 0;
1153 	u8 fs;
1154 
1155 	/* Set DAI format */
1156 	switch (params_width(params)) {
1157 	case 16:
1158 		dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE;
1159 		break;
1160 	case 20:
1161 		dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE;
1162 		break;
1163 	case 24:
1164 		dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE;
1165 		break;
1166 	case 32:
1167 		dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE;
1168 		break;
1169 	default:
1170 		return -EINVAL;
1171 	}
1172 
1173 	/* Set sampling rate */
1174 	switch (params_rate(params)) {
1175 	case 8000:
1176 		fs = DA7213_SR_8000;
1177 		break;
1178 	case 11025:
1179 		fs = DA7213_SR_11025;
1180 		break;
1181 	case 12000:
1182 		fs = DA7213_SR_12000;
1183 		break;
1184 	case 16000:
1185 		fs = DA7213_SR_16000;
1186 		break;
1187 	case 22050:
1188 		fs = DA7213_SR_22050;
1189 		break;
1190 	case 32000:
1191 		fs = DA7213_SR_32000;
1192 		break;
1193 	case 44100:
1194 		fs = DA7213_SR_44100;
1195 		break;
1196 	case 48000:
1197 		fs = DA7213_SR_48000;
1198 		break;
1199 	case 88200:
1200 		fs = DA7213_SR_88200;
1201 		break;
1202 	case 96000:
1203 		fs = DA7213_SR_96000;
1204 		break;
1205 	default:
1206 		return -EINVAL;
1207 	}
1208 
1209 	snd_soc_update_bits(codec, DA7213_DAI_CTRL, DA7213_DAI_WORD_LENGTH_MASK,
1210 			    dai_ctrl);
1211 	snd_soc_write(codec, DA7213_SR, fs);
1212 
1213 	return 0;
1214 }
1215 
1216 static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1217 {
1218 	struct snd_soc_codec *codec = codec_dai->codec;
1219 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1220 	u8 dai_clk_mode = 0, dai_ctrl = 0;
1221 
1222 	/* Set master/slave mode */
1223 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1224 	case SND_SOC_DAIFMT_CBM_CFM:
1225 		da7213->master = true;
1226 		break;
1227 	case SND_SOC_DAIFMT_CBS_CFS:
1228 		da7213->master = false;
1229 		break;
1230 	default:
1231 		return -EINVAL;
1232 	}
1233 
1234 	/* Set clock normal/inverted */
1235 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1236 	case SND_SOC_DAIFMT_NB_NF:
1237 		break;
1238 	case SND_SOC_DAIFMT_NB_IF:
1239 		dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1240 		break;
1241 	case SND_SOC_DAIFMT_IB_NF:
1242 		dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1243 		break;
1244 	case SND_SOC_DAIFMT_IB_IF:
1245 		dai_clk_mode |= DA7213_DAI_WCLK_POL_INV | DA7213_DAI_CLK_POL_INV;
1246 		break;
1247 	default:
1248 		return -EINVAL;
1249 	}
1250 
1251 	/* Only I2S is supported */
1252 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1253 	case SND_SOC_DAIFMT_I2S:
1254 		dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE;
1255 		break;
1256 	case SND_SOC_DAIFMT_LEFT_J:
1257 		dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J;
1258 		break;
1259 	case SND_SOC_DAIFMT_RIGHT_J:
1260 		dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J;
1261 		break;
1262 	default:
1263 		return -EINVAL;
1264 	}
1265 
1266 	/* By default only 64 BCLK per WCLK is supported */
1267 	dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64;
1268 
1269 	snd_soc_write(codec, DA7213_DAI_CLK_MODE, dai_clk_mode);
1270 	snd_soc_update_bits(codec, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK,
1271 			    dai_ctrl);
1272 
1273 	return 0;
1274 }
1275 
1276 static int da7213_mute(struct snd_soc_dai *dai, int mute)
1277 {
1278 	struct snd_soc_codec *codec = dai->codec;
1279 
1280 	if (mute) {
1281 		snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1282 				    DA7213_MUTE_EN, DA7213_MUTE_EN);
1283 		snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1284 				    DA7213_MUTE_EN, DA7213_MUTE_EN);
1285 	} else {
1286 		snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1287 				    DA7213_MUTE_EN, 0);
1288 		snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1289 				    DA7213_MUTE_EN, 0);
1290 	}
1291 
1292 	return 0;
1293 }
1294 
1295 #define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1296 			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1297 
1298 static int da7213_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1299 				 int clk_id, unsigned int freq, int dir)
1300 {
1301 	struct snd_soc_codec *codec = codec_dai->codec;
1302 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1303 	int ret = 0;
1304 
1305 	if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))
1306 		return 0;
1307 
1308 	if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) {
1309 		dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
1310 			freq);
1311 		return -EINVAL;
1312 	}
1313 
1314 	switch (clk_id) {
1315 	case DA7213_CLKSRC_MCLK:
1316 		snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1317 				    DA7213_PLL_MCLK_SQR_EN, 0);
1318 		break;
1319 	case DA7213_CLKSRC_MCLK_SQR:
1320 		snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1321 				    DA7213_PLL_MCLK_SQR_EN,
1322 				    DA7213_PLL_MCLK_SQR_EN);
1323 		break;
1324 	default:
1325 		dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
1326 		return -EINVAL;
1327 	}
1328 
1329 	da7213->clk_src = clk_id;
1330 
1331 	if (da7213->mclk) {
1332 		freq = clk_round_rate(da7213->mclk, freq);
1333 		ret = clk_set_rate(da7213->mclk, freq);
1334 		if (ret) {
1335 			dev_err(codec_dai->dev, "Failed to set clock rate %d\n",
1336 				freq);
1337 			return ret;
1338 		}
1339 	}
1340 
1341 	da7213->mclk_rate = freq;
1342 
1343 	return 0;
1344 }
1345 
1346 /* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
1347 static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1348 			      int source, unsigned int fref, unsigned int fout)
1349 {
1350 	struct snd_soc_codec *codec = codec_dai->codec;
1351 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1352 
1353 	u8 pll_ctrl, indiv_bits, indiv;
1354 	u8 pll_frac_top, pll_frac_bot, pll_integer;
1355 	u32 freq_ref;
1356 	u64 frac_div;
1357 
1358 	/* Workout input divider based on MCLK rate */
1359 	if (da7213->mclk_rate == 32768) {
1360 		if (!da7213->master) {
1361 			dev_err(codec->dev,
1362 				"32KHz only valid if codec is clock master\n");
1363 			return -EINVAL;
1364 		}
1365 
1366 		/* 32KHz PLL Mode */
1367 		indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1368 		indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1369 		source = DA7213_SYSCLK_PLL_32KHZ;
1370 		freq_ref = 3750000;
1371 
1372 	} else {
1373 		if (da7213->mclk_rate < 5000000) {
1374 			dev_err(codec->dev,
1375 				"PLL input clock %d below valid range\n",
1376 				da7213->mclk_rate);
1377 			return -EINVAL;
1378 		} else if (da7213->mclk_rate <= 9000000) {
1379 			indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ;
1380 			indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL;
1381 		} else if (da7213->mclk_rate <= 18000000) {
1382 			indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1383 			indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1384 		} else if (da7213->mclk_rate <= 36000000) {
1385 			indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ;
1386 			indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL;
1387 		} else if (da7213->mclk_rate <= 54000000) {
1388 			indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ;
1389 			indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL;
1390 		} else {
1391 			dev_err(codec->dev,
1392 				"PLL input clock %d above valid range\n",
1393 				da7213->mclk_rate);
1394 			return -EINVAL;
1395 		}
1396 		freq_ref = (da7213->mclk_rate / indiv);
1397 	}
1398 
1399 	pll_ctrl = indiv_bits;
1400 
1401 	/* Configure PLL */
1402 	switch (source) {
1403 	case DA7213_SYSCLK_MCLK:
1404 		snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1405 				    DA7213_PLL_INDIV_MASK |
1406 				    DA7213_PLL_MODE_MASK, pll_ctrl);
1407 		return 0;
1408 	case DA7213_SYSCLK_PLL:
1409 		break;
1410 	case DA7213_SYSCLK_PLL_SRM:
1411 		pll_ctrl |= DA7213_PLL_SRM_EN;
1412 		fout = DA7213_PLL_FREQ_OUT_94310400;
1413 		break;
1414 	case DA7213_SYSCLK_PLL_32KHZ:
1415 		if (da7213->mclk_rate != 32768) {
1416 			dev_err(codec->dev,
1417 				"32KHz mode only valid with 32KHz MCLK\n");
1418 			return -EINVAL;
1419 		}
1420 
1421 		pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN;
1422 		fout = DA7213_PLL_FREQ_OUT_94310400;
1423 		break;
1424 	default:
1425 		dev_err(codec->dev, "Invalid PLL config\n");
1426 		return -EINVAL;
1427 	}
1428 
1429 	/* Calculate dividers for PLL */
1430 	pll_integer = fout / freq_ref;
1431 	frac_div = (u64)(fout % freq_ref) * 8192ULL;
1432 	do_div(frac_div, freq_ref);
1433 	pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK;
1434 	pll_frac_bot = (frac_div) & DA7213_BYTE_MASK;
1435 
1436 	/* Write PLL dividers */
1437 	snd_soc_write(codec, DA7213_PLL_FRAC_TOP, pll_frac_top);
1438 	snd_soc_write(codec, DA7213_PLL_FRAC_BOT, pll_frac_bot);
1439 	snd_soc_write(codec, DA7213_PLL_INTEGER, pll_integer);
1440 
1441 	/* Enable PLL */
1442 	pll_ctrl |= DA7213_PLL_EN;
1443 	snd_soc_update_bits(codec, DA7213_PLL_CTRL,
1444 			    DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
1445 			    pll_ctrl);
1446 
1447 	/* Assist 32KHz mode PLL lock */
1448 	if (source == DA7213_SYSCLK_PLL_32KHZ) {
1449 		snd_soc_write(codec, 0xF0, 0x8B);
1450 		snd_soc_write(codec, 0xF1, 0x03);
1451 		snd_soc_write(codec, 0xF1, 0x01);
1452 		snd_soc_write(codec, 0xF0, 0x00);
1453 	}
1454 
1455 	return 0;
1456 }
1457 
1458 /* DAI operations */
1459 static const struct snd_soc_dai_ops da7213_dai_ops = {
1460 	.hw_params	= da7213_hw_params,
1461 	.set_fmt	= da7213_set_dai_fmt,
1462 	.set_sysclk	= da7213_set_dai_sysclk,
1463 	.set_pll	= da7213_set_dai_pll,
1464 	.digital_mute	= da7213_mute,
1465 };
1466 
1467 static struct snd_soc_dai_driver da7213_dai = {
1468 	.name = "da7213-hifi",
1469 	/* Playback Capabilities */
1470 	.playback = {
1471 		.stream_name = "Playback",
1472 		.channels_min = 1,
1473 		.channels_max = 2,
1474 		.rates = SNDRV_PCM_RATE_8000_96000,
1475 		.formats = DA7213_FORMATS,
1476 	},
1477 	/* Capture Capabilities */
1478 	.capture = {
1479 		.stream_name = "Capture",
1480 		.channels_min = 1,
1481 		.channels_max = 2,
1482 		.rates = SNDRV_PCM_RATE_8000_96000,
1483 		.formats = DA7213_FORMATS,
1484 	},
1485 	.ops = &da7213_dai_ops,
1486 	.symmetric_rates = 1,
1487 };
1488 
1489 static int da7213_set_bias_level(struct snd_soc_codec *codec,
1490 				 enum snd_soc_bias_level level)
1491 {
1492 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1493 	int ret;
1494 
1495 	switch (level) {
1496 	case SND_SOC_BIAS_ON:
1497 		break;
1498 	case SND_SOC_BIAS_PREPARE:
1499 		/* Enable MCLK for transition to ON state */
1500 		if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY) {
1501 			if (da7213->mclk) {
1502 				ret = clk_prepare_enable(da7213->mclk);
1503 				if (ret) {
1504 					dev_err(codec->dev,
1505 						"Failed to enable mclk\n");
1506 					return ret;
1507 				}
1508 			}
1509 		}
1510 		break;
1511 	case SND_SOC_BIAS_STANDBY:
1512 		if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1513 			/* Enable VMID reference & master bias */
1514 			snd_soc_update_bits(codec, DA7213_REFERENCES,
1515 					    DA7213_VMID_EN | DA7213_BIAS_EN,
1516 					    DA7213_VMID_EN | DA7213_BIAS_EN);
1517 		} else {
1518 			/* Remove MCLK */
1519 			if (da7213->mclk)
1520 				clk_disable_unprepare(da7213->mclk);
1521 		}
1522 		break;
1523 	case SND_SOC_BIAS_OFF:
1524 		/* Disable VMID reference & master bias */
1525 		snd_soc_update_bits(codec, DA7213_REFERENCES,
1526 				    DA7213_VMID_EN | DA7213_BIAS_EN, 0);
1527 		break;
1528 	}
1529 	return 0;
1530 }
1531 
1532 #if defined(CONFIG_OF)
1533 /* DT */
1534 static const struct of_device_id da7213_of_match[] = {
1535 	{ .compatible = "dlg,da7213", },
1536 	{ }
1537 };
1538 MODULE_DEVICE_TABLE(of, da7213_of_match);
1539 #endif
1540 
1541 #ifdef CONFIG_ACPI
1542 static const struct acpi_device_id da7213_acpi_match[] = {
1543 	{ "DLGS7212", 0},
1544 	{ "DLGS7213", 0},
1545 	{ },
1546 };
1547 MODULE_DEVICE_TABLE(acpi, da7213_acpi_match);
1548 #endif
1549 
1550 static enum da7213_micbias_voltage
1551 	da7213_of_micbias_lvl(struct snd_soc_codec *codec, u32 val)
1552 {
1553 	switch (val) {
1554 	case 1600:
1555 		return DA7213_MICBIAS_1_6V;
1556 	case 2200:
1557 		return DA7213_MICBIAS_2_2V;
1558 	case 2500:
1559 		return DA7213_MICBIAS_2_5V;
1560 	case 3000:
1561 		return DA7213_MICBIAS_3_0V;
1562 	default:
1563 		dev_warn(codec->dev, "Invalid micbias level\n");
1564 		return DA7213_MICBIAS_2_2V;
1565 	}
1566 }
1567 
1568 static enum da7213_dmic_data_sel
1569 	da7213_of_dmic_data_sel(struct snd_soc_codec *codec, const char *str)
1570 {
1571 	if (!strcmp(str, "lrise_rfall")) {
1572 		return DA7213_DMIC_DATA_LRISE_RFALL;
1573 	} else if (!strcmp(str, "lfall_rrise")) {
1574 		return DA7213_DMIC_DATA_LFALL_RRISE;
1575 	} else {
1576 		dev_warn(codec->dev, "Invalid DMIC data select type\n");
1577 		return DA7213_DMIC_DATA_LRISE_RFALL;
1578 	}
1579 }
1580 
1581 static enum da7213_dmic_samplephase
1582 	da7213_of_dmic_samplephase(struct snd_soc_codec *codec, const char *str)
1583 {
1584 	if (!strcmp(str, "on_clkedge")) {
1585 		return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1586 	} else if (!strcmp(str, "between_clkedge")) {
1587 		return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE;
1588 	} else {
1589 		dev_warn(codec->dev, "Invalid DMIC sample phase\n");
1590 		return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1591 	}
1592 }
1593 
1594 static enum da7213_dmic_clk_rate
1595 	da7213_of_dmic_clkrate(struct snd_soc_codec *codec, u32 val)
1596 {
1597 	switch (val) {
1598 	case 1500000:
1599 		return DA7213_DMIC_CLK_1_5MHZ;
1600 	case 3000000:
1601 		return DA7213_DMIC_CLK_3_0MHZ;
1602 	default:
1603 		dev_warn(codec->dev, "Invalid DMIC clock rate\n");
1604 		return DA7213_DMIC_CLK_1_5MHZ;
1605 	}
1606 }
1607 
1608 static struct da7213_platform_data
1609 	*da7213_of_to_pdata(struct snd_soc_codec *codec)
1610 {
1611 	struct device_node *np = codec->dev->of_node;
1612 	struct da7213_platform_data *pdata;
1613 	const char *of_str;
1614 	u32 of_val32;
1615 
1616 	pdata = devm_kzalloc(codec->dev, sizeof(*pdata), GFP_KERNEL);
1617 	if (!pdata) {
1618 		dev_warn(codec->dev, "Failed to allocate memory for pdata\n");
1619 		return NULL;
1620 	}
1621 
1622 	if (of_property_read_u32(np, "dlg,micbias1-lvl", &of_val32) >= 0)
1623 		pdata->micbias1_lvl = da7213_of_micbias_lvl(codec, of_val32);
1624 	else
1625 		pdata->micbias1_lvl = DA7213_MICBIAS_2_2V;
1626 
1627 	if (of_property_read_u32(np, "dlg,micbias2-lvl", &of_val32) >= 0)
1628 		pdata->micbias2_lvl = da7213_of_micbias_lvl(codec, of_val32);
1629 	else
1630 		pdata->micbias2_lvl = DA7213_MICBIAS_2_2V;
1631 
1632 	if (!of_property_read_string(np, "dlg,dmic-data-sel", &of_str))
1633 		pdata->dmic_data_sel = da7213_of_dmic_data_sel(codec, of_str);
1634 	else
1635 		pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL;
1636 
1637 	if (!of_property_read_string(np, "dlg,dmic-samplephase", &of_str))
1638 		pdata->dmic_samplephase =
1639 			da7213_of_dmic_samplephase(codec, of_str);
1640 	else
1641 		pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE;
1642 
1643 	if (of_property_read_u32(np, "dlg,dmic-clkrate", &of_val32) >= 0)
1644 		pdata->dmic_clk_rate = da7213_of_dmic_clkrate(codec, of_val32);
1645 	else
1646 		pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ;
1647 
1648 	return pdata;
1649 }
1650 
1651 
1652 static int da7213_probe(struct snd_soc_codec *codec)
1653 {
1654 	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
1655 
1656 	/* Default to using ALC auto offset calibration mode. */
1657 	snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
1658 			    DA7213_ALC_CALIB_MODE_MAN, 0);
1659 	da7213->alc_calib_auto = true;
1660 
1661 	/* Default PC counter to free-running */
1662 	snd_soc_update_bits(codec, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK,
1663 			    DA7213_PC_FREERUN_MASK);
1664 
1665 	/* Enable all Gain Ramps */
1666 	snd_soc_update_bits(codec, DA7213_AUX_L_CTRL,
1667 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1668 	snd_soc_update_bits(codec, DA7213_AUX_R_CTRL,
1669 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1670 	snd_soc_update_bits(codec, DA7213_MIXIN_L_CTRL,
1671 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1672 	snd_soc_update_bits(codec, DA7213_MIXIN_R_CTRL,
1673 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1674 	snd_soc_update_bits(codec, DA7213_ADC_L_CTRL,
1675 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1676 	snd_soc_update_bits(codec, DA7213_ADC_R_CTRL,
1677 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1678 	snd_soc_update_bits(codec, DA7213_DAC_L_CTRL,
1679 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1680 	snd_soc_update_bits(codec, DA7213_DAC_R_CTRL,
1681 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1682 	snd_soc_update_bits(codec, DA7213_HP_L_CTRL,
1683 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1684 	snd_soc_update_bits(codec, DA7213_HP_R_CTRL,
1685 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1686 	snd_soc_update_bits(codec, DA7213_LINE_CTRL,
1687 			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
1688 
1689 	/*
1690 	 * There are two separate control bits for input and output mixers as
1691 	 * well as headphone and line outs.
1692 	 * One to enable corresponding amplifier and other to enable its
1693 	 * output. As amplifier bits are related to power control, they are
1694 	 * being managed by DAPM while other (non power related) bits are
1695 	 * enabled here
1696 	 */
1697 	snd_soc_update_bits(codec, DA7213_MIXIN_L_CTRL,
1698 			    DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
1699 	snd_soc_update_bits(codec, DA7213_MIXIN_R_CTRL,
1700 			    DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
1701 
1702 	snd_soc_update_bits(codec, DA7213_MIXOUT_L_CTRL,
1703 			    DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
1704 	snd_soc_update_bits(codec, DA7213_MIXOUT_R_CTRL,
1705 			    DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
1706 
1707 	snd_soc_update_bits(codec, DA7213_HP_L_CTRL,
1708 			    DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
1709 	snd_soc_update_bits(codec, DA7213_HP_R_CTRL,
1710 			    DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
1711 
1712 	snd_soc_update_bits(codec, DA7213_LINE_CTRL,
1713 			    DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE);
1714 
1715 	/* Handle DT/Platform data */
1716 	if (codec->dev->of_node)
1717 		da7213->pdata = da7213_of_to_pdata(codec);
1718 	else
1719 		da7213->pdata = dev_get_platdata(codec->dev);
1720 
1721 	/* Set platform data values */
1722 	if (da7213->pdata) {
1723 		struct da7213_platform_data *pdata = da7213->pdata;
1724 		u8 micbias_lvl = 0, dmic_cfg = 0;
1725 
1726 		/* Set Mic Bias voltages */
1727 		switch (pdata->micbias1_lvl) {
1728 		case DA7213_MICBIAS_1_6V:
1729 		case DA7213_MICBIAS_2_2V:
1730 		case DA7213_MICBIAS_2_5V:
1731 		case DA7213_MICBIAS_3_0V:
1732 			micbias_lvl |= (pdata->micbias1_lvl <<
1733 					DA7213_MICBIAS1_LEVEL_SHIFT);
1734 			break;
1735 		}
1736 		switch (pdata->micbias2_lvl) {
1737 		case DA7213_MICBIAS_1_6V:
1738 		case DA7213_MICBIAS_2_2V:
1739 		case DA7213_MICBIAS_2_5V:
1740 		case DA7213_MICBIAS_3_0V:
1741 			micbias_lvl |= (pdata->micbias2_lvl <<
1742 					 DA7213_MICBIAS2_LEVEL_SHIFT);
1743 			break;
1744 		}
1745 		snd_soc_update_bits(codec, DA7213_MICBIAS_CTRL,
1746 				    DA7213_MICBIAS1_LEVEL_MASK |
1747 				    DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl);
1748 
1749 		/* Set DMIC configuration */
1750 		switch (pdata->dmic_data_sel) {
1751 		case DA7213_DMIC_DATA_LFALL_RRISE:
1752 		case DA7213_DMIC_DATA_LRISE_RFALL:
1753 			dmic_cfg |= (pdata->dmic_data_sel <<
1754 				     DA7213_DMIC_DATA_SEL_SHIFT);
1755 			break;
1756 		}
1757 		switch (pdata->dmic_samplephase) {
1758 		case DA7213_DMIC_SAMPLE_ON_CLKEDGE:
1759 		case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE:
1760 			dmic_cfg |= (pdata->dmic_samplephase <<
1761 				     DA7213_DMIC_SAMPLEPHASE_SHIFT);
1762 			break;
1763 		}
1764 		switch (pdata->dmic_clk_rate) {
1765 		case DA7213_DMIC_CLK_3_0MHZ:
1766 		case DA7213_DMIC_CLK_1_5MHZ:
1767 			dmic_cfg |= (pdata->dmic_clk_rate <<
1768 				     DA7213_DMIC_CLK_RATE_SHIFT);
1769 			break;
1770 		}
1771 		snd_soc_update_bits(codec, DA7213_MIC_CONFIG,
1772 				    DA7213_DMIC_DATA_SEL_MASK |
1773 				    DA7213_DMIC_SAMPLEPHASE_MASK |
1774 				    DA7213_DMIC_CLK_RATE_MASK, dmic_cfg);
1775 	}
1776 
1777 	/* Check if MCLK provided */
1778 	da7213->mclk = devm_clk_get(codec->dev, "mclk");
1779 	if (IS_ERR(da7213->mclk)) {
1780 		if (PTR_ERR(da7213->mclk) != -ENOENT)
1781 			return PTR_ERR(da7213->mclk);
1782 		else
1783 			da7213->mclk = NULL;
1784 	}
1785 
1786 	return 0;
1787 }
1788 
1789 static struct snd_soc_codec_driver soc_codec_dev_da7213 = {
1790 	.probe			= da7213_probe,
1791 	.set_bias_level		= da7213_set_bias_level,
1792 
1793 	.component_driver = {
1794 		.controls		= da7213_snd_controls,
1795 		.num_controls		= ARRAY_SIZE(da7213_snd_controls),
1796 		.dapm_widgets		= da7213_dapm_widgets,
1797 		.num_dapm_widgets	= ARRAY_SIZE(da7213_dapm_widgets),
1798 		.dapm_routes		= da7213_audio_map,
1799 		.num_dapm_routes	= ARRAY_SIZE(da7213_audio_map),
1800 	},
1801 };
1802 
1803 static const struct regmap_config da7213_regmap_config = {
1804 	.reg_bits = 8,
1805 	.val_bits = 8,
1806 
1807 	.reg_defaults = da7213_reg_defaults,
1808 	.num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults),
1809 	.volatile_reg = da7213_volatile_register,
1810 	.cache_type = REGCACHE_RBTREE,
1811 };
1812 
1813 static int da7213_i2c_probe(struct i2c_client *i2c,
1814 			    const struct i2c_device_id *id)
1815 {
1816 	struct da7213_priv *da7213;
1817 	int ret;
1818 
1819 	da7213 = devm_kzalloc(&i2c->dev, sizeof(struct da7213_priv),
1820 			      GFP_KERNEL);
1821 	if (!da7213)
1822 		return -ENOMEM;
1823 
1824 	i2c_set_clientdata(i2c, da7213);
1825 
1826 	da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config);
1827 	if (IS_ERR(da7213->regmap)) {
1828 		ret = PTR_ERR(da7213->regmap);
1829 		dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
1830 		return ret;
1831 	}
1832 
1833 	ret = snd_soc_register_codec(&i2c->dev,
1834 			&soc_codec_dev_da7213, &da7213_dai, 1);
1835 	if (ret < 0) {
1836 		dev_err(&i2c->dev, "Failed to register da7213 codec: %d\n",
1837 			ret);
1838 	}
1839 	return ret;
1840 }
1841 
1842 static int da7213_remove(struct i2c_client *client)
1843 {
1844 	snd_soc_unregister_codec(&client->dev);
1845 	return 0;
1846 }
1847 
1848 static const struct i2c_device_id da7213_i2c_id[] = {
1849 	{ "da7213", 0 },
1850 	{ }
1851 };
1852 MODULE_DEVICE_TABLE(i2c, da7213_i2c_id);
1853 
1854 /* I2C codec control layer */
1855 static struct i2c_driver da7213_i2c_driver = {
1856 	.driver = {
1857 		.name = "da7213",
1858 		.of_match_table = of_match_ptr(da7213_of_match),
1859 		.acpi_match_table = ACPI_PTR(da7213_acpi_match),
1860 	},
1861 	.probe		= da7213_i2c_probe,
1862 	.remove		= da7213_remove,
1863 	.id_table	= da7213_i2c_id,
1864 };
1865 
1866 module_i2c_driver(da7213_i2c_driver);
1867 
1868 MODULE_DESCRIPTION("ASoC DA7213 Codec driver");
1869 MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
1870 MODULE_LICENSE("GPL");
1871