xref: /openbmc/linux/sound/soc/codecs/da7210.c (revision b34e08d5)
1 /*
2  * DA7210 ALSA Soc codec driver
3  *
4  * Copyright (c) 2009 Dialog Semiconductor
5  * Written by David Chen <Dajun.chen@diasemi.com>
6  *
7  * Copyright (C) 2009 Renesas Solutions Corp.
8  * Cleanups by Kuninori Morimoto <morimoto.kuninori@renesas.com>
9  *
10  * Tested on SuperH Ecovec24 board with S16/S24 LE in 48KHz using I2S
11  *
12  * This program is free software; you can redistribute  it and/or modify it
13  * under  the terms of  the GNU General  Public License as published by the
14  * Free Software Foundation;  either version 2 of the  License, or (at your
15  * option) any later version.
16  */
17 
18 #include <linux/delay.h>
19 #include <linux/i2c.h>
20 #include <linux/spi/spi.h>
21 #include <linux/regmap.h>
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 
30 /* DA7210 register space */
31 #define DA7210_PAGE_CONTROL		0x00
32 #define DA7210_CONTROL			0x01
33 #define DA7210_STATUS			0x02
34 #define DA7210_STARTUP1			0x03
35 #define DA7210_STARTUP2			0x04
36 #define DA7210_STARTUP3			0x05
37 #define DA7210_MIC_L			0x07
38 #define DA7210_MIC_R			0x08
39 #define DA7210_AUX1_L			0x09
40 #define DA7210_AUX1_R			0x0A
41 #define DA7210_AUX2			0x0B
42 #define DA7210_IN_GAIN			0x0C
43 #define DA7210_INMIX_L			0x0D
44 #define DA7210_INMIX_R			0x0E
45 #define DA7210_ADC_HPF			0x0F
46 #define DA7210_ADC			0x10
47 #define DA7210_ADC_EQ1_2		0X11
48 #define DA7210_ADC_EQ3_4		0x12
49 #define DA7210_ADC_EQ5			0x13
50 #define DA7210_DAC_HPF			0x14
51 #define DA7210_DAC_L			0x15
52 #define DA7210_DAC_R			0x16
53 #define DA7210_DAC_SEL			0x17
54 #define DA7210_SOFTMUTE			0x18
55 #define DA7210_DAC_EQ1_2		0x19
56 #define DA7210_DAC_EQ3_4		0x1A
57 #define DA7210_DAC_EQ5			0x1B
58 #define DA7210_OUTMIX_L			0x1C
59 #define DA7210_OUTMIX_R			0x1D
60 #define DA7210_OUT1_L			0x1E
61 #define DA7210_OUT1_R			0x1F
62 #define DA7210_OUT2			0x20
63 #define DA7210_HP_L_VOL			0x21
64 #define DA7210_HP_R_VOL			0x22
65 #define DA7210_HP_CFG			0x23
66 #define DA7210_ZERO_CROSS		0x24
67 #define DA7210_DAI_SRC_SEL		0x25
68 #define DA7210_DAI_CFG1			0x26
69 #define DA7210_DAI_CFG3			0x28
70 #define DA7210_PLL_DIV1			0x29
71 #define DA7210_PLL_DIV2			0x2A
72 #define DA7210_PLL_DIV3			0x2B
73 #define DA7210_PLL			0x2C
74 #define DA7210_ALC_MAX			0x83
75 #define DA7210_ALC_MIN			0x84
76 #define DA7210_ALC_NOIS			0x85
77 #define DA7210_ALC_ATT			0x86
78 #define DA7210_ALC_REL			0x87
79 #define DA7210_ALC_DEL			0x88
80 #define DA7210_A_HID_UNLOCK		0x8A
81 #define DA7210_A_TEST_UNLOCK		0x8B
82 #define DA7210_A_PLL1			0x90
83 #define DA7210_A_CP_MODE		0xA7
84 
85 /* STARTUP1 bit fields */
86 #define DA7210_SC_MST_EN		(1 << 0)
87 
88 /* MIC_L bit fields */
89 #define DA7210_MICBIAS_EN		(1 << 6)
90 #define DA7210_MIC_L_EN			(1 << 7)
91 
92 /* MIC_R bit fields */
93 #define DA7210_MIC_R_EN			(1 << 7)
94 
95 /* INMIX_L bit fields */
96 #define DA7210_IN_L_EN			(1 << 7)
97 
98 /* INMIX_R bit fields */
99 #define DA7210_IN_R_EN			(1 << 7)
100 
101 /* ADC bit fields */
102 #define DA7210_ADC_ALC_EN		(1 << 0)
103 #define DA7210_ADC_L_EN			(1 << 3)
104 #define DA7210_ADC_R_EN			(1 << 7)
105 
106 /* DAC/ADC HPF fields */
107 #define DA7210_VOICE_F0_MASK		(0x7 << 4)
108 #define DA7210_VOICE_F0_25		(1 << 4)
109 #define DA7210_VOICE_EN			(1 << 7)
110 
111 /* DAC_SEL bit fields */
112 #define DA7210_DAC_L_SRC_DAI_L		(4 << 0)
113 #define DA7210_DAC_L_EN			(1 << 3)
114 #define DA7210_DAC_R_SRC_DAI_R		(5 << 4)
115 #define DA7210_DAC_R_EN			(1 << 7)
116 
117 /* OUTMIX_L bit fields */
118 #define DA7210_OUT_L_EN			(1 << 7)
119 
120 /* OUTMIX_R bit fields */
121 #define DA7210_OUT_R_EN			(1 << 7)
122 
123 /* HP_CFG bit fields */
124 #define DA7210_HP_2CAP_MODE		(1 << 1)
125 #define DA7210_HP_SENSE_EN		(1 << 2)
126 #define DA7210_HP_L_EN			(1 << 3)
127 #define DA7210_HP_MODE			(1 << 6)
128 #define DA7210_HP_R_EN			(1 << 7)
129 
130 /* DAI_SRC_SEL bit fields */
131 #define DA7210_DAI_OUT_L_SRC		(6 << 0)
132 #define DA7210_DAI_OUT_R_SRC		(7 << 4)
133 
134 /* DAI_CFG1 bit fields */
135 #define DA7210_DAI_WORD_S16_LE		(0 << 0)
136 #define DA7210_DAI_WORD_S20_3LE		(1 << 0)
137 #define DA7210_DAI_WORD_S24_LE		(2 << 0)
138 #define DA7210_DAI_WORD_S32_LE		(3 << 0)
139 #define DA7210_DAI_FLEN_64BIT		(1 << 2)
140 #define DA7210_DAI_MODE_SLAVE		(0 << 7)
141 #define DA7210_DAI_MODE_MASTER		(1 << 7)
142 
143 /* DAI_CFG3 bit fields */
144 #define DA7210_DAI_FORMAT_I2SMODE	(0 << 0)
145 #define DA7210_DAI_FORMAT_LEFT_J	(1 << 0)
146 #define DA7210_DAI_FORMAT_RIGHT_J	(2 << 0)
147 #define DA7210_DAI_OE			(1 << 3)
148 #define DA7210_DAI_EN			(1 << 7)
149 
150 /*PLL_DIV3 bit fields */
151 #define DA7210_PLL_DIV_L_MASK		(0xF << 0)
152 #define DA7210_MCLK_RANGE_10_20_MHZ	(1 << 4)
153 #define DA7210_PLL_BYP			(1 << 6)
154 
155 /* PLL bit fields */
156 #define DA7210_PLL_FS_MASK		(0xF << 0)
157 #define DA7210_PLL_FS_8000		(0x1 << 0)
158 #define DA7210_PLL_FS_11025		(0x2 << 0)
159 #define DA7210_PLL_FS_12000		(0x3 << 0)
160 #define DA7210_PLL_FS_16000		(0x5 << 0)
161 #define DA7210_PLL_FS_22050		(0x6 << 0)
162 #define DA7210_PLL_FS_24000		(0x7 << 0)
163 #define DA7210_PLL_FS_32000		(0x9 << 0)
164 #define DA7210_PLL_FS_44100		(0xA << 0)
165 #define DA7210_PLL_FS_48000		(0xB << 0)
166 #define DA7210_PLL_FS_88200		(0xE << 0)
167 #define DA7210_PLL_FS_96000		(0xF << 0)
168 #define DA7210_MCLK_DET_EN		(0x1 << 5)
169 #define DA7210_MCLK_SRM_EN		(0x1 << 6)
170 #define DA7210_PLL_EN			(0x1 << 7)
171 
172 /* SOFTMUTE bit fields */
173 #define DA7210_RAMP_EN			(1 << 6)
174 
175 /* CONTROL bit fields */
176 #define DA7210_REG_EN			(1 << 0)
177 #define DA7210_BIAS_EN			(1 << 2)
178 #define DA7210_NOISE_SUP_EN		(1 << 3)
179 
180 /* IN_GAIN bit fields */
181 #define DA7210_INPGA_L_VOL		(0x0F << 0)
182 #define DA7210_INPGA_R_VOL		(0xF0 << 0)
183 
184 /* ZERO_CROSS bit fields */
185 #define DA7210_AUX1_L_ZC		(1 << 0)
186 #define DA7210_AUX1_R_ZC		(1 << 1)
187 #define DA7210_HP_L_ZC			(1 << 6)
188 #define DA7210_HP_R_ZC			(1 << 7)
189 
190 /* AUX1_L bit fields */
191 #define DA7210_AUX1_L_VOL		(0x3F << 0)
192 #define DA7210_AUX1_L_EN		(1 << 7)
193 
194 /* AUX1_R bit fields */
195 #define DA7210_AUX1_R_VOL		(0x3F << 0)
196 #define DA7210_AUX1_R_EN		(1 << 7)
197 
198 /* AUX2 bit fields */
199 #define DA7210_AUX2_EN			(1 << 3)
200 
201 /* Minimum INPGA and AUX1 volume to enable noise suppression */
202 #define DA7210_INPGA_MIN_VOL_NS		0x0A  /* 10.5dB */
203 #define DA7210_AUX1_MIN_VOL_NS		0x35  /* 6dB */
204 
205 /* OUT1_L bit fields */
206 #define DA7210_OUT1_L_EN		(1 << 7)
207 
208 /* OUT1_R bit fields */
209 #define DA7210_OUT1_R_EN		(1 << 7)
210 
211 /* OUT2 bit fields */
212 #define DA7210_OUT2_OUTMIX_R		(1 << 5)
213 #define DA7210_OUT2_OUTMIX_L		(1 << 6)
214 #define DA7210_OUT2_EN			(1 << 7)
215 
216 struct pll_div {
217 	int fref;
218 	int fout;
219 	u8 div1;
220 	u8 div2;
221 	u8 div3;
222 	u8 mode;	/* 0 = slave, 1 = master */
223 };
224 
225 /* PLL dividers table */
226 static const struct pll_div da7210_pll_div[] = {
227 	/* for MASTER mode, fs = 44.1Khz */
228 	{ 12000000, 2822400, 0xE8, 0x6C, 0x2, 1},	/* MCLK=12Mhz */
229 	{ 13000000, 2822400, 0xDF, 0x28, 0xC, 1},	/* MCLK=13Mhz */
230 	{ 13500000, 2822400, 0xDB, 0x0A, 0xD, 1},	/* MCLK=13.5Mhz */
231 	{ 14400000, 2822400, 0xD4, 0x5A, 0x2, 1},	/* MCLK=14.4Mhz */
232 	{ 19200000, 2822400, 0xBB, 0x43, 0x9, 1},	/* MCLK=19.2Mhz */
233 	{ 19680000, 2822400, 0xB9, 0x6D, 0xA, 1},	/* MCLK=19.68Mhz */
234 	{ 19800000, 2822400, 0xB8, 0xFB, 0xB, 1},	/* MCLK=19.8Mhz */
235 	/* for MASTER mode, fs = 48Khz */
236 	{ 12000000, 3072000, 0xF3, 0x12, 0x7, 1},	/* MCLK=12Mhz */
237 	{ 13000000, 3072000, 0xE8, 0xFD, 0x5, 1},	/* MCLK=13Mhz */
238 	{ 13500000, 3072000, 0xE4, 0x82, 0x3, 1},	/* MCLK=13.5Mhz */
239 	{ 14400000, 3072000, 0xDD, 0x3A, 0x0, 1},	/* MCLK=14.4Mhz */
240 	{ 19200000, 3072000, 0xC1, 0xEB, 0x8, 1},	/* MCLK=19.2Mhz */
241 	{ 19680000, 3072000, 0xBF, 0xEC, 0x0, 1},	/* MCLK=19.68Mhz */
242 	{ 19800000, 3072000, 0xBF, 0x70, 0x0, 1},	/* MCLK=19.8Mhz */
243 	/* for SLAVE mode with SRM */
244 	{ 12000000, 2822400, 0xED, 0xBF, 0x5, 0},	/* MCLK=12Mhz */
245 	{ 13000000, 2822400, 0xE4, 0x13, 0x0, 0},	/* MCLK=13Mhz */
246 	{ 13500000, 2822400, 0xDF, 0xC6, 0x8, 0},	/* MCLK=13.5Mhz */
247 	{ 14400000, 2822400, 0xD8, 0xCA, 0x1, 0},	/* MCLK=14.4Mhz */
248 	{ 19200000, 2822400, 0xBE, 0x97, 0x9, 0},	/* MCLK=19.2Mhz */
249 	{ 19680000, 2822400, 0xBC, 0xAC, 0xD, 0},	/* MCLK=19.68Mhz */
250 	{ 19800000, 2822400, 0xBC, 0x35, 0xE, 0},	/* MCLK=19.8Mhz  */
251 };
252 
253 enum clk_src {
254 	DA7210_CLKSRC_MCLK
255 };
256 
257 #define DA7210_VERSION "0.0.1"
258 
259 /*
260  * Playback Volume
261  *
262  * max		: 0x3F (+15.0 dB)
263  *		   (1.5 dB step)
264  * min		: 0x11 (-54.0 dB)
265  * mute		: 0x10
266  * reserved	: 0x00 - 0x0F
267  *
268  * Reserved area are considered as "mute".
269  */
270 static const unsigned int hp_out_tlv[] = {
271 	TLV_DB_RANGE_HEAD(2),
272 	0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
273 	/* -54 dB to +15 dB */
274 	0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0),
275 };
276 
277 static const unsigned int lineout_vol_tlv[] = {
278 	TLV_DB_RANGE_HEAD(2),
279 	0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
280 	/* -54dB to 15dB */
281 	0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
282 };
283 
284 static const unsigned int mono_vol_tlv[] = {
285 	TLV_DB_RANGE_HEAD(2),
286 	0x0, 0x2, TLV_DB_SCALE_ITEM(-1800, 0, 1),
287 	/* -18dB to 6dB */
288 	0x3, 0x7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
289 };
290 
291 static const unsigned int aux1_vol_tlv[] = {
292 	TLV_DB_RANGE_HEAD(2),
293 	0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
294 	/* -48dB to 21dB */
295 	0x11, 0x3f, TLV_DB_SCALE_ITEM(-4800, 150, 0)
296 };
297 
298 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
299 static const DECLARE_TLV_DB_SCALE(adc_eq_master_gain_tlv, -1800, 600, 1);
300 static const DECLARE_TLV_DB_SCALE(dac_gain_tlv, -7725, 75, 0);
301 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
302 static const DECLARE_TLV_DB_SCALE(aux2_vol_tlv, -600, 600, 0);
303 static const DECLARE_TLV_DB_SCALE(inpga_gain_tlv, -450, 150, 0);
304 
305 /* ADC and DAC high pass filter f0 value */
306 static const char * const da7210_hpf_cutoff_txt[] = {
307 	"Fs/8192*pi", "Fs/4096*pi", "Fs/2048*pi", "Fs/1024*pi"
308 };
309 
310 static SOC_ENUM_SINGLE_DECL(da7210_dac_hpf_cutoff,
311 			    DA7210_DAC_HPF, 0, da7210_hpf_cutoff_txt);
312 
313 static SOC_ENUM_SINGLE_DECL(da7210_adc_hpf_cutoff,
314 			    DA7210_ADC_HPF, 0, da7210_hpf_cutoff_txt);
315 
316 /* ADC and DAC voice (8kHz) high pass cutoff value */
317 static const char * const da7210_vf_cutoff_txt[] = {
318 	"2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
319 };
320 
321 static SOC_ENUM_SINGLE_DECL(da7210_dac_vf_cutoff,
322 			    DA7210_DAC_HPF, 4, da7210_vf_cutoff_txt);
323 
324 static SOC_ENUM_SINGLE_DECL(da7210_adc_vf_cutoff,
325 			    DA7210_ADC_HPF, 4, da7210_vf_cutoff_txt);
326 
327 static const char *da7210_hp_mode_txt[] = {
328 	"Class H", "Class G"
329 };
330 
331 static SOC_ENUM_SINGLE_DECL(da7210_hp_mode_sel,
332 			    DA7210_HP_CFG, 0, da7210_hp_mode_txt);
333 
334 /* ALC can be enabled only if noise suppression is disabled */
335 static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol,
336 			     struct snd_ctl_elem_value *ucontrol)
337 {
338 	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
339 
340 	if (ucontrol->value.integer.value[0]) {
341 		/* Check if noise suppression is enabled */
342 		if (snd_soc_read(codec, DA7210_CONTROL) & DA7210_NOISE_SUP_EN) {
343 			dev_dbg(codec->dev,
344 				"Disable noise suppression to enable ALC\n");
345 			return -EINVAL;
346 		}
347 	}
348 	/* If all conditions are met or we are actually disabling ALC */
349 	return snd_soc_put_volsw(kcontrol, ucontrol);
350 }
351 
352 /* Noise suppression can be enabled only if following conditions are met
353  *  ALC disabled
354  *  ZC enabled for HP and AUX1 PGA
355  *  INPGA_L_VOL and INPGA_R_VOL >= 10.5 dB
356  *  AUX1_L_VOL and AUX1_R_VOL >= 6 dB
357  */
358 static int da7210_put_noise_sup_sw(struct snd_kcontrol *kcontrol,
359 				   struct snd_ctl_elem_value *ucontrol)
360 {
361 	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
362 	u8 val;
363 
364 	if (ucontrol->value.integer.value[0]) {
365 		/* Check if ALC is enabled */
366 		if (snd_soc_read(codec, DA7210_ADC) & DA7210_ADC_ALC_EN)
367 			goto err;
368 
369 		/* Check ZC for HP and AUX1 PGA */
370 		if ((snd_soc_read(codec, DA7210_ZERO_CROSS) &
371 			(DA7210_AUX1_L_ZC | DA7210_AUX1_R_ZC | DA7210_HP_L_ZC |
372 			DA7210_HP_R_ZC)) != (DA7210_AUX1_L_ZC |
373 			DA7210_AUX1_R_ZC | DA7210_HP_L_ZC | DA7210_HP_R_ZC))
374 			goto err;
375 
376 		/* Check INPGA_L_VOL and INPGA_R_VOL */
377 		val = snd_soc_read(codec, DA7210_IN_GAIN);
378 		if (((val & DA7210_INPGA_L_VOL) < DA7210_INPGA_MIN_VOL_NS) ||
379 			(((val & DA7210_INPGA_R_VOL) >> 4) <
380 			DA7210_INPGA_MIN_VOL_NS))
381 			goto err;
382 
383 		/* Check AUX1_L_VOL and AUX1_R_VOL */
384 		if (((snd_soc_read(codec, DA7210_AUX1_L) & DA7210_AUX1_L_VOL) <
385 		    DA7210_AUX1_MIN_VOL_NS) ||
386 		    ((snd_soc_read(codec, DA7210_AUX1_R) & DA7210_AUX1_R_VOL) <
387 		    DA7210_AUX1_MIN_VOL_NS))
388 			goto err;
389 	}
390 	/* If all conditions are met or we are actually disabling Noise sup */
391 	return snd_soc_put_volsw(kcontrol, ucontrol);
392 
393 err:
394 	return -EINVAL;
395 }
396 
397 static const struct snd_kcontrol_new da7210_snd_controls[] = {
398 
399 	SOC_DOUBLE_R_TLV("HeadPhone Playback Volume",
400 			 DA7210_HP_L_VOL, DA7210_HP_R_VOL,
401 			 0, 0x3F, 0, hp_out_tlv),
402 	SOC_DOUBLE_R_TLV("Digital Playback Volume",
403 			 DA7210_DAC_L, DA7210_DAC_R,
404 			 0, 0x77, 1, dac_gain_tlv),
405 	SOC_DOUBLE_R_TLV("Lineout Playback Volume",
406 			 DA7210_OUT1_L, DA7210_OUT1_R,
407 			 0, 0x3f, 0, lineout_vol_tlv),
408 	SOC_SINGLE_TLV("Mono Playback Volume", DA7210_OUT2, 0, 0x7, 0,
409 		       mono_vol_tlv),
410 
411 	SOC_DOUBLE_R_TLV("Mic Capture Volume",
412 			 DA7210_MIC_L, DA7210_MIC_R,
413 			 0, 0x5, 0, mic_vol_tlv),
414 	SOC_DOUBLE_R_TLV("Aux1 Capture Volume",
415 			 DA7210_AUX1_L, DA7210_AUX1_R,
416 			 0, 0x3f, 0, aux1_vol_tlv),
417 	SOC_SINGLE_TLV("Aux2 Capture Volume", DA7210_AUX2, 0, 0x3, 0,
418 		       aux2_vol_tlv),
419 	SOC_DOUBLE_TLV("In PGA Capture Volume", DA7210_IN_GAIN, 0, 4, 0xF, 0,
420 		       inpga_gain_tlv),
421 
422 	/* DAC Equalizer  controls */
423 	SOC_SINGLE("DAC EQ Switch", DA7210_DAC_EQ5, 7, 1, 0),
424 	SOC_SINGLE_TLV("DAC EQ1 Volume", DA7210_DAC_EQ1_2, 0, 0xf, 1,
425 		       eq_gain_tlv),
426 	SOC_SINGLE_TLV("DAC EQ2 Volume", DA7210_DAC_EQ1_2, 4, 0xf, 1,
427 		       eq_gain_tlv),
428 	SOC_SINGLE_TLV("DAC EQ3 Volume", DA7210_DAC_EQ3_4, 0, 0xf, 1,
429 		       eq_gain_tlv),
430 	SOC_SINGLE_TLV("DAC EQ4 Volume", DA7210_DAC_EQ3_4, 4, 0xf, 1,
431 		       eq_gain_tlv),
432 	SOC_SINGLE_TLV("DAC EQ5 Volume", DA7210_DAC_EQ5, 0, 0xf, 1,
433 		       eq_gain_tlv),
434 
435 	/* ADC Equalizer  controls */
436 	SOC_SINGLE("ADC EQ Switch", DA7210_ADC_EQ5, 7, 1, 0),
437 	SOC_SINGLE_TLV("ADC EQ Master Volume", DA7210_ADC_EQ5, 4, 0x3,
438 		       1, adc_eq_master_gain_tlv),
439 	SOC_SINGLE_TLV("ADC EQ1 Volume", DA7210_ADC_EQ1_2, 0, 0xf, 1,
440 		       eq_gain_tlv),
441 	SOC_SINGLE_TLV("ADC EQ2 Volume", DA7210_ADC_EQ1_2, 4, 0xf, 1,
442 		       eq_gain_tlv),
443 	SOC_SINGLE_TLV("ADC EQ3 Volume", DA7210_ADC_EQ3_4, 0, 0xf, 1,
444 		       eq_gain_tlv),
445 	SOC_SINGLE_TLV("ADC EQ4 Volume", DA7210_ADC_EQ3_4, 4, 0xf, 1,
446 		       eq_gain_tlv),
447 	SOC_SINGLE_TLV("ADC EQ5 Volume", DA7210_ADC_EQ5, 0, 0xf, 1,
448 		       eq_gain_tlv),
449 
450 	SOC_SINGLE("DAC HPF Switch", DA7210_DAC_HPF, 3, 1, 0),
451 	SOC_ENUM("DAC HPF Cutoff", da7210_dac_hpf_cutoff),
452 	SOC_SINGLE("DAC Voice Mode Switch", DA7210_DAC_HPF, 7, 1, 0),
453 	SOC_ENUM("DAC Voice Cutoff", da7210_dac_vf_cutoff),
454 
455 	SOC_SINGLE("ADC HPF Switch", DA7210_ADC_HPF, 3, 1, 0),
456 	SOC_ENUM("ADC HPF Cutoff", da7210_adc_hpf_cutoff),
457 	SOC_SINGLE("ADC Voice Mode Switch", DA7210_ADC_HPF, 7, 1, 0),
458 	SOC_ENUM("ADC Voice Cutoff", da7210_adc_vf_cutoff),
459 
460 	/* Mute controls */
461 	SOC_DOUBLE_R("Mic Capture Switch", DA7210_MIC_L, DA7210_MIC_R, 3, 1, 0),
462 	SOC_SINGLE("Aux2 Capture Switch", DA7210_AUX2, 2, 1, 0),
463 	SOC_DOUBLE("ADC Capture Switch", DA7210_ADC, 2, 6, 1, 0),
464 	SOC_SINGLE("Digital Soft Mute Switch", DA7210_SOFTMUTE, 7, 1, 0),
465 	SOC_SINGLE("Digital Soft Mute Rate", DA7210_SOFTMUTE, 0, 0x7, 0),
466 
467 	/* Zero cross controls */
468 	SOC_DOUBLE("Aux1 ZC Switch", DA7210_ZERO_CROSS, 0, 1, 1, 0),
469 	SOC_DOUBLE("In PGA ZC Switch", DA7210_ZERO_CROSS, 2, 3, 1, 0),
470 	SOC_DOUBLE("Lineout ZC Switch", DA7210_ZERO_CROSS, 4, 5, 1, 0),
471 	SOC_DOUBLE("Headphone ZC Switch", DA7210_ZERO_CROSS, 6, 7, 1, 0),
472 
473 	SOC_ENUM("Headphone Class", da7210_hp_mode_sel),
474 
475 	/* ALC controls */
476 	SOC_SINGLE_EXT("ALC Enable Switch", DA7210_ADC, 0, 1, 0,
477 		       snd_soc_get_volsw, da7210_put_alc_sw),
478 	SOC_SINGLE("ALC Capture Max Volume", DA7210_ALC_MAX, 0, 0x3F, 0),
479 	SOC_SINGLE("ALC Capture Min Volume", DA7210_ALC_MIN, 0, 0x3F, 0),
480 	SOC_SINGLE("ALC Capture Noise Volume", DA7210_ALC_NOIS, 0, 0x3F, 0),
481 	SOC_SINGLE("ALC Capture Attack Rate", DA7210_ALC_ATT, 0, 0xFF, 0),
482 	SOC_SINGLE("ALC Capture Release Rate", DA7210_ALC_REL, 0, 0xFF, 0),
483 	SOC_SINGLE("ALC Capture Release Delay", DA7210_ALC_DEL, 0, 0xFF, 0),
484 
485 	SOC_SINGLE_EXT("Noise Suppression Enable Switch", DA7210_CONTROL, 3, 1,
486 		       0, snd_soc_get_volsw, da7210_put_noise_sup_sw),
487 };
488 
489 /*
490  * DAPM Controls
491  *
492  * Current DAPM implementation covers almost all codec components e.g. IOs,
493  * mixers, PGAs,ADC and DAC.
494  */
495 /* In Mixer Left */
496 static const struct snd_kcontrol_new da7210_dapm_inmixl_controls[] = {
497 	SOC_DAPM_SINGLE("Mic Left Switch", DA7210_INMIX_L, 0, 1, 0),
498 	SOC_DAPM_SINGLE("Mic Right Switch", DA7210_INMIX_L, 1, 1, 0),
499 	SOC_DAPM_SINGLE("Aux1 Left Switch", DA7210_INMIX_L, 2, 1, 0),
500 	SOC_DAPM_SINGLE("Aux2 Switch", DA7210_INMIX_L, 3, 1, 0),
501 	SOC_DAPM_SINGLE("Outmix Left Switch", DA7210_INMIX_L, 4, 1, 0),
502 };
503 
504 /* In Mixer Right */
505 static const struct snd_kcontrol_new da7210_dapm_inmixr_controls[] = {
506 	SOC_DAPM_SINGLE("Mic Right Switch", DA7210_INMIX_R, 0, 1, 0),
507 	SOC_DAPM_SINGLE("Mic Left Switch", DA7210_INMIX_R, 1, 1, 0),
508 	SOC_DAPM_SINGLE("Aux1 Right Switch", DA7210_INMIX_R, 2, 1, 0),
509 	SOC_DAPM_SINGLE("Aux2 Switch", DA7210_INMIX_R, 3, 1, 0),
510 	SOC_DAPM_SINGLE("Outmix Right Switch", DA7210_INMIX_R, 4, 1, 0),
511 };
512 
513 /* Out Mixer Left */
514 static const struct snd_kcontrol_new da7210_dapm_outmixl_controls[] = {
515 	SOC_DAPM_SINGLE("Aux1 Left Switch", DA7210_OUTMIX_L, 0, 1, 0),
516 	SOC_DAPM_SINGLE("Aux2 Switch", DA7210_OUTMIX_L, 1, 1, 0),
517 	SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUTMIX_L, 2, 1, 0),
518 	SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUTMIX_L, 3, 1, 0),
519 	SOC_DAPM_SINGLE("DAC Left Switch", DA7210_OUTMIX_L, 4, 1, 0),
520 };
521 
522 /* Out Mixer Right */
523 static const struct snd_kcontrol_new da7210_dapm_outmixr_controls[] = {
524 	SOC_DAPM_SINGLE("Aux1 Right Switch", DA7210_OUTMIX_R, 0, 1, 0),
525 	SOC_DAPM_SINGLE("Aux2 Switch", DA7210_OUTMIX_R, 1, 1, 0),
526 	SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUTMIX_R, 2, 1, 0),
527 	SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUTMIX_R, 3, 1, 0),
528 	SOC_DAPM_SINGLE("DAC Right Switch", DA7210_OUTMIX_R, 4, 1, 0),
529 };
530 
531 /* Mono Mixer */
532 static const struct snd_kcontrol_new da7210_dapm_monomix_controls[] = {
533 	SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUT2, 3, 1, 0),
534 	SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUT2, 4, 1, 0),
535 	SOC_DAPM_SINGLE("Outmix Right Switch", DA7210_OUT2, 5, 1, 0),
536 	SOC_DAPM_SINGLE("Outmix Left Switch", DA7210_OUT2, 6, 1, 0),
537 };
538 
539 /* DAPM widgets */
540 static const struct snd_soc_dapm_widget da7210_dapm_widgets[] = {
541 	/* Input Side */
542 	/* Input Lines */
543 	SND_SOC_DAPM_INPUT("MICL"),
544 	SND_SOC_DAPM_INPUT("MICR"),
545 	SND_SOC_DAPM_INPUT("AUX1L"),
546 	SND_SOC_DAPM_INPUT("AUX1R"),
547 	SND_SOC_DAPM_INPUT("AUX2"),
548 
549 	/* Input PGAs */
550 	SND_SOC_DAPM_PGA("Mic Left", DA7210_STARTUP3, 0, 1, NULL, 0),
551 	SND_SOC_DAPM_PGA("Mic Right", DA7210_STARTUP3, 1, 1, NULL, 0),
552 	SND_SOC_DAPM_PGA("Aux1 Left", DA7210_STARTUP3, 2, 1, NULL, 0),
553 	SND_SOC_DAPM_PGA("Aux1 Right", DA7210_STARTUP3, 3, 1, NULL, 0),
554 	SND_SOC_DAPM_PGA("Aux2 Mono", DA7210_STARTUP3, 4, 1, NULL, 0),
555 
556 	SND_SOC_DAPM_PGA("INPGA Left", DA7210_INMIX_L, 7, 0, NULL, 0),
557 	SND_SOC_DAPM_PGA("INPGA Right", DA7210_INMIX_R, 7, 0, NULL, 0),
558 
559 	/* MICBIAS */
560 	SND_SOC_DAPM_SUPPLY("Mic Bias", DA7210_MIC_L, 6, 0, NULL, 0),
561 
562 	/* Input Mixers */
563 	SND_SOC_DAPM_MIXER("In Mixer Left", SND_SOC_NOPM, 0, 0,
564 		&da7210_dapm_inmixl_controls[0],
565 		ARRAY_SIZE(da7210_dapm_inmixl_controls)),
566 
567 	SND_SOC_DAPM_MIXER("In Mixer Right", SND_SOC_NOPM, 0, 0,
568 		&da7210_dapm_inmixr_controls[0],
569 		ARRAY_SIZE(da7210_dapm_inmixr_controls)),
570 
571 	/* ADCs */
572 	SND_SOC_DAPM_ADC("ADC Left", "Capture", DA7210_STARTUP3, 5, 1),
573 	SND_SOC_DAPM_ADC("ADC Right", "Capture", DA7210_STARTUP3, 6, 1),
574 
575 	/* Output Side */
576 	/* DACs */
577 	SND_SOC_DAPM_DAC("DAC Left", "Playback", DA7210_STARTUP2, 5, 1),
578 	SND_SOC_DAPM_DAC("DAC Right", "Playback", DA7210_STARTUP2, 6, 1),
579 
580 	/* Output Mixers */
581 	SND_SOC_DAPM_MIXER("Out Mixer Left", SND_SOC_NOPM, 0, 0,
582 		&da7210_dapm_outmixl_controls[0],
583 		ARRAY_SIZE(da7210_dapm_outmixl_controls)),
584 
585 	SND_SOC_DAPM_MIXER("Out Mixer Right", SND_SOC_NOPM, 0, 0,
586 		&da7210_dapm_outmixr_controls[0],
587 		ARRAY_SIZE(da7210_dapm_outmixr_controls)),
588 
589 	SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0,
590 		&da7210_dapm_monomix_controls[0],
591 		ARRAY_SIZE(da7210_dapm_monomix_controls)),
592 
593 	/* Output PGAs */
594 	SND_SOC_DAPM_PGA("OUTPGA Left Enable", DA7210_OUTMIX_L, 7, 0, NULL, 0),
595 	SND_SOC_DAPM_PGA("OUTPGA Right Enable", DA7210_OUTMIX_R, 7, 0, NULL, 0),
596 
597 	SND_SOC_DAPM_PGA("Out1 Left", DA7210_STARTUP2, 0, 1, NULL, 0),
598 	SND_SOC_DAPM_PGA("Out1 Right", DA7210_STARTUP2, 1, 1, NULL, 0),
599 	SND_SOC_DAPM_PGA("Out2 Mono", DA7210_STARTUP2, 2, 1, NULL, 0),
600 	SND_SOC_DAPM_PGA("Headphone Left", DA7210_STARTUP2, 3, 1, NULL, 0),
601 	SND_SOC_DAPM_PGA("Headphone Right", DA7210_STARTUP2, 4, 1, NULL, 0),
602 
603 	/* Output Lines */
604 	SND_SOC_DAPM_OUTPUT("OUT1L"),
605 	SND_SOC_DAPM_OUTPUT("OUT1R"),
606 	SND_SOC_DAPM_OUTPUT("HPL"),
607 	SND_SOC_DAPM_OUTPUT("HPR"),
608 	SND_SOC_DAPM_OUTPUT("OUT2"),
609 };
610 
611 /* DAPM audio route definition */
612 static const struct snd_soc_dapm_route da7210_audio_map[] = {
613 	/* Dest       Connecting Widget    source */
614 	/* Input path */
615 	{"Mic Left", NULL, "MICL"},
616 	{"Mic Right", NULL, "MICR"},
617 	{"Aux1 Left", NULL, "AUX1L"},
618 	{"Aux1 Right", NULL, "AUX1R"},
619 	{"Aux2 Mono", NULL, "AUX2"},
620 
621 	{"In Mixer Left", "Mic Left Switch", "Mic Left"},
622 	{"In Mixer Left", "Mic Right Switch", "Mic Right"},
623 	{"In Mixer Left", "Aux1 Left Switch", "Aux1 Left"},
624 	{"In Mixer Left", "Aux2 Switch", "Aux2 Mono"},
625 	{"In Mixer Left", "Outmix Left Switch", "Out Mixer Left"},
626 
627 	{"In Mixer Right", "Mic Right Switch", "Mic Right"},
628 	{"In Mixer Right", "Mic Left Switch", "Mic Left"},
629 	{"In Mixer Right", "Aux1 Right Switch", "Aux1 Right"},
630 	{"In Mixer Right", "Aux2 Switch", "Aux2 Mono"},
631 	{"In Mixer Right", "Outmix Right Switch", "Out Mixer Right"},
632 
633 	{"INPGA Left", NULL, "In Mixer Left"},
634 	{"ADC Left", NULL, "INPGA Left"},
635 
636 	{"INPGA Right", NULL, "In Mixer Right"},
637 	{"ADC Right", NULL, "INPGA Right"},
638 
639 	/* Output path */
640 	{"Out Mixer Left", "Aux1 Left Switch", "Aux1 Left"},
641 	{"Out Mixer Left", "Aux2 Switch", "Aux2 Mono"},
642 	{"Out Mixer Left", "INPGA Left Switch", "INPGA Left"},
643 	{"Out Mixer Left", "INPGA Right Switch", "INPGA Right"},
644 	{"Out Mixer Left", "DAC Left Switch", "DAC Left"},
645 
646 	{"Out Mixer Right", "Aux1 Right Switch", "Aux1 Right"},
647 	{"Out Mixer Right", "Aux2 Switch", "Aux2 Mono"},
648 	{"Out Mixer Right", "INPGA Right Switch", "INPGA Right"},
649 	{"Out Mixer Right", "INPGA Left Switch", "INPGA Left"},
650 	{"Out Mixer Right", "DAC Right Switch", "DAC Right"},
651 
652 	{"Mono Mixer", "INPGA Right Switch", "INPGA Right"},
653 	{"Mono Mixer", "INPGA Left Switch", "INPGA Left"},
654 	{"Mono Mixer", "Outmix Right Switch", "Out Mixer Right"},
655 	{"Mono Mixer", "Outmix Left Switch", "Out Mixer Left"},
656 
657 	{"OUTPGA Left Enable", NULL, "Out Mixer Left"},
658 	{"OUTPGA Right Enable", NULL, "Out Mixer Right"},
659 
660 	{"Out1 Left", NULL, "OUTPGA Left Enable"},
661 	{"OUT1L", NULL, "Out1 Left"},
662 
663 	{"Out1 Right", NULL, "OUTPGA Right Enable"},
664 	{"OUT1R", NULL, "Out1 Right"},
665 
666 	{"Headphone Left", NULL, "OUTPGA Left Enable"},
667 	{"HPL", NULL, "Headphone Left"},
668 
669 	{"Headphone Right", NULL, "OUTPGA Right Enable"},
670 	{"HPR", NULL, "Headphone Right"},
671 
672 	{"Out2 Mono", NULL, "Mono Mixer"},
673 	{"OUT2", NULL, "Out2 Mono"},
674 };
675 
676 /* Codec private data */
677 struct da7210_priv {
678 	struct regmap *regmap;
679 	unsigned int mclk_rate;
680 	int master;
681 };
682 
683 static struct reg_default da7210_reg_defaults[] = {
684 	{ 0x00, 0x00 },
685 	{ 0x01, 0x11 },
686 	{ 0x03, 0x00 },
687 	{ 0x04, 0x00 },
688 	{ 0x05, 0x00 },
689 	{ 0x06, 0x00 },
690 	{ 0x07, 0x00 },
691 	{ 0x08, 0x00 },
692 	{ 0x09, 0x00 },
693 	{ 0x0a, 0x00 },
694 	{ 0x0b, 0x00 },
695 	{ 0x0c, 0x00 },
696 	{ 0x0d, 0x00 },
697 	{ 0x0e, 0x00 },
698 	{ 0x0f, 0x08 },
699 	{ 0x10, 0x00 },
700 	{ 0x11, 0x00 },
701 	{ 0x12, 0x00 },
702 	{ 0x13, 0x00 },
703 	{ 0x14, 0x08 },
704 	{ 0x15, 0x10 },
705 	{ 0x16, 0x10 },
706 	{ 0x17, 0x54 },
707 	{ 0x18, 0x40 },
708 	{ 0x19, 0x00 },
709 	{ 0x1a, 0x00 },
710 	{ 0x1b, 0x00 },
711 	{ 0x1c, 0x00 },
712 	{ 0x1d, 0x00 },
713 	{ 0x1e, 0x00 },
714 	{ 0x1f, 0x00 },
715 	{ 0x20, 0x00 },
716 	{ 0x21, 0x00 },
717 	{ 0x22, 0x00 },
718 	{ 0x23, 0x02 },
719 	{ 0x24, 0x00 },
720 	{ 0x25, 0x76 },
721 	{ 0x26, 0x00 },
722 	{ 0x27, 0x00 },
723 	{ 0x28, 0x04 },
724 	{ 0x29, 0x00 },
725 	{ 0x2a, 0x00 },
726 	{ 0x2b, 0x30 },
727 	{ 0x2c, 0x2A },
728 	{ 0x83, 0x00 },
729 	{ 0x84, 0x00 },
730 	{ 0x85, 0x00 },
731 	{ 0x86, 0x00 },
732 	{ 0x87, 0x00 },
733 	{ 0x88, 0x00 },
734 };
735 
736 static bool da7210_readable_register(struct device *dev, unsigned int reg)
737 {
738 	switch (reg) {
739 	case DA7210_A_HID_UNLOCK:
740 	case DA7210_A_TEST_UNLOCK:
741 	case DA7210_A_PLL1:
742 	case DA7210_A_CP_MODE:
743 		return false;
744 	default:
745 		return true;
746 	}
747 }
748 
749 static bool da7210_volatile_register(struct device *dev,
750 				    unsigned int reg)
751 {
752 	switch (reg) {
753 	case DA7210_STATUS:
754 		return true;
755 	default:
756 		return false;
757 	}
758 }
759 
760 /*
761  * Set PCM DAI word length.
762  */
763 static int da7210_hw_params(struct snd_pcm_substream *substream,
764 			    struct snd_pcm_hw_params *params,
765 			    struct snd_soc_dai *dai)
766 {
767 	struct snd_soc_codec *codec = dai->codec;
768 	struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec);
769 	u32 dai_cfg1;
770 	u32 fs, sysclk;
771 
772 	/* set DAI source to Left and Right ADC */
773 	snd_soc_write(codec, DA7210_DAI_SRC_SEL,
774 		     DA7210_DAI_OUT_R_SRC | DA7210_DAI_OUT_L_SRC);
775 
776 	/* Enable DAI */
777 	snd_soc_write(codec, DA7210_DAI_CFG3, DA7210_DAI_OE | DA7210_DAI_EN);
778 
779 	dai_cfg1 = 0xFC & snd_soc_read(codec, DA7210_DAI_CFG1);
780 
781 	switch (params_width(params)) {
782 	case 16:
783 		dai_cfg1 |= DA7210_DAI_WORD_S16_LE;
784 		break;
785 	case 20:
786 		dai_cfg1 |= DA7210_DAI_WORD_S20_3LE;
787 		break;
788 	case 24:
789 		dai_cfg1 |= DA7210_DAI_WORD_S24_LE;
790 		break;
791 	case 32:
792 		dai_cfg1 |= DA7210_DAI_WORD_S32_LE;
793 		break;
794 	default:
795 		return -EINVAL;
796 	}
797 
798 	snd_soc_write(codec, DA7210_DAI_CFG1, dai_cfg1);
799 
800 	switch (params_rate(params)) {
801 	case 8000:
802 		fs		= DA7210_PLL_FS_8000;
803 		sysclk		= 3072000;
804 		break;
805 	case 11025:
806 		fs		= DA7210_PLL_FS_11025;
807 		sysclk		= 2822400;
808 		break;
809 	case 12000:
810 		fs		= DA7210_PLL_FS_12000;
811 		sysclk		= 3072000;
812 		break;
813 	case 16000:
814 		fs		= DA7210_PLL_FS_16000;
815 		sysclk		= 3072000;
816 		break;
817 	case 22050:
818 		fs		= DA7210_PLL_FS_22050;
819 		sysclk		= 2822400;
820 		break;
821 	case 32000:
822 		fs		= DA7210_PLL_FS_32000;
823 		sysclk		= 3072000;
824 		break;
825 	case 44100:
826 		fs		= DA7210_PLL_FS_44100;
827 		sysclk		= 2822400;
828 		break;
829 	case 48000:
830 		fs		= DA7210_PLL_FS_48000;
831 		sysclk		= 3072000;
832 		break;
833 	case 88200:
834 		fs		= DA7210_PLL_FS_88200;
835 		sysclk		= 2822400;
836 		break;
837 	case 96000:
838 		fs		= DA7210_PLL_FS_96000;
839 		sysclk		= 3072000;
840 		break;
841 	default:
842 		return -EINVAL;
843 	}
844 
845 	/* Disable active mode */
846 	snd_soc_update_bits(codec, DA7210_STARTUP1, DA7210_SC_MST_EN, 0);
847 
848 	snd_soc_update_bits(codec, DA7210_PLL, DA7210_PLL_FS_MASK, fs);
849 
850 	if (da7210->mclk_rate && (da7210->mclk_rate != sysclk)) {
851 		/* PLL mode, disable PLL bypass */
852 		snd_soc_update_bits(codec, DA7210_PLL_DIV3, DA7210_PLL_BYP, 0);
853 
854 		if (!da7210->master) {
855 			/* PLL slave mode, also enable SRM */
856 			snd_soc_update_bits(codec, DA7210_PLL,
857 						   (DA7210_MCLK_SRM_EN |
858 						    DA7210_MCLK_DET_EN),
859 						   (DA7210_MCLK_SRM_EN |
860 						    DA7210_MCLK_DET_EN));
861 		}
862 	} else {
863 		/* PLL bypass mode, enable PLL bypass and Auto Detection */
864 		snd_soc_update_bits(codec, DA7210_PLL, DA7210_MCLK_DET_EN,
865 						       DA7210_MCLK_DET_EN);
866 		snd_soc_update_bits(codec, DA7210_PLL_DIV3, DA7210_PLL_BYP,
867 							    DA7210_PLL_BYP);
868 	}
869 	/* Enable active mode */
870 	snd_soc_update_bits(codec, DA7210_STARTUP1,
871 			    DA7210_SC_MST_EN, DA7210_SC_MST_EN);
872 
873 	return 0;
874 }
875 
876 /*
877  * Set DAI mode and Format
878  */
879 static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
880 {
881 	struct snd_soc_codec *codec = codec_dai->codec;
882 	struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec);
883 	u32 dai_cfg1;
884 	u32 dai_cfg3;
885 
886 	dai_cfg1 = 0x7f & snd_soc_read(codec, DA7210_DAI_CFG1);
887 	dai_cfg3 = 0xfc & snd_soc_read(codec, DA7210_DAI_CFG3);
888 
889 	if ((snd_soc_read(codec, DA7210_PLL) & DA7210_PLL_EN) &&
890 		(!(snd_soc_read(codec, DA7210_PLL_DIV3) & DA7210_PLL_BYP)))
891 		return -EINVAL;
892 
893 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
894 	case SND_SOC_DAIFMT_CBM_CFM:
895 		da7210->master = 1;
896 		dai_cfg1 |= DA7210_DAI_MODE_MASTER;
897 		break;
898 	case SND_SOC_DAIFMT_CBS_CFS:
899 		da7210->master = 0;
900 		dai_cfg1 |= DA7210_DAI_MODE_SLAVE;
901 		break;
902 	default:
903 		return -EINVAL;
904 	}
905 
906 	/* FIXME
907 	 *
908 	 * It support I2S only now
909 	 */
910 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
911 	case SND_SOC_DAIFMT_I2S:
912 		dai_cfg3 |= DA7210_DAI_FORMAT_I2SMODE;
913 		break;
914 	case SND_SOC_DAIFMT_LEFT_J:
915 		dai_cfg3 |= DA7210_DAI_FORMAT_LEFT_J;
916 		break;
917 	case SND_SOC_DAIFMT_RIGHT_J:
918 		dai_cfg3 |= DA7210_DAI_FORMAT_RIGHT_J;
919 		break;
920 	default:
921 		return -EINVAL;
922 	}
923 
924 	/* FIXME
925 	 *
926 	 * It support 64bit data transmission only now
927 	 */
928 	dai_cfg1 |= DA7210_DAI_FLEN_64BIT;
929 
930 	snd_soc_write(codec, DA7210_DAI_CFG1, dai_cfg1);
931 	snd_soc_write(codec, DA7210_DAI_CFG3, dai_cfg3);
932 
933 	return 0;
934 }
935 
936 static int da7210_mute(struct snd_soc_dai *dai, int mute)
937 {
938 	struct snd_soc_codec *codec = dai->codec;
939 	u8 mute_reg = snd_soc_read(codec, DA7210_DAC_HPF) & 0xFB;
940 
941 	if (mute)
942 		snd_soc_write(codec, DA7210_DAC_HPF, mute_reg | 0x4);
943 	else
944 		snd_soc_write(codec, DA7210_DAC_HPF, mute_reg);
945 	return 0;
946 }
947 
948 #define DA7210_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
949 			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
950 
951 static int da7210_set_dai_sysclk(struct snd_soc_dai *codec_dai,
952 				 int clk_id, unsigned int freq, int dir)
953 {
954 	struct snd_soc_codec *codec = codec_dai->codec;
955 	struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec);
956 
957 	switch (clk_id) {
958 	case DA7210_CLKSRC_MCLK:
959 		switch (freq) {
960 		case 12000000:
961 		case 13000000:
962 		case 13500000:
963 		case 14400000:
964 		case 19200000:
965 		case 19680000:
966 		case 19800000:
967 			da7210->mclk_rate = freq;
968 			return 0;
969 		default:
970 			dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
971 				freq);
972 			return -EINVAL;
973 		}
974 		break;
975 	default:
976 		dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
977 		return -EINVAL;
978 	}
979 }
980 
981 /**
982  * da7210_set_dai_pll	:Configure the codec PLL
983  * @param codec_dai	: pointer to codec DAI
984  * @param pll_id	: da7210 has only one pll, so pll_id is always zero
985  * @param fref		: MCLK frequency, should be < 20MHz
986  * @param fout		: FsDM value, Refer page 44 & 45 of datasheet
987  * @return int		: Zero for success, negative error code for error
988  *
989  * Note: Supported PLL input frequencies are 12MHz, 13MHz, 13.5MHz, 14.4MHz,
990  *       19.2MHz, 19.6MHz and 19.8MHz
991  */
992 static int da7210_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
993 			      int source, unsigned int fref, unsigned int fout)
994 {
995 	struct snd_soc_codec *codec = codec_dai->codec;
996 	struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec);
997 
998 	u8 pll_div1, pll_div2, pll_div3, cnt;
999 
1000 	/* In slave mode, there is only one set of divisors */
1001 	if (!da7210->master)
1002 		fout = 2822400;
1003 
1004 	/* Search pll div array for correct divisors */
1005 	for (cnt = 0; cnt < ARRAY_SIZE(da7210_pll_div); cnt++) {
1006 		/* check fref, mode  and fout */
1007 		if ((fref == da7210_pll_div[cnt].fref) &&
1008 		    (da7210->master ==  da7210_pll_div[cnt].mode) &&
1009 		    (fout == da7210_pll_div[cnt].fout)) {
1010 			/* all match, pick up divisors */
1011 			pll_div1 = da7210_pll_div[cnt].div1;
1012 			pll_div2 = da7210_pll_div[cnt].div2;
1013 			pll_div3 = da7210_pll_div[cnt].div3;
1014 			break;
1015 		}
1016 	}
1017 	if (cnt >= ARRAY_SIZE(da7210_pll_div))
1018 		goto err;
1019 
1020 	/* Disable active mode */
1021 	snd_soc_update_bits(codec, DA7210_STARTUP1, DA7210_SC_MST_EN, 0);
1022 	/* Write PLL dividers */
1023 	snd_soc_write(codec, DA7210_PLL_DIV1, pll_div1);
1024 	snd_soc_write(codec, DA7210_PLL_DIV2, pll_div2);
1025 	snd_soc_update_bits(codec, DA7210_PLL_DIV3,
1026 				   DA7210_PLL_DIV_L_MASK, pll_div3);
1027 
1028 	/* Enable PLL */
1029 	snd_soc_update_bits(codec, DA7210_PLL, DA7210_PLL_EN, DA7210_PLL_EN);
1030 
1031 	/* Enable active mode */
1032 	snd_soc_update_bits(codec, DA7210_STARTUP1, DA7210_SC_MST_EN,
1033 						    DA7210_SC_MST_EN);
1034 	return 0;
1035 err:
1036 	dev_err(codec_dai->dev, "Unsupported PLL input frequency %d\n", fref);
1037 	return -EINVAL;
1038 }
1039 
1040 /* DAI operations */
1041 static const struct snd_soc_dai_ops da7210_dai_ops = {
1042 	.hw_params	= da7210_hw_params,
1043 	.set_fmt	= da7210_set_dai_fmt,
1044 	.set_sysclk	= da7210_set_dai_sysclk,
1045 	.set_pll	= da7210_set_dai_pll,
1046 	.digital_mute	= da7210_mute,
1047 };
1048 
1049 static struct snd_soc_dai_driver da7210_dai = {
1050 	.name = "da7210-hifi",
1051 	/* playback capabilities */
1052 	.playback = {
1053 		.stream_name = "Playback",
1054 		.channels_min = 1,
1055 		.channels_max = 2,
1056 		.rates = SNDRV_PCM_RATE_8000_96000,
1057 		.formats = DA7210_FORMATS,
1058 	},
1059 	/* capture capabilities */
1060 	.capture = {
1061 		.stream_name = "Capture",
1062 		.channels_min = 1,
1063 		.channels_max = 2,
1064 		.rates = SNDRV_PCM_RATE_8000_96000,
1065 		.formats = DA7210_FORMATS,
1066 	},
1067 	.ops = &da7210_dai_ops,
1068 	.symmetric_rates = 1,
1069 };
1070 
1071 static int da7210_probe(struct snd_soc_codec *codec)
1072 {
1073 	struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec);
1074 
1075 	dev_info(codec->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
1076 
1077 	da7210->mclk_rate       = 0;    /* This will be set from set_sysclk() */
1078 	da7210->master          = 0;    /* This will be set from set_fmt() */
1079 
1080 	/* Enable internal regulator & bias current */
1081 	snd_soc_write(codec, DA7210_CONTROL, DA7210_REG_EN | DA7210_BIAS_EN);
1082 
1083 	/*
1084 	 * ADC settings
1085 	 */
1086 
1087 	/* Enable Left & Right MIC PGA and Mic Bias */
1088 	snd_soc_write(codec, DA7210_MIC_L, DA7210_MIC_L_EN | DA7210_MICBIAS_EN);
1089 	snd_soc_write(codec, DA7210_MIC_R, DA7210_MIC_R_EN);
1090 
1091 	/* Enable Left and Right input PGA */
1092 	snd_soc_write(codec, DA7210_INMIX_L, DA7210_IN_L_EN);
1093 	snd_soc_write(codec, DA7210_INMIX_R, DA7210_IN_R_EN);
1094 
1095 	/* Enable Left and Right ADC */
1096 	snd_soc_write(codec, DA7210_ADC, DA7210_ADC_L_EN | DA7210_ADC_R_EN);
1097 
1098 	/*
1099 	 * DAC settings
1100 	 */
1101 
1102 	/* Enable Left and Right DAC */
1103 	snd_soc_write(codec, DA7210_DAC_SEL,
1104 		     DA7210_DAC_L_SRC_DAI_L | DA7210_DAC_L_EN |
1105 		     DA7210_DAC_R_SRC_DAI_R | DA7210_DAC_R_EN);
1106 
1107 	/* Enable Left and Right out PGA */
1108 	snd_soc_write(codec, DA7210_OUTMIX_L, DA7210_OUT_L_EN);
1109 	snd_soc_write(codec, DA7210_OUTMIX_R, DA7210_OUT_R_EN);
1110 
1111 	/* Enable Left and Right HeadPhone PGA */
1112 	snd_soc_write(codec, DA7210_HP_CFG,
1113 		     DA7210_HP_2CAP_MODE | DA7210_HP_SENSE_EN |
1114 		     DA7210_HP_L_EN | DA7210_HP_MODE | DA7210_HP_R_EN);
1115 
1116 	/* Enable ramp mode for DAC gain update */
1117 	snd_soc_write(codec, DA7210_SOFTMUTE, DA7210_RAMP_EN);
1118 
1119 	/*
1120 	 * For DA7210 codec, there are two ways to enable/disable analog IOs
1121 	 * and ADC/DAC,
1122 	 * (1) Using "Enable Bit" of register associated with that IO
1123 	 * (or ADC/DAC)
1124 	 *	e.g. Mic Left can be enabled using bit 7 of MIC_L(0x7) reg
1125 	 *
1126 	 * (2) Using "Standby Bit" of STARTUP2 or STARTUP3 register
1127 	 *	e.g. Mic left can be put to STANDBY using bit 0 of STARTUP3(0x5)
1128 	 *
1129 	 * Out of these two methods, the one using STANDBY bits is preferred
1130 	 * way to enable/disable individual blocks. This is because STANDBY
1131 	 * registers are part of system controller which allows system power
1132 	 * up/down in a controlled, pop-free manner. Also, as per application
1133 	 * note of DA7210, STANDBY register bits are only effective if a
1134 	 * particular IO (or ADC/DAC) is already enabled using enable/disable
1135 	 * register bits. Keeping these things in mind, current DAPM
1136 	 * implementation manipulates only STANDBY bits.
1137 	 *
1138 	 * Overall implementation can be outlined as below,
1139 	 *
1140 	 * - "Enable bit" of an IO or ADC/DAC is used to enable it in probe()
1141 	 * - "STANDBY bit" is controlled by DAPM
1142 	 */
1143 
1144 	/* Enable Line out amplifiers */
1145 	snd_soc_write(codec, DA7210_OUT1_L, DA7210_OUT1_L_EN);
1146 	snd_soc_write(codec, DA7210_OUT1_R, DA7210_OUT1_R_EN);
1147 	snd_soc_write(codec, DA7210_OUT2, DA7210_OUT2_EN |
1148 		     DA7210_OUT2_OUTMIX_L | DA7210_OUT2_OUTMIX_R);
1149 
1150 	/* Enable Aux1 */
1151 	snd_soc_write(codec, DA7210_AUX1_L, DA7210_AUX1_L_EN);
1152 	snd_soc_write(codec, DA7210_AUX1_R, DA7210_AUX1_R_EN);
1153 	/* Enable Aux2 */
1154 	snd_soc_write(codec, DA7210_AUX2, DA7210_AUX2_EN);
1155 
1156 	/* Set PLL Master clock range 10-20 MHz, enable PLL bypass */
1157 	snd_soc_write(codec, DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ |
1158 					      DA7210_PLL_BYP);
1159 
1160 	/* Diable PLL and bypass it */
1161 	snd_soc_write(codec, DA7210_PLL, DA7210_PLL_FS_48000);
1162 
1163 	/* Activate all enabled subsystem */
1164 	snd_soc_write(codec, DA7210_STARTUP1, DA7210_SC_MST_EN);
1165 
1166 	dev_info(codec->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
1167 
1168 	return 0;
1169 }
1170 
1171 static struct snd_soc_codec_driver soc_codec_dev_da7210 = {
1172 	.probe			= da7210_probe,
1173 
1174 	.controls		= da7210_snd_controls,
1175 	.num_controls		= ARRAY_SIZE(da7210_snd_controls),
1176 
1177 	.dapm_widgets		= da7210_dapm_widgets,
1178 	.num_dapm_widgets	= ARRAY_SIZE(da7210_dapm_widgets),
1179 	.dapm_routes		= da7210_audio_map,
1180 	.num_dapm_routes	= ARRAY_SIZE(da7210_audio_map),
1181 };
1182 
1183 #if IS_ENABLED(CONFIG_I2C)
1184 
1185 static struct reg_default da7210_regmap_i2c_patch[] = {
1186 
1187 	/* System controller master disable */
1188 	{ DA7210_STARTUP1, 0x00 },
1189 	/* Set PLL Master clock range 10-20 MHz */
1190 	{ DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ },
1191 
1192 	/* to unlock */
1193 	{ DA7210_A_HID_UNLOCK, 0x8B},
1194 	{ DA7210_A_TEST_UNLOCK, 0xB4},
1195 	{ DA7210_A_PLL1, 0x01},
1196 	{ DA7210_A_CP_MODE, 0x7C},
1197 	/* to re-lock */
1198 	{ DA7210_A_HID_UNLOCK, 0x00},
1199 	{ DA7210_A_TEST_UNLOCK, 0x00},
1200 };
1201 
1202 static const struct regmap_config da7210_regmap_config_i2c = {
1203 	.reg_bits = 8,
1204 	.val_bits = 8,
1205 
1206 	.reg_defaults = da7210_reg_defaults,
1207 	.num_reg_defaults = ARRAY_SIZE(da7210_reg_defaults),
1208 	.volatile_reg = da7210_volatile_register,
1209 	.readable_reg = da7210_readable_register,
1210 	.cache_type = REGCACHE_RBTREE,
1211 };
1212 
1213 static int da7210_i2c_probe(struct i2c_client *i2c,
1214 			    const struct i2c_device_id *id)
1215 {
1216 	struct da7210_priv *da7210;
1217 	int ret;
1218 
1219 	da7210 = devm_kzalloc(&i2c->dev, sizeof(struct da7210_priv),
1220 			      GFP_KERNEL);
1221 	if (!da7210)
1222 		return -ENOMEM;
1223 
1224 	i2c_set_clientdata(i2c, da7210);
1225 
1226 	da7210->regmap = devm_regmap_init_i2c(i2c, &da7210_regmap_config_i2c);
1227 	if (IS_ERR(da7210->regmap)) {
1228 		ret = PTR_ERR(da7210->regmap);
1229 		dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
1230 		return ret;
1231 	}
1232 
1233 	ret = regmap_register_patch(da7210->regmap, da7210_regmap_i2c_patch,
1234 				    ARRAY_SIZE(da7210_regmap_i2c_patch));
1235 	if (ret != 0)
1236 		dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1237 
1238 	ret =  snd_soc_register_codec(&i2c->dev,
1239 			&soc_codec_dev_da7210, &da7210_dai, 1);
1240 	if (ret < 0)
1241 		dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
1242 
1243 	return ret;
1244 }
1245 
1246 static int da7210_i2c_remove(struct i2c_client *client)
1247 {
1248 	snd_soc_unregister_codec(&client->dev);
1249 	return 0;
1250 }
1251 
1252 static const struct i2c_device_id da7210_i2c_id[] = {
1253 	{ "da7210", 0 },
1254 	{ }
1255 };
1256 MODULE_DEVICE_TABLE(i2c, da7210_i2c_id);
1257 
1258 /* I2C codec control layer */
1259 static struct i2c_driver da7210_i2c_driver = {
1260 	.driver = {
1261 		.name = "da7210",
1262 		.owner = THIS_MODULE,
1263 	},
1264 	.probe		= da7210_i2c_probe,
1265 	.remove		= da7210_i2c_remove,
1266 	.id_table	= da7210_i2c_id,
1267 };
1268 #endif
1269 
1270 #if defined(CONFIG_SPI_MASTER)
1271 
1272 static struct reg_default da7210_regmap_spi_patch[] = {
1273 	/* Dummy read to give two pulses over nCS for SPI */
1274 	{ DA7210_AUX2, 0x00 },
1275 	{ DA7210_AUX2, 0x00 },
1276 
1277 	/* System controller master disable */
1278 	{ DA7210_STARTUP1, 0x00 },
1279 	/* Set PLL Master clock range 10-20 MHz */
1280 	{ DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ },
1281 
1282 	/* to set PAGE1 of SPI register space */
1283 	{ DA7210_PAGE_CONTROL, 0x80 },
1284 	/* to unlock */
1285 	{ DA7210_A_HID_UNLOCK, 0x8B},
1286 	{ DA7210_A_TEST_UNLOCK, 0xB4},
1287 	{ DA7210_A_PLL1, 0x01},
1288 	{ DA7210_A_CP_MODE, 0x7C},
1289 	/* to re-lock */
1290 	{ DA7210_A_HID_UNLOCK, 0x00},
1291 	{ DA7210_A_TEST_UNLOCK, 0x00},
1292 	/* to set back PAGE0 of SPI register space */
1293 	{ DA7210_PAGE_CONTROL, 0x00 },
1294 };
1295 
1296 static const struct regmap_config da7210_regmap_config_spi = {
1297 	.reg_bits = 8,
1298 	.val_bits = 8,
1299 	.read_flag_mask = 0x01,
1300 	.write_flag_mask = 0x00,
1301 
1302 	.reg_defaults = da7210_reg_defaults,
1303 	.num_reg_defaults = ARRAY_SIZE(da7210_reg_defaults),
1304 	.volatile_reg = da7210_volatile_register,
1305 	.readable_reg = da7210_readable_register,
1306 	.cache_type = REGCACHE_RBTREE,
1307 };
1308 
1309 static int da7210_spi_probe(struct spi_device *spi)
1310 {
1311 	struct da7210_priv *da7210;
1312 	int ret;
1313 
1314 	da7210 = devm_kzalloc(&spi->dev, sizeof(struct da7210_priv),
1315 			      GFP_KERNEL);
1316 	if (!da7210)
1317 		return -ENOMEM;
1318 
1319 	spi_set_drvdata(spi, da7210);
1320 	da7210->regmap = devm_regmap_init_spi(spi, &da7210_regmap_config_spi);
1321 	if (IS_ERR(da7210->regmap)) {
1322 		ret = PTR_ERR(da7210->regmap);
1323 		dev_err(&spi->dev, "Failed to register regmap: %d\n", ret);
1324 		return ret;
1325 	}
1326 
1327 	ret = regmap_register_patch(da7210->regmap, da7210_regmap_spi_patch,
1328 				    ARRAY_SIZE(da7210_regmap_spi_patch));
1329 	if (ret != 0)
1330 		dev_warn(&spi->dev, "Failed to apply regmap patch: %d\n", ret);
1331 
1332 	ret = snd_soc_register_codec(&spi->dev,
1333 			&soc_codec_dev_da7210, &da7210_dai, 1);
1334 
1335 	return ret;
1336 }
1337 
1338 static int da7210_spi_remove(struct spi_device *spi)
1339 {
1340 	snd_soc_unregister_codec(&spi->dev);
1341 	return 0;
1342 }
1343 
1344 static struct spi_driver da7210_spi_driver = {
1345 	.driver = {
1346 		.name = "da7210",
1347 		.owner = THIS_MODULE,
1348 	},
1349 	.probe = da7210_spi_probe,
1350 	.remove = da7210_spi_remove
1351 };
1352 #endif
1353 
1354 static int __init da7210_modinit(void)
1355 {
1356 	int ret = 0;
1357 #if IS_ENABLED(CONFIG_I2C)
1358 	ret = i2c_add_driver(&da7210_i2c_driver);
1359 #endif
1360 #if defined(CONFIG_SPI_MASTER)
1361 	ret = spi_register_driver(&da7210_spi_driver);
1362 	if (ret) {
1363 		printk(KERN_ERR "Failed to register da7210 SPI driver: %d\n",
1364 		       ret);
1365 	}
1366 #endif
1367 	return ret;
1368 }
1369 module_init(da7210_modinit);
1370 
1371 static void __exit da7210_exit(void)
1372 {
1373 #if IS_ENABLED(CONFIG_I2C)
1374 	i2c_del_driver(&da7210_i2c_driver);
1375 #endif
1376 #if defined(CONFIG_SPI_MASTER)
1377 	spi_unregister_driver(&da7210_spi_driver);
1378 #endif
1379 }
1380 module_exit(da7210_exit);
1381 
1382 MODULE_DESCRIPTION("ASoC DA7210 driver");
1383 MODULE_AUTHOR("David Chen, Kuninori Morimoto");
1384 MODULE_LICENSE("GPL");
1385