1 /* 2 * DA7210 ALSA Soc codec driver 3 * 4 * Copyright (c) 2009 Dialog Semiconductor 5 * Written by David Chen <Dajun.chen@diasemi.com> 6 * 7 * Copyright (C) 2009 Renesas Solutions Corp. 8 * Cleanups by Kuninori Morimoto <morimoto.kuninori@renesas.com> 9 * 10 * Tested on SuperH Ecovec24 board with S16/S24 LE in 48KHz using I2S 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 */ 17 18 #include <linux/delay.h> 19 #include <linux/i2c.h> 20 #include <linux/spi/spi.h> 21 #include <linux/regmap.h> 22 #include <linux/slab.h> 23 #include <linux/module.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/soc.h> 27 #include <sound/initval.h> 28 #include <sound/tlv.h> 29 30 /* DA7210 register space */ 31 #define DA7210_PAGE_CONTROL 0x00 32 #define DA7210_CONTROL 0x01 33 #define DA7210_STATUS 0x02 34 #define DA7210_STARTUP1 0x03 35 #define DA7210_STARTUP2 0x04 36 #define DA7210_STARTUP3 0x05 37 #define DA7210_MIC_L 0x07 38 #define DA7210_MIC_R 0x08 39 #define DA7210_AUX1_L 0x09 40 #define DA7210_AUX1_R 0x0A 41 #define DA7210_AUX2 0x0B 42 #define DA7210_IN_GAIN 0x0C 43 #define DA7210_INMIX_L 0x0D 44 #define DA7210_INMIX_R 0x0E 45 #define DA7210_ADC_HPF 0x0F 46 #define DA7210_ADC 0x10 47 #define DA7210_ADC_EQ1_2 0X11 48 #define DA7210_ADC_EQ3_4 0x12 49 #define DA7210_ADC_EQ5 0x13 50 #define DA7210_DAC_HPF 0x14 51 #define DA7210_DAC_L 0x15 52 #define DA7210_DAC_R 0x16 53 #define DA7210_DAC_SEL 0x17 54 #define DA7210_SOFTMUTE 0x18 55 #define DA7210_DAC_EQ1_2 0x19 56 #define DA7210_DAC_EQ3_4 0x1A 57 #define DA7210_DAC_EQ5 0x1B 58 #define DA7210_OUTMIX_L 0x1C 59 #define DA7210_OUTMIX_R 0x1D 60 #define DA7210_OUT1_L 0x1E 61 #define DA7210_OUT1_R 0x1F 62 #define DA7210_OUT2 0x20 63 #define DA7210_HP_L_VOL 0x21 64 #define DA7210_HP_R_VOL 0x22 65 #define DA7210_HP_CFG 0x23 66 #define DA7210_ZERO_CROSS 0x24 67 #define DA7210_DAI_SRC_SEL 0x25 68 #define DA7210_DAI_CFG1 0x26 69 #define DA7210_DAI_CFG3 0x28 70 #define DA7210_PLL_DIV1 0x29 71 #define DA7210_PLL_DIV2 0x2A 72 #define DA7210_PLL_DIV3 0x2B 73 #define DA7210_PLL 0x2C 74 #define DA7210_ALC_MAX 0x83 75 #define DA7210_ALC_MIN 0x84 76 #define DA7210_ALC_NOIS 0x85 77 #define DA7210_ALC_ATT 0x86 78 #define DA7210_ALC_REL 0x87 79 #define DA7210_ALC_DEL 0x88 80 #define DA7210_A_HID_UNLOCK 0x8A 81 #define DA7210_A_TEST_UNLOCK 0x8B 82 #define DA7210_A_PLL1 0x90 83 #define DA7210_A_CP_MODE 0xA7 84 85 /* STARTUP1 bit fields */ 86 #define DA7210_SC_MST_EN (1 << 0) 87 88 /* MIC_L bit fields */ 89 #define DA7210_MICBIAS_EN (1 << 6) 90 #define DA7210_MIC_L_EN (1 << 7) 91 92 /* MIC_R bit fields */ 93 #define DA7210_MIC_R_EN (1 << 7) 94 95 /* INMIX_L bit fields */ 96 #define DA7210_IN_L_EN (1 << 7) 97 98 /* INMIX_R bit fields */ 99 #define DA7210_IN_R_EN (1 << 7) 100 101 /* ADC bit fields */ 102 #define DA7210_ADC_ALC_EN (1 << 0) 103 #define DA7210_ADC_L_EN (1 << 3) 104 #define DA7210_ADC_R_EN (1 << 7) 105 106 /* DAC/ADC HPF fields */ 107 #define DA7210_VOICE_F0_MASK (0x7 << 4) 108 #define DA7210_VOICE_F0_25 (1 << 4) 109 #define DA7210_VOICE_EN (1 << 7) 110 111 /* DAC_SEL bit fields */ 112 #define DA7210_DAC_L_SRC_DAI_L (4 << 0) 113 #define DA7210_DAC_L_EN (1 << 3) 114 #define DA7210_DAC_R_SRC_DAI_R (5 << 4) 115 #define DA7210_DAC_R_EN (1 << 7) 116 117 /* OUTMIX_L bit fields */ 118 #define DA7210_OUT_L_EN (1 << 7) 119 120 /* OUTMIX_R bit fields */ 121 #define DA7210_OUT_R_EN (1 << 7) 122 123 /* HP_CFG bit fields */ 124 #define DA7210_HP_2CAP_MODE (1 << 1) 125 #define DA7210_HP_SENSE_EN (1 << 2) 126 #define DA7210_HP_L_EN (1 << 3) 127 #define DA7210_HP_MODE (1 << 6) 128 #define DA7210_HP_R_EN (1 << 7) 129 130 /* DAI_SRC_SEL bit fields */ 131 #define DA7210_DAI_OUT_L_SRC (6 << 0) 132 #define DA7210_DAI_OUT_R_SRC (7 << 4) 133 134 /* DAI_CFG1 bit fields */ 135 #define DA7210_DAI_WORD_S16_LE (0 << 0) 136 #define DA7210_DAI_WORD_S20_3LE (1 << 0) 137 #define DA7210_DAI_WORD_S24_LE (2 << 0) 138 #define DA7210_DAI_WORD_S32_LE (3 << 0) 139 #define DA7210_DAI_FLEN_64BIT (1 << 2) 140 #define DA7210_DAI_MODE_SLAVE (0 << 7) 141 #define DA7210_DAI_MODE_MASTER (1 << 7) 142 143 /* DAI_CFG3 bit fields */ 144 #define DA7210_DAI_FORMAT_I2SMODE (0 << 0) 145 #define DA7210_DAI_FORMAT_LEFT_J (1 << 0) 146 #define DA7210_DAI_FORMAT_RIGHT_J (2 << 0) 147 #define DA7210_DAI_OE (1 << 3) 148 #define DA7210_DAI_EN (1 << 7) 149 150 /*PLL_DIV3 bit fields */ 151 #define DA7210_PLL_DIV_L_MASK (0xF << 0) 152 #define DA7210_MCLK_RANGE_10_20_MHZ (1 << 4) 153 #define DA7210_PLL_BYP (1 << 6) 154 155 /* PLL bit fields */ 156 #define DA7210_PLL_FS_MASK (0xF << 0) 157 #define DA7210_PLL_FS_8000 (0x1 << 0) 158 #define DA7210_PLL_FS_11025 (0x2 << 0) 159 #define DA7210_PLL_FS_12000 (0x3 << 0) 160 #define DA7210_PLL_FS_16000 (0x5 << 0) 161 #define DA7210_PLL_FS_22050 (0x6 << 0) 162 #define DA7210_PLL_FS_24000 (0x7 << 0) 163 #define DA7210_PLL_FS_32000 (0x9 << 0) 164 #define DA7210_PLL_FS_44100 (0xA << 0) 165 #define DA7210_PLL_FS_48000 (0xB << 0) 166 #define DA7210_PLL_FS_88200 (0xE << 0) 167 #define DA7210_PLL_FS_96000 (0xF << 0) 168 #define DA7210_MCLK_DET_EN (0x1 << 5) 169 #define DA7210_MCLK_SRM_EN (0x1 << 6) 170 #define DA7210_PLL_EN (0x1 << 7) 171 172 /* SOFTMUTE bit fields */ 173 #define DA7210_RAMP_EN (1 << 6) 174 175 /* CONTROL bit fields */ 176 #define DA7210_REG_EN (1 << 0) 177 #define DA7210_BIAS_EN (1 << 2) 178 #define DA7210_NOISE_SUP_EN (1 << 3) 179 180 /* IN_GAIN bit fields */ 181 #define DA7210_INPGA_L_VOL (0x0F << 0) 182 #define DA7210_INPGA_R_VOL (0xF0 << 0) 183 184 /* ZERO_CROSS bit fields */ 185 #define DA7210_AUX1_L_ZC (1 << 0) 186 #define DA7210_AUX1_R_ZC (1 << 1) 187 #define DA7210_HP_L_ZC (1 << 6) 188 #define DA7210_HP_R_ZC (1 << 7) 189 190 /* AUX1_L bit fields */ 191 #define DA7210_AUX1_L_VOL (0x3F << 0) 192 #define DA7210_AUX1_L_EN (1 << 7) 193 194 /* AUX1_R bit fields */ 195 #define DA7210_AUX1_R_VOL (0x3F << 0) 196 #define DA7210_AUX1_R_EN (1 << 7) 197 198 /* AUX2 bit fields */ 199 #define DA7210_AUX2_EN (1 << 3) 200 201 /* Minimum INPGA and AUX1 volume to enable noise suppression */ 202 #define DA7210_INPGA_MIN_VOL_NS 0x0A /* 10.5dB */ 203 #define DA7210_AUX1_MIN_VOL_NS 0x35 /* 6dB */ 204 205 /* OUT1_L bit fields */ 206 #define DA7210_OUT1_L_EN (1 << 7) 207 208 /* OUT1_R bit fields */ 209 #define DA7210_OUT1_R_EN (1 << 7) 210 211 /* OUT2 bit fields */ 212 #define DA7210_OUT2_OUTMIX_R (1 << 5) 213 #define DA7210_OUT2_OUTMIX_L (1 << 6) 214 #define DA7210_OUT2_EN (1 << 7) 215 216 struct pll_div { 217 int fref; 218 int fout; 219 u8 div1; 220 u8 div2; 221 u8 div3; 222 u8 mode; /* 0 = slave, 1 = master */ 223 }; 224 225 /* PLL dividers table */ 226 static const struct pll_div da7210_pll_div[] = { 227 /* for MASTER mode, fs = 44.1Khz */ 228 { 12000000, 2822400, 0xE8, 0x6C, 0x2, 1}, /* MCLK=12Mhz */ 229 { 13000000, 2822400, 0xDF, 0x28, 0xC, 1}, /* MCLK=13Mhz */ 230 { 13500000, 2822400, 0xDB, 0x0A, 0xD, 1}, /* MCLK=13.5Mhz */ 231 { 14400000, 2822400, 0xD4, 0x5A, 0x2, 1}, /* MCLK=14.4Mhz */ 232 { 19200000, 2822400, 0xBB, 0x43, 0x9, 1}, /* MCLK=19.2Mhz */ 233 { 19680000, 2822400, 0xB9, 0x6D, 0xA, 1}, /* MCLK=19.68Mhz */ 234 { 19800000, 2822400, 0xB8, 0xFB, 0xB, 1}, /* MCLK=19.8Mhz */ 235 /* for MASTER mode, fs = 48Khz */ 236 { 12000000, 3072000, 0xF3, 0x12, 0x7, 1}, /* MCLK=12Mhz */ 237 { 13000000, 3072000, 0xE8, 0xFD, 0x5, 1}, /* MCLK=13Mhz */ 238 { 13500000, 3072000, 0xE4, 0x82, 0x3, 1}, /* MCLK=13.5Mhz */ 239 { 14400000, 3072000, 0xDD, 0x3A, 0x0, 1}, /* MCLK=14.4Mhz */ 240 { 19200000, 3072000, 0xC1, 0xEB, 0x8, 1}, /* MCLK=19.2Mhz */ 241 { 19680000, 3072000, 0xBF, 0xEC, 0x0, 1}, /* MCLK=19.68Mhz */ 242 { 19800000, 3072000, 0xBF, 0x70, 0x0, 1}, /* MCLK=19.8Mhz */ 243 /* for SLAVE mode with SRM */ 244 { 12000000, 2822400, 0xED, 0xBF, 0x5, 0}, /* MCLK=12Mhz */ 245 { 13000000, 2822400, 0xE4, 0x13, 0x0, 0}, /* MCLK=13Mhz */ 246 { 13500000, 2822400, 0xDF, 0xC6, 0x8, 0}, /* MCLK=13.5Mhz */ 247 { 14400000, 2822400, 0xD8, 0xCA, 0x1, 0}, /* MCLK=14.4Mhz */ 248 { 19200000, 2822400, 0xBE, 0x97, 0x9, 0}, /* MCLK=19.2Mhz */ 249 { 19680000, 2822400, 0xBC, 0xAC, 0xD, 0}, /* MCLK=19.68Mhz */ 250 { 19800000, 2822400, 0xBC, 0x35, 0xE, 0}, /* MCLK=19.8Mhz */ 251 }; 252 253 enum clk_src { 254 DA7210_CLKSRC_MCLK 255 }; 256 257 #define DA7210_VERSION "0.0.1" 258 259 /* 260 * Playback Volume 261 * 262 * max : 0x3F (+15.0 dB) 263 * (1.5 dB step) 264 * min : 0x11 (-54.0 dB) 265 * mute : 0x10 266 * reserved : 0x00 - 0x0F 267 * 268 * Reserved area are considered as "mute". 269 */ 270 static const DECLARE_TLV_DB_RANGE(hp_out_tlv, 271 0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 272 /* -54 dB to +15 dB */ 273 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0) 274 ); 275 276 static const DECLARE_TLV_DB_RANGE(lineout_vol_tlv, 277 0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 278 /* -54dB to 15dB */ 279 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0) 280 ); 281 282 static const DECLARE_TLV_DB_RANGE(mono_vol_tlv, 283 0x0, 0x2, TLV_DB_SCALE_ITEM(-1800, 0, 1), 284 /* -18dB to 6dB */ 285 0x3, 0x7, TLV_DB_SCALE_ITEM(-1800, 600, 0) 286 ); 287 288 static const DECLARE_TLV_DB_RANGE(aux1_vol_tlv, 289 0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1), 290 /* -48dB to 21dB */ 291 0x11, 0x3f, TLV_DB_SCALE_ITEM(-4800, 150, 0) 292 ); 293 294 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0); 295 static const DECLARE_TLV_DB_SCALE(adc_eq_master_gain_tlv, -1800, 600, 1); 296 static const DECLARE_TLV_DB_SCALE(dac_gain_tlv, -7725, 75, 0); 297 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0); 298 static const DECLARE_TLV_DB_SCALE(aux2_vol_tlv, -600, 600, 0); 299 static const DECLARE_TLV_DB_SCALE(inpga_gain_tlv, -450, 150, 0); 300 301 /* ADC and DAC high pass filter f0 value */ 302 static const char * const da7210_hpf_cutoff_txt[] = { 303 "Fs/8192*pi", "Fs/4096*pi", "Fs/2048*pi", "Fs/1024*pi" 304 }; 305 306 static SOC_ENUM_SINGLE_DECL(da7210_dac_hpf_cutoff, 307 DA7210_DAC_HPF, 0, da7210_hpf_cutoff_txt); 308 309 static SOC_ENUM_SINGLE_DECL(da7210_adc_hpf_cutoff, 310 DA7210_ADC_HPF, 0, da7210_hpf_cutoff_txt); 311 312 /* ADC and DAC voice (8kHz) high pass cutoff value */ 313 static const char * const da7210_vf_cutoff_txt[] = { 314 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" 315 }; 316 317 static SOC_ENUM_SINGLE_DECL(da7210_dac_vf_cutoff, 318 DA7210_DAC_HPF, 4, da7210_vf_cutoff_txt); 319 320 static SOC_ENUM_SINGLE_DECL(da7210_adc_vf_cutoff, 321 DA7210_ADC_HPF, 4, da7210_vf_cutoff_txt); 322 323 static const char *da7210_hp_mode_txt[] = { 324 "Class H", "Class G" 325 }; 326 327 static SOC_ENUM_SINGLE_DECL(da7210_hp_mode_sel, 328 DA7210_HP_CFG, 0, da7210_hp_mode_txt); 329 330 /* ALC can be enabled only if noise suppression is disabled */ 331 static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol, 332 struct snd_ctl_elem_value *ucontrol) 333 { 334 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 335 336 if (ucontrol->value.integer.value[0]) { 337 /* Check if noise suppression is enabled */ 338 if (snd_soc_read(codec, DA7210_CONTROL) & DA7210_NOISE_SUP_EN) { 339 dev_dbg(codec->dev, 340 "Disable noise suppression to enable ALC\n"); 341 return -EINVAL; 342 } 343 } 344 /* If all conditions are met or we are actually disabling ALC */ 345 return snd_soc_put_volsw(kcontrol, ucontrol); 346 } 347 348 /* Noise suppression can be enabled only if following conditions are met 349 * ALC disabled 350 * ZC enabled for HP and AUX1 PGA 351 * INPGA_L_VOL and INPGA_R_VOL >= 10.5 dB 352 * AUX1_L_VOL and AUX1_R_VOL >= 6 dB 353 */ 354 static int da7210_put_noise_sup_sw(struct snd_kcontrol *kcontrol, 355 struct snd_ctl_elem_value *ucontrol) 356 { 357 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 358 u8 val; 359 360 if (ucontrol->value.integer.value[0]) { 361 /* Check if ALC is enabled */ 362 if (snd_soc_read(codec, DA7210_ADC) & DA7210_ADC_ALC_EN) 363 goto err; 364 365 /* Check ZC for HP and AUX1 PGA */ 366 if ((snd_soc_read(codec, DA7210_ZERO_CROSS) & 367 (DA7210_AUX1_L_ZC | DA7210_AUX1_R_ZC | DA7210_HP_L_ZC | 368 DA7210_HP_R_ZC)) != (DA7210_AUX1_L_ZC | 369 DA7210_AUX1_R_ZC | DA7210_HP_L_ZC | DA7210_HP_R_ZC)) 370 goto err; 371 372 /* Check INPGA_L_VOL and INPGA_R_VOL */ 373 val = snd_soc_read(codec, DA7210_IN_GAIN); 374 if (((val & DA7210_INPGA_L_VOL) < DA7210_INPGA_MIN_VOL_NS) || 375 (((val & DA7210_INPGA_R_VOL) >> 4) < 376 DA7210_INPGA_MIN_VOL_NS)) 377 goto err; 378 379 /* Check AUX1_L_VOL and AUX1_R_VOL */ 380 if (((snd_soc_read(codec, DA7210_AUX1_L) & DA7210_AUX1_L_VOL) < 381 DA7210_AUX1_MIN_VOL_NS) || 382 ((snd_soc_read(codec, DA7210_AUX1_R) & DA7210_AUX1_R_VOL) < 383 DA7210_AUX1_MIN_VOL_NS)) 384 goto err; 385 } 386 /* If all conditions are met or we are actually disabling Noise sup */ 387 return snd_soc_put_volsw(kcontrol, ucontrol); 388 389 err: 390 return -EINVAL; 391 } 392 393 static const struct snd_kcontrol_new da7210_snd_controls[] = { 394 395 SOC_DOUBLE_R_TLV("HeadPhone Playback Volume", 396 DA7210_HP_L_VOL, DA7210_HP_R_VOL, 397 0, 0x3F, 0, hp_out_tlv), 398 SOC_DOUBLE_R_TLV("Digital Playback Volume", 399 DA7210_DAC_L, DA7210_DAC_R, 400 0, 0x77, 1, dac_gain_tlv), 401 SOC_DOUBLE_R_TLV("Lineout Playback Volume", 402 DA7210_OUT1_L, DA7210_OUT1_R, 403 0, 0x3f, 0, lineout_vol_tlv), 404 SOC_SINGLE_TLV("Mono Playback Volume", DA7210_OUT2, 0, 0x7, 0, 405 mono_vol_tlv), 406 407 SOC_DOUBLE_R_TLV("Mic Capture Volume", 408 DA7210_MIC_L, DA7210_MIC_R, 409 0, 0x5, 0, mic_vol_tlv), 410 SOC_DOUBLE_R_TLV("Aux1 Capture Volume", 411 DA7210_AUX1_L, DA7210_AUX1_R, 412 0, 0x3f, 0, aux1_vol_tlv), 413 SOC_SINGLE_TLV("Aux2 Capture Volume", DA7210_AUX2, 0, 0x3, 0, 414 aux2_vol_tlv), 415 SOC_DOUBLE_TLV("In PGA Capture Volume", DA7210_IN_GAIN, 0, 4, 0xF, 0, 416 inpga_gain_tlv), 417 418 /* DAC Equalizer controls */ 419 SOC_SINGLE("DAC EQ Switch", DA7210_DAC_EQ5, 7, 1, 0), 420 SOC_SINGLE_TLV("DAC EQ1 Volume", DA7210_DAC_EQ1_2, 0, 0xf, 1, 421 eq_gain_tlv), 422 SOC_SINGLE_TLV("DAC EQ2 Volume", DA7210_DAC_EQ1_2, 4, 0xf, 1, 423 eq_gain_tlv), 424 SOC_SINGLE_TLV("DAC EQ3 Volume", DA7210_DAC_EQ3_4, 0, 0xf, 1, 425 eq_gain_tlv), 426 SOC_SINGLE_TLV("DAC EQ4 Volume", DA7210_DAC_EQ3_4, 4, 0xf, 1, 427 eq_gain_tlv), 428 SOC_SINGLE_TLV("DAC EQ5 Volume", DA7210_DAC_EQ5, 0, 0xf, 1, 429 eq_gain_tlv), 430 431 /* ADC Equalizer controls */ 432 SOC_SINGLE("ADC EQ Switch", DA7210_ADC_EQ5, 7, 1, 0), 433 SOC_SINGLE_TLV("ADC EQ Master Volume", DA7210_ADC_EQ5, 4, 0x3, 434 1, adc_eq_master_gain_tlv), 435 SOC_SINGLE_TLV("ADC EQ1 Volume", DA7210_ADC_EQ1_2, 0, 0xf, 1, 436 eq_gain_tlv), 437 SOC_SINGLE_TLV("ADC EQ2 Volume", DA7210_ADC_EQ1_2, 4, 0xf, 1, 438 eq_gain_tlv), 439 SOC_SINGLE_TLV("ADC EQ3 Volume", DA7210_ADC_EQ3_4, 0, 0xf, 1, 440 eq_gain_tlv), 441 SOC_SINGLE_TLV("ADC EQ4 Volume", DA7210_ADC_EQ3_4, 4, 0xf, 1, 442 eq_gain_tlv), 443 SOC_SINGLE_TLV("ADC EQ5 Volume", DA7210_ADC_EQ5, 0, 0xf, 1, 444 eq_gain_tlv), 445 446 SOC_SINGLE("DAC HPF Switch", DA7210_DAC_HPF, 3, 1, 0), 447 SOC_ENUM("DAC HPF Cutoff", da7210_dac_hpf_cutoff), 448 SOC_SINGLE("DAC Voice Mode Switch", DA7210_DAC_HPF, 7, 1, 0), 449 SOC_ENUM("DAC Voice Cutoff", da7210_dac_vf_cutoff), 450 451 SOC_SINGLE("ADC HPF Switch", DA7210_ADC_HPF, 3, 1, 0), 452 SOC_ENUM("ADC HPF Cutoff", da7210_adc_hpf_cutoff), 453 SOC_SINGLE("ADC Voice Mode Switch", DA7210_ADC_HPF, 7, 1, 0), 454 SOC_ENUM("ADC Voice Cutoff", da7210_adc_vf_cutoff), 455 456 /* Mute controls */ 457 SOC_DOUBLE_R("Mic Capture Switch", DA7210_MIC_L, DA7210_MIC_R, 3, 1, 0), 458 SOC_SINGLE("Aux2 Capture Switch", DA7210_AUX2, 2, 1, 0), 459 SOC_DOUBLE("ADC Capture Switch", DA7210_ADC, 2, 6, 1, 0), 460 SOC_SINGLE("Digital Soft Mute Switch", DA7210_SOFTMUTE, 7, 1, 0), 461 SOC_SINGLE("Digital Soft Mute Rate", DA7210_SOFTMUTE, 0, 0x7, 0), 462 463 /* Zero cross controls */ 464 SOC_DOUBLE("Aux1 ZC Switch", DA7210_ZERO_CROSS, 0, 1, 1, 0), 465 SOC_DOUBLE("In PGA ZC Switch", DA7210_ZERO_CROSS, 2, 3, 1, 0), 466 SOC_DOUBLE("Lineout ZC Switch", DA7210_ZERO_CROSS, 4, 5, 1, 0), 467 SOC_DOUBLE("Headphone ZC Switch", DA7210_ZERO_CROSS, 6, 7, 1, 0), 468 469 SOC_ENUM("Headphone Class", da7210_hp_mode_sel), 470 471 /* ALC controls */ 472 SOC_SINGLE_EXT("ALC Enable Switch", DA7210_ADC, 0, 1, 0, 473 snd_soc_get_volsw, da7210_put_alc_sw), 474 SOC_SINGLE("ALC Capture Max Volume", DA7210_ALC_MAX, 0, 0x3F, 0), 475 SOC_SINGLE("ALC Capture Min Volume", DA7210_ALC_MIN, 0, 0x3F, 0), 476 SOC_SINGLE("ALC Capture Noise Volume", DA7210_ALC_NOIS, 0, 0x3F, 0), 477 SOC_SINGLE("ALC Capture Attack Rate", DA7210_ALC_ATT, 0, 0xFF, 0), 478 SOC_SINGLE("ALC Capture Release Rate", DA7210_ALC_REL, 0, 0xFF, 0), 479 SOC_SINGLE("ALC Capture Release Delay", DA7210_ALC_DEL, 0, 0xFF, 0), 480 481 SOC_SINGLE_EXT("Noise Suppression Enable Switch", DA7210_CONTROL, 3, 1, 482 0, snd_soc_get_volsw, da7210_put_noise_sup_sw), 483 }; 484 485 /* 486 * DAPM Controls 487 * 488 * Current DAPM implementation covers almost all codec components e.g. IOs, 489 * mixers, PGAs,ADC and DAC. 490 */ 491 /* In Mixer Left */ 492 static const struct snd_kcontrol_new da7210_dapm_inmixl_controls[] = { 493 SOC_DAPM_SINGLE("Mic Left Switch", DA7210_INMIX_L, 0, 1, 0), 494 SOC_DAPM_SINGLE("Mic Right Switch", DA7210_INMIX_L, 1, 1, 0), 495 SOC_DAPM_SINGLE("Aux1 Left Switch", DA7210_INMIX_L, 2, 1, 0), 496 SOC_DAPM_SINGLE("Aux2 Switch", DA7210_INMIX_L, 3, 1, 0), 497 SOC_DAPM_SINGLE("Outmix Left Switch", DA7210_INMIX_L, 4, 1, 0), 498 }; 499 500 /* In Mixer Right */ 501 static const struct snd_kcontrol_new da7210_dapm_inmixr_controls[] = { 502 SOC_DAPM_SINGLE("Mic Right Switch", DA7210_INMIX_R, 0, 1, 0), 503 SOC_DAPM_SINGLE("Mic Left Switch", DA7210_INMIX_R, 1, 1, 0), 504 SOC_DAPM_SINGLE("Aux1 Right Switch", DA7210_INMIX_R, 2, 1, 0), 505 SOC_DAPM_SINGLE("Aux2 Switch", DA7210_INMIX_R, 3, 1, 0), 506 SOC_DAPM_SINGLE("Outmix Right Switch", DA7210_INMIX_R, 4, 1, 0), 507 }; 508 509 /* Out Mixer Left */ 510 static const struct snd_kcontrol_new da7210_dapm_outmixl_controls[] = { 511 SOC_DAPM_SINGLE("Aux1 Left Switch", DA7210_OUTMIX_L, 0, 1, 0), 512 SOC_DAPM_SINGLE("Aux2 Switch", DA7210_OUTMIX_L, 1, 1, 0), 513 SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUTMIX_L, 2, 1, 0), 514 SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUTMIX_L, 3, 1, 0), 515 SOC_DAPM_SINGLE("DAC Left Switch", DA7210_OUTMIX_L, 4, 1, 0), 516 }; 517 518 /* Out Mixer Right */ 519 static const struct snd_kcontrol_new da7210_dapm_outmixr_controls[] = { 520 SOC_DAPM_SINGLE("Aux1 Right Switch", DA7210_OUTMIX_R, 0, 1, 0), 521 SOC_DAPM_SINGLE("Aux2 Switch", DA7210_OUTMIX_R, 1, 1, 0), 522 SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUTMIX_R, 2, 1, 0), 523 SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUTMIX_R, 3, 1, 0), 524 SOC_DAPM_SINGLE("DAC Right Switch", DA7210_OUTMIX_R, 4, 1, 0), 525 }; 526 527 /* Mono Mixer */ 528 static const struct snd_kcontrol_new da7210_dapm_monomix_controls[] = { 529 SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUT2, 3, 1, 0), 530 SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUT2, 4, 1, 0), 531 SOC_DAPM_SINGLE("Outmix Right Switch", DA7210_OUT2, 5, 1, 0), 532 SOC_DAPM_SINGLE("Outmix Left Switch", DA7210_OUT2, 6, 1, 0), 533 }; 534 535 /* DAPM widgets */ 536 static const struct snd_soc_dapm_widget da7210_dapm_widgets[] = { 537 /* Input Side */ 538 /* Input Lines */ 539 SND_SOC_DAPM_INPUT("MICL"), 540 SND_SOC_DAPM_INPUT("MICR"), 541 SND_SOC_DAPM_INPUT("AUX1L"), 542 SND_SOC_DAPM_INPUT("AUX1R"), 543 SND_SOC_DAPM_INPUT("AUX2"), 544 545 /* Input PGAs */ 546 SND_SOC_DAPM_PGA("Mic Left", DA7210_STARTUP3, 0, 1, NULL, 0), 547 SND_SOC_DAPM_PGA("Mic Right", DA7210_STARTUP3, 1, 1, NULL, 0), 548 SND_SOC_DAPM_PGA("Aux1 Left", DA7210_STARTUP3, 2, 1, NULL, 0), 549 SND_SOC_DAPM_PGA("Aux1 Right", DA7210_STARTUP3, 3, 1, NULL, 0), 550 SND_SOC_DAPM_PGA("Aux2 Mono", DA7210_STARTUP3, 4, 1, NULL, 0), 551 552 SND_SOC_DAPM_PGA("INPGA Left", DA7210_INMIX_L, 7, 0, NULL, 0), 553 SND_SOC_DAPM_PGA("INPGA Right", DA7210_INMIX_R, 7, 0, NULL, 0), 554 555 /* MICBIAS */ 556 SND_SOC_DAPM_SUPPLY("Mic Bias", DA7210_MIC_L, 6, 0, NULL, 0), 557 558 /* Input Mixers */ 559 SND_SOC_DAPM_MIXER("In Mixer Left", SND_SOC_NOPM, 0, 0, 560 &da7210_dapm_inmixl_controls[0], 561 ARRAY_SIZE(da7210_dapm_inmixl_controls)), 562 563 SND_SOC_DAPM_MIXER("In Mixer Right", SND_SOC_NOPM, 0, 0, 564 &da7210_dapm_inmixr_controls[0], 565 ARRAY_SIZE(da7210_dapm_inmixr_controls)), 566 567 /* ADCs */ 568 SND_SOC_DAPM_ADC("ADC Left", "Capture", DA7210_STARTUP3, 5, 1), 569 SND_SOC_DAPM_ADC("ADC Right", "Capture", DA7210_STARTUP3, 6, 1), 570 571 /* Output Side */ 572 /* DACs */ 573 SND_SOC_DAPM_DAC("DAC Left", "Playback", DA7210_STARTUP2, 5, 1), 574 SND_SOC_DAPM_DAC("DAC Right", "Playback", DA7210_STARTUP2, 6, 1), 575 576 /* Output Mixers */ 577 SND_SOC_DAPM_MIXER("Out Mixer Left", SND_SOC_NOPM, 0, 0, 578 &da7210_dapm_outmixl_controls[0], 579 ARRAY_SIZE(da7210_dapm_outmixl_controls)), 580 581 SND_SOC_DAPM_MIXER("Out Mixer Right", SND_SOC_NOPM, 0, 0, 582 &da7210_dapm_outmixr_controls[0], 583 ARRAY_SIZE(da7210_dapm_outmixr_controls)), 584 585 SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0, 586 &da7210_dapm_monomix_controls[0], 587 ARRAY_SIZE(da7210_dapm_monomix_controls)), 588 589 /* Output PGAs */ 590 SND_SOC_DAPM_PGA("OUTPGA Left Enable", DA7210_OUTMIX_L, 7, 0, NULL, 0), 591 SND_SOC_DAPM_PGA("OUTPGA Right Enable", DA7210_OUTMIX_R, 7, 0, NULL, 0), 592 593 SND_SOC_DAPM_PGA("Out1 Left", DA7210_STARTUP2, 0, 1, NULL, 0), 594 SND_SOC_DAPM_PGA("Out1 Right", DA7210_STARTUP2, 1, 1, NULL, 0), 595 SND_SOC_DAPM_PGA("Out2 Mono", DA7210_STARTUP2, 2, 1, NULL, 0), 596 SND_SOC_DAPM_PGA("Headphone Left", DA7210_STARTUP2, 3, 1, NULL, 0), 597 SND_SOC_DAPM_PGA("Headphone Right", DA7210_STARTUP2, 4, 1, NULL, 0), 598 599 /* Output Lines */ 600 SND_SOC_DAPM_OUTPUT("OUT1L"), 601 SND_SOC_DAPM_OUTPUT("OUT1R"), 602 SND_SOC_DAPM_OUTPUT("HPL"), 603 SND_SOC_DAPM_OUTPUT("HPR"), 604 SND_SOC_DAPM_OUTPUT("OUT2"), 605 }; 606 607 /* DAPM audio route definition */ 608 static const struct snd_soc_dapm_route da7210_audio_map[] = { 609 /* Dest Connecting Widget source */ 610 /* Input path */ 611 {"Mic Left", NULL, "MICL"}, 612 {"Mic Right", NULL, "MICR"}, 613 {"Aux1 Left", NULL, "AUX1L"}, 614 {"Aux1 Right", NULL, "AUX1R"}, 615 {"Aux2 Mono", NULL, "AUX2"}, 616 617 {"In Mixer Left", "Mic Left Switch", "Mic Left"}, 618 {"In Mixer Left", "Mic Right Switch", "Mic Right"}, 619 {"In Mixer Left", "Aux1 Left Switch", "Aux1 Left"}, 620 {"In Mixer Left", "Aux2 Switch", "Aux2 Mono"}, 621 {"In Mixer Left", "Outmix Left Switch", "Out Mixer Left"}, 622 623 {"In Mixer Right", "Mic Right Switch", "Mic Right"}, 624 {"In Mixer Right", "Mic Left Switch", "Mic Left"}, 625 {"In Mixer Right", "Aux1 Right Switch", "Aux1 Right"}, 626 {"In Mixer Right", "Aux2 Switch", "Aux2 Mono"}, 627 {"In Mixer Right", "Outmix Right Switch", "Out Mixer Right"}, 628 629 {"INPGA Left", NULL, "In Mixer Left"}, 630 {"ADC Left", NULL, "INPGA Left"}, 631 632 {"INPGA Right", NULL, "In Mixer Right"}, 633 {"ADC Right", NULL, "INPGA Right"}, 634 635 /* Output path */ 636 {"Out Mixer Left", "Aux1 Left Switch", "Aux1 Left"}, 637 {"Out Mixer Left", "Aux2 Switch", "Aux2 Mono"}, 638 {"Out Mixer Left", "INPGA Left Switch", "INPGA Left"}, 639 {"Out Mixer Left", "INPGA Right Switch", "INPGA Right"}, 640 {"Out Mixer Left", "DAC Left Switch", "DAC Left"}, 641 642 {"Out Mixer Right", "Aux1 Right Switch", "Aux1 Right"}, 643 {"Out Mixer Right", "Aux2 Switch", "Aux2 Mono"}, 644 {"Out Mixer Right", "INPGA Right Switch", "INPGA Right"}, 645 {"Out Mixer Right", "INPGA Left Switch", "INPGA Left"}, 646 {"Out Mixer Right", "DAC Right Switch", "DAC Right"}, 647 648 {"Mono Mixer", "INPGA Right Switch", "INPGA Right"}, 649 {"Mono Mixer", "INPGA Left Switch", "INPGA Left"}, 650 {"Mono Mixer", "Outmix Right Switch", "Out Mixer Right"}, 651 {"Mono Mixer", "Outmix Left Switch", "Out Mixer Left"}, 652 653 {"OUTPGA Left Enable", NULL, "Out Mixer Left"}, 654 {"OUTPGA Right Enable", NULL, "Out Mixer Right"}, 655 656 {"Out1 Left", NULL, "OUTPGA Left Enable"}, 657 {"OUT1L", NULL, "Out1 Left"}, 658 659 {"Out1 Right", NULL, "OUTPGA Right Enable"}, 660 {"OUT1R", NULL, "Out1 Right"}, 661 662 {"Headphone Left", NULL, "OUTPGA Left Enable"}, 663 {"HPL", NULL, "Headphone Left"}, 664 665 {"Headphone Right", NULL, "OUTPGA Right Enable"}, 666 {"HPR", NULL, "Headphone Right"}, 667 668 {"Out2 Mono", NULL, "Mono Mixer"}, 669 {"OUT2", NULL, "Out2 Mono"}, 670 }; 671 672 /* Codec private data */ 673 struct da7210_priv { 674 struct regmap *regmap; 675 unsigned int mclk_rate; 676 int master; 677 }; 678 679 static const struct reg_default da7210_reg_defaults[] = { 680 { 0x00, 0x00 }, 681 { 0x01, 0x11 }, 682 { 0x03, 0x00 }, 683 { 0x04, 0x00 }, 684 { 0x05, 0x00 }, 685 { 0x06, 0x00 }, 686 { 0x07, 0x00 }, 687 { 0x08, 0x00 }, 688 { 0x09, 0x00 }, 689 { 0x0a, 0x00 }, 690 { 0x0b, 0x00 }, 691 { 0x0c, 0x00 }, 692 { 0x0d, 0x00 }, 693 { 0x0e, 0x00 }, 694 { 0x0f, 0x08 }, 695 { 0x10, 0x00 }, 696 { 0x11, 0x00 }, 697 { 0x12, 0x00 }, 698 { 0x13, 0x00 }, 699 { 0x14, 0x08 }, 700 { 0x15, 0x10 }, 701 { 0x16, 0x10 }, 702 { 0x17, 0x54 }, 703 { 0x18, 0x40 }, 704 { 0x19, 0x00 }, 705 { 0x1a, 0x00 }, 706 { 0x1b, 0x00 }, 707 { 0x1c, 0x00 }, 708 { 0x1d, 0x00 }, 709 { 0x1e, 0x00 }, 710 { 0x1f, 0x00 }, 711 { 0x20, 0x00 }, 712 { 0x21, 0x00 }, 713 { 0x22, 0x00 }, 714 { 0x23, 0x02 }, 715 { 0x24, 0x00 }, 716 { 0x25, 0x76 }, 717 { 0x26, 0x00 }, 718 { 0x27, 0x00 }, 719 { 0x28, 0x04 }, 720 { 0x29, 0x00 }, 721 { 0x2a, 0x00 }, 722 { 0x2b, 0x30 }, 723 { 0x2c, 0x2A }, 724 { 0x83, 0x00 }, 725 { 0x84, 0x00 }, 726 { 0x85, 0x00 }, 727 { 0x86, 0x00 }, 728 { 0x87, 0x00 }, 729 { 0x88, 0x00 }, 730 }; 731 732 static bool da7210_readable_register(struct device *dev, unsigned int reg) 733 { 734 switch (reg) { 735 case DA7210_A_HID_UNLOCK: 736 case DA7210_A_TEST_UNLOCK: 737 case DA7210_A_PLL1: 738 case DA7210_A_CP_MODE: 739 return false; 740 default: 741 return true; 742 } 743 } 744 745 static bool da7210_volatile_register(struct device *dev, 746 unsigned int reg) 747 { 748 switch (reg) { 749 case DA7210_STATUS: 750 return true; 751 default: 752 return false; 753 } 754 } 755 756 /* 757 * Set PCM DAI word length. 758 */ 759 static int da7210_hw_params(struct snd_pcm_substream *substream, 760 struct snd_pcm_hw_params *params, 761 struct snd_soc_dai *dai) 762 { 763 struct snd_soc_codec *codec = dai->codec; 764 struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec); 765 u32 dai_cfg1; 766 u32 fs, sysclk; 767 768 /* set DAI source to Left and Right ADC */ 769 snd_soc_write(codec, DA7210_DAI_SRC_SEL, 770 DA7210_DAI_OUT_R_SRC | DA7210_DAI_OUT_L_SRC); 771 772 /* Enable DAI */ 773 snd_soc_write(codec, DA7210_DAI_CFG3, DA7210_DAI_OE | DA7210_DAI_EN); 774 775 dai_cfg1 = 0xFC & snd_soc_read(codec, DA7210_DAI_CFG1); 776 777 switch (params_width(params)) { 778 case 16: 779 dai_cfg1 |= DA7210_DAI_WORD_S16_LE; 780 break; 781 case 20: 782 dai_cfg1 |= DA7210_DAI_WORD_S20_3LE; 783 break; 784 case 24: 785 dai_cfg1 |= DA7210_DAI_WORD_S24_LE; 786 break; 787 case 32: 788 dai_cfg1 |= DA7210_DAI_WORD_S32_LE; 789 break; 790 default: 791 return -EINVAL; 792 } 793 794 snd_soc_write(codec, DA7210_DAI_CFG1, dai_cfg1); 795 796 switch (params_rate(params)) { 797 case 8000: 798 fs = DA7210_PLL_FS_8000; 799 sysclk = 3072000; 800 break; 801 case 11025: 802 fs = DA7210_PLL_FS_11025; 803 sysclk = 2822400; 804 break; 805 case 12000: 806 fs = DA7210_PLL_FS_12000; 807 sysclk = 3072000; 808 break; 809 case 16000: 810 fs = DA7210_PLL_FS_16000; 811 sysclk = 3072000; 812 break; 813 case 22050: 814 fs = DA7210_PLL_FS_22050; 815 sysclk = 2822400; 816 break; 817 case 32000: 818 fs = DA7210_PLL_FS_32000; 819 sysclk = 3072000; 820 break; 821 case 44100: 822 fs = DA7210_PLL_FS_44100; 823 sysclk = 2822400; 824 break; 825 case 48000: 826 fs = DA7210_PLL_FS_48000; 827 sysclk = 3072000; 828 break; 829 case 88200: 830 fs = DA7210_PLL_FS_88200; 831 sysclk = 2822400; 832 break; 833 case 96000: 834 fs = DA7210_PLL_FS_96000; 835 sysclk = 3072000; 836 break; 837 default: 838 return -EINVAL; 839 } 840 841 /* Disable active mode */ 842 snd_soc_update_bits(codec, DA7210_STARTUP1, DA7210_SC_MST_EN, 0); 843 844 snd_soc_update_bits(codec, DA7210_PLL, DA7210_PLL_FS_MASK, fs); 845 846 if (da7210->mclk_rate && (da7210->mclk_rate != sysclk)) { 847 /* PLL mode, disable PLL bypass */ 848 snd_soc_update_bits(codec, DA7210_PLL_DIV3, DA7210_PLL_BYP, 0); 849 850 if (!da7210->master) { 851 /* PLL slave mode, also enable SRM */ 852 snd_soc_update_bits(codec, DA7210_PLL, 853 (DA7210_MCLK_SRM_EN | 854 DA7210_MCLK_DET_EN), 855 (DA7210_MCLK_SRM_EN | 856 DA7210_MCLK_DET_EN)); 857 } 858 } else { 859 /* PLL bypass mode, enable PLL bypass and Auto Detection */ 860 snd_soc_update_bits(codec, DA7210_PLL, DA7210_MCLK_DET_EN, 861 DA7210_MCLK_DET_EN); 862 snd_soc_update_bits(codec, DA7210_PLL_DIV3, DA7210_PLL_BYP, 863 DA7210_PLL_BYP); 864 } 865 /* Enable active mode */ 866 snd_soc_update_bits(codec, DA7210_STARTUP1, 867 DA7210_SC_MST_EN, DA7210_SC_MST_EN); 868 869 return 0; 870 } 871 872 /* 873 * Set DAI mode and Format 874 */ 875 static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt) 876 { 877 struct snd_soc_codec *codec = codec_dai->codec; 878 struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec); 879 u32 dai_cfg1; 880 u32 dai_cfg3; 881 882 dai_cfg1 = 0x7f & snd_soc_read(codec, DA7210_DAI_CFG1); 883 dai_cfg3 = 0xfc & snd_soc_read(codec, DA7210_DAI_CFG3); 884 885 if ((snd_soc_read(codec, DA7210_PLL) & DA7210_PLL_EN) && 886 (!(snd_soc_read(codec, DA7210_PLL_DIV3) & DA7210_PLL_BYP))) 887 return -EINVAL; 888 889 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 890 case SND_SOC_DAIFMT_CBM_CFM: 891 da7210->master = 1; 892 dai_cfg1 |= DA7210_DAI_MODE_MASTER; 893 break; 894 case SND_SOC_DAIFMT_CBS_CFS: 895 da7210->master = 0; 896 dai_cfg1 |= DA7210_DAI_MODE_SLAVE; 897 break; 898 default: 899 return -EINVAL; 900 } 901 902 /* FIXME 903 * 904 * It support I2S only now 905 */ 906 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 907 case SND_SOC_DAIFMT_I2S: 908 dai_cfg3 |= DA7210_DAI_FORMAT_I2SMODE; 909 break; 910 case SND_SOC_DAIFMT_LEFT_J: 911 dai_cfg3 |= DA7210_DAI_FORMAT_LEFT_J; 912 break; 913 case SND_SOC_DAIFMT_RIGHT_J: 914 dai_cfg3 |= DA7210_DAI_FORMAT_RIGHT_J; 915 break; 916 default: 917 return -EINVAL; 918 } 919 920 /* FIXME 921 * 922 * It support 64bit data transmission only now 923 */ 924 dai_cfg1 |= DA7210_DAI_FLEN_64BIT; 925 926 snd_soc_write(codec, DA7210_DAI_CFG1, dai_cfg1); 927 snd_soc_write(codec, DA7210_DAI_CFG3, dai_cfg3); 928 929 return 0; 930 } 931 932 static int da7210_mute(struct snd_soc_dai *dai, int mute) 933 { 934 struct snd_soc_codec *codec = dai->codec; 935 u8 mute_reg = snd_soc_read(codec, DA7210_DAC_HPF) & 0xFB; 936 937 if (mute) 938 snd_soc_write(codec, DA7210_DAC_HPF, mute_reg | 0x4); 939 else 940 snd_soc_write(codec, DA7210_DAC_HPF, mute_reg); 941 return 0; 942 } 943 944 #define DA7210_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 945 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 946 947 static int da7210_set_dai_sysclk(struct snd_soc_dai *codec_dai, 948 int clk_id, unsigned int freq, int dir) 949 { 950 struct snd_soc_codec *codec = codec_dai->codec; 951 struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec); 952 953 switch (clk_id) { 954 case DA7210_CLKSRC_MCLK: 955 switch (freq) { 956 case 12000000: 957 case 13000000: 958 case 13500000: 959 case 14400000: 960 case 19200000: 961 case 19680000: 962 case 19800000: 963 da7210->mclk_rate = freq; 964 return 0; 965 default: 966 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n", 967 freq); 968 return -EINVAL; 969 } 970 break; 971 default: 972 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id); 973 return -EINVAL; 974 } 975 } 976 977 /** 978 * da7210_set_dai_pll :Configure the codec PLL 979 * @param codec_dai : pointer to codec DAI 980 * @param pll_id : da7210 has only one pll, so pll_id is always zero 981 * @param fref : MCLK frequency, should be < 20MHz 982 * @param fout : FsDM value, Refer page 44 & 45 of datasheet 983 * @return int : Zero for success, negative error code for error 984 * 985 * Note: Supported PLL input frequencies are 12MHz, 13MHz, 13.5MHz, 14.4MHz, 986 * 19.2MHz, 19.6MHz and 19.8MHz 987 */ 988 static int da7210_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 989 int source, unsigned int fref, unsigned int fout) 990 { 991 struct snd_soc_codec *codec = codec_dai->codec; 992 struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec); 993 994 u8 pll_div1, pll_div2, pll_div3, cnt; 995 996 /* In slave mode, there is only one set of divisors */ 997 if (!da7210->master) 998 fout = 2822400; 999 1000 /* Search pll div array for correct divisors */ 1001 for (cnt = 0; cnt < ARRAY_SIZE(da7210_pll_div); cnt++) { 1002 /* check fref, mode and fout */ 1003 if ((fref == da7210_pll_div[cnt].fref) && 1004 (da7210->master == da7210_pll_div[cnt].mode) && 1005 (fout == da7210_pll_div[cnt].fout)) { 1006 /* all match, pick up divisors */ 1007 pll_div1 = da7210_pll_div[cnt].div1; 1008 pll_div2 = da7210_pll_div[cnt].div2; 1009 pll_div3 = da7210_pll_div[cnt].div3; 1010 break; 1011 } 1012 } 1013 if (cnt >= ARRAY_SIZE(da7210_pll_div)) 1014 goto err; 1015 1016 /* Disable active mode */ 1017 snd_soc_update_bits(codec, DA7210_STARTUP1, DA7210_SC_MST_EN, 0); 1018 /* Write PLL dividers */ 1019 snd_soc_write(codec, DA7210_PLL_DIV1, pll_div1); 1020 snd_soc_write(codec, DA7210_PLL_DIV2, pll_div2); 1021 snd_soc_update_bits(codec, DA7210_PLL_DIV3, 1022 DA7210_PLL_DIV_L_MASK, pll_div3); 1023 1024 /* Enable PLL */ 1025 snd_soc_update_bits(codec, DA7210_PLL, DA7210_PLL_EN, DA7210_PLL_EN); 1026 1027 /* Enable active mode */ 1028 snd_soc_update_bits(codec, DA7210_STARTUP1, DA7210_SC_MST_EN, 1029 DA7210_SC_MST_EN); 1030 return 0; 1031 err: 1032 dev_err(codec_dai->dev, "Unsupported PLL input frequency %d\n", fref); 1033 return -EINVAL; 1034 } 1035 1036 /* DAI operations */ 1037 static const struct snd_soc_dai_ops da7210_dai_ops = { 1038 .hw_params = da7210_hw_params, 1039 .set_fmt = da7210_set_dai_fmt, 1040 .set_sysclk = da7210_set_dai_sysclk, 1041 .set_pll = da7210_set_dai_pll, 1042 .digital_mute = da7210_mute, 1043 }; 1044 1045 static struct snd_soc_dai_driver da7210_dai = { 1046 .name = "da7210-hifi", 1047 /* playback capabilities */ 1048 .playback = { 1049 .stream_name = "Playback", 1050 .channels_min = 1, 1051 .channels_max = 2, 1052 .rates = SNDRV_PCM_RATE_8000_96000, 1053 .formats = DA7210_FORMATS, 1054 }, 1055 /* capture capabilities */ 1056 .capture = { 1057 .stream_name = "Capture", 1058 .channels_min = 1, 1059 .channels_max = 2, 1060 .rates = SNDRV_PCM_RATE_8000_96000, 1061 .formats = DA7210_FORMATS, 1062 }, 1063 .ops = &da7210_dai_ops, 1064 .symmetric_rates = 1, 1065 }; 1066 1067 static int da7210_probe(struct snd_soc_codec *codec) 1068 { 1069 struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec); 1070 1071 dev_info(codec->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION); 1072 1073 da7210->mclk_rate = 0; /* This will be set from set_sysclk() */ 1074 da7210->master = 0; /* This will be set from set_fmt() */ 1075 1076 /* Enable internal regulator & bias current */ 1077 snd_soc_write(codec, DA7210_CONTROL, DA7210_REG_EN | DA7210_BIAS_EN); 1078 1079 /* 1080 * ADC settings 1081 */ 1082 1083 /* Enable Left & Right MIC PGA and Mic Bias */ 1084 snd_soc_write(codec, DA7210_MIC_L, DA7210_MIC_L_EN | DA7210_MICBIAS_EN); 1085 snd_soc_write(codec, DA7210_MIC_R, DA7210_MIC_R_EN); 1086 1087 /* Enable Left and Right input PGA */ 1088 snd_soc_write(codec, DA7210_INMIX_L, DA7210_IN_L_EN); 1089 snd_soc_write(codec, DA7210_INMIX_R, DA7210_IN_R_EN); 1090 1091 /* Enable Left and Right ADC */ 1092 snd_soc_write(codec, DA7210_ADC, DA7210_ADC_L_EN | DA7210_ADC_R_EN); 1093 1094 /* 1095 * DAC settings 1096 */ 1097 1098 /* Enable Left and Right DAC */ 1099 snd_soc_write(codec, DA7210_DAC_SEL, 1100 DA7210_DAC_L_SRC_DAI_L | DA7210_DAC_L_EN | 1101 DA7210_DAC_R_SRC_DAI_R | DA7210_DAC_R_EN); 1102 1103 /* Enable Left and Right out PGA */ 1104 snd_soc_write(codec, DA7210_OUTMIX_L, DA7210_OUT_L_EN); 1105 snd_soc_write(codec, DA7210_OUTMIX_R, DA7210_OUT_R_EN); 1106 1107 /* Enable Left and Right HeadPhone PGA */ 1108 snd_soc_write(codec, DA7210_HP_CFG, 1109 DA7210_HP_2CAP_MODE | DA7210_HP_SENSE_EN | 1110 DA7210_HP_L_EN | DA7210_HP_MODE | DA7210_HP_R_EN); 1111 1112 /* Enable ramp mode for DAC gain update */ 1113 snd_soc_write(codec, DA7210_SOFTMUTE, DA7210_RAMP_EN); 1114 1115 /* 1116 * For DA7210 codec, there are two ways to enable/disable analog IOs 1117 * and ADC/DAC, 1118 * (1) Using "Enable Bit" of register associated with that IO 1119 * (or ADC/DAC) 1120 * e.g. Mic Left can be enabled using bit 7 of MIC_L(0x7) reg 1121 * 1122 * (2) Using "Standby Bit" of STARTUP2 or STARTUP3 register 1123 * e.g. Mic left can be put to STANDBY using bit 0 of STARTUP3(0x5) 1124 * 1125 * Out of these two methods, the one using STANDBY bits is preferred 1126 * way to enable/disable individual blocks. This is because STANDBY 1127 * registers are part of system controller which allows system power 1128 * up/down in a controlled, pop-free manner. Also, as per application 1129 * note of DA7210, STANDBY register bits are only effective if a 1130 * particular IO (or ADC/DAC) is already enabled using enable/disable 1131 * register bits. Keeping these things in mind, current DAPM 1132 * implementation manipulates only STANDBY bits. 1133 * 1134 * Overall implementation can be outlined as below, 1135 * 1136 * - "Enable bit" of an IO or ADC/DAC is used to enable it in probe() 1137 * - "STANDBY bit" is controlled by DAPM 1138 */ 1139 1140 /* Enable Line out amplifiers */ 1141 snd_soc_write(codec, DA7210_OUT1_L, DA7210_OUT1_L_EN); 1142 snd_soc_write(codec, DA7210_OUT1_R, DA7210_OUT1_R_EN); 1143 snd_soc_write(codec, DA7210_OUT2, DA7210_OUT2_EN | 1144 DA7210_OUT2_OUTMIX_L | DA7210_OUT2_OUTMIX_R); 1145 1146 /* Enable Aux1 */ 1147 snd_soc_write(codec, DA7210_AUX1_L, DA7210_AUX1_L_EN); 1148 snd_soc_write(codec, DA7210_AUX1_R, DA7210_AUX1_R_EN); 1149 /* Enable Aux2 */ 1150 snd_soc_write(codec, DA7210_AUX2, DA7210_AUX2_EN); 1151 1152 /* Set PLL Master clock range 10-20 MHz, enable PLL bypass */ 1153 snd_soc_write(codec, DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ | 1154 DA7210_PLL_BYP); 1155 1156 /* Diable PLL and bypass it */ 1157 snd_soc_write(codec, DA7210_PLL, DA7210_PLL_FS_48000); 1158 1159 /* Activate all enabled subsystem */ 1160 snd_soc_write(codec, DA7210_STARTUP1, DA7210_SC_MST_EN); 1161 1162 dev_info(codec->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION); 1163 1164 return 0; 1165 } 1166 1167 static struct snd_soc_codec_driver soc_codec_dev_da7210 = { 1168 .probe = da7210_probe, 1169 1170 .controls = da7210_snd_controls, 1171 .num_controls = ARRAY_SIZE(da7210_snd_controls), 1172 1173 .dapm_widgets = da7210_dapm_widgets, 1174 .num_dapm_widgets = ARRAY_SIZE(da7210_dapm_widgets), 1175 .dapm_routes = da7210_audio_map, 1176 .num_dapm_routes = ARRAY_SIZE(da7210_audio_map), 1177 }; 1178 1179 #if IS_ENABLED(CONFIG_I2C) 1180 1181 static const struct reg_sequence da7210_regmap_i2c_patch[] = { 1182 1183 /* System controller master disable */ 1184 { DA7210_STARTUP1, 0x00 }, 1185 /* Set PLL Master clock range 10-20 MHz */ 1186 { DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ }, 1187 1188 /* to unlock */ 1189 { DA7210_A_HID_UNLOCK, 0x8B}, 1190 { DA7210_A_TEST_UNLOCK, 0xB4}, 1191 { DA7210_A_PLL1, 0x01}, 1192 { DA7210_A_CP_MODE, 0x7C}, 1193 /* to re-lock */ 1194 { DA7210_A_HID_UNLOCK, 0x00}, 1195 { DA7210_A_TEST_UNLOCK, 0x00}, 1196 }; 1197 1198 static const struct regmap_config da7210_regmap_config_i2c = { 1199 .reg_bits = 8, 1200 .val_bits = 8, 1201 1202 .reg_defaults = da7210_reg_defaults, 1203 .num_reg_defaults = ARRAY_SIZE(da7210_reg_defaults), 1204 .volatile_reg = da7210_volatile_register, 1205 .readable_reg = da7210_readable_register, 1206 .cache_type = REGCACHE_RBTREE, 1207 }; 1208 1209 static int da7210_i2c_probe(struct i2c_client *i2c, 1210 const struct i2c_device_id *id) 1211 { 1212 struct da7210_priv *da7210; 1213 int ret; 1214 1215 da7210 = devm_kzalloc(&i2c->dev, sizeof(struct da7210_priv), 1216 GFP_KERNEL); 1217 if (!da7210) 1218 return -ENOMEM; 1219 1220 i2c_set_clientdata(i2c, da7210); 1221 1222 da7210->regmap = devm_regmap_init_i2c(i2c, &da7210_regmap_config_i2c); 1223 if (IS_ERR(da7210->regmap)) { 1224 ret = PTR_ERR(da7210->regmap); 1225 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); 1226 return ret; 1227 } 1228 1229 ret = regmap_register_patch(da7210->regmap, da7210_regmap_i2c_patch, 1230 ARRAY_SIZE(da7210_regmap_i2c_patch)); 1231 if (ret != 0) 1232 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); 1233 1234 ret = snd_soc_register_codec(&i2c->dev, 1235 &soc_codec_dev_da7210, &da7210_dai, 1); 1236 if (ret < 0) 1237 dev_err(&i2c->dev, "Failed to register codec: %d\n", ret); 1238 1239 return ret; 1240 } 1241 1242 static int da7210_i2c_remove(struct i2c_client *client) 1243 { 1244 snd_soc_unregister_codec(&client->dev); 1245 return 0; 1246 } 1247 1248 static const struct i2c_device_id da7210_i2c_id[] = { 1249 { "da7210", 0 }, 1250 { } 1251 }; 1252 MODULE_DEVICE_TABLE(i2c, da7210_i2c_id); 1253 1254 /* I2C codec control layer */ 1255 static struct i2c_driver da7210_i2c_driver = { 1256 .driver = { 1257 .name = "da7210", 1258 }, 1259 .probe = da7210_i2c_probe, 1260 .remove = da7210_i2c_remove, 1261 .id_table = da7210_i2c_id, 1262 }; 1263 #endif 1264 1265 #if defined(CONFIG_SPI_MASTER) 1266 1267 static const struct reg_sequence da7210_regmap_spi_patch[] = { 1268 /* Dummy read to give two pulses over nCS for SPI */ 1269 { DA7210_AUX2, 0x00 }, 1270 { DA7210_AUX2, 0x00 }, 1271 1272 /* System controller master disable */ 1273 { DA7210_STARTUP1, 0x00 }, 1274 /* Set PLL Master clock range 10-20 MHz */ 1275 { DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ }, 1276 1277 /* to set PAGE1 of SPI register space */ 1278 { DA7210_PAGE_CONTROL, 0x80 }, 1279 /* to unlock */ 1280 { DA7210_A_HID_UNLOCK, 0x8B}, 1281 { DA7210_A_TEST_UNLOCK, 0xB4}, 1282 { DA7210_A_PLL1, 0x01}, 1283 { DA7210_A_CP_MODE, 0x7C}, 1284 /* to re-lock */ 1285 { DA7210_A_HID_UNLOCK, 0x00}, 1286 { DA7210_A_TEST_UNLOCK, 0x00}, 1287 /* to set back PAGE0 of SPI register space */ 1288 { DA7210_PAGE_CONTROL, 0x00 }, 1289 }; 1290 1291 static const struct regmap_config da7210_regmap_config_spi = { 1292 .reg_bits = 8, 1293 .val_bits = 8, 1294 .read_flag_mask = 0x01, 1295 .write_flag_mask = 0x00, 1296 1297 .reg_defaults = da7210_reg_defaults, 1298 .num_reg_defaults = ARRAY_SIZE(da7210_reg_defaults), 1299 .volatile_reg = da7210_volatile_register, 1300 .readable_reg = da7210_readable_register, 1301 .cache_type = REGCACHE_RBTREE, 1302 }; 1303 1304 static int da7210_spi_probe(struct spi_device *spi) 1305 { 1306 struct da7210_priv *da7210; 1307 int ret; 1308 1309 da7210 = devm_kzalloc(&spi->dev, sizeof(struct da7210_priv), 1310 GFP_KERNEL); 1311 if (!da7210) 1312 return -ENOMEM; 1313 1314 spi_set_drvdata(spi, da7210); 1315 da7210->regmap = devm_regmap_init_spi(spi, &da7210_regmap_config_spi); 1316 if (IS_ERR(da7210->regmap)) { 1317 ret = PTR_ERR(da7210->regmap); 1318 dev_err(&spi->dev, "Failed to register regmap: %d\n", ret); 1319 return ret; 1320 } 1321 1322 ret = regmap_register_patch(da7210->regmap, da7210_regmap_spi_patch, 1323 ARRAY_SIZE(da7210_regmap_spi_patch)); 1324 if (ret != 0) 1325 dev_warn(&spi->dev, "Failed to apply regmap patch: %d\n", ret); 1326 1327 ret = snd_soc_register_codec(&spi->dev, 1328 &soc_codec_dev_da7210, &da7210_dai, 1); 1329 1330 return ret; 1331 } 1332 1333 static int da7210_spi_remove(struct spi_device *spi) 1334 { 1335 snd_soc_unregister_codec(&spi->dev); 1336 return 0; 1337 } 1338 1339 static struct spi_driver da7210_spi_driver = { 1340 .driver = { 1341 .name = "da7210", 1342 }, 1343 .probe = da7210_spi_probe, 1344 .remove = da7210_spi_remove 1345 }; 1346 #endif 1347 1348 static int __init da7210_modinit(void) 1349 { 1350 int ret = 0; 1351 #if IS_ENABLED(CONFIG_I2C) 1352 ret = i2c_add_driver(&da7210_i2c_driver); 1353 #endif 1354 #if defined(CONFIG_SPI_MASTER) 1355 ret = spi_register_driver(&da7210_spi_driver); 1356 if (ret) { 1357 printk(KERN_ERR "Failed to register da7210 SPI driver: %d\n", 1358 ret); 1359 } 1360 #endif 1361 return ret; 1362 } 1363 module_init(da7210_modinit); 1364 1365 static void __exit da7210_exit(void) 1366 { 1367 #if IS_ENABLED(CONFIG_I2C) 1368 i2c_del_driver(&da7210_i2c_driver); 1369 #endif 1370 #if defined(CONFIG_SPI_MASTER) 1371 spi_unregister_driver(&da7210_spi_driver); 1372 #endif 1373 } 1374 module_exit(da7210_exit); 1375 1376 MODULE_DESCRIPTION("ASoC DA7210 driver"); 1377 MODULE_AUTHOR("David Chen, Kuninori Morimoto"); 1378 MODULE_LICENSE("GPL"); 1379