xref: /openbmc/linux/sound/soc/codecs/cs4349.h (revision e40da86a)
1 /*
2  * ALSA SoC CS4349 codec driver
3  *
4  * Copyright 2015 Cirrus Logic, Inc.
5  *
6  * Author: Tim Howe <Tim.Howe@cirrus.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  */
18 
19 #ifndef __CS4349_H__
20 #define __CS4349_H__
21 
22 struct cs4349_platform_data {
23 
24 	/* GPIO for Reset */
25 	unsigned int gpio_nreset;
26 
27 };
28 
29 /* CS4349 registers addresses */
30 #define CS4349_CHIPID		0x01	/* Device and Rev ID, Read Only */
31 #define CS4349_MODE		0x02	/* Mode Control */
32 #define CS4349_VMI		0x03	/* Volume, Mixing, Inversion Control */
33 #define CS4349_MUTE		0x04	/* Mute Control */
34 #define CS4349_VOLA		0x05	/* DAC Channel A Volume Control */
35 #define CS4349_VOLB		0x06	/* DAC Channel B Volume Control */
36 #define CS4349_RMPFLT		0x07	/* Ramp and Filter Control */
37 #define CS4349_MISC		0x08	/* Power Down,Freeze Control,Pop Stop*/
38 
39 #define CS4349_FIRSTREG		0x01
40 #define CS4349_LASTREG		0x08
41 #define CS4349_NUMREGS		(CS4349_LASTREG - CS4349_FIRSTREG + 1)
42 #define CS4349_I2C_INCR		0x80
43 
44 
45 /* Device and Revision ID */
46 #define CS4349_REVA		0xF0	/* Rev A */
47 #define CS4349_REVB		0xF1	/* Rev B */
48 #define CS4349_REVC2		0xFF	/* Rev C2 */
49 
50 
51 /* PDN_DONE Poll Maximum
52  * If soft ramp is set it will take much longer to power down
53  * the system.
54  */
55 #define PDN_POLL_MAX		900
56 
57 
58 /* Bitfield Definitions */
59 
60 /* CS4349_MODE */
61 /* (Digital Interface Format, De-Emphasis Control, Functional Mode */
62 #define DIF2			(1 << 6)
63 #define DIF1			(1 << 5)
64 #define DIF0			(1 << 4)
65 #define DEM1			(1 << 3)
66 #define DEM0			(1 << 2)
67 #define FM1			(1 << 1)
68 #define DIF_LEFT_JST		0x00
69 #define DIF_I2S			0x01
70 #define DIF_RGHT_JST16		0x02
71 #define DIF_RGHT_JST24		0x03
72 #define DIF_TDM0		0x04
73 #define DIF_TDM1		0x05
74 #define DIF_TDM2		0x06
75 #define DIF_TDM3		0x07
76 #define DIF_MASK		0x70
77 #define MODE_FORMAT(x)		(((x)&7)<<4)
78 #define DEM_MASK		0x0C
79 #define NO_DEM			0x00
80 #define DEM_441			0x04
81 #define DEM_48K			0x08
82 #define DEM_32K			0x0C
83 #define FM_AUTO			0x00
84 #define FM_SNGL			0x01
85 #define FM_DBL			0x02
86 #define FM_QUAD			0x03
87 #define FM_SNGL_MIN		30000
88 #define FM_SNGL_MAX		54000
89 #define FM_DBL_MAX		108000
90 #define FM_QUAD_MAX		216000
91 #define FM_MASK			0x03
92 
93 /* CS4349_VMI (VMI = Volume, Mixing and Inversion Controls) */
94 #define VOLBISA			(1 << 7)
95 #define VOLAISB			(1 << 7)
96 /* INVERT_A only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
97 #define INVERT_A		(1 << 6)
98 /* INVERT_B only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
99 #define INVERT_B		(1 << 5)
100 #define ATAPI3			(1 << 3)
101 #define ATAPI2			(1 << 2)
102 #define ATAPI1			(1 << 1)
103 #define ATAPI0			(1 << 0)
104 #define MUTEAB			0x00
105 #define MUTEA_RIGHTB		0x01
106 #define MUTEA_LEFTB		0x02
107 #define MUTEA_SUMLRDIV2B	0x03
108 #define RIGHTA_MUTEB		0x04
109 #define RIGHTA_RIGHTB		0x05
110 #define RIGHTA_LEFTB		0x06
111 #define RIGHTA_SUMLRDIV2B	0x07
112 #define LEFTA_MUTEB		0x08
113 #define LEFTA_RIGHTB		0x09	/* Default */
114 #define LEFTA_LEFTB		0x0A
115 #define LEFTA_SUMLRDIV2B	0x0B
116 #define SUMLRDIV2A_MUTEB	0x0C
117 #define SUMLRDIV2A_RIGHTB	0x0D
118 #define SUMLRDIV2A_LEFTB	0x0E
119 #define SUMLRDIV2_AB		0x0F
120 #define CHMIX_MASK		0x0F
121 
122 /* CS4349_MUTE */
123 #define AUTOMUTE		(1 << 7)
124 #define MUTEC_AB		(1 << 5)
125 #define MUTE_A			(1 << 4)
126 #define MUTE_B			(1 << 3)
127 #define MUTE_AB_MASK		0x18
128 
129 /* CS4349_RMPFLT (Ramp and Filter Control) */
130 #define SCZ1			(1 << 7)
131 #define SCZ0			(1 << 6)
132 #define RMP_UP			(1 << 5)
133 #define RMP_DN			(1 << 4)
134 #define FILT_SEL		(1 << 2)
135 #define IMMDT_CHNG		0x31
136 #define ZEROCRSS		0x71
137 #define SOFT_RMP		0xB1
138 #define SFTRMP_ZEROCRSS		0xF1
139 #define SR_ZC_MASK		0xC0
140 
141 /* CS4349_MISC */
142 #define PWR_DWN			(1 << 7)
143 #define FREEZE			(1 << 5)
144 #define POPG_EN			(1 << 4)
145 
146 #endif	/* __CS4349_H__ */
147