1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * ALSA SoC CS4349 codec driver 4 * 5 * Copyright 2015 Cirrus Logic, Inc. 6 * 7 * Author: Tim Howe <Tim.Howe@cirrus.com> 8 */ 9 10 #ifndef __CS4349_H__ 11 #define __CS4349_H__ 12 13 /* CS4349 registers addresses */ 14 #define CS4349_CHIPID 0x01 /* Device and Rev ID, Read Only */ 15 #define CS4349_MODE 0x02 /* Mode Control */ 16 #define CS4349_VMI 0x03 /* Volume, Mixing, Inversion Control */ 17 #define CS4349_MUTE 0x04 /* Mute Control */ 18 #define CS4349_VOLA 0x05 /* DAC Channel A Volume Control */ 19 #define CS4349_VOLB 0x06 /* DAC Channel B Volume Control */ 20 #define CS4349_RMPFLT 0x07 /* Ramp and Filter Control */ 21 #define CS4349_MISC 0x08 /* Power Down,Freeze Control,Pop Stop*/ 22 23 #define CS4349_I2C_INCR 0x80 24 25 26 /* Device and Revision ID */ 27 #define CS4349_REVA 0xF0 /* Rev A */ 28 #define CS4349_REVB 0xF1 /* Rev B */ 29 #define CS4349_REVC2 0xFF /* Rev C2 */ 30 31 32 /* PDN_DONE Poll Maximum 33 * If soft ramp is set it will take much longer to power down 34 * the system. 35 */ 36 #define PDN_POLL_MAX 900 37 38 39 /* Bitfield Definitions */ 40 41 /* CS4349_MODE */ 42 /* (Digital Interface Format, De-Emphasis Control, Functional Mode */ 43 #define DIF2 (1 << 6) 44 #define DIF1 (1 << 5) 45 #define DIF0 (1 << 4) 46 #define DEM1 (1 << 3) 47 #define DEM0 (1 << 2) 48 #define FM1 (1 << 1) 49 #define DIF_LEFT_JST 0x00 50 #define DIF_I2S 0x01 51 #define DIF_RGHT_JST16 0x02 52 #define DIF_RGHT_JST24 0x03 53 #define DIF_TDM0 0x04 54 #define DIF_TDM1 0x05 55 #define DIF_TDM2 0x06 56 #define DIF_TDM3 0x07 57 #define DIF_MASK 0x70 58 #define MODE_FORMAT(x) (((x)&7)<<4) 59 #define DEM_MASK 0x0C 60 #define NO_DEM 0x00 61 #define DEM_441 0x04 62 #define DEM_48K 0x08 63 #define DEM_32K 0x0C 64 #define FM_AUTO 0x00 65 #define FM_SNGL 0x01 66 #define FM_DBL 0x02 67 #define FM_QUAD 0x03 68 #define FM_SNGL_MIN 30000 69 #define FM_SNGL_MAX 54000 70 #define FM_DBL_MAX 108000 71 #define FM_QUAD_MAX 216000 72 #define FM_MASK 0x03 73 74 /* CS4349_VMI (VMI = Volume, Mixing and Inversion Controls) */ 75 #define VOLBISA (1 << 7) 76 #define VOLAISB (1 << 7) 77 /* INVERT_A only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */ 78 #define INVERT_A (1 << 6) 79 /* INVERT_B only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */ 80 #define INVERT_B (1 << 5) 81 #define ATAPI3 (1 << 3) 82 #define ATAPI2 (1 << 2) 83 #define ATAPI1 (1 << 1) 84 #define ATAPI0 (1 << 0) 85 #define MUTEAB 0x00 86 #define MUTEA_RIGHTB 0x01 87 #define MUTEA_LEFTB 0x02 88 #define MUTEA_SUMLRDIV2B 0x03 89 #define RIGHTA_MUTEB 0x04 90 #define RIGHTA_RIGHTB 0x05 91 #define RIGHTA_LEFTB 0x06 92 #define RIGHTA_SUMLRDIV2B 0x07 93 #define LEFTA_MUTEB 0x08 94 #define LEFTA_RIGHTB 0x09 /* Default */ 95 #define LEFTA_LEFTB 0x0A 96 #define LEFTA_SUMLRDIV2B 0x0B 97 #define SUMLRDIV2A_MUTEB 0x0C 98 #define SUMLRDIV2A_RIGHTB 0x0D 99 #define SUMLRDIV2A_LEFTB 0x0E 100 #define SUMLRDIV2_AB 0x0F 101 #define CHMIX_MASK 0x0F 102 103 /* CS4349_MUTE */ 104 #define AUTOMUTE (1 << 7) 105 #define MUTEC_AB (1 << 5) 106 #define MUTE_A (1 << 4) 107 #define MUTE_B (1 << 3) 108 #define MUTE_AB_MASK 0x18 109 110 /* CS4349_RMPFLT (Ramp and Filter Control) */ 111 #define SCZ1 (1 << 7) 112 #define SCZ0 (1 << 6) 113 #define RMP_UP (1 << 5) 114 #define RMP_DN (1 << 4) 115 #define FILT_SEL (1 << 2) 116 #define IMMDT_CHNG 0x31 117 #define ZEROCRSS 0x71 118 #define SOFT_RMP 0xB1 119 #define SFTRMP_ZEROCRSS 0xF1 120 #define SR_ZC_MASK 0xC0 121 122 /* CS4349_MISC */ 123 #define PWR_DWN (1 << 7) 124 #define FREEZE (1 << 5) 125 #define POPG_EN (1 << 4) 126 127 #endif /* __CS4349_H__ */ 128