1272b5eddSBrian Austin /* 2272b5eddSBrian Austin * cs42l52.h -- CS42L56 ALSA SoC audio driver 3272b5eddSBrian Austin * 4272b5eddSBrian Austin * Copyright 2014 CirrusLogic, Inc. 5272b5eddSBrian Austin * 6272b5eddSBrian Austin * Author: Brian Austin <brian.austin@cirrus.com> 7272b5eddSBrian Austin * 8272b5eddSBrian Austin * This program is free software; you can redistribute it and/or modify 9272b5eddSBrian Austin * it under the terms of the GNU General Public License version 2 as 10272b5eddSBrian Austin * published by the Free Software Foundation. 11272b5eddSBrian Austin * 12272b5eddSBrian Austin */ 13272b5eddSBrian Austin 14272b5eddSBrian Austin #ifndef __CS42L56_H__ 15272b5eddSBrian Austin #define __CS42L56_H__ 16272b5eddSBrian Austin 17272b5eddSBrian Austin #define CS42L56_CHIP_ID_1 0x01 18272b5eddSBrian Austin #define CS42L56_CHIP_ID_2 0x02 19272b5eddSBrian Austin #define CS42L56_PWRCTL_1 0x03 20272b5eddSBrian Austin #define CS42L56_PWRCTL_2 0x04 21272b5eddSBrian Austin #define CS42L56_CLKCTL_1 0x05 22272b5eddSBrian Austin #define CS42L56_CLKCTL_2 0x06 23272b5eddSBrian Austin #define CS42L56_SERIAL_FMT 0x07 24272b5eddSBrian Austin #define CS42L56_CLASSH_CTL 0x08 25272b5eddSBrian Austin #define CS42L56_MISC_CTL 0x09 26272b5eddSBrian Austin #define CS42L56_INT_STATUS 0x0a 27272b5eddSBrian Austin #define CS42L56_PLAYBACK_CTL 0x0b 28272b5eddSBrian Austin #define CS42L56_DSP_MUTE_CTL 0x0c 29272b5eddSBrian Austin #define CS42L56_ADCA_MIX_VOLUME 0x0d 30272b5eddSBrian Austin #define CS42L56_ADCB_MIX_VOLUME 0x0e 31272b5eddSBrian Austin #define CS42L56_PCMA_MIX_VOLUME 0x0f 32272b5eddSBrian Austin #define CS42L56_PCMB_MIX_VOLUME 0x10 33272b5eddSBrian Austin #define CS42L56_ANAINPUT_ADV_VOLUME 0x11 34272b5eddSBrian Austin #define CS42L56_DIGINPUT_ADV_VOLUME 0x12 35272b5eddSBrian Austin #define CS42L56_MASTER_A_VOLUME 0x13 36272b5eddSBrian Austin #define CS42L56_MASTER_B_VOLUME 0x14 37272b5eddSBrian Austin #define CS42L56_BEEP_FREQ_ONTIME 0x15 38272b5eddSBrian Austin #define CS42L56_BEEP_FREQ_OFFTIME 0x16 39272b5eddSBrian Austin #define CS42L56_BEEP_TONE_CFG 0x17 40272b5eddSBrian Austin #define CS42L56_TONE_CTL 0x18 41272b5eddSBrian Austin #define CS42L56_CHAN_MIX_SWAP 0x19 42272b5eddSBrian Austin #define CS42L56_AIN_REFCFG_ADC_MUX 0x1a 43272b5eddSBrian Austin #define CS42L56_HPF_CTL 0x1b 44272b5eddSBrian Austin #define CS42L56_MISC_ADC_CTL 0x1c 45272b5eddSBrian Austin #define CS42L56_GAIN_BIAS_CTL 0x1d 46272b5eddSBrian Austin #define CS42L56_PGAA_MUX_VOLUME 0x1e 47272b5eddSBrian Austin #define CS42L56_PGAB_MUX_VOLUME 0x1f 48272b5eddSBrian Austin #define CS42L56_ADCA_ATTENUATOR 0x20 49272b5eddSBrian Austin #define CS42L56_ADCB_ATTENUATOR 0x21 50272b5eddSBrian Austin #define CS42L56_ALC_EN_ATTACK_RATE 0x22 51272b5eddSBrian Austin #define CS42L56_ALC_RELEASE_RATE 0x23 52272b5eddSBrian Austin #define CS42L56_ALC_THRESHOLD 0x24 53272b5eddSBrian Austin #define CS42L56_NOISE_GATE_CTL 0x25 54272b5eddSBrian Austin #define CS42L56_ALC_LIM_SFT_ZC 0x26 55272b5eddSBrian Austin #define CS42L56_AMUTE_HPLO_MUX 0x27 56272b5eddSBrian Austin #define CS42L56_HPA_VOLUME 0x28 57272b5eddSBrian Austin #define CS42L56_HPB_VOLUME 0x29 58272b5eddSBrian Austin #define CS42L56_LOA_VOLUME 0x2a 59272b5eddSBrian Austin #define CS42L56_LOB_VOLUME 0x2b 60272b5eddSBrian Austin #define CS42L56_LIM_THRESHOLD_CTL 0x2c 61272b5eddSBrian Austin #define CS42L56_LIM_CTL_RELEASE_RATE 0x2d 62272b5eddSBrian Austin #define CS42L56_LIM_ATTACK_RATE 0x2e 63272b5eddSBrian Austin 64272b5eddSBrian Austin /* Device ID and Rev ID Masks */ 65272b5eddSBrian Austin #define CS42L56_DEVID 0x56 66272b5eddSBrian Austin #define CS42L56_CHIP_ID_MASK 0xff 67272b5eddSBrian Austin #define CS42L56_AREV_MASK 0x1c 68272b5eddSBrian Austin #define CS42L56_MTLREV_MASK 0x03 69272b5eddSBrian Austin 70272b5eddSBrian Austin /* Power bit masks */ 71272b5eddSBrian Austin #define CS42L56_PDN_ALL_MASK 0x01 72272b5eddSBrian Austin #define CS42L56_PDN_ADCA_MASK 0x02 73272b5eddSBrian Austin #define CS42L56_PDN_ADCB_MASK 0x04 74272b5eddSBrian Austin #define CS42L56_PDN_CHRG_MASK 0x08 75272b5eddSBrian Austin #define CS42L56_PDN_BIAS_MASK 0x10 76272b5eddSBrian Austin #define CS42L56_PDN_VBUF_MASK 0x20 77272b5eddSBrian Austin #define CS42L56_PDN_LOA_MASK 0x03 78272b5eddSBrian Austin #define CS42L56_PDN_LOB_MASK 0x0c 79272b5eddSBrian Austin #define CS42L56_PDN_HPA_MASK 0x30 80272b5eddSBrian Austin #define CS42L56_PDN_HPB_MASK 0xc0 81272b5eddSBrian Austin 82272b5eddSBrian Austin /* serial port and clk masks */ 834641c771SAxel Lin #define CS42L56_MASTER_MODE 0x40 84272b5eddSBrian Austin #define CS42L56_SLAVE_MODE 0 85272b5eddSBrian Austin #define CS42L56_MS_MODE_MASK 0x40 864641c771SAxel Lin #define CS42L56_SCLK_INV 0x20 87272b5eddSBrian Austin #define CS42L56_SCLK_INV_MASK 0x20 88272b5eddSBrian Austin #define CS42L56_SCLK_MCLK_MASK 0x18 894641c771SAxel Lin #define CS42L56_MCLK_PREDIV 0x04 90272b5eddSBrian Austin #define CS42L56_MCLK_PREDIV_MASK 0x04 914641c771SAxel Lin #define CS42L56_MCLK_DIV2 0x02 92272b5eddSBrian Austin #define CS42L56_MCLK_DIV2_MASK 0x02 93272b5eddSBrian Austin #define CS42L56_MCLK_DIS_MASK 0x01 94272b5eddSBrian Austin #define CS42L56_CLK_AUTO_MASK 0x20 95272b5eddSBrian Austin #define CS42L56_CLK_RATIO_MASK 0x1f 96272b5eddSBrian Austin #define CS42L56_DIG_FMT_I2S 0 974641c771SAxel Lin #define CS42L56_DIG_FMT_LEFT_J 0x08 98272b5eddSBrian Austin #define CS42L56_DIG_FMT_MASK 0x08 99272b5eddSBrian Austin 100272b5eddSBrian Austin /* Class H and misc ctl masks */ 101272b5eddSBrian Austin #define CS42L56_ADAPT_PWR_MASK 0xc0 102272b5eddSBrian Austin #define CS42L56_CHRG_FREQ_MASK 0x0f 103272b5eddSBrian Austin #define CS42L56_DIG_MUX_MASK 0x80 104272b5eddSBrian Austin #define CS42L56_ANLGSFT_MASK 0x10 105272b5eddSBrian Austin #define CS42L56_ANLGZC_MASK 0x08 106272b5eddSBrian Austin #define CS42L56_DIGSFT_MASK 0x04 107272b5eddSBrian Austin #define CS42L56_FREEZE_MASK 0x01 108272b5eddSBrian Austin #define CS42L56_MIC_BIAS_MASK 0x03 109272b5eddSBrian Austin #define CS42L56_HPFA_FREQ_MASK 0x03 110272b5eddSBrian Austin #define CS42L56_HPFB_FREQ_MASK 0xc0 111272b5eddSBrian Austin #define CS42L56_AIN1A_REF_MASK 0x10 112272b5eddSBrian Austin #define CS42L56_AIN2A_REF_MASK 0x40 113272b5eddSBrian Austin #define CS42L56_AIN1B_REF_MASK 0x20 114272b5eddSBrian Austin #define CS42L56_AIN2B_REF_MASK 0x80 115272b5eddSBrian Austin 116272b5eddSBrian Austin /* Playback Capture ctl masks */ 117272b5eddSBrian Austin #define CS42L56_PDN_DSP_MASK 0x80 118272b5eddSBrian Austin #define CS42L56_DEEMPH_MASK 0x40 119272b5eddSBrian Austin #define CS42L56_PLYBCK_GANG_MASK 0x10 120272b5eddSBrian Austin #define CS42L56_PCM_INV_MASK 0x0c 1214641c771SAxel Lin #define CS42L56_MUTE_ALL 0xff 122272b5eddSBrian Austin #define CS42L56_UNMUTE 0 123272b5eddSBrian Austin #define CS42L56_ADCAMIX_MUTE_MASK 0x40 124272b5eddSBrian Austin #define CS42L56_ADCBMIX_MUTE_MASK 0x80 125272b5eddSBrian Austin #define CS42L56_PCMAMIX_MUTE_MASK 0x10 126272b5eddSBrian Austin #define CS42L56_PCMBMIX_MUTE_MASK 0x20 127272b5eddSBrian Austin #define CS42L56_MSTB_MUTE_MASK 0x02 128272b5eddSBrian Austin #define CS42L56_MSTA_MUTE_MASK 0x01 129272b5eddSBrian Austin #define CS42L56_ADCA_MUTE_MASK 0x01 130272b5eddSBrian Austin #define CS42L56_ADCB_MUTE_MASK 0x02 131272b5eddSBrian Austin #define CS42L56_HP_MUTE_MASK 0x80 132272b5eddSBrian Austin #define CS42L56_LO_MUTE_MASK 0x80 133272b5eddSBrian Austin 134272b5eddSBrian Austin /* Beep masks */ 135272b5eddSBrian Austin #define CS42L56_BEEP_FREQ_MASK 0xf0 136272b5eddSBrian Austin #define CS42L56_BEEP_ONTIME_MASK 0x0f 137272b5eddSBrian Austin #define CS42L56_BEEP_OFFTIME_MASK 0xe0 138272b5eddSBrian Austin #define CS42L56_BEEP_CFG_MASK 0xc0 139272b5eddSBrian Austin #define CS42L56_BEEP_TREBCF_MASK 0x18 140272b5eddSBrian Austin #define CS42L56_BEEP_BASSCF_MASK 0x06 141272b5eddSBrian Austin #define CS42L56_BEEP_TCEN_MASK 0x01 142272b5eddSBrian Austin #define CS42L56_BEEP_RATE_SHIFT 4 143272b5eddSBrian Austin #define CS42L56_BEEP_EN_MASK 0x3f 144272b5eddSBrian Austin 145272b5eddSBrian Austin 146272b5eddSBrian Austin /* Supported MCLKS */ 147272b5eddSBrian Austin #define CS42L56_MCLK_5P6448MHZ 5644800 148272b5eddSBrian Austin #define CS42L56_MCLK_6MHZ 6000000 149272b5eddSBrian Austin #define CS42L56_MCLK_6P144MHZ 6144000 150272b5eddSBrian Austin #define CS42L56_MCLK_11P2896MHZ 11289600 151272b5eddSBrian Austin #define CS42L56_MCLK_12MHZ 12000000 152272b5eddSBrian Austin #define CS42L56_MCLK_12P288MHZ 12288000 153272b5eddSBrian Austin #define CS42L56_MCLK_22P5792MHZ 22579200 154272b5eddSBrian Austin #define CS42L56_MCLK_24MHZ 24000000 155272b5eddSBrian Austin #define CS42L56_MCLK_24P576MHZ 24576000 156272b5eddSBrian Austin 157272b5eddSBrian Austin /* Clock ratios */ 158272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_128 0x08 159272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_125 0x09 160272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_136 0x0b 161272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_192 0x0c 162272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_187P5 0x0d 163272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_256 0x10 164272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_250 0x11 165272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_272 0x13 166272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_384 0x14 167272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_375 0x15 168272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_512 0x18 169272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_500 0x19 170272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_544 0x1b 171272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_750 0x1c 172272b5eddSBrian Austin #define CS42L56_MCLK_LRCLK_768 0x1d 173272b5eddSBrian Austin 174272b5eddSBrian Austin 175272b5eddSBrian Austin #define CS42L56_MAX_REGISTER 0x34 176272b5eddSBrian Austin 177272b5eddSBrian Austin #endif 178